TW595288B

TW595288B - Manufacturing method of circuit board

Info

Publication number: TW595288B
Application number: TW92109136A
Authority: TW
Inventors: Ming-Hsing Liu; Ming-Hsiang Yang; Yuan-Fa Chu; Lu-Lin Hung
Original assignee: Neo Led Technology Co Ltd
Priority date: 2003-04-18
Filing date: 2003-04-18
Publication date: 2004-06-21
Also published as: TW200423836A

Abstract

There is provided a manufacturing method of circuit board wherein metal substrate is used as the base material of circuit board. In addition, an insulation layer having a buffer surface is formed on the material substrate, and the buffer surface is provided with micro-holes. Then, a circuit layer is formed on the buffer surface to increase the bonding force between the circuit layer and the insulation layer so as to fulfill the trend of high-density circuit.

Description

595288 案號 92109136 年月595288 Case No. 92109136

五、發明說明（1)V. Description of the invention (1)

【發明所屬之技術領域J 本發明是關於一種電路板之製造方法，特別是關於一種應用半導體技術的電路板之製造方法。【先前技術】 “在電子系統產品中，一般習知用以承載電子元件之e 刷電路板（Printed Circuit Board，PCB)，通常借用/ 璃纖維布或軟性基材作為基底，再於基底印，著電子產品走向「輕薄短小」之設計概念孔徑、高密度、多層數、細線路發展因需ς。目對提尚，習知之電路板製程逐漸難以符合現今的犀、、#此t，常用之軟性銅箔電路板製造方法為塗佈、n β 經高溫硬化之德^ t 層缚的南接著性樹脂，剛性，再進行A塗上弟二層較厚的PI樹脂以增加基板程成本此方法需進行兩次塗佈，i 作為基材，先塗：二二：J f不能太薄：熱壓法為以PI膜將銅箔放置於已硬:2性？ 1 ;經高溫硬化之後，再可塑性P I重新户 =可塑性樹脂上，利用高溫高壓將 ώ: ^ ”谷融契銅箔壓合，敎懕法萝藉斜、度热法降低。同時，益认Η令处…呈法衣私對於基材的厚板製程在製作小孔徑佈ί或熱壓法，習知的電路板，皆有其一定限制。门*又夕層數、細線路之電路印屈ll曾早々4*rr 層或銅箔_古^ ^ ^利用接著劑或熱壓方式，貼P付全屬 …熱性質的材料，來改善印刷電路板[Technical field to which the invention belongs] The present invention relates to a method for manufacturing a circuit board, and more particularly, to a method for manufacturing a circuit board using semiconductor technology. [Previous technology] "In electronic system products, printed circuit boards (PCBs), which are commonly used to carry electronic components, are usually borrowed from / glass fiber cloth or a flexible substrate as a substrate, and then printed on the substrate. With the development of electronic products toward "thin, light and short" design concepts such as aperture, high density, number of layers, and fine line development are needed. For the sake of improvement, the conventional circuit board manufacturing process is gradually difficult to meet the current standards. The commonly used manufacturing method of flexible copper foil circuit boards is coating, n β is hardened by high temperature ^ t. Resin, rigidity, and then apply A to the second layer of thicker PI resin to increase the cost of the substrate. This method requires two coatings, i as the substrate, first coating: 22: J f cannot be too thin: hot pressing The method is to place the copper foil with a PI film on the hardened: 2? 1; After high temperature hardening, the plasticity PI is reset to the plastic resin, and the high-temperature and high-pressure is used to compress the Gu Rongqi copper foil, and the method is reduced by the slope method and the heat method. Order ... For the thick plate manufacturing process of substrates, there are certain restrictions on the conventional circuit boards for making small-aperture cloths or hot pressing methods. Doors and layers, thin circuit circuit imprints 4 * rr layer or copper foil was used as early as possible _ ancient ^ ^ ^ Adhesive or hot pressing is used to affix all materials that are… thermal properties to improve printed circuit boards

第6頁 595288 _案號 92109136 五、發明說明（2) 導性質，以及抑制電礤干捧 i interference，EM I )。作 H (electro magnet i c 鹵素的難燃劑，而難以縣人疋接著劑的配方中需加入含有鹵素的規定，將限制其未:，盟2 0 04年電子產品全面禁用子性不純物，使基板的介:务展。且接著劑中往往添加離下容易造成基板扭曲變形絕緣特性變差，以及在高溫同時，接著劑會因為化學P這，都會降低基板的可靠度。屬接著介面強度下降。所/的银’使得印刷電路板之金避免接著劑的使用，成為=如何在電路板製程中減少甚至 Γ發明肉交1 ”、、包路板的發展趨勢。為改進習知技術的缺造方法。係應用已相當成熟之露：種電路板之製以符合高密度電路的趨勢。、、—衣私來製作電路板，本發明之電路板之製袢金屬基材；於金屬基材表面〉呈ς步驟包含有：提供一其緩衝表面具有微孔洞；於二2緩衝表面之絕緣層，路層表面形成絕緣保護鱗=成電路層；於電處理，再於其上方設置電路2疋對、、:巴緣層進行適當的表面附著力。纟’以增進絕緣層和電路層之本發明可藉由熱氧化、陽极未？田4 4友層的表面形成絕緣層，_戈與；：T鼠等方法使電路法沉積於金屬基材表面。電或物理沉積法等方物理氣相沉鍵和= Γ相沈積法、再配人# w 制^_，、、、鍍法4 +導體技術來完成。丹配口先被衫技術可製作出高密度電路。 595288Page 6 595288 _ Case No. 92109136 V. Description of the invention (2) Conductive properties and suppression of interference (EM I). It is used as a flame retardant for H (electro magnet ic halogen), and it is difficult to add a halogen containing formula to the formulation of the adhesive. It will limit the non-impurities of electronic products in 2004. Adding agent to the adhesive often causes the substrate to distort and deteriorate the insulation properties, and at the same time at high temperature, the adhesive will reduce the reliability of the substrate due to the chemical P. The strength of the bonding interface is reduced. The "Silver" makes the printed circuit board gold avoid the use of adhesives, and it becomes = how to reduce or even invent the meat in the circuit board process 1 ", the development trend of the circuit board. To improve the lack of conventional technology The method is to apply the already mature dew: a kind of circuit board is made to meet the trend of high-density circuits... --- to make circuit boards. The circuit board of the invention is made of metal substrate; on the surface of the metal substrate. 〉 The rendering step includes: providing a buffer surface with micro holes; forming an insulation layer on the surface of the buffer layer on the surface of the buffer layer; forming a circuit layer; forming a circuit layer; A circuit 2 is provided on top of it, and appropriate surface adhesion is provided to the, and: edge layers. 纟 'To improve the insulation layer and the circuit layer of the present invention, the surface of the layer can be insulated by thermal oxidation, and the anode layer is not formed. Layer: _ 戈和; T mouse and other methods to deposit the circuit method on the surface of the metal substrate. Electrical or physical deposition methods such as physical vapor deposition and = Γ phase deposition method, and then with people # w 制 ^ _ ,, 4 、 Conductor technology to complete the plating method. Dan with mouth quilt technology can make high-density circuits. 595288

^^92109136 、發明說明（3) 本發明係以金屬基材作為電形成具有緩衝表面之絕緣層，緩而^ ，於金屬基材 :黏=“生連接之用。電路層表面形成絕緣保 „鏠爲冉曰至屬披覆層來隔絕電磁干擾。、-、巴、、彖層之緩衝表面能增加電路層接荖#1的#田甘π 士 J $刀 k而省去接者片j的使用’其緩衝表面可藉由表面處理絕緣層士面鍍上具有微孔洞結構之薄層形成。、曰或疋；目前電磁干擾（EMI)的防治對策有 · 、隔離（shleiding)、迴路 ·有]濾波（fUtering) W路叹计（Wire layout)、接舞 (bonding)、零件選用及軟丄々兩玖把夕制从山毕人體改善荨專，本發明係可於电路=衣作過程中將金屬披覆層製作路或是直接屏蔽一併组合至電路板表面電 (―⑻⑻電磁干擾的功能，由於電路板之電m 繞線方式，線徑大小或長短，均與電磁干擾的 :!二在ί發明的製程步驟中，可根據電路板的；；與、、:^>、、泉叹计，來调整金屬披覆層所形成的區域。由此可知，在本發明之電路板製程中增加製覆層的步驟能有助於隔絕電磁干擾現象，卩達到本發= 目的。又 j 為使對本發明的目的、構造特徵及其功能有進一步的了解’炫配合圖示詳細說明如下：【實施方式】本ι明揭路一種電路板之製造方法。係應用半導體制程來製作電路板，並面處理或特殊薄膜披覆使^二^^ 92109136, description of the invention (3) The present invention uses a metal substrate as an electrical material to form an insulating layer with a buffer surface, and slowly ^, on the metal substrate: adhesion = "use for connection. The surface of the circuit layer forms an insulation protection"鏠 is a coating layer to isolate electromagnetic interference. The buffer surfaces of the-,-,-,-, and -layers can increase the circuit layer connection # 1 # 田甘 π 士 J $ k k and save the use of the connector piece j 'its buffer surface can be treated by the surface insulation layer The surface is plated with a thin layer having a micro-hole structure. , 疋 or 疋; Current electromagnetic interference (EMI) prevention and control countermeasures include: ·, shleiding, loop · y] filtering (fUtering) W road sigh meter (Wire layout), dancing (bonding), parts selection and soft The two systems are designed to improve the body of the human body from the mountain, and the invention can be used to make a metal coating layer during the circuit = clothing process or directly shield and combine the circuit with the surface of the circuit board Function, due to the electrical winding method of the circuit board, the size or length of the wire diameter, and electromagnetic interference :! In the process steps of the invention, according to the circuit board; and ,,: ^ > ,,, Spring sigh meter to adjust the area formed by the metal coating layer. From this, it can be seen that the step of adding a coating layer in the circuit board manufacturing process of the present invention can help to isolate the phenomenon of electromagnetic interference and achieve the purpose of the present invention. j In order to further understand the purpose, structural features and functions of the present invention, the detailed illustrations are shown in detail below: [Embodiment] This invention discloses a method for manufacturing a circuit board. The semiconductor process is used to make the circuit board. , and Surface treatment or special film coating

第8頁 595288 修正月曰案號 92109136 五、發明說明（4) 表面之絕緣層具有一緩衝表面，而提升電路層與基材的附著力。印參考第1圖至第4圖，其為本發明實施例之製作流程示意圖。首先’提供一銘金屬基材，如第1圖所示，對鋁金屬板材1 〇表層進行陽極處理，以形成氧化鋁絕緣層丨丨，並且於其表層形成具有微孔洞之緩衝表面丨2。由於鋁金屬經過陽，處理之後’會由於溶解和沉積在處理表面產生管胞狀之U孔洞，因此一般需再經封孔處理，才能得到緻密表面:本發明貫施例則利用鋁陽極處理之特性，使氧化鋁絕緣層具有含微孔洞之緩衝表面。 —第2圖所示’於緩衝表面進行表面活化步驟，再析鍍、銅包路層於氧化鋁絕緣層之緩衝表面，緩衝表面之微孔^ ^増加銅電路層2 0的附著力。其銅電路層可在不需電路的區域上括雷供田#料^ α抗電鍍阻劑，再進行化學析鍍來完成，或是利用光=3技術蝕刻銅金屬層以形成電路。第3圖所示，在銅電路層20之表層亦施以適當之氧处如>1於銅電路層2 0表面形成絕緣保護膜2 1。古，ν^4、圖所不，沉積一金屬披覆層30於銅電路層20上 ’二乍為避免雜訊干擾的保護層。緣層11、圖㊆中’、本發明實施例由鋁金屬板材1 〇、氧化鋁絕將鋁金屬C〇與金屬披覆層3°所組成。絕緣層11係為層，再者，，1 〇之表層施以上述之陽極處理形成之氧化鉋 ’氧化銘絕緣層11具有一緩衝表面1 2，緩衝表面Page 8 595288 Amendment No. 92109136 V. Description of the Invention (4) The surface insulation layer has a buffer surface, which improves the adhesion between the circuit layer and the substrate. Reference is made to Figures 1 to 4, which are schematic diagrams of the manufacturing process of the embodiment of the present invention. First, provide a metal substrate. As shown in Figure 1, the surface layer of the aluminum metal plate 10 is anodized to form an alumina insulation layer, and a buffer surface with microvoids is formed on the surface layer. 2 . Because aluminum metal undergoes anodic treatment, tracheid U-shaped holes will be generated on the treated surface due to dissolution and deposition. Therefore, it is generally necessary to perform sealing treatment to obtain a dense surface. Characteristics, so that the alumina insulation layer has a buffer surface containing micro holes. —As shown in Fig. 2 ', the surface activation step is performed on the buffer surface, and then the plating and copper clad layer are applied to the buffer surface of the alumina insulating layer, and the micropores on the buffer surface ^ ^ plus the adhesion of the copper circuit layer 20. The copper circuit layer can be used in areas where no circuit is needed, including lightning supply field # α anti-plating resist, and then completed by chemical plating, or the copper metal layer can be etched using light = 3 technology to form a circuit. As shown in FIG. 3, the surface of the copper circuit layer 20 is also provided with appropriate oxygen such as > 1, and an insulating protective film 21 is formed on the surface of the copper circuit layer 20. In ancient times, ν ^ 4, as shown in the figure, a metal cladding layer 30 is deposited on the copper circuit layer 20. The second layer is a protective layer to avoid noise interference. The edge layer 11, "in the figure", and the embodiment of the present invention are composed of an aluminum metal plate 10, an alumina insulating aluminum metal Co and a metal coating layer 3 °. The insulating layer 11 is a layer, and further, an oxide plane formed by applying the above-mentioned anodizing treatment to a surface layer of 10 is formed. The oxidation insulating layer 11 has a buffer surface 12 and a buffer surface.

595288595288

之微孔洞電路層20 層3 0披覆其中表面形成如表面研緣層表面 I業或半性，常在薄膜。進材料粒子法得到的表面製作學氣相沈化學液相專技術來電路層2 0的避免與金屬層20上方，層之緩衝表，例如 ··在砂處理等，有微孔洞結業領域，為面上以各種沈積處理時成薄膜，因殊構造及功孔洞結構之氣相凝結法和溶液一凝 "骂力口表面，於電路 ’絕緣微孔洞磨、噴製作具導體工材料表行薄膜使其形具有特具有微積法、合成法兀风 ° 附著力。絕緣保護膜2 1形成於披覆層3 0產生短路。金屬彼覆作為避免雜訊干擾的保護層。面可藉由表面處理絕緣層使其絕緣層之表層進行表面處理，則可得到緩衝表面。或是於絕構之薄層。在機械工業、電子了對所使用的材料賦與某種特方法形成具有特殊性質的被覆 ’需以原子或分子的層次控制 t ’可以得到以熱平衡狀態無 ^的薄膜。如直接在其絕緣層薄，，可利用喷覆成型法、化、分子束磊晶法、無電鍍法、膠法（Sol-Gel Synthesis ) 本發明之電路層和金屬材料，並應用化學氣相沈積無電鍍法等半導體技術來完式亦可透過膠合以產生離子上方膠合元件或多層電路層面處理，再於其上方設置電之附著力。絕緣層可為金屬化物等絕緣物質，以及陶瓷披覆層可為銅、金和銀等導電法物理氣相沉積法、電鍍和成。絕緣層和電路層的接合方凡素來接著，或藉以於電路層。或是對絕緣層進行適當的表路層，以增進絕緣層和電路層 f材t化合物，如氧化物或：或一刀子等絕緣材#。形成絕The micro-holes of the circuit layer 20 layer 30 coating on which the surface is formed, such as the surface of the edge layer, or semi-transparent, often in the thin film. The technology of surface fabrication, chemical deposition, and liquid phase obtained by the particle method of the material is used to avoid the circuit layer 20 and the metal layer 20 above, and the buffer table of the layer, for example, in the field of sand processing, etc. Form a thin film when the surface is treated with various depositions, the gas phase condensation method and the solution-condensation method of the structure and the hole structure are used to grind the surface of the circuit's insulating micropores and spray the conductor material The thin film is shaped to have the adhesion of the special method and the synthetic method. The insulating protective film 21 is formed on the coating layer 30 and a short circuit occurs. Metal-on-metal is used as a protective layer to prevent noise interference. The surface can be surface-treated with a surface-treated insulating layer to make the surface layer of the insulating layer to obtain a buffer surface. Or in a thin layer of insulation. In the mechanical industry and electronics, a special method is applied to the materials used to form coatings with special properties ′ It is necessary to control t at the atomic or molecular level to obtain thin films without thermal equilibrium. If the insulating layer is thin directly, the circuit layer and the metal material of the present invention can be applied by spray coating method, chemical conversion, molecular beam epitaxy method, electroless plating method, and gel method (Sol-Gel Synthesis), and chemical vapor phase can be applied. Semiconductor technology, such as deposition electroless plating, can also be completed by gluing to produce a glued element above the ions or a multilayer circuit level treatment, and then set an electric adhesion on it. The insulating layer may be an insulating substance such as a metal compound, and the ceramic coating layer may be a conductive physical vapor deposition method such as copper, gold, and silver, and plating and forming. The joining of the insulating layer and the circuit layer is usually followed by, or by the circuit layer. Or, an appropriate surface layer is applied to the insulating layer to enhance the insulating layer and the circuit layer. Compounds such as oxides or: or a knife and other insulating materials #. Form absolutely

595288 案號 92109136 年月曰修正五、發明說明（6) 緣層的方式很多，可包含熱氧化法、滲氮、氣相沉積、陽極處理等。絕緣層表面不容易附著其他物質，所以可經過表面活化的步驟，活化基材表面或使鈍性表面敏感化。經活化或敏化處理之後，所發揮的主要功能為增加附著強度，即增加電路層（塗佈、析鍍、沉積）與絕緣層間的附著力。舉例來說，一般在絕緣層上進行化學鐘金屬層之前，可利用離子鈀化合物溶液或膠體鈀活化劑進行敏化處理，使鈀吸附在表面形成活化位置，以利於後續的析鍍反應。595288 Case No. 92109136 Date of amendment 5. Description of the invention (6) There are many ways of marginal layer, which can include thermal oxidation, nitriding, vapor deposition, anode treatment, etc. It is not easy to attach other substances on the surface of the insulation layer, so the surface activation step can be used to activate the surface of the substrate or sensitize the blunt surface. After activation or sensitization, its main function is to increase the adhesion strength, that is, to increase the adhesion between the circuit layer (coating, deposition, deposition) and the insulation layer. For example, before performing the chemical clock metal layer on the insulating layer, an ionic palladium compound solution or a colloidal palladium activator may be used to perform a sensitization treatment, so that palladium is adsorbed on the surface to form an activated position, which is beneficial to subsequent plating reactions.

雖然本發明之較佳實施例揭露如上所述，然其並非用以限定本發明，任何熟習相關技藝者，在不脫離本發明之精神和範圍内，當可作些許之更動與潤飾，因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。Although the preferred embodiment of the present invention is disclosed as described above, it is not intended to limit the present invention. Any person skilled in the related art can make some changes and retouching without departing from the spirit and scope of the present invention. The patent protection scope of the invention shall be determined by the scope of the patent application scope attached to this specification.

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Claims

595288 _案號92109136_年月日__ 六、申請專利範圍 1. 一種電路板之製造方法，其步驟包含有：提供一金屬基材；於該金屬基材表面形成一絕緣層；於該絕緣層表面製作一緩衝表面，該緩衝表面具有微孔洞；形成一電路層於該絕緣層表面；及於該電路層表面形成一絕緣保護膜。 2 .如申請專利範圍第1項所述之電路板之製造方法，其中更包含一於該絕緣保護膜上方沉積一金屬彼覆層的步驟。 3 .如申請專利範圍第2項所述之電路板之製造方法，其中該於該絕緣保護膜上方沉積一金屬披覆層的步驟，係以化學氣相沈積法、物理氣相沉積法、電鍍和無電鍍法其中之一方法完成。 4 .如申請專利範圍第2項所述之電路板之製造方法，其中該金屬披覆層材料係選自銅、金和銀所組成的族群其中之一。 5 .如申請專利範圍第1項所述之電路板之製造方法，其中該絕緣層係金屬基材之化合物。 6 .如申請專利範圍第1項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係氧化該金屬基材之表層以形成該絕緣層。 7 .如申請專利範圍第1項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係滲氮進入595288 _case number 92109136_year month__ VI. Patent application scope 1. A method for manufacturing a circuit board, the steps include: providing a metal substrate; forming an insulating layer on the surface of the metal substrate; A buffer surface is formed on the surface of the layer, the buffer surface has micro-holes; a circuit layer is formed on the surface of the insulating layer; and an insulating protective film is formed on the surface of the circuit layer. 2. The method for manufacturing a circuit board as described in item 1 of the scope of patent application, further comprising the step of depositing a metal coating layer on the insulating protective film. 3. The method for manufacturing a circuit board according to item 2 of the scope of patent application, wherein the step of depositing a metal coating layer on the insulating protective film is performed by chemical vapor deposition, physical vapor deposition, or electroplating. And electroless plating. 4. The method for manufacturing a circuit board according to item 2 of the scope of patent application, wherein the metal coating material is selected from one of the group consisting of copper, gold and silver. 5. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the insulating layer is a compound of a metal substrate. 6. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is to oxidize the surface layer of the metal substrate to form the insulating layer. 7. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is performed by nitriding.

第13頁 595288 _案號 92109136_年月日_fvi_ 六、申請專利範圍該金屬基材之表層以形成該絕緣層。 8 .如申請專利範圍第1項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係陽極處理該金屬基材表層以形成該絕緣層。 9 .如申請專利範圍第1項所述之電路板之製造方法，其中該絕緣層係陶瓷材料。 1 0 .如申請專利範圍第1項所述之電路板之製造方法，其中該絕緣層係面分子材料。 1 1.如申請專利範圍第1項所述之電路板之製造方法，其中該絕緣層之該緩衝表面係由該絕緣層之表層經一表面處理所形成。 1 2 .如申請專利範圍第1 1項所述之電路板之製造方法，其中該表面處理係為一表面研磨和一喷砂處理其中之 —— 〇 1 3 .如申請專利範圍第1項所述之電路板之製造方法，其中該絕緣層之該緩衝表面係於絕緣層表面製作具有微孔洞結構之一薄層所形成。 1 4 .如申請專利範圍第1 3項所述之電路板之製造方法，其中該具有微孔洞結構之薄層係由喷覆成型法、化學氣相沈積法、氣相凝結法、分子束蠢晶法、無電鍵法、化學液相合成法及溶液一凝膠法其中之一方法所形成。 1 5 .如申請專利範圍第1項所述之電路板之製造方法，其中該形成一電路層於該絕緣層表面的步驟，係於該絕緣Page 13 595288 _Case No. 92109136_year month_fvi_ VI. Scope of patent application The surface layer of the metal substrate forms the insulating layer. 8. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is anodizing the surface layer of the metal substrate to form the insulating layer. 9. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the insulating layer is a ceramic material. 10. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the insulating layer is a surface molecular material. 1 1. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the buffer surface of the insulating layer is formed by a surface treatment of the surface layer of the insulating layer. 1 2. The method for manufacturing a circuit board as described in item 11 of the scope of patent application, wherein the surface treatment is one of surface grinding and sand blasting-〇1 3. The manufacturing method of the circuit board described above, wherein the buffer surface of the insulating layer is formed on the surface of the insulating layer by forming a thin layer with a micro-hole structure. 14. The method for manufacturing a circuit board according to item 13 of the scope of patent application, wherein the thin layer having a micro-hole structure is formed by spray coating, chemical vapor deposition, vapor condensation, or molecular beam It is formed by one of the stupid crystal method, the electroless bond method, the chemical liquid phase synthesis method and the solution-gel method. 15. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the step of forming a circuit layer on the surface of the insulating layer is related to the insulation

第14頁 595288 _案號 92109136_年月日__ 六、申請專利範圍層表面不需電路的區域上抗電鍍阻劑，再於該絕緣層表面進行化學析鑛來完成。 1 6 .如申請專利範圍第1項所述之電路板之製造方法，其中該形成一電路層於該絕緣層表面的步驟，係沉積一金屬層於該絕緣層表面，再以光微影製程蝕刻該金屬層。 1 7 .如申請專利範圍第1 6項所述之電路板之製造方法，其中該沉積一金屬層於該絕緣層表面的步驟，係以化學氣相沈積法、物理氣相沉積法、電鍍和無電鍍法其中之一方法完成。 1 8 .如申請專利範圍第1項所述之電路板之製造方法，其中該電路層材料係選自銅、金和銀所組成的族群其中之〇 1 9. 一種電路板之製造方法，其步驟包含有：提供一金屬基材；於該金屬基材表面形成一絕緣層；及形成一電路層於該絕緣層表面。 2 0 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該形成一電路層於該絕緣層表面的步驟，該絕緣層和該電路層係以膠合方式產生離子元素來接著。 2 1.如申請專利範圍第1 9項所述之高散熱與低雜訊之電路板，其中該電路層可透過膠合以進行元件黏著。 2 2 .如申請專利範圍第1 9項所述之高散熱與低雜訊之電路板，其中該絕緣層表面係經一活化處理以增加電路層Page 14 595288 _Case No. 92109136_Year_Date__ Sixth, the scope of patent application The anti-plating resist is applied on the surface of the layer without the circuit, and then chemical precipitation is performed on the surface of the insulating layer. 16. The method for manufacturing a circuit board according to item 1 of the scope of patent application, wherein the step of forming a circuit layer on the surface of the insulating layer is to deposit a metal layer on the surface of the insulating layer, and then use a photolithography process. The metal layer is etched. 17. The method for manufacturing a circuit board according to item 16 of the scope of patent application, wherein the step of depositing a metal layer on the surface of the insulating layer is performed by chemical vapor deposition method, physical vapor deposition method, electroplating and One of the electroless plating methods is completed. 1 8. The method for manufacturing a circuit board as described in item 1 of the scope of the patent application, wherein the material of the circuit layer is selected from the group consisting of copper, gold, and silver. 9. A method for manufacturing a circuit board, The steps include: providing a metal substrate; forming an insulating layer on the surface of the metal substrate; and forming a circuit layer on the surface of the insulating layer. 20. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the step of forming a circuit layer on the surface of the insulating layer, the insulating layer and the circuit layer generate ionic elements in a gluing manner and then . 2 1. The circuit board with high heat dissipation and low noise as described in item 19 of the scope of patent application, wherein the circuit layer can be glued for component adhesion. 2 2. The circuit board with high heat dissipation and low noise as described in item 19 of the scope of patent application, wherein the surface of the insulation layer is subjected to an activation treatment to increase the circuit layer

第15頁 595288 _案號92109136_年月日__ 六、申請專利範圍與絕緣層間的附著力。 2 3 .如申請專利範圍第1 9項所述之電路板之製造方法，其中更包含一於該電路層表面形成一絕緣保護膜的步驟。 2 4 .如申請專利範圍第1 9項所述之電路板之製造方法，其中更包含一於該絕緣保護膜上方沉積一金屬披覆層的步驟。 2 5 .如申請專利範圍第2 4項所述之電路板之製造方法，其中該於該絕緣保護膜上方沉積一金屬披覆層的步驟，係以化學氣相沈積法、物理氣相沉積法、電鍍和無電鍍法其中之一方法完成。 2 6 .如申請專利範圍第2 4項所述之電路板之製造方法，其中該金屬披覆層材料係選自銅、金和銀所組成的族群其中之一。 2 7 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該絕緣層係金屬基材之化合物。 2 8 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係氧化該金屬基材之表層以形成該絕緣層。 2 9 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係滲氮進入該金屬基材之表層以形成該絕緣層。 3 0 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該於該金屬基材表面形成一絕緣層的步驟，係陽極Page 15 595288 _ Case No. 92109136 _ Month and Day __ VI. Scope of patent application Adhesion between insulation layer. 2 3. The method for manufacturing a circuit board as described in item 19 of the scope of patent application, further comprising a step of forming an insulating protective film on the surface of the circuit layer. 24. The method for manufacturing a circuit board according to item 19 of the scope of patent application, further comprising a step of depositing a metal coating layer on the insulating protective film. 25. The method for manufacturing a circuit board according to item 24 of the scope of the patent application, wherein the step of depositing a metal coating layer on the insulating protective film is performed by a chemical vapor deposition method or a physical vapor deposition method. One of the methods of electroplating, electroplating, and electroless plating is completed. 26. The method for manufacturing a circuit board according to item 24 of the scope of patent application, wherein the metal coating material is one selected from the group consisting of copper, gold, and silver. 27. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the insulating layer is a compound of a metal substrate. 28. The method for manufacturing a circuit board according to item 19 of the scope of the patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is to oxidize the surface layer of the metal substrate to form the insulating layer. 29. The method for manufacturing a circuit board as described in item 19 of the scope of the patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is nitriding into the surface layer of the metal substrate to form the insulating layer. . 30. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the step of forming an insulating layer on the surface of the metal substrate is an anode

第16頁 595288 _案號92109136_年月日__ 六、申請專利範圍處理該金屬基材表層以形成該絕緣層。 3 1 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該絕緣層係陶曼材料。 3 2 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該絕緣層係高分子材料。 3 3 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該形成一電路層於該絕緣層表面的步驟，係於該絕緣層表面不需電路的區域上抗電鍍阻劑，再於該絕緣層表面進行化學析鍵來完成。 3 4 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該形成一電路層於該絕緣層表面的步驟，係沉積一金屬層於該絕緣層表面，再以光微影製程蝕刻該金屬層。 3 5 .如申請專利範圍第3 4項所述之電路板之製造方法，其中該沉積一金屬層於該絕緣層表面的步驟，係以化學氣相沈積法、物理氣相沉積法、電鍍和無電鍍法其中之一方法完成。 3 6 .如申請專利範圍第1 9項所述之電路板之製造方法，其中該電路層材料係選自銅、金和銀所組成的族群其中之一〇Page 16 595288 _Case No. 92109136_Year_Month__ VI. Scope of patent application The surface layer of the metal substrate is processed to form the insulation layer. 31. The method for manufacturing a circuit board as described in item 19 of the scope of patent application, wherein the insulating layer is a taoman material. 32. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the insulating layer is a polymer material. 3 3. The method for manufacturing a circuit board as described in item 19 of the scope of patent application, wherein the step of forming a circuit layer on the surface of the insulating layer is an anti-plating resist on the surface of the insulating layer that does not require a circuit , And then performing chemical debonding on the surface of the insulating layer to complete. 34. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the step of forming a circuit layer on the surface of the insulating layer is to deposit a metal layer on the surface of the insulating layer, and then photolithography The process etches the metal layer. 35. The method for manufacturing a circuit board according to item 34 of the scope of patent application, wherein the step of depositing a metal layer on the surface of the insulating layer is performed by chemical vapor deposition method, physical vapor deposition method, electroplating and One of the electroless plating methods is completed. 36. The method of manufacturing a circuit board as described in item 19 of the scope of patent application, wherein the material of the circuit layer is one selected from the group consisting of copper, gold and silver.

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