TW574535B - Liquid crystal display device and method for manufacturing the same - Google Patents

Description

574535574535

五、發明説明（1 ) (請先閲讀背面之注意事項再填寫本頁) 本發明係有關於一種液晶顯示裝置及其製造方法，特 別係關於一種液晶顯示裝置，其可在一液晶顯示面板（以下 %為’’LCD面板”）之接墊被以玻璃上設晶片（c〇G)方法來連 接於一外部驅動積體電路時，防止該等接墊或連接於該等 接墊的線路被腐蝕；及一種製造該等液晶顯示裝置的方法。 在今日之資訊化社會中，由於資訊傳輸媒體及各種電 子顯不裝置被廣泛使用於產業裝置及家用器材，故電子顯 示裝置乃愈形重要。該等電子顯示裝置爰被不斷地改良， 俾能具有新的適當功能以滿足資訊社會的各種需求。 一般而言，電子顯示裝置會將各種片段的資訊顯示並 傳送給租显^亥等資訊的使用者。即是，該電子顯示裝置會 將由電子裝置輸出的電資訊信號，轉化成可被使用者以眼 睛來辨識的光資訊信號。 該等電子顯示裝置係分為一種發光式顯示裝置及一 種非發光式顯示裝置’該發光式顯示裝置會經由其發光現 象來顯示光資訊信號，而非發光式顯示裝置則經由其反 射’散射或干涉現象來顯示光資訊信號。該發光顯示裝置 乃包括陰極射線管（CRT)、電漿顯示面板（pdp)、發光二極 體（LED)及電致發光顯示器（ELD)等。該等發光顯示裝置係 被稱為主動式顯示裝置。又，非發光顯示裝置則被稱為被 動式顯示裝置，乃包括液晶顯示裝置（LCD)，電化學顯示 器（ECD)，及電泳影像顯示器（EPID)等。V. Description of the invention (1) (Please read the precautions on the back before filling out this page) The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly to a liquid crystal display device that can be used in a liquid crystal display panel ( The following% "LCD panel") pads are connected to an external drive integrated circuit using the chip on glass (COG) method to prevent such pads or the lines connected to the pads from being damaged. Corrosion; and a method for manufacturing such liquid crystal display devices. In today's information society, since information transmission media and various electronic display devices are widely used in industrial devices and household equipment, electronic display devices are becoming increasingly important. These electronic display devices are constantly being improved and cannot have new appropriate functions to meet the various needs of the information society. Generally speaking, electronic display devices will display and transmit various pieces of information to the rental display and other information. The user. That is, the electronic display device converts the electrical information signal output by the electronic device into light information that can be recognized by the user with his eyes. These electronic display devices are divided into a light-emitting display device and a non-light-emitting display device 'the light-emitting display device displays light information signals through its light-emitting phenomenon, while non-light-emitting display devices reflect through it' Scattering or interference phenomena to display optical information signals. The light-emitting display device includes a cathode ray tube (CRT), a plasma display panel (pdp), a light-emitting diode (LED), and an electroluminescent display (ELD). Light-emitting display devices are called active display devices. Non-light-emitting display devices are called passive display devices, which include liquid crystal display devices (LCD), electrochemical displays (ECD), and electrophoretic image displays (EPID). .

該CRT長久以來已被使用於電視或電腦的螢幕來作為 顯示裝置，因為其具有高品質及低製造成本。但是，該CRT 4 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） 、發明説明（ 亦具有—些缺點，例如較重、體積大、及高耗電等。 近來’對新電子顯示裝置的需求大為增加，例如具有 絕佳特^平板式顯示裝置’其既薄且輕，低驅動電壓又 低耗電I。該等平板顯示裝置可依據快速發展中 技術來被製成。 在該平板式裝置中，一 LCD裝置已被廣泛地使用於各 種電子裝置’因為該LCD裝置具有較薄厚度、低耗電量及 接，於CRT的高顯示品質。又，該LCD裝置可在一低驅動 .Ύ °、下來操作且能被容易地製造，因此該LCD裝置乃被 普通地使用於各種電子裝置。 内 式 示 (請先閲讀背面之注意事項再填寫本頁) -、可| 该LCD|置一般係被分為一種透射式lcd裝置，一種 反射式LCD裝置，及一種反射透射sLCD裝置。該透射式 衣置係使用外部光源來顯示資訊而反射式Lcd裝置則 利用自然光來顯示資訊。該反射透射式LCD裝置以透射模 式來操作時，係使用該顯示裝置之一内建光源，而在室 或一外部光源不存在的暗處來顯示影像；當其以反射模 操作時’係在高度外部照明下藉反射外部入射光而來顯 影像。 第1圖為一立體示意圖，示出一傳統之LCD裝置的LCD 面板；第2圖為一平面圖示出一傳統之LCD面板，及連接於 該LCD面板而用來將之驅動的積體電路；第3圖為一剖視圖 示出該傳統LCD面板之一薄膜電晶體及一接墊區。 請參閱第1、2圖，一LCD裝置具有一LCD面板130可供 顯示影像，及驅動積體電路137與138可產生影像信號。 574535 五、發明説明（ 該LCD面板130包含一第一基材1〇〇，一第二基材1〇2 對設於該第一基材100,及一液晶114被注入於第一基材1〇〇 與第二基材102之間。 有許多的閘極線104與資料線106會呈矩陣狀設在該 第一基材1〇〇上，而像元電極108及薄膜電晶體（TFT)等係被 設在該等閘極線104與資料線1〇6的交又點處。有一濾色片 112及一透明共同電極11〇會被設在第二基材1〇2上。該濾色 片112乃含有紅、綠、藍（R、G、B)像元，而能在光通過該 像元時顯示預定顏色。又，偏振板（未示出）會被設在該第 與第一基材丨00與丨〇2的外側，而可依據該液晶的定向來 保持所透射之光的方向。 4溥膜電as體（TFT)丨09具有一閘極電極15設在第一基 材100上，一閘絕緣層25設在該閘極電極15與第一電極1〇〇 上，一作動紋路30設在該閘絕緣層25上而對應於間極電極 15 ’ -電阻接觸層紋路35設在該作動紋路3()上，而源極電 極4〇與沒極電極45係設在該電阻接觸紋路35上，如第3圖所 鈍化層75會被設在第—基材副上設有該則〇9之 处X鈍化層75係由一無機材料或有機材料所製成。一接 觸孔80會被設來貫穿該鈍化層乃而曝露該汲極電極^。 又’接觸孔等（未示出）亦會被設來貫穿該鈍化層75而曝露 在接墊區中之閘極端子與汲極端子。 則遠2極電極15係連接於閘極線1〇4,而該源極電極40 108故二料線106°該沒極電極45係連接於像元電極 。文…掃描電壓經由該閑極線104來施加於間極電 本紙張尺度適财_家鮮（⑽）A4規格（2歌撕公幻 極15時，-通過該資料線1〇6的信號電壓則會經由該作動紋 路30,而從源極電極40施加於沒極電㈣。當該信號電壓 被施於汲極電極45時，有-電位差會產生於該第二基材102 的共同電極110與連接於該沒極電極45的像元電極⑽之 間。嗣，被注入於該像元電極1〇8與共同電極ιι〇之間的液 晶114之分子排列將會改變，故該液晶114的透光率即會變 化。因此，該TFT109乃形成一可供操作該LCD面板13〇之 像元的切換裝置。 此外第接墊133與第二接墊134係被設在該乙(：：1)面 板130上，如第2圖所示。該第一接墊133係由閘極線刚伸 出，而第二接墊134則由資料線106伸出。該第一接墊133 係連接於可產生該掃描電壓的第一積體電路137，而第二接 墊134則連接於產生該信號電壓的第二積體電路。因 此，由該第一積體電路137所產生的掃描電壓會經由第一接 墊133施加於閘極線1〇4,而由第二積體電路138所產生的信 號電壓則會經由第二接墊134來施加於資料線1〇6。此時， 各種不同的方法乃可用來將第一接墊133連接於該第一積 體電路137,或將第二接墊134連接於第二積體電路138。通 4 ’會有可供連接該等接墊的凸體等被設在該等整合電路 的電極上，而可利用該等凸體來將接墊連接於積體電路。 一般而言，帶式自動連結（TAB)法會被用來將該等接 墊連接於積體電路。依據該TAB法，在一具有金屬線路的 薄膜被固接於該LCD面板，且該積體電路之一電極被使用 凸體來連接之後，一固接於該電極之TAB封裝體的導線 五、發明說明（一~--—---- (請先閱讀背面之注意事項再填寫本頁) 等將會由於該等污染物與接墊及/或線路之間的電化學反 "而可旎破腐蝕或發生短路。故，將會使金屬腐蝕且線 路的電仏號會中斷，而造成該LCD裝置的驅動失敗。 又°亥金屬腐蝕亦會由於相鄰接墊之間的電位差所造 成的電解而來發生。即是，當二金屬之間產生電位差時， :性（+)金屬的電子會移入負性㈠金屬中，因此該正性金 屬會缺乏電子，故最後將會腐蝕。尤其是若相鄰接墊之間 的電位差較大，則該等接墊及/或連接於接墊的線路將更容 易腐Ί虫。 例如，一被施加於裝置之閘極驅動積體電路的閘 極信號可分為一 vQn電壓，一v〇ff電壓，一垂直時訊，及一 垂直啟動脈衝。該V〇n及分別為+1.5V及-7V，則其間 的電位差即為22V。如此高的電位差將會增加電子的遷 移，而來腐蝕被施以該vQn電壓的接墊，故將會使該閘極驅 動積體電路造成驅動失敗。 本發明即用來解決上述之問題，其主要目的係為提供 一種LCD裝置，而能在一 [CD面板之接墊被連接於驅動積 體電路時，防止該等接墊及與之連接的線路被腐蝕。 本發明之另一目的係為提供一種製造LCD裝置的方 法’特別適用於其LCD面板之接墊連接於驅動積體電路 時，能防止接墊或所連接之線路被腐蝕的Lcd裝置者。 為達到本發明之上述目的，所提供的LCD裝置乃包含 一基材，一像元陣列設在該基材的顯示區域上，多個接墊 設在該基材的非顯示區上，及一積體電路設在該基材之該 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐 574535 A7 B7 五、發明説明（5 ) (請先閲讀背面之注意事項再填寫本頁) 會被固接於該LCD面板。即是，在將該積體電路固設於該 LCD面板的外側之後，該積體電路的電極以及該[CD面板 的電極將會被利用該設有金屬線路的薄膜來電連接。 又’一玻璃上設晶片（COG)法亦可取代該tab法，而 來將一驅動積體電路連接於一 LCD面板。依據該c〇G法， 該驅動積體電路會直接被設在該LCD面板上，該積體電路 係僅利用凸體（或爆點）及一異向性導電膜（ACF)來固接於 該LCD面板之基材，而沒有使用該tab法中的薄膜。 第4圖為一剖視圖示出一種可將一積體電路連接於一 LCD裝置的傳c〇G方法。 請參閱第4圖，有一 ACF樹脂153會被設在一基材180 上而對應於一 LCD面板的接墊181等。嗣，有一其上設有凸 體144的積體電路140會被以一熱壓縮法來固設於該基材 180上。因此，散佈於該ACF樹脂153中的導電球154等會被 該等凸體144與接墊181所壓著，而使包封該等導電球154 之一絕緣層（未示出）破開。故，該積體電路14〇之一電極將 會與該LCD面板的接墊181電連接。然後，該積體電路14〇 會被加熱，以使该由於被壓縮處理而已軟化之樹脂1 硬化，俾固接該積體電路14〇與該基材18〇的接墊181。 該COG法乃被廣泛使用於較小或中等尺寸的面板，而來加 強易受外部衝擊或振動之活動產品的耐用性，因為其較TAB法 更簡單易行，且該LCD面板在該LCD裝置中的面積比會增加。 但疋’ *水分或化學品等污染物滲入連接於該積體電 路之凸體的接墊曝露部份時，該等接墊及與之連接的線路The CRT has long been used as a display device for a television or computer screen because of its high quality and low manufacturing cost. However, the paper size of the CRT 4 is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm), the description of the invention (also has some disadvantages, such as heavier, bulkier, and high power consumption, etc.) The demand for display devices has greatly increased, for example, they have excellent and special flat-panel display devices, which are thin and light, low driving voltage, and low power consumption. These flat-panel display devices can be made according to rapidly developing technologies. Among the flat-panel devices, an LCD device has been widely used in various electronic devices' because the LCD device has a thin thickness, low power consumption and connection, and high display quality in CRT. Moreover, the LCD device can be used in A low drive. Ύ °, down operation and can be easily manufactured, so this LCD device is commonly used in various electronic devices. Internal display (Please read the precautions on the back before filling this page)-、 可 | The LCD device is generally divided into a transmissive LCD device, a reflective LCD device, and a reflective transmissive LCD device. The transmissive clothing device uses an external light source to display information and the reflective LCD device Use natural light to display information. When the reflective transmissive LCD device is operated in transmissive mode, one of the display devices uses a built-in light source and displays images in a dark place where a room or an external light source does not exist; when it uses reflective During the mode operation, the image is displayed by reflecting external incident light under high external lighting. Figure 1 is a three-dimensional schematic diagram showing an LCD panel of a conventional LCD device; Figure 2 is a plan view showing a conventional LCD panel and an integrated circuit connected to the LCD panel to drive the LCD panel; FIG. 3 is a cross-sectional view showing a thin film transistor and a pad area of the conventional LCD panel. Please refer to sections 1 and 2 In the figure, an LCD device has an LCD panel 130 for displaying images, and driving integrated circuits 137 and 138 can generate image signals. 574535 V. Description of the Invention (The LCD panel 130 includes a first substrate 100, a first Two substrates 102 are disposed on the first substrate 100, and a liquid crystal 114 is injected between the first substrate 100 and the second substrate 102. There are many gate lines 104 and data lines 106. Will be arranged in a matrix on the first substrate 100, The pixel electrode 108 and the thin film transistor (TFT) are provided at the intersection of the gate line 104 and the data line 106. A color filter 112 and a transparent common electrode 11 are provided. On the second substrate 102. The color filter 112 contains red, green, and blue (R, G, B) picture elements, and can display a predetermined color when light passes through the picture elements. Also, a polarizing plate ( (Not shown) will be provided on the outside of the first and first substrates 00 and 0 2, and the direction of the transmitted light can be maintained according to the orientation of the liquid crystal. 4 溥 film electric as body (TFT) 丨09 has a gate electrode 15 provided on the first substrate 100, a gate insulating layer 25 is provided on the gate electrode 15 and the first electrode 100, and an actuation pattern 30 is provided on the gate insulating layer 25. Corresponding to the electrode electrode 15 ′ -resistive contact layer pattern 35 is provided on the actuation pattern 3 (), and the source electrode 40 and the non-electrode electrode 45 are provided on the resistive contact pattern 35, as shown in FIG. The layer 75 will be provided on the first substrate-substrate where the 〇9 is provided. The passivation layer 75 is made of an inorganic material or an organic material. A contact hole 80 is provided to penetrate the passivation layer and expose the drain electrode ^. Also, a contact hole and the like (not shown) will be provided to penetrate the passivation layer 75 and expose the gate and drain terminals in the pad area. The far 2-pole electrode 15 is connected to the gate line 104, and the source electrode 40 108 is connected to the second material line 106 °. The non-pole electrode 45 is connected to the pixel electrode. Text ... The scanning voltage is applied to the galvano-electric paper through the idler line 104. The paper size is suitable for the home. (Family (⑽) A4 size (2 songs tear the male phantom pole, 15-the signal voltage through the data line 106) Will be applied to the non-electrode electrode from the source electrode 40 through the actuation pattern 30. When the signal voltage is applied to the drain electrode 45, a potential difference will be generated in the common electrode 110 of the second substrate 102 And the pixel electrode ⑽ connected to the non-polar electrode 45. 嗣, the molecular arrangement of the liquid crystal 114 injected between the pixel electrode 108 and the common electrode ιο will change, so the The light transmittance will change. Therefore, the TFT109 forms a switching device for operating the pixels of the LCD panel 13. In addition, the first pad 133 and the second pad 134 are provided in the B (:: 1 ) On the panel 130, as shown in Figure 2. The first pad 133 is just projected from the gate line, and the second pad 134 is projected from the data line 106. The first pad 133 is connected to The first integrated circuit 137 capable of generating the scanning voltage, and the second pad 134 is connected to the second integrated circuit which generates the signal voltage. Therefore, the scanning voltage generated by the first integrated circuit 137 is applied to the gate line 104 through the first pad 133, and the signal voltage generated by the second integrated circuit 138 is connected through the second connection. The pad 134 is applied to the data line 106. At this time, various methods can be used to connect the first pad 133 to the first integrated circuit 137 or to connect the second pad 134 to the second integrated circuit. Circuit 138. Through 4 ', there will be convex bodies for connecting the pads, etc., provided on the electrodes of the integrated circuits, and the convex bodies can be used to connect the pads to the integrated circuit. Generally speaking The TAB method will be used to connect the pads to the integrated circuit. According to the TAB method, a thin film with metal lines is fixed to the LCD panel, and the integrated circuit After an electrode is connected by a convex body, a wire fixed to the TAB package of the electrode V. Description of the invention (1 ~ ---------- (Please read the precautions on the back before filling this page), etc. Corrosion or damage may be caused by the electrochemical reaction between these pollutants and the pads and / or wiring. Short circuit. Therefore, the metal will be corroded and the electric signal of the line will be interrupted, which will cause the driving failure of the LCD device. Also, metal corrosion will also occur due to electrolysis caused by the potential difference between adjacent pads. That is, when a potential difference occurs between two metals, the electrons of the (+) metal will move into the negative rhenium metal, so the positive metal will lack electrons and will eventually corrode. Especially if adjacent If the potential difference between the pads is large, the pads and / or the lines connected to the pads will be more prone to rot. For example, a gate signal applied to the gate drive integrated circuit of the device can be divided into A vQn voltage, a v0ff voltage, a vertical time signal, and a vertical start pulse. If Von is + 1.5V and -7V, the potential difference between them is 22V. Such a high potential difference will increase the migration of electrons, which will corrode the pad to which the vQn voltage is applied, so the gate drive integrated circuit will cause the drive to fail. The present invention is to solve the above problems, and its main purpose is to provide an LCD device, which can prevent such pads and the lines connected to them when a pad of a CD panel is connected to a driving integrated circuit. Corroded. Another object of the present invention is to provide a method for manufacturing an LCD device, which is particularly suitable for an LCD device whose LCD pads are connected to a driving integrated circuit, which can prevent the pads or connected lines from being corroded. In order to achieve the above object of the present invention, the LCD device provided includes a substrate, an array of pixels is disposed on a display area of the substrate, a plurality of pads are disposed on a non-display area of the substrate, and The paper size of the integrated circuit on the substrate is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm 574535 A7 B7 V. Description of the invention (5) (Please read the precautions on the back before filling this page) Is fixed to the LCD panel. That is, after the integrated circuit is fixed on the outside of the LCD panel, the electrodes of the integrated circuit and the electrodes of the [CD panel will be used by the The thin film is connected by a call. Also, a chip on glass (COG) method can also replace the tab method to connect a driving integrated circuit to an LCD panel. According to the cog method, the driving integrated circuit will directly It is set on the LCD panel, and the integrated circuit is only fixed to the substrate of the LCD panel by using a convex body (or a burst point) and an anisotropic conductive film (ACF), without using the tab method. Figure 4 is a cross-sectional view showing an integrated circuit CoG method for connecting to an LCD device. Please refer to FIG. 4, an ACF resin 153 is set on a substrate 180 and corresponds to a pad 181 of an LCD panel, and so on. The integrated circuit 140 of the convex body 144 is fixed on the base material 180 by a thermal compression method. Therefore, the conductive balls 154 and the like dispersed in the ACF resin 153 are covered by the convex bodies 144 and the pads 181. It is pressed so that an insulating layer (not shown) enclosing the conductive balls 154 is broken. Therefore, one of the electrodes of the integrated circuit 140 will be electrically connected to the pad 181 of the LCD panel. Then, The integrated circuit 14o is heated to harden the resin 1 which has been softened by the compression treatment, and the pad 181 of the integrated circuit 14o and the substrate 18 is fixed. The COG method is Widely used in small or medium-sized panels to enhance the durability of mobile products that are susceptible to external shock or vibration, because it is simpler and easier than the TAB method, and the area ratio of the LCD panel in the LCD device will be Increased, but 污染物 '* Contaminants such as moisture or chemicals penetrate into the pads of the convex body connected to the integrated circuit When exposed, these pads and the wiring connected to them

574535 五、發明説明 A7 B7 非纟、、員不區上’而電連接於該等接墊來產生可操作該像元陣 列的彳"遽。導電的阻隔層會被設在連接於該積體電路之各 接墊的周邊部份，而與該各接墊分開。該各導電阻隔層會 藉由°玄積體電路的内部接點，而具有與該各接墊相等的電 位。 又’為達成本發明之目的，乃提供一種Lcd裝置，包 "土材 像元陣列設在該基材之顯示區上。一積體電 又在4基材之一非顯示區上，可產生供操作該像元電極 的仏號夕個輸出接墊連接於多數第一線路的端部，該等 第線路係由该顯示區延伸至非顯示區，並電連接於該積 旦電路的邛份，及多個輸入接塾連接於多數第二線路的 柒σ卩忒等第二線路係被設在該基材的非顯示區上，並電 連接於该積體電路的另一部份。在上述LCD裝置中，與該 各接墊分開的導電阻隔層，會被設在各連接於該積體電路 之輸入接墊的周邊部份上。該導電阻隔層會藉由該積體電 路的内部接點，而具有與各輸入接墊相等的電位。 又’為達到本發明之目的，乃提供一 LCD裝置，其包 各一第一基材具有一像元陣列係含有多數像元而呈矩陣狀 设在該第一基材的中央部份，多個第一接墊設在第一基材 的第一周邊部份上而可施一第一信號於該等像元，及多個 第二接墊設在該第一基材的第二周邊部份上而可施一第二 信號於該等像元；一第二基材設有一濾色片對應於第一基 材的中央部份，一液晶層設在該第一基材與第二基材之 間，第一積體電路係以COG法來與前述第一周邊部份上的 本紙張尺度適财關»^ (⑽）A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁)574535 V. Description of the invention A7 B7 is not connected to the pads and is electrically connected to the pads to generate a 彳 " 可 that can operate the pixel array. A conductive barrier layer is provided at a peripheral portion of each pad connected to the integrated circuit, and is separated from each pad. Each conductive resistance interlayer will have a potential equal to that of each of the pads through the internal contacts of the scum body circuit. In order to achieve the purpose of the present invention, an LCD device is provided, in which an earth element pixel array is provided on a display area of the substrate. An integrated circuit is on a non-display area of the 4 substrates, and can generate the output pads for operating the pixel electrodes to be connected to the ends of most first lines, and the first lines are displayed by the display. The second line is extended to the non-display area, and is electrically connected to the component of the product circuit, and a plurality of input connections are connected to most of the second lines. Area and is electrically connected to another part of the integrated circuit. In the above-mentioned LCD device, a conductive barrier layer separated from each of the pads is provided on a peripheral portion of each of the input pads connected to the integrated circuit. The conductive resistance interlayer will have the same potential as each input pad through the internal contacts of the integrated circuit. In order to achieve the object of the present invention, an LCD device is provided. Each of the first substrates has an array of picture elements. The first substrate has a plurality of picture elements and is arranged in a matrix in the center of the first substrate. A first pad is disposed on the first peripheral portion of the first substrate to apply a first signal to the pixels, and a plurality of second pads is disposed on the second peripheral portion of the first substrate. A second signal can be applied to the pixels; a second substrate is provided with a color filter corresponding to the central portion of the first substrate, and a liquid crystal layer is provided on the first substrate and the second substrate. Between materials, the first integrated circuit uses the COG method to match the paper size on the first peripheral part »^ (⑽) A4 size (210X297 mm) (Please read the precautions on the back before (Fill in this page)

574535 A7 I--------」7 五、發明説明（8 ) — -~— (請先閲讀背面之注意事項再填寫本頁) 帛接墊連接’及第二積體電路亦以COG法來與第二周邊 料上的第二接塾連接。與該各第_接墊分開的第一阻隔 ㈣被設在連接於第_積體電路之各第—接墊的周邊部份 f 第二接墊分開的第二阻隔層則被設在連接於 帛二積體電路之各第二接墊的周邊部份上。該各第一阻隔 ^會具有與各第_接塾相等的電位，·各第二阻隔層會 具有與各第二接墊相等的電位。 ^達成本發明之另-目的，乃提供-種製造液晶顯示 裝置的方法，包含下列步驟：在一基材上製成多數線路， 在Λ專線路及基材上製成一鈍化層，部份地餘刻該鈍化層 來開放該各線路的接觸區，在前述結構上沈積一導電層， 並將之圖案化來形成多數接墊並經由該等接觸區連接於各 線路，又同時在各連接於一外部積體電路之接墊的周邊部 份製成導電阻隔層，該等導電阻隔層係與各接墊分開，而 具有與该各接墊相等的電位，及將該等接墊與該外部積體 電路連接。 I 依據本發明，具有相等電位的阻隔層會與各接墊分 開’並被設在連接於該積體電路之各接墊的周邊部份上。 该專導電阻隔層係由相同於該等接墊的膜層所製成。 在本發明之一較佳實施例中，該導電阻隔層係被製成 封閉環圈狀。 依據本發明之一第二較佳實施例，該導電阻隔層係被 製成開放環圈狀，俾可防止洩漏電流產生於一連接該接墊 的線路與一具有相等電位的導電位的導電阻隔層之間。 本紙張尺度適用中國國家標準（CNS) Α4規格（210χ297公楚） -i i - 574535 A7 " --- B7 五、發明説明（9 ) -- 在本發明之一楚一 a 、 弟二貫施例中，導電緩衝層等會被設在 ^:於^亥各接墊之線路的兩側，而由該各接墊與導電阻隔 層大出’以防止該等阻隔層被例如水分或化學品等污染物 所腐飾。 在本發明之一第四實施例中，該等導電阻隔層係被設 在連接於各接墊之各線路的兩㈣，而與該各接塾分開。因 此，藉e亥積體電路的内部接點，該各接塾與周邊的導電阻 隔層會具有相等的電位。 在本發明之一第五實施例中，至少有一接地線會被設 在連接於忒積體電路的各接墊之間，俾使與連接於積體電 路之接墊具有相等電位的其它接塾能避免被腐餘。 圖式之簡單說明： 本發明之上述及其它的目的和優點等，將可參閱以下 之詳細說明並參酌所附圖式而更容易暸解；其中： 第1圖為一習知LCD裝置之一LCD面板的立體示意圖； 第2圖為一平面圖示出一習知lcd面板與連接於該 LCD面板來將之驅動的積體電路； 第3圖為一剖視圖示出該習知lcd面板之一 tft及一 接墊區； 第4圖為一剖視圖示出一種將積體電路連接於1^(：1)裝 置的習知COG法； 第5圖為本發明之一 LCD裝置的LCD面板之平面圖； 第6圖為一平面圖示出本發明第一實施例之一閘極驅 動積體電路的閘極輸入墊部； 12 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） 574535 A7 ---------- —__B7 五、發明説明（17^ '~ =7圖為第6圖中之” a”部份的剖視圖； 第8A至8D圖為製造本發明第_實施例iLCD裝置的 方法之剖視示意圖； 第9圖為一平面圖不出本發明第二實施例之閘極驅動 積體電路的閘極輸入塾部； 第10圖為一平面圖示出本發明第三實施例之閘極驅 動積體電路的閘極輸入墊部；及 第11圖為一平面圖示出本發明第四實施例之閘極驅動 積體電路的閘極輸入墊部。 第12圖為一平面圖示出本發明第五實施例之閘極驅 動積體電路的閘極輸入墊部。 以下’依據本發明較佳實施例之LCD裝置及製造該 LCD裝置的方法，將參照所附圖式來詳細說明。 第5圖為一平面圖示出本發明之lcd裝置的LCD面板。 請參閱第5圖，本發明之一 LCD面板乃包含一第一基材 2〇〇，一第二基材400對設於該第一基材2〇〇，及一液晶（未 不出）被注入於該第一基材2〇〇與第二基材4〇〇之間。 有許多的閘極線與資料線（未示出）會呈矩陣狀被設在 該第一基材200上，及一像元電極與一 TFT(未示出）會被設 在該等閘極線和資料線的交又點處。 有一濾、色片及一透明共同電極（未示出）會被設在第二 基材400上。該濾色片含有紅綠藍（Rgb)像元，在當光通過 該等RGB像元時，會發出預定的顏色。該第一與第二基材 200與400乃被設成互相相對，並在液晶被注入其間之後會 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） 13 (請先閲讀背面之注意事項再填寫本頁) .訂· 574535 A7 〜^— - B7 JT ............ - 立、發明説明（n ) 互相結合。又，有一偏振板（未示出）可被固設於該第一與 第二基材200與400的外側，而能依據該液晶的定向來保持 外部光的傳送方向。 該第二基材4〇〇的面積係小於第一基材2〇〇。該第一基 材200與第二基材4〇〇重疊的部份會形成一顯示區32〇，而在 °亥重宜部伤以外的區域，則會形成非顯示區3 2 5。 在該非顯示區325中，有一第一COG積體電路（IC)500 的端子（即輸出端子）會連接於接塾268(以下稱為，，第一輸 出接墊”）’該等接墊係連接於閘極線的端部，而該等閘極 線會由該基材200的顯示區320延伸至非顯示區325。該第一 COG 1C500係為閘極驅動積體電路。該第一 c〇G IC500的 其它端子（即一輸入端子）會經由第一信號線來連接於一撓 性印刷電路（FPC)(未示出）。同時，第一輸入接塾270會連 接於該等第一信號線的端部。 此外，一第二COG IC450的端子（即一輸出端子）會連 接於接墊272(以下稱為”第二輸出接墊”），該接墊係連接於 由第一基材200的顯示區320延伸至非顯示區325的資料線 等之端部。該第二COG IC450係為資料驅動積體電路。該 第二COG IC450的其它端子（即一輸入端子）係經由第二信 號線等來連接於該FPC。同時，第二輸入接墊274會連接於 該等第二信號線的端部。 該等輸入接墊270與274會將由該FPC所產生的信號傳 送至該COG IC450至500,而該等輸出接墊268與272會將由 COG IC450與500所產生的操作信號傳送至設在該顯示區 14 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（™S) A4規格（210X297公釐） 574535 A7 B7 五、發明説明（l2 ) 320上的像元陣列。 一般而言，有許多連接於閘極線與資料線端的輸出接 墊268與272等係呈鋸齒狀排列，因為大量的輸出信號會令 其間距十分狹窄。故，連接於該等輸出接墊268與272的 COG IC450與500之輸出端子，亦會呈鋸齒狀列設。另一方 面，連接於信號線之端部的輸入接墊270與274等係呈一直 線排列，因為較小數量的輸入信號可使其間距比輸出接墊 268與272等更寬。因此，連接於輸入接墊270與274的COG IC450和500之輸入端子係呈直線排列。 至於該等連接於該驅動1C之輸出端子的輸出接墊268 與272等，在相鄰接墊之間的電位差很小。相反地，在連接 於該驅動1C之輸入端子的輸入接墊270與274等中之相鄰接 墊間的電位差很大。結果，電子的遷移將會增加而來腐蝕 一連接於對應輸入接墊的線路。因此，發明人乃建議將導 電阻隔層設在該等輸入接墊274與270的周邊部份上，俾當 該積體電路被固接於該等接墊時，能防止連接於該等輸入 接墊270與274的線路被腐蝕。 第6圖為一平面圖，乃示出本發明第一實施例之一閘 極驅動積體電路的閘極輸入墊部，而第7圖為第6圖中 之’’A”部份的剖視圖。 請參閱第6及7圖，有許多的信號線224會被設在第1基 材200上，該第一基材200係設有TFTs及像元電極。該各信 號線224會被一閘極絕緣層225及一鈍化層250所覆層。有多 數對應於各信線224的墊揍觸孔260等，將會貫穿該鈍化層 本紙張尺度適用中國國家標準（CNS) Α4规格（210X297公釐） 15 (請先閲讀背面之注意事項再填寫本頁) 訂| 574535 A7 B7 五、發明説明（l3 ) (請先閲讀背面之注意事項再填寫本頁) 250與閘極絕緣層225而來形成。有多數的COG 1C輸入接墊 270被設在該鈍化層250上。該等COG 1C輸入接墊270會經 由該等接觸孔260來連接於對應信號線224的端部。 一異向性導電膜（ACF)樹脂520會被塗設在輸入接墊 270上。該ACF樹脂520中含有許多的導電球530。 當該閘極驅動1C之COG IC500的許多凸體5 10等，被對 準並壓縮於所對應的輸入接墊270上時，介於該等凸體510 與輸入接墊270之間的導電球530將會被壓縮，因此該COG IC500能與輸入接墊270等互相接觸。 在本發明之該第一實施例中，與該各輸入接墊270分 開的導電阻隔層275等，將會被設在連接於該COG IC500 之各輸入接墊270周邊部份上。該導電阻隔層275會由於該 COG IC500的内部接點，而具有與各輸入接墊270相對的電 位。該導電阻隔層275係由與輸入接墊270相同的料層所製 成。通常，由於該等接墊270係由與像元電極相同的料層來 製成，故該等導電阻隔層275在一透射式LCD裝置中會由一 透明導電膜來製成，例如銦錫氧化物（ITO)或銦鋅氧化物 (IZO)等。或者，在一反射式LCD裝置中，該導電阻隔層275 會由例如紹（A1)、铭合金、銀、銀合金等之反射金屬膜來 製成。 最好是，該導電阻隔層275係被設成一封閉環圈狀， 如第6圖所示。故，當該COG IC500與輸入接墊270等互相 固接時，包圍該各輸入接墊270周邊之封閉環圈狀的導電阻 隔層275，將會藉由該COG IC500之内部接點520等，而具 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） -16 - 574535 A7 ____ B7___ 五、發明説明（丨4 ) 有相對於該各輸入接墊270的電位。因此，當例如水分或化 學品等污染物滲入該接墊部而與該c〇G IC5〇〇的凸體接觸 時，由於該導電阻隔層275具有相對的電位，故其所對應的 輸入接墊270不會曝現於該等污染物。即是，該導電阻隔層 275會扮演防止該等輸入接墊27〇與連接於輸入接墊27〇的 信號線224被腐蝕的角色。 第8A至8B圖為製造本發明該第一實施例之LCD裝置 的製造方法之剖視圖。第8八至8〇圖乃示出一具有底部閘極 結構的薄膜電晶體LCD裝置。 請參閱第8八圖，-第一金屬層會被沈積在由玻璃或陶 瓷等非導電材料所製成之一絕緣基材2〇〇上，並被以光微影 法來圖案化而形成一閘極線路。該第一金屬層係由一厚度 約500人的鉻（0〇層及一厚度約為25〇〇人的鋁鈥（八1_>^)層 來製成。該閘極線路包含一閘極線沿一第一方向由該基材 200之一顯示區延伸至一非顯示區，一閘極電極215由該閘 極線分支形成，並有一閘極端子（未示出）設在該閘極線之 知邛同h第彳5號線224會沿該第一方向被設在該基 材200的非顯示區域上。該等第一信號線224會連接於第一 COG IC500的輸入端子（參見第5圖)該^係^閘極驅動 ic。取好是，該等第一信號線224係由形成該閘極線路的金 屬層來製成。X，連接於資料驅動IC之第：c〇gic45〇(見 第5圖）的輸入端子之第二信號線等（未示出），考量線路電 阻之故最好亦由該閘極線路的金屬層來製成。 請茶閱第8B圖，氮化石夕會被以電漿強化之化學氣相沈 本紙張尺度適财關緒準_ A4^10X297公釐) 17 (請先閲讀背面之注意事項再填寫本頁)574535 A7 I -------- "7 V. Description of the invention (8) —-~ — (Please read the precautions on the back before filling this page) 帛 The connection of pads' and the second integrated circuit are also based on The COG method is used to connect with the second socket on the second peripheral material. A first barrier 分开 separated from each of the _ pads is provided at the peripheral portion of each of the _ pads connected to the _ integrated circuit. A second barrier layer separated from the second pads is provided at the The peripheral part of each second pad of the two integrated circuit. Each of the first barrier layers will have a potential equal to that of each of the first contacts, and each of the second barrier layers will have a potential equal to that of each of the second pads. The purpose of the invention is to provide a method for manufacturing a liquid crystal display device, which includes the following steps: forming a plurality of circuits on a substrate, and forming a passivation layer on the circuit and the substrate. The passivation layer is etched to open the contact areas of the various lines. A conductive layer is deposited on the aforementioned structure and patterned to form a plurality of pads and connected to the lines through the contact areas. Conductive resistance barriers are formed on the peripheral portions of the pads of an external integrated circuit. These conductive barriers are separated from each pad and have a potential equal to that of each pad, and the pads and the External integrated circuit connection. According to the present invention, a barrier layer having an equal potential is separated from each pad and is provided on a peripheral portion of each pad connected to the integrated circuit. The conductive resistive spacer is made of the same film layer as the pads. In a preferred embodiment of the present invention, the conductive barrier layer is formed in a closed loop shape. According to a second preferred embodiment of the present invention, the conductive barrier layer is formed into an open loop shape, which can prevent leakage current from being generated in a line connecting the pad and a conductive barrier having a conductive potential of equal potential. Between layers. This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 Gongchu) -ii-574535 A7 " --- B7 V. Description of the invention (9)-In one of the inventions, Chu Yi a, the second brother For example, a conductive buffer layer and the like will be provided on both sides of the wiring of each pad, and the pads and the conductive resistance barrier layer will be made larger to prevent such barrier layers from being exposed to moisture or chemicals, for example. And other pollutants. In a fourth embodiment of the present invention, the conductive barrier layers are provided on two sides of each line connected to each pad, and are separated from the respective lines. Therefore, by using the internal contacts of the integrated circuit, each of the contacts and the surrounding conductive barrier layer will have the same potential. In a fifth embodiment of the present invention, at least one ground wire is provided between the pads connected to the integrated circuit, so that other contacts having the same potential as the pads connected to the integrated circuit Can avoid being leftover. Brief description of the drawings: The above and other objects and advantages of the present invention will be more easily understood by referring to the following detailed description and referring to the attached drawings; wherein: FIG. 1 is an LCD of a conventional LCD device A schematic perspective view of the panel; FIG. 2 is a plan view showing a conventional LCD panel and an integrated circuit connected to the LCD panel to drive the same; and FIG. 3 is a sectional view showing one of the conventional LCD panels. And a pad area; FIG. 4 is a sectional view showing a conventional COG method for connecting an integrated circuit to a 1 ^ (: 1) device; FIG. 5 is a plan view of an LCD panel of an LCD device according to the present invention; Fig. 6 is a plan view showing a gate input pad portion of a gate driving integrated circuit according to a first embodiment of the present invention; 12 (Please read the precautions on the back before filling this page) This paper is applicable to China Standard (CNS) A4 specification (210X297 mm) 574535 A7 ---------- --__ B7 V. Description of the invention (17 ^ '~ = 7 Figure is a sectional view of the "a" part in Figure 6 8A to 8D are schematic sectional views of a method for manufacturing an iLCD device according to the _th embodiment of the present invention; FIG. 10 is a plan view showing a gate input part of a gate driving integrated circuit of the second embodiment of the present invention; FIG. 10 is a plan view showing a gate of a gate driving integrated circuit of the third embodiment of the present invention FIG. 11 is a plan view showing a gate input pad of a gate driving integrated circuit according to a fourth embodiment of the present invention. FIG. 12 is a plan view showing a fifth embodiment of the present invention. The gate input pad portion of the gate drive integrated circuit. The LCD device and method of manufacturing the LCD device according to the preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings. FIG. 5 is a plan view An LCD panel of an LCD device according to the present invention is shown. Referring to FIG. 5, an LCD panel of the present invention includes a first substrate 200 and a second substrate 400 disposed on the first substrate 2. 〇, and a liquid crystal (not shown) is injected between the first substrate 200 and the second substrate 400. Many gate lines and data lines (not shown) will be in a matrix shape. Is disposed on the first substrate 200, and a pixel electrode and a TFT (not shown) are disposed on the gates The intersection with the data line. A filter, a color filter, and a transparent common electrode (not shown) will be provided on the second substrate 400. The color filter contains red, green and blue (Rgb) pixels. When light passes through these RGB pixels, a predetermined color will be emitted. The first and second substrates 200 and 400 are set to face each other, and after the liquid crystal is injected there, the paper standard will apply the Chinese national standard ( CNS) A4 specification (210X297 mm) 13 (Please read the precautions on the back before filling out this page). Order · 574535 A7 ~ ^ —-B7 JT ............-Legislation, invention Explanations (n) are combined with each other. In addition, a polarizing plate (not shown) may be fixed on the outside of the first and second substrates 200 and 400, so that the direction of external light transmission can be maintained according to the orientation of the liquid crystal. The area of the second substrate 400 is smaller than that of the first substrate 200. The overlapping portion of the first substrate 200 and the second substrate 400 will form a display area 32, and in areas other than the severe part damage, a non-display area 3 25 will be formed. In the non-display area 325, a terminal (ie, an output terminal) of the first COG integrated circuit (IC) 500 will be connected to the connector 268 (hereinafter, referred to as the “first output pad”). Connected to the ends of the gate lines, and the gate lines will extend from the display area 320 to the non-display area 325 of the substrate 200. The first COG 1C500 is a gate drive integrated circuit. The first c 〇G IC500 other terminals (ie an input terminal) will be connected to a flexible printed circuit (FPC) (not shown) through the first signal line. At the same time, the first input connector 270 will be connected to the first The end of the signal line. In addition, a terminal (ie, an output terminal) of a second COG IC450 is connected to a pad 272 (hereinafter referred to as a "second output pad"), which is connected to the first base The display area 320 of the material 200 extends to the ends of the data lines and the like of the non-display area 325. The second COG IC450 is a data-driven integrated circuit. The other terminals (ie, an input terminal) of the second COG IC450 are connected via the first Two signal wires, etc. are connected to the FPC. At the same time, the second input pad 274 is connected to the first FPC. The end of the signal line. The input pads 270 and 274 will transmit the signals generated by the FPC to the COG IC450 to 500, and the output pads 268 and 272 will transmit the operation signals generated by the COG IC450 and 500. Send to the display area 14 (Please read the precautions on the back before filling in this page) This paper size applies the Chinese National Standard (™ S) A4 specification (210X297 mm) 574535 A7 B7 V. Description of the invention (l2) 320 In general, there are many output pads 268 and 272 connected to the gate and data lines, which are arranged in a zigzag pattern, because a large number of output signals will make the distance very narrow. Therefore, connect to The output terminals of the COG IC450 and 500 of these output pads 268 and 272 will also be arranged in a zigzag pattern. On the other hand, the input pads 270 and 274 connected to the end of the signal line are arranged in a straight line because The smaller number of input signals can make the pitch wider than the output pads 268 and 272, etc. Therefore, the input terminals of the COG IC 450 and 500 connected to the input pads 270 and 274 are arranged in a straight line. Drive 1C Loss The output pads 268, 272, etc. of the terminal have a small potential difference between adjacent pads. Conversely, between the adjacent pads of the input pads 270, 274, etc. connected to the input terminal of the drive 1C The potential difference is large. As a result, the migration of electrons will increase to corrode a line connected to the corresponding input pad. Therefore, the inventor proposes to set a conductive resistance barrier on the peripheral portions of these input pads 274 and 270 When the integrated circuit is fixed to the pads, the lines connected to the input pads 270 and 274 can be prevented from being corroded. FIG. 6 is a plan view showing a gate input pad portion of a gate driving integrated circuit according to a first embodiment of the present invention, and FIG. 7 is a cross-sectional view of a portion “A” in FIG. 6. Please refer to FIGS. 6 and 7, a plurality of signal lines 224 will be provided on the first substrate 200. The first substrate 200 is provided with TFTs and pixel electrodes. Each signal line 224 will be provided with a gate electrode. Covered by an insulating layer 225 and a passivation layer 250. Most of the pad contact holes 260 corresponding to each letter line 224 will pass through the passivation layer. This paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm). ) 15 (Please read the notes on the back before filling this page) Order | 574535 A7 B7 V. Description of the invention (l3) (Please read the notes on the back before filling this page) 250 and the gate insulation layer 225 A plurality of COG 1C input pads 270 are provided on the passivation layer 250. The COG 1C input pads 270 are connected to the ends of the corresponding signal lines 224 through the contact holes 260. An anisotropic conductive A film (ACF) resin 520 is coated on the input pad 270. The ACF resin 520 contains many conductive balls 53 0. When the gate drives many of the convex bodies 5 of the COG IC500 of 1C, etc., are aligned and compressed on the corresponding input pads 270, the distance between the convex bodies 510 and the input pads 270 The conductive ball 530 will be compressed, so the COG IC 500 can be in contact with the input pads 270 and the like. In the first embodiment of the present invention, the conductive resistance spacers 275 and the like separated from the input pads 270 will be It is provided on a peripheral portion of each input pad 270 connected to the COG IC500. The conductive resistance spacer 275 has a potential opposite to each input pad 270 due to the internal contacts of the COG IC500. The conductive resistance spacer 275 is made of the same material layer as the input pad 270. Generally, since the pads 270 are made of the same material layer as the pixel electrode, the conductive resistance spacer 275 is a transmissive LCD The device may be made of a transparent conductive film, such as indium tin oxide (ITO) or indium zinc oxide (IZO), etc. Alternatively, in a reflective LCD device, the conductive resistance barrier layer 275 may be made of, for example, ( A1), reflective alloy film of Ming alloy, silver, silver alloy, etc. The conductive resistance barrier layer 275 is set in a closed loop shape, as shown in Fig. 6. Therefore, when the COG IC500 and the input pad 270 are fixed to each other, the closed ring surrounding the periphery of each input pad 270 is fixed. The ring-shaped conductive resistance spacer layer 275 will use the internal contact 520 of the COG IC500, etc., and the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -16-574535 A7 ____ B7___ 5. DESCRIPTION OF THE INVENTION (4) There is a potential relative to each input pad 270. Therefore, when pollutants such as moisture or chemicals penetrate into the pad portion and come into contact with the convex body of the CG IC500, the conductive resistance barrier layer 275 has a relative potential, so its corresponding input pad 270 will not be exposed to these pollutants. That is, the conductive barrier layer 275 plays a role of preventing the input pads 27 and the signal lines 224 connected to the input pads 27 from being corroded. 8A to 8B are cross-sectional views of a manufacturing method of an LCD device according to the first embodiment of the present invention. Figures 88 to 80 show a thin film transistor LCD device having a bottom gate structure. Please refer to Fig. 88.-The first metal layer is deposited on an insulating substrate 200 made of a non-conductive material such as glass or ceramic, and is patterned by photolithography to form a Gate line. The first metal layer is made of a layer of chromium (500 layers with a thickness of about 500 people and a layer of aluminum (eight 1_) with a thickness of about 25,000 people. The gate line includes a gate line Extending from a display area to a non-display area of the substrate 200 along a first direction, a gate electrode 215 is formed by branching the gate line, and a gate terminal (not shown) is provided on the gate line. It is known that the No. 5 line 224 is arranged along the first direction on the non-display area of the substrate 200. The first signal lines 224 are connected to the input terminals of the first COG IC 500 (see No. Figure 5) The ^ gate driving IC. Fortunately, the first signal lines 224 are made of a metal layer forming the gate circuit. X, connected to the data driving IC: cogic45 〇 (see Figure 5), the second signal line of the input terminal (not shown), considering the line resistance is also preferably made of the metal layer of the gate line. Please refer to Figure 8B, nitrogen Fossil evening will be enhanced by plasma-enhanced chemical vapor deposition. Paper size is suitable for financial and financial standards. _ A4 ^ 10X297mm) 17 (Please read the precautions on the back before filling in this )

至 料 端 薄 閘 兩 574535 五、發明説明（is ) 積（PECVD)法來在設有閘極線路與第一信號線224之該基 材200的整個表面上，沈積大約45叫的厚度，而形成一問 極絕緣層225。 作動層，例如一非結晶石夕層，亦會被以法來 在該閘極絕緣層225上，沈積大約2000A的厚度。一電阻接 觸層例如η摻雜的非結晶石夕層，亦會被以pECVD法在該 作動層上沈積大約500 A的厚度。此時，該非結晶矽層及n+ 摻雜非結曰曰曰石夕層會在該p E c v D設備的同一腔室巾來被原 位沈積。嗣，該電阻接觸層與該作動層會經由一光微影製 耘來圖案化，而在閘極電極215上方的閘極絕緣層上，形成 一由該非結晶矽層所構成的作動紋路23〇，及一由該n+摻雜 非結晶矽層所構成的電阻接觸層紋路235。 一第二金屬層，例如鉻（Cr)、鉻鋁（Cr-Al)、或鉻鋁鉻 (Cr-Al-Cr)等會被以濺鍍法來在上述結構之整個表面上沈 積大約1500至4000 A的厚度。嗣，該第二金屬層會經由一 光微影製程來圖案化，而形成一資料線路。該資料線路包 含一資料線乃沿一第二方向由該基材2〇〇的顯示區延伸 其非顯示區，一源極電極24〇與一汲極電極245會由該資 線/刀支伸出，及一汲極端子（未示出）位於該資料線之一 部。該第二方向係垂直於前述第一方向。故，乃完成一 膜電晶體300’其具有閘極電極215、作動紋路23〇、電阻接 觸層紋路235、源極電極240、汲極電極245等。此等，該 極絕緣層225係被介設於閘極線與資料線之間，而可阻止 者接觸。 (請先閲讀背面之注意事項再填窝本頁) ’、可|To the material end thin gate two 574535 5. Inventive (is) product (PECVD) method to deposit a gate line and the first signal line 224 on the entire surface of the substrate 200, a thickness of about 45, and An interrogation insulating layer 225 is formed. An active layer, such as an amorphous layer, is also deposited on the gate insulating layer 225 by a thickness of about 2000 A. A resistive contact layer, such as an n-doped amorphous stone layer, is also deposited on the active layer by pECVD to a thickness of about 500 A. At this time, the amorphous silicon layer and the n + doped non-junction layer will be deposited in situ in the same chamber of the p E c v D device. Alas, the resistive contact layer and the actuation layer are patterned by a photolithography process, and an actuation pattern 23 composed of the amorphous silicon layer is formed on the gate insulation layer above the gate electrode 215. And a resistive contact layer pattern 235 formed by the n + doped amorphous silicon layer. A second metal layer, such as chromium (Cr), chrome aluminum (Cr-Al), or chrome aluminum (Cr-Al-Cr), is deposited by sputtering on the entire surface of the structure. 4000 A thickness. Alas, the second metal layer is patterned through a photolithography process to form a data line. The data line includes a data line extending along a second direction from the display area of the substrate 200 to its non-display area. A source electrode 24 and a drain electrode 245 are extended by the line / knife support. The output and a drain terminal (not shown) are located on one part of the data line. The second direction is perpendicular to the aforementioned first direction. Therefore, a film transistor 300 'is completed, which has a gate electrode 215, an operating pattern 23, a resistive contact layer pattern 235, a source electrode 240, a drain electrode 245, and the like. In this way, the electrode insulating layer 225 is interposed between the gate line and the data line to prevent contact. (Please read the notes on the back before filling this page) ’、 可 |

574535 A7 ______B7 五、發明説明（l6 ) 然後，曝露於源極電極240與汲極電極245之間的電阻 接觸層紋路235會被以反應離子蝕刻（rie)法來除掉。故 而，有一曝現於該源極與汲極電極240與245之間的作動紋 路區’將會形成該TFT300的通道區。 在本實施例中，該作動紋路230與資料線路係使用二 罩幕來製成。但，本案發明人等曾發明以一罩幕來製成該 作動紋路230、電阻接觸層紋路235及資料線路等之方法， 並申請韓國專利第1998-49710號申請案，而將製造該具有 底部閘極結構的TFT-LCD裝置之罩幕數目減至四個。使用 四個罩幕來製造該TFT_LCD裝置的方法將說明於下。 首先，當依序將該作動層之非結晶矽層與該電阻接觸 層之n+摻雜非結晶矽層沈積在該閘極絕緣層上之後，有一 作為資料線路的第二金屬層會被沈積其上。嗣，在該第二 金屬層上塗設-光阻層之後，該光阻層會被曝光及顯影來 形成一光阻圖案（未示出），其包含一第一部份具有一第一 厚度而位於該TFT的通道部份上，一第二部分具有一第二 厚度大於前述第一厚度，而位於該資料線路部份上，及一 第二部份其中該光阻層會被完全去除。然後，位於該第三 部份底下的第二金屬層、電阻接觸層、作動層，及在第一 部份底下的第二金屬層，及該第二部份的部份厚度等皆會 被姓掉。結果，由該第二金屬層形成之資料線路，由^ 雜非結晶矽層所形成的電阻接觸層紋路235,及由非結晶矽 層所形成的作動紋路23轉將會被同時製成。嗣，剩^=光 阻圖案會被除去，因此該作動紋路23〇,該電阻接觸層紋路 T紙張尺度 ⑵ 0χ29^--77^- (請先閲讀背面之注意事項再填寫本頁) .訂|574535 A7 ______B7 V. Description of the Invention (16) Then, the resistance contact layer pattern 235 exposed between the source electrode 240 and the drain electrode 245 is removed by a reactive ion etching (rie) method. Therefore, an operating pattern region 'exposed between the source and drain electrodes 240 and 245 will form a channel region of the TFT 300. In this embodiment, the actuation pattern 230 and the data line are made using two masks. However, the inventors of this case have invented a method to make the actuation pattern 230, the resistance contact layer pattern 235, and the data line with a curtain, and applied for Korean Patent No. 1998-49710. The number of screens of the TFT-LCD device with a gate structure is reduced to four. A method of manufacturing the TFT_LCD device using four masks will be described below. First, after sequentially depositing the amorphous silicon layer of the active layer and the n + doped amorphous silicon layer of the resistive contact layer on the gate insulating layer, a second metal layer as a data line is deposited. on. Alas, after a photoresist layer is coated on the second metal layer, the photoresist layer is exposed and developed to form a photoresist pattern (not shown), which includes a first portion having a first thickness and On the channel portion of the TFT, a second portion has a second thickness greater than the first thickness, and is located on the data line portion, and a second portion in which the photoresist layer is completely removed. Then, the second metal layer, the resistive contact layer, the actuating layer located under the third part, and the second metal layer under the first part, and the thickness of the second part are all named Off. As a result, the data line formed by the second metal layer, the resistive contact layer pattern 235 formed by the amorphous silicon layer, and the operating pattern 23 formed by the amorphous silicon layer will be made simultaneously.剩, the remaining ^ = photoresist pattern will be removed, so the action pattern 23 °, the resist contact layer pattern T paper size ⑵ 0χ29 ^-77 ^-(Please read the precautions on the back before filling this page). Order |

574535 A7 B7___ 五、發明説) ' 235及包含源極、汲極電極鳩與245的資料線路等，皆會同 時被使用一光罩來製成。 請參閱第8C圖，-用來絕緣該資料線路與像元電極的 鈍化層250,將會被形成於其上已設有TFT3〇〇的基材2〇〇之 整個表面上。該鈍化層250係由—無機材料如氮化矽，或一 光敏性有機材料如壓克力樹脂等所製成。若為反射式或反 射/透射式LCDU ’声鈍化層250會由光敏性有機材料製 成，而有多數的溝紋會被設於該表面上，來增進該lcd裝 置的反射率。 在一可曝現該汲極電極245之一接觸孔255，被以光微 影或曝光/顯影製程來形成而貫穿該鈍化層25〇之後，該接 塾區的閘極絕緣層225會被乾姓刻除去，而形成塾接觸孔 260等，其各會分別曝現該閘極端子、資料端子、及信號線 等之端部。 請參閱第8D圖，有一透明導電層例wIT〇、iz〇,或一 反射金屬層例如八卜乂合金、Ag、Ag合金等，會被沈積於 上述結構之整個表面上，並以一光微影製程來圖案化，而 形成一像το電極265其會經由該接觸孔來連接於灯丁的汲 極電極245。同時’有許多的第一接墊與第二接墊會被製成 於該等墊接觸孔上。 該等第-接塾會被分為連接於各閘極端子及該問極 驅動IC(該第-C0G IC5_的輸出端子之第一輸出接塾 268(見第5圖）’以及連接於各第一信號線端部與該第一 COGIC500之輸入端子的第一輸入接墊27〇等。 本紙張尺度適用中國國家標準（CNS) A4規格574535 A7 B7___ V. Invention) '235 and data lines including source, drain electrode, dove and 245, etc., will all be made with a photomask at the same time. Please refer to FIG. 8C. A passivation layer 250 for insulating the data line and the pixel electrode will be formed on the entire surface of the substrate 200 on which the TFT 300 has been provided. The passivation layer 250 is made of an inorganic material such as silicon nitride or a photosensitive organic material such as acrylic resin. If it is a reflective or reflective / transmissive LCDU 'acoustic passivation layer 250 will be made of a photosensitive organic material, most of the grooves will be provided on the surface to improve the reflectivity of the LCD device. After a contact hole 255 that can expose one of the drain electrodes 245 is formed by the photolithography or exposure / development process and penetrates the passivation layer 25, the gate insulating layer 225 of the junction region is dried. The nickname is removed to form a 塾 contact hole 260, etc., each of which exposes the ends of the gate terminal, the data terminal, and the signal line. Please refer to FIG. 8D. A transparent conductive layer such as wIT0, iz〇, or a reflective metal layer such as octabudium alloy, Ag, Ag alloy, etc. will be deposited on the entire surface of the above structure, and a light micro The patterning process is performed to form an image το electrode 265 which is connected to the drain electrode 245 of the lamp via the contact hole. At the same time, a lot of first pads and second pads will be made on the pad contact holes. The -th connection is divided into the first output connection 268 (see Fig. 5) connected to each gate terminal and the question driver IC (the output terminal of the -C0G IC5_) and connected to each The first input pad end of the first signal line and the input terminal of the first COGIC500 are 27 °, etc. This paper size applies to China National Standard (CNS) A4

、^τ— (請先閲讀背面之注意事項再填窝本頁) 574535 A7 B7 五、發明説明（l8 ) 該等第二接墊則被分為連接於各資料端子及該資料 驅動IC(該第二C0G IC450)的輸出端子之第二輪出接墊 272(見第5圖），以及連接於各第二信號線端部與該第二 COG IC450之輸入端的第二輸入接墊274等。 依據本實施例，當形成該等像元電極265及接墊時， 具有相等電位的第一導電阻隔層275等，將會被形成於連接 該閘極驅動1C之第一COG 1C的各第一輸入接墊27〇之周邊 部份上，且具有相等電位的第二導電阻隔層等（未示出）， 亦會被形成於連接該資料驅動1(：之各第二輸入接墊274的 週邊部份上。最好是，該第一與第二導電阻隔層等皆被設 成封閉環圈形狀。 在設有像元電極265、接墊270、及導電阻隔層275等 之上述結構的整個表面上製成一第一定向層（未示出）之 後，有一第二基材（未示出）會被對抵於該第一基材2〇〇而來 没置。該第二基材係包含一濾色片、一共同電極、一第二 定向層、一相位滯延板、及一偏振板等。 當有多數的間隔物（未示出）被置設於第一基材2〇〇與 第二基材之間後，一液晶（未示出）會被注入該第一基材2〇〇 與第二基材之間的空隙内，而來完成該反射式、透射式或 反射/透射式LCD裝置。 嗣’在一含有導電球之ACF樹脂被設於第一基材2〇〇 的接塾上後’該閘極與資料驅動IC的凸體將會被以C〇G法 來壓接於該等接墊上，而完成 — LCD模組。 第9圖為一平面圖，示出本發明第二實施例之一閘極 本紙張尺度適财關家鮮（⑽M規格⑽χ297公幻 21 (請先閲讀背面之注意事項再填寫本頁) 訂丨^ Τ— (Please read the precautions on the back before filling in this page) 574535 A7 B7 V. Description of the invention (18) These second pads are divided into each data terminal and the data driver IC (the The second round output pad 272 (see FIG. 5) of the output terminal of the second COG IC450), and the second input pad 274 connected to the end of each second signal line and the input end of the second COG IC450. According to this embodiment, when the pixel electrodes 265 and pads are formed, first conductive resistance barrier layers 275 and the like having the same potential will be formed on each of the first COG 1C connected to the gate driver 1C. A second conductive resistance barrier layer (not shown) having an equal potential on the peripheral portion of the input pad 27o will also be formed on the periphery of each second input pad 274 connected to the data driver 1 (: Partially, it is preferable that the first and second conductive barrier layers and the like are provided in a closed loop shape. The entire structure of the above-mentioned structure provided with the pixel electrode 265, the pad 270, and the conductive barrier layer 275 is provided. After a first alignment layer (not shown) is formed on the surface, a second substrate (not shown) is placed against the first substrate 200 and is not placed. The second substrate The system includes a color filter, a common electrode, a second alignment layer, a phase retardation plate, a polarizing plate, etc. When a plurality of spacers (not shown) are placed on the first substrate 2 Between the 〇 and the second substrate, a liquid crystal (not shown) will be injected between the first substrate 200 and the second substrate. The reflective, transmissive, or reflective / transmissive LCD device is completed within the gap between the electrodes. 嗣 'After a conductive resin ball containing ACF resin is placed on the connection of the first substrate 200, the gate The convex body with the data driving IC will be crimped to these pads by the COG method to complete the LCD module. Fig. 9 is a plan view showing a gate electrode according to a second embodiment of the present invention. This paper size is suitable for wealth and family (⑽M size⑽χ297 公 幻 21 (Please read the precautions on the back before filling this page) Order 丨

574535 五、發明説明（l9 ) 驅動ic的閘極輸入接墊部。 請參閱第9圖，具有與該各輸入接墊27〇相等電位的導 電阻隔層276等會被設成開放環圈狀，而可防止連接於該各 輸入接墊270信號線224與導電阻隔層276之間產生洩漏電 流。故，即使有污染物例如水分或化學品等滲入該接墊部 中而接觸該閘極驅動1C的凸體時，亦可藉該等導電阻隔層 276來防止該等輸入接墊27〇及與之連接的信號線η#被腐 I虫。 第10圖為一平面圖，乃示出本發明第三實施例之一閘 極驅動1C的閘極輸入接墊部。 請參閱第10圖，導電緩衝層278會被設在連接於各輸 入接塾270之各信號線224的兩側上。該等導電緩衝層278 係由具有與各接墊270相同電位的導電阻隔層277伸出。因 此，即使污染物滲入該等導電阻隔層277内而與該閘極驅動 1C的凸體接觸，則亦會由於該等具有相等電位的導電緩衝 層278，而得避免該導電阻隔層277之腐蝕。 第11圖為一平面圖，乃示出本發明第四實施例之一閘 極驅動1C的閘極輸入接墊部。 請參閱第11圖，與該等信號線224分開的導電阻隔層 280會被δ又在連接於各輸入接塾270之信號線224的兩側。在 此情况下，该各輸入接塾270與周邊的導電阻隔層2go係僅 藉該閘極驅動1C的内部接點來形成相同的電位。故，該等 導電阻隔層280將能有效防止該等輸入接墊27〇及與之連接 的信號線224被腐蝕。 (請先閲讀背面之注意事項再填寫本頁)574535 V. Description of the invention (l9) Gate input pad of driving IC. Please refer to FIG. 9. A conductive barrier layer 276 having a potential equal to that of each of the input pads 270 will be set in an open loop shape, which can prevent the signal line 224 and the conductive barrier layer connected to the input pads 270 from being connected. Leakage current is generated between 276. Therefore, even if pollutants such as moisture or chemicals penetrate into the pad portion and contact the convex body of the gate drive 1C, the conductive pads 276 can be used to prevent the input pads 27 and the contact pads. The signal line η # connected to it is rotten. FIG. 10 is a plan view showing a gate input pad portion of a gate drive 1C according to a third embodiment of the present invention. Referring to FIG. 10, a conductive buffer layer 278 is provided on both sides of each signal line 224 connected to each input connector 270. The conductive buffer layers 278 protrude from a conductive resistance spacer layer 277 having the same potential as each pad 270. Therefore, even if the pollutant penetrates into the conductive barrier layer 277 and contacts the convex body of the gate drive 1C, corrosion of the conductive barrier layer 277 will be avoided due to the conductive buffer layers 278 having the same potential. . Fig. 11 is a plan view showing a gate input pad portion of a gate drive 1C of a fourth embodiment of the present invention. Referring to FIG. 11, the conductive resistance spacer layer 280 separated from the signal lines 224 will be δ on both sides of the signal line 224 connected to each input connector 270. In this case, the input contacts 270 and the surrounding conductive barrier layer 2go only use the gate to drive the internal contacts of 1C to form the same potential. Therefore, the conductive resistance spacers 280 can effectively prevent the input pads 27 and the signal lines 224 connected thereto from being corroded. (Please read the notes on the back before filling this page)

•、^τ—•, ^ τ—

5?4535 A7 ^^_ B7 __ 五 '發明説明（20 ) 第12圖為一平面圖，乃示出本發明第五實施例之一閘 極驅動1C的閘極輸入接墊部。 請參閱第12圖，藉著如上述第一至四實施例的相同方 法，具有相同電位的導電阻隔層285與286會被設在連接於 該COG IC500之各輸入接墊270與290的周邊部份上，因此 連接於信號線222及223之輸入接墊270及290等，與位於該 等信號線222、223兩側之輸入接墊291、292、294、295等 之間的電位差會變成Ο。嗣，一可供減少該電位差的信號 線，最好為一接地線（GND)298，會***設在各連接於該 COG IC500的輸入接墊270與290之間。 詳言之，該等輸入接墊291與292係被設在輸入接墊 270的兩側，該接墊270係連接於被施加電壓的信號線 222，而接墊291與292會經由相等電位的導電阻隔層285來 互相連接。如此一來，連接於VQn信號線222之輸入接墊270 與位於其兩側的輸入接墊291和292之間的電位差會變為 0。以如上述相同的方式，設在該連接於被施加Vw電壓之 信號線223的輸入接墊290兩側之輸入接墊294與295等，將 可經由相等電位的導電阻隔層285來互相連接，因此連接於 Vw信號線223之輸入接墊290與設於其兩侧的輸入接墊 294和295之間的電位差亦會變為0。然後，一接地線298會 ***設於VQn的輸入接墊270與VQff的輸入接墊290之間。 雖該VQn值大於15V，但連接於COG IC500的輸入接墊 270將可避免腐蝕，因為該輸入接墊270與相鄰的輸入接墊 291和292之間的電位差係為0。又，當¥011為+ 15¥，而Voff 23 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） 574535 A7 B7 五、發明説明（21 ) 為-7V時’該VJ人接墊27()與^輪人接塾謂之間的22v 電位差將會分誠至15U7V。故位於連接該⑺G iC5〇〇 之輸入接墊270、290兩側的各輸入接墊29卜292、294、295 等之腐蝕可能性將會減低。 此時，假使因為施加於該等連接C〇G IC500的輸入接 墊270與290之信號電壓增加，而使腐蝕可能性變得更高， 則最好在該各輸入接墊270與290之間插設多數的接地線。 依據上述之本發明第五實施例，至少有一接地線會被 插設於連接該積體電路的各接墊之間，俾使與連接於該積 體電路之接墊具有相等電位的相鄰接墊等能免受腐蝕。 於本發明之上述各實施例中，該等導電阻隔層皆被設 在連接於該閘極驅動1C之輸入端子的閘極輸入接墊部上。 但是，該等具有相同電位之導電阻隔層亦可按照上述實施 例之相同方法，來被設在連接於該資料驅動1C之輸入端子 的資料輸入接墊部上。且，該等資料驅動1C亦能藉COG法 以外的其它方法來設置。 依據如上述之本發明，該等具有相同電位之導電阻隔 層會與該各接墊分開，並被設在連接於該1C之各接墊的周 邊部份上，故可防止該等接墊及連接於該等接墊之線路， 在該1C的凸體與接墊互相固接時，由於污染物而被腐蝕。 雖本發明之較佳實施例已被說明如上，惟應可瞭解本 發明並不受限於該等較佳實施例，仍有各種變化修正可被 專業人士所，實施，而含括於下列申請專利範圍之本發明的 精神及範®壽内。 本紙張尺度適用中國國家標準（CNS) A4規格（210 X 297公釐） 24 (請先閲讀背面之注意事項再填寫本頁) .、可| 574535 A7 B7 五、發明説明（22 ) 15…閘極電極 25…閘絕緣層 30…作動紋路 35…電阻接觸層紋路 40…源極電極 45…汲極電極 75…純化層 80,255…接觸孔 10 0…第一基材 102···第二基材 104···液晶 10 6…資料線 108···像元電極 109,300."TFT 110···共同電極 112···濾色片 114…液晶 130."LCD 面板 133，134···接墊 137，138···驅動積體電路 153,520··· ACF 樹脂 140···積體電路 144···凸體、 154···導電球 元件標號對號 180…基材 181…接墊 200…第一基材 215…閘極電極 224…信號線 225…閘極絕緣層 230…作動紋路 235…電阻接觸層紋路 240…源極電極 2 4 5… >及極電極 250…鈍化層 260…墊接觸孔 265…像元電極 268,272…輸出接墊 270,274…輸入接墊 275,276,277,280···導電阻 隔層 278···導電緩衝層 320···顯示區 325…非顯示區 400…第二基材 500,450…COG積體電路 510…凸體 530…導電球 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） · 25 - (請先閲讀背面之注意事項再填寫本頁)5? 4535 A7 ^^ _ B7 __ Five 'Explanation of the invention (20) FIG. 12 is a plan view showing a gate input pad portion of a gate drive 1C according to a fifth embodiment of the present invention. Please refer to FIG. 12. By the same method as in the first to fourth embodiments described above, conductive barrier layers 285 and 286 having the same potential will be provided at the peripheral portions of the input pads 270 and 290 connected to the COG IC500. Therefore, the potential difference between the input pads 270 and 290 connected to the signal lines 222 and 223 and the input pads 291, 292, 294, 295, etc. on both sides of the signal lines 222 and 223 will become 0 . A signal line for reducing the potential difference, preferably a ground line (GND) 298, will be inserted between each of the input pads 270 and 290 connected to the COG IC500. In detail, the input pads 291 and 292 are provided on both sides of the input pad 270. The pad 270 is connected to a signal line 222 to which a voltage is applied, and the pads 291 and 292 are connected via an equal potential. The conductive barriers 285 are connected to each other. In this way, the potential difference between the input pad 270 connected to the VQn signal line 222 and the input pads 291 and 292 on both sides thereof becomes 0. In the same manner as above, the input pads 294 and 295 provided on both sides of the input pad 290 connected to the signal line 223 to which the Vw voltage is applied will be connected to each other via a conductive barrier layer 285 of equal potential. Therefore, the potential difference between the input pad 290 connected to the Vw signal line 223 and the input pads 294 and 295 provided on both sides thereof also becomes zero. Then, a ground line 298 is inserted between the input pad 270 of VQn and the input pad 290 of VQff. Although the VQn value is greater than 15V, the input pad 270 connected to the COG IC 500 can avoid corrosion because the potential difference between the input pad 270 and the adjacent input pads 291 and 292 is zero. Also, when ¥ 011 is + 15 ¥, and Voff 23 (please read the precautions on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) 574535 A7 B7 V. Description of the invention (21) When it is -7V, the 22V potential difference between the VJ person's pad 27 () and the ^ round person will be divided to 15U7V. Therefore, the corrosion potential of the input pads 29, 292, 294, 295, etc. on both sides of the input pads 270, 290 connected to the ⑺G iC500 will be reduced. At this time, if the signal voltage applied to the input pads 270 and 290 connected to the COG IC500 increases and the possibility of corrosion becomes higher, it is better to be between the input pads 270 and 290. Install most ground wires. According to the fifth embodiment of the present invention, at least one ground wire will be inserted between the pads connected to the integrated circuit, so that the adjacent connections having the same potential as the pads connected to the integrated circuit Pads are protected from corrosion. In each of the above embodiments of the present invention, the conductive resistance barriers are provided on the gate input pad portion connected to the input terminal of the gate drive 1C. However, these conductive resistance barriers having the same potential can be provided on the data input pad portion connected to the input terminal of the data driver 1C in the same manner as in the above embodiment. Moreover, these data-driven 1Cs can also be set up by methods other than the COG method. According to the present invention as described above, the conductive resistance spacers having the same potential are separated from the pads and are provided on the peripheral portion of the pads connected to the 1C, so that the pads and the pads can be prevented. The lines connected to these pads are corroded due to contaminants when the 1C convex body and the pads are fixed to each other. Although the preferred embodiments of the present invention have been described above, it should be understood that the present invention is not limited to these preferred embodiments, and there are still various changes that can be implemented by professionals, and are included in the following applications The scope of the patent is the spirit and scope of the present invention. This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 mm) 24 (Please read the precautions on the back before filling out this page)., May | 574535 A7 B7 V. Description of the invention (22) 15 ... Electrode electrode 25 ... Gate insulation layer 30 ... Actuation pattern 35 ... Resistive contact layer pattern 40 ... Source electrode 45 ... Drain electrode 75 ... Purification layer 80, 255 ... Contact hole 10 0 ... First substrate 102 ... Second substrate 104 ... LCD 10 6 ... Data line 108 ... Pixel electrode 109, 300. " TFT 110 ... Common electrode 112 ... Color filter 114 ... LCD 130 " LCD panel 133, 134 ... Pads 137, 138 ... Drive integrated circuits 153, 520 ... ACF resin 140 ... Integrated circuits 144 ... Convex, 154 ... Conductive ball element number checkmark 180 ... Substrate 181 ... Pad 200 ... first substrate 215 ... gate electrode 224 ... signal line 225 ... gate insulation layer 230 ... acting pattern 235 ... resistance contact layer pattern 240 ... source electrode 2 4 5 ... > and electrode 250 ... passivation layer 260 … Pad contact holes 265… pixel electrodes 268,272… output pads 270,274… input pads 275,276,277,280 ... Barrier layer 278 ... Conductive buffer layer 320 ... Display area 325 ... Non-display area 400 ... Second substrate 500, 450 ... COG integrated circuit 510 ... Convex body 530 ... Conductive ball This paper is sized to Chinese National Standards (CNS) A4 size (210X297mm) · 25-(Please read the precautions on the back before filling this page)

、可|, Can |

Claims (1)

A8 Β8 C8 D8 、申請專利範圍 )/4535 1 · 一種液晶顯示裝置，包含： 一基材； 一像元陣列設在該基材之一顯示區上； 多數的接墊設在該基材之一非顯示區上；及 一積體電路設在該基材的非顯示區上，並電連接於 該等接墊而可產生信號來操作該像元陣列； 其中有與該等接墊分開的導電阻隔層等會分別設 在連接於該積體電路之各接墊的周邊部份上，該等導電 阻隔層會藉由該積體電路的内部接點，而與該等接墊具 有相等的電位； 且其中該液晶顯示裝置更包含至少一接地線，設在 連接於該積體電路的各接墊之間。 2· —種液晶顯示裝置，包含： 一基材； 一像元陣列設在該基材之一顯示區上； 一積體電路設在該基材之一非顯示區上，而可產生 信號來操作該像元陣列； 多數的輪出接墊連接於多數的第一線路之端部，該 等第一線路係由該基材的顯示區延伸至非顯示區，而該 等輸出接墊係電連接於該積體電路的一部份；及 多數的輸入接墊連接於設在該基材的非顯示區上 之多數的第二線路之端部，該等輸入接墊係由連接於該 積體電路的其它部份； 其中有與各輸入接墊分開的導電阻隔層會被設在 G張尺細中ϋϊ準(⑽A4規格⑵0X297公釐） (請先閲讀背面之注意事項再填寫本頁)A8 Β8 C8 D8, patent application scope) / 4535 1 · A liquid crystal display device comprising: a substrate; a pixel array is disposed on a display area of the substrate; most of the pads are disposed on one of the substrates On a non-display area; and an integrated circuit is disposed on the non-display area of the substrate and is electrically connected to the pads to generate a signal to operate the pixel array; among them, there is a conductive separate from the pads Barrier layers and the like are respectively provided on the peripheral portions of the pads connected to the integrated circuit, and the conductive resistance barriers have the same potential as the pads through the internal contacts of the integrated circuit ; And wherein the liquid crystal display device further includes at least one ground wire provided between the pads connected to the integrated circuit. 2. A liquid crystal display device comprising: a substrate; an array of pixels is disposed on a display area of the substrate; an integrated circuit is disposed on a non-display area of the substrate, and a signal can be generated. Operate the pixel array; most of the wheel-out pads are connected to the ends of most of the first lines, the first lines extending from the display area to the non-display area of the substrate, and the output pads are electrically Connected to a part of the integrated circuit; and a plurality of input pads connected to the ends of a plurality of second lines provided on the non-display area of the substrate, the input pads are connected to the integrated circuit The other parts of the body circuit; among them, the conductive resistance compartment separated from each input pad will be set in the G size (⑽A4 size⑵0X297mm) (Please read the precautions on the back before filling this page) 26 ^/4535 A8 B8 C8 D8 、申請專利範園 連接於该積體電路之各輸入接塾 阻★ 安墊的周邊部份，該等導電 P隔層係可糟由该積體電 叼闷〇卩接點而具有與輸入 接塾相專的電位； 且其中該液晶顯示裝置更肖冬 ^ 尺至少一接地線，設在 連接於該積體電路的各接墊之間。 3· —種液晶顯示裝置，包含： -第-基材具有—像㈣列含有多數像元乃呈矩 ㈣該第—基材的中央部份’多數的第-接墊設在 =第-基材的第-周邊部份，而可施加_第—信號於該 專像元。及多數的第二接墊設在㈣_基㈣第二周邊 部份，而可施加一第二信號於該等像元； 第一基材具有-慮色片被設成對應於第一基材 的中央部份；， 一液晶層被設於該第一基材與第二基材之間； 第-積體電路乃以C0G法來連結前述第一周邊部 份上的第一接墊等；及 第二積體電路亦以C0G法來連結前述第二周邊部 份上的第二接墊等； ★其中具有相等於該等第一接墊之電位的第一阻隔 層等會與该各第一接墊分開，而被設在連結於第一積體 電路之各第一接墊的周邊部份；及 一 /、有相荨於该專第二接墊之電位的第二阻隔層等 會與该各第二接墊分開，而被設在連接於第二積體電路 之各第二接墊的周邊部份； 本紙張尺度適财國國家標準（⑽A4規格（2歡297公董） (請先閲讀背面之注意事項再填寫本頁)26 ^ / 4535 A8 B8 C8 D8, patent application Fanyuan is connected to each input connection of the integrated circuit ★ Peripheral parts of the pad, these conductive P spacers can be blocked by the integrated circuit. The contact has a potential specific to the input connection; and the liquid crystal display device has at least one ground wire and is provided between the pads connected to the integrated circuit. 3. A liquid crystal display device comprising:-the first substrate has-the image array contains a large number of pixels, and the central portion of the first substrate-the majority of the-pads are provided at the =-substrate The -peripheral part of the material can be applied to the special pixel. And most of the second pads are arranged on the second peripheral part of the base, and a second signal can be applied to the pixels; the first substrate has a color filter set to correspond to the first substrate The central part of the; a liquid crystal layer is provided between the first substrate and the second substrate; the first integrated circuit is connected by the COG method to the first pad on the first peripheral portion; And the second integrated circuit also uses the COG method to connect the second pads and the like on the aforementioned second peripheral portion; ★ the first barrier layer and the like having a potential equal to the first pads will be connected to the first A pad is separated and is provided on the periphery of each first pad connected to the first integrated circuit; and a second barrier layer having a potential on the second pad of the dedicated It is separated from the second pads and is provided on the periphery of each second pad connected to the second integrated circuit; This paper is suitable for the national standard of the country (⑽A4 size (2 Huan297)) (Please read the notes on the back before filling out this page) 、可| 27 574535 A8 B8 C8 D8 六、申請專利範圍 且其中該液晶顯示裝置更包含至少一第一接地 線，設在連接於第一積體電路的各第一接墊之間，及至 (請先閲讀背面之注意事項再填寫本頁) 少一第二接地線，設在連接於第二積體電路的各第二接 墊之間。 4. 一種製造液晶顯示裝置的方法，包含下列步驟： 在一基材上製成多數線路； 在該等線路與基材上製成一鈍化層； 部份地蝕刻該鈍化層來開放該各線路的接觸區域； 於前述結構上沈積一導電層，且將之圖案化而形成 多數經由该等接觸區域來連接於各線路的接墊，並同時 地在被連接於一外部積體電路之接墊周邊部份，製成與 、可I 該各接墊分開、的導電阻隔層，其會與該等接墊具有相等 的電位；及 連接該等接墊與該外部積體電路； 其中在該導電層的圖案化步驟中，至少有-接地線 會同時地被設在連接於該外部龍電路的各接墊之間。 5·如中請專利範圍第4項之方法，其中該導電阻隔層係被 製成封閉環圈狀。 6·如申請專利範圍第4項之方法，i中 只刀 八甲5亥導電阻隔層係被 製成開放環圈狀。 28， 可 | 27 574535 A8 B8 C8 D8 6. The scope of the patent application and the liquid crystal display device further includes at least a first ground wire provided between each first pad connected to the first integrated circuit, and to (please (Read the precautions on the back before filling this page.) One second ground wire is provided between each second pad connected to the second integrated circuit. 4. A method for manufacturing a liquid crystal display device, comprising the following steps: making a plurality of circuits on a substrate; forming a passivation layer on the circuits and the substrate; partially etching the passivation layer to open the circuits A contact layer is deposited on the aforementioned structure and patterned to form a plurality of pads connected to each line via the contact areas, and at the same time, the pads connected to an external integrated circuit are simultaneously Peripheral parts are made of conductive spacers that can be separated from the pads, which will have the same potential as the pads; and connect the pads to the external integrated circuit; where the conductive In the patterning step of the layer, at least-a ground line is simultaneously provided between the pads connected to the external dragon circuit. 5. The method according to item 4 of the patent application, wherein the conductive barrier layer is formed into a closed loop shape. 6. According to the method of claim 4 in the scope of patent application, the knife-shaped Bajia 5H conductive resistance barrier is made into an open loop. 28