562940 A7 ______B7_ 五、發明説明（1) (發明之技術領域） (請先閲讀背面之注意事項再填寫本頁) 本發明係關於一種檢查如半導體裝置，電路基板， c c D元件的電子裝置而加以製造的技術。 (發明之背景） 近年來，爲了強化產品之市場競爭力，縮短產品開發 期間成爲必須要件。但是，一直到判斷產品之良品，不良 品的產品完成時的電氣性特性檢查，自投入生產線需要數 十天，故等待該電氣性特性檢查之結果才做對策有過慢之 情形。 爲了解決該問題，在產品開發中，有一種每一區段地 分割共通過程，而在該區段內進行電氣性檢查，並將該結 果反饋於處理，俾早期地確立該區段之處理的方法。用以 監控該區段之試料，係稱爲T E G ( Test Element Group ) ’短環路監控器，或是測試結構。以下將這些總稱稱爲 T E G。T E G 之一例子係揭示於「Integrated Circuit Manufacturability、LEEE PRESS、P26-29」。 經濟部智慧財產局s工消资合作杜印製 作爲特定在T E G所發生之短路位置的技術，藉由電 子線或聚焦離子束等之荷電粒子線之照射，來檢測配線圖 案之表面電位狀態之不同，亦即得到電位對比，來檢測缺 陷之所在的技術。利用該技術的T E G之一例子，揭示在 1 Microeleci.onic Test Structures for Rapid Automated Contactless Inline Defect Inspection ' IEEE Transactions on Semiconductor Manufacturing ^ Vo 1. 10、Νο·3、August、 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -4- 562940 A7 B7 五、發明説明（2) 1997」。 然而，在上述習知技術中，由於對於晶圓內之所有 T E G圖案須照射荷電粒子線，因此需費較多之檢查時間 。特別是，每一枚之晶圓之缺陷較少時，則該分量增加正 常之T E G圖案所佔之比率，而不僅用以檢測異常部位所 用之檢查，成爲檢查該正常之T E G圖案之時間佔大部分 的低效率之作業。 亦即，在習知技術中，對於有效率地特定短路之位置 的T E G並沒有充分地檢討，因此，分配在檢查’解析上 費較多時間，並將該結果反饋至製造線爲止之時間會延遲 ’而無法有效果地提高良品率。特別是，對於有效果地使 用電位對比法所用的丁 E G並未充分地加以檢討。 又，在習知技術中，無法有效率地分開短路與斷線， 與上述同樣地分配在檢查，解析上費較多時間，而將該結 果反饋至製造線爲止之時間會延遲，因而無法有效果地提 局良品率。 (發明之槪要） 本發明之目的係在於提高使用T E G ( Test Element Group)的檢查效率，由此可提高良品率。 本發明係爲了達上述目的，如申請專利範圍所述之構 成者’例如屬於使用設於形成在基板之絕緣層上的第一配 線及與該基板電氣式地連接且設在該絕緣層上的第二配線 來檢查，並使用該檢查結果來管理電子裝置來管理電子裝 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消黄合作社印製 -5 - 562940 A7 ___B7 五、發明説明（3) (請先閲讀背面之注意事項再填寫本頁) 置而加以製ia的電子裝置之製造方法。其特徵爲具備：測 定該第一配線之兩端的電阻來檢查該第一配線是否斷線的 檢查過程，及測定該第一配線與該基板之間的電阻來檢查 該第一配線與該第二配線是否短路的檢查過程。 又，屬於使用設在形成於p型矽基板之絕緣層上的第 一配線’及經由形成於該p型矽基板的η通道電氣式地連 接且設在該絕緣層上的第二配線來檢查，並使用該檢查結 果來管理電子裝置來管理電子裝置而加以製造的電子裝置 之製造方法，其特徵爲：測定該第一配線與該ρ型矽基板 之間的電阻，檢查該第一配線與該第二配線是否短路。 (發明之實施形態） 使用圖式說明本發明之實施形態。 第1圖係表示不僅可檢測短路不良也可檢測斷線不良 的T E G構造的圖式。雖未予圖示，惟該T E G構造係與 晶圓全面或是成爲最終產品之晶片一起配置複數個，一般 ，與將接觸不良等之其他檢查作爲目的不相同T E G構造 一起配置。 經濟部智慧財產局員工消費合作社印製 首先，在第一配線層蛇行地配置具有所期望之配線寬 度與配線長度的斷線檢測用配線1。在斷線檢測用配線1 之兩端配置觸針用電極3及3 > ，藉由這些電氣式地測定 配線電阻而確認有無斷線。 平行於斷線檢測用配線1之長度方向（在第1圖爲縱 方向）的配線之間隙而配置複數之短路檢測用配線2 ，將 -6- 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） 562940 Α7 Β7 五、發明説明（今 (請先閲讀背面之注意事項再填寫本頁) 鄰接之配線彼此間之間隔成爲所期望之尺寸。斷線檢測用 配線1與短路檢測用配線2係經由層間絕緣膜4保持電氣 式絕緣。配置複數之短路檢測用配線2係分別經由接觸插 頭5，被連接於經n摻雜（離子植入）於p型矽基板6之 上面的η通道7。該複數之η通道7係作成分別經由元件 分離領域8被電氣式地絕緣的構造（若保持絕緣，也可以 省略），而保持著短路檢測用配線2之絕緣。對配線間隔 與配線寬度，以須監控之配線過程處理之代表性尺寸，作 成0·1至1微米。爲了監控缺陷之大小每一個之發生頻 度’則在複數之T E G，設置分別具有各該配線間隔之配 線也可以。以下，將該一個T E G之單位，稱作爲模組。 以下，使用第2圖說明配線之短路不良的檢出方法。 經濟部智慧財產局員工消費合作社印製 首先，如圖示，將一方之探針1 0接觸在被連接於斷 線檢測配線1的觸針用電極3。另一方係連接於接觸在ρ 型矽基板6的基板電極（未圖示），而使用測定器1 1來 測定該中間的電阻。這時候，將基板電位成爲比探針1 〇 之電位較高。亦即，若基板電極爲接地電位，則將負電位 賦予探針1 0，而若探針1 〇爲接地電位，則將正電位賦 予基板電極。此乃藉由設於ρ型矽基板6的η通道7形成 有二極體功能，而若存有短路時，爲了從未圖示之基板電 極’經由ρ型矽基板6 ，電流（二極體之順方向電流）容 易流在短路之部位1 3的η通道。當流動電流，則經由接 觸插頭5 ，短路檢測用配線2，短路1 3，有電流洩漏至 斷線檢測用配線1之故，因而使用觸針於觸針用電極3之 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -7- 562940 A7 ___B7_ 五、發明説明（马 探針1 0來檢測該洩漏電流，即可檢測短路不良。 (請先閲讀背面之注意事項再填寫本頁) 以下’說明藉由上述電氣檢查判定爲短路不良的 τ E G之不良發生位置之特定方法，亦即，說明依電位對 比法的特定方法。 使用第3圖說明藉由電位對比法來檢測短路部位之方 法。 在斷線檢測用配線1之表面照射荷電粒子線2 0時， 二次電子2 1從斷線檢測用配線1放出。斷線檢測用配線 1與P型矽基板6係被電氣式地絕緣，惟將斷線檢測用配 線1經由導電性探針2 2施以接地時，施以接地，則成爲 可供給電子之狀態，而大量地放出之二次電子2 1。使用 檢測器2 3來檢測該被放出的二次電子2 1 ，並在信號處 經濟部智慧財產局S工消費合作社印製 理部2 4進行所期望之處理，而在顯示部2 5可顯示作爲 具有荷電粒子線2 0之明亮對心的掃描畫像。一方面，未 發生短路之短路檢測用配線2，係經由接觸插頭5與η通 道而電氣式地連接於ρ型矽基板6，惟在ρ型矽基板6形 成η通道7可具有二極體特性，電子係不會供給至短路檢 知用配線2。因此，從短路檢測用配線2之表面，二次電 子2 1係暫時地被放出，惟消耗之二次電子2 1不會從Ρ 型矽基板6供給之故，因而在短路檢測用配線2產生帶電 ，結果成爲較暗對比。相反地，存有缺陷之短路1 3時， 對發生該短路1 3之配線，與斷線檢測用配線1導通而槪 略成爲相同電位之故，因而二次電子被大量地放出而與斷 線檢測用配線1同樣地使得二次電子大量地放出，成爲較 -8- 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） 562940 A7 B7 五、發明説明（6) (請先閱讀背面之注意事項再填寫本頁) 亮對比。由此，可顯在化發生短路1 3之短路檢測用配線 2。在第3圖中，爲了得到電位對比畫像，經由探針施以 接地，除了此之外，以丁 E G之內部電路與基板連接，而 利用導體1 0之體積差（電容差）並將帶電電壓（藉由此 來決定二次電子之放出量）成爲不同，作爲電位對比之相 差可檢測斷線位置或短路位置。 使用基本上對比畫像之檢查方法，係有線掃描方式， 及二維掃描畫像之比較方式。如第4 ( a )圖所示地，線 掃描方式係依一維之線掃描之信號處理的認識方法。捕捉 短路檢測用配線2之電位對比之信號周期之不規則性變化 ’即可特短路剖位者。在傅立葉變換，從正常部之主成分 之周期’作爲缺陷抽出該周期之紊亂部分，或是藉由事先 求出正常部之信號波形之周期或振幅，認識短路起因之信 號周期之振幅異常，算出該座標並加以記憶，來計數短路 發生數。藉著個數監控缺陷之發生狀態，或依據缺陷之座 標’使用電子顯微鏡可檢查短路部位。在本實施形態， 經濟部智慈財產局員工消費合作社印製 T E G之短路檢測用配線2係以相同節距配置於縱方向（ 配線長度方向）。所以，荷電束掃描係如第4 ( a )圖之 箭號所示地，可作成所定間隔之每一節距之間苗描掃，而 在短時間內可特定T E G之短路，及斷線不良發生位置。 又’如第4 ( b )圖所示，二維掃描畫像之比較方式 ’係依次存取二維畫像，藉由使用其他領域之畫像施以比 較’俾顯在化缺陷部位者。具體來說，使用觀察三個 T E G模組所得到的二維元畫像。取得τ E G ( a )之原 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -9 - 562940 A7 B7___ 五、發明説明（乃 (請先閲讀背面之注意事項再填寫本頁) 畫像26與TEG (b)之比較晝像27之差畫像28， 之後取得TEG (a)之原晝像26與TEG (c)之比 較畫像2 9之差畫像2 8 /，確認有無超過閾値的差畫像 ，判定在那一畫像存有異常，亦即判定在那一 T E G有缺 陷（此時，在T E G ( b )有缺陷）’算出該座標之方法 。爲了提高該檢查感度，將斷線檢測用配線1之一側以探 針觸針在觸針用電極3 ，3 /並施以接地之方法，或在內 部電路事先接地之方法，爲強調對比上較有效，惟若斷線 檢測用配線1與短路檢測用配線2之體積差（電容差）具 充分，則不需要以探針觸針於觸針用電極3，3 /施以接 地。 經濟部智慧財產局g(工消費合作社印製 如第5圖所示，使用本T E G構造來檢測斷線不良時 ，將探針1 0接觸於被連接在斷線檢測用配線1之兩端的 觸針用電極3，3 /而使用測定器1 1進行配線電阻之測 定。若有斷線1 2，則其配線之電阻，成爲比目標規格之 配線電阻較高之故，因而確認有無斷線不良。又，如第6 圖所示，使用電位對比法來特定斷線部位時，如上所述， 在被檢查對象物之模組照射荷電粒子線2 0，則斷線檢測 用配線1之一部分，亦即發生斷線1 2之部位成爲較暗對 比。藉由捕捉成爲該較暗對比的部分之端部（在第6圖中 位於最右端且最上側之座標，存有斷線1 2 )，可容易地 特定其位置。 以下，使用第7圖說明斷線與短路在一模組所發生時 的詳細之不良檢測方法。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -10- 562940 A7 B7 五、發明説明（夺 (請先閱讀背面之注意事項再填寫本頁) 首先’未圖示惟如上所述，在連接於該斷線檢測用配 線1之兩端的觸針用電極3接觸探針1 0，使用測定器 1 1進行電阻，來確認斷線1 2之存在。然後，如第7圖 所示，測定基板電極（未圖示），及連接於上述斷線檢測 用配線1之一端的觸針用電極3所接觸的探針1 0之電阻 ，並確認有無短路1 3。在表示於第7 ( a )圖的例子之 情形，由於發生斷線1 2，因此無法確認短路1 3。如此 ，如第7 ( b )圖所示，測定上述斷線檢測用配線χ之另 一方與觸針用電極3 /之連接，即可確認短路1 3之存在 。由此，對於在一模組內同時地發生斷線1 2與短路1 3 時，也可進行正確之檢查。 將上述之次序匯集在第8圖。 首先，測定連接於斷線檢測用配線1之兩端的觸針用 電極3，3 ^之間的電阻，檢查有無斷線（步驟1 )。然 經濟部智慧財產局員工消費合作社印製 後，測定此些觸針用電極之一方與基板側電極之間的有無 斷線（步驟2 )。這時候，在步驟1中，被檢測斷線時， 則測定觸針用電極之另一方與基板側電極之間的電阻而檢 查有無短路（步驟3)。藉由該一連串之次序，可有效率 地分別檢查出斷線與短路，或混在之情形。 以下，使用第9圖說明特定斷線不良與短路不良發生 在同一模組時的短路部位之方式。又，在本T E G構造。 使用上述之電位對比法，不但可得到短路，同時也可得到 斷線時之對比之故，因而可同時地檢測斷線位置與短路位 置。 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇Χ：297公釐） -11 - 562940 A7 B7 五、發明説明（9) (請先閱讀背面之注意事項再填寫本頁} 首先，與上述同樣地，在被檢查對象物的模組照射荷 電粒子線2 0，則斷線檢測用配線1之一部分，亦即發生 斷線1 2之部位成爲暗對比之故，因而可特定其斷線位置 。又，在發生短路1 3之部位，成爲與斷線檢測用配線1 電氣式連接之狀態之故，因而可得到充分之電容而成爲較 亮對比也可特定其短路位置。 然而，利用斷線被分斷的斷線檢測用配線1 ，係隨著 被分斷之配線長度來決定對比。若配線長度過短，則帶電 電壓上昇，而成爲較暗對比。若在該部分有短路之部位， 則短路部位係當然與斷線檢測用配線1之較暗對比同化， 而有其顯在化成爲困難之情形。在這種情形，例如第9 ( b )圖所示地，在連接於成爲較暗對比之一側的斷線檢測 用配線1的觸針用電極3 ，藉進行觸針而施加基準電位， 使得斷線檢測用配線1變化成較亮對比，由此，可特定如 上所述的短路部位1 3。 在第1 0圖表示用以檢測短路不良之其他T E G構造 〇 經濟部智慧財產局員工消费合作社印製 表示於圖之T E G構造，係疊層上述之T E G構造者 。上層之短路檢測用配線2係經由通孔4 0與下層之短路 檢測用配線2連接之故，因而經由p型矽基板與η通道被 導通，藉由上述之電位對比法可特定短路位置。斷線檢測 用配線1係在上下層保持絕緣，可監視各該缺陷發生狀 況。又，在上述被疊層之狀態下，也可計測下層之缺陷發 生狀況地，經由通孔4 0來連接上下層之觸針用電極3 ， 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐〉 -12- 562940 A7 B7 五、發明説明（和 (請先閱讀背面之注意事項再填寫本頁) 3 >也可以。本T E G構造係監視依疊層之缺陷發生狀況 之變化有效。在本T E G構造，係成爲檢查下層之後，形 成上層並加以檢查。這時候，測定下層之配線電阻，就可 檢查出形成上層所產生之影響。考量經由通孔4 0以上下 間施以導通短路檢測用配線2，雖未予圖示，惟構成能增 加短路檢測用配線2之配線寬度並可吸收形成通孔時之偏 位較埋想。此乃對接觸插頭5也同樣。因此，短路檢測用 配線2係配線寬度形成比斷線檢測用配線1較寬較理想。 此乃爲短路檢測用配線不會斷線也較理想。這時候，當然 考慮電位對比法的斷線檢測用配線1與短路檢測用配線2 之容電差來決定尺寸。 在第1 1圖表示用以檢測短路不良的其他T E G構造 〇 表示於圖之T E G構造係僅限定於僅檢測短路不良之 功能者，在梳形配線4 1之間隙，配置短路檢測用配線2 者。如此地若僅檢測短路，只要具有成爲共通電位的梳形 配線，及與梳形配線呈非導通狀態的短路檢測用配線就可 以。 經濟部智慧財產局員工消費合作社印製 在第1 2圖表示用以檢測短路不良的其他T E G構造 〇 表示於圖之T E G構造，係將至今配置複數個之短路 檢測用配線，如短路檢測用配線4 2地分別以一條配線所 形成者。由此，特定依線掃描的不良位置時，則可減少掃 描線，並可縮短特定時間。又，雖未圖示，惟對於該一條 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -13- 562940 A7 B7 五、發明説明（切 短路檢測用配線4 2形成複數個接觸插頭5 ，也可對應於 發生短路檢測用配線4 2之斷線情形。 (請先閲讀背面之注意事項再填寫本頁) 在第1 3圖表示用以檢測短路不良的其他T E G構造 0 表示於圖之T E G構造，係將連接於各短路檢測用配 線2之接觸插頭5作成複數者。若接觸插頭5爲非導通， 則即使短路檢測用配線2短路，藉著電氣式檢查會遺漏該 短路缺陷。爲了避免該情況，設置預備之接觸插頭，就可 精度優異地測定有無缺陷。又，與上述同樣地，在發生短 路檢測用配線2之斷線時也可以對應。 在第1 4圖表示用以檢測短路不良的其他T E G構造 〇 表示於圖之T E G構造係爲了賦予基板電位，設置觸 針用電極3 〃 ，經由p +通道5 1與接觸插頭5，連接於p 型矽基板6者。從基板無法得到電流時有效。 在第1 5圖表示用以檢測短路不良的其他T E G構造 〇 經濟部智慧財產局S工消費合作社印製 表示於圖之T E G構造，係將斷線檢測用配線1之一 端的觸針用電極3，經由P +通道5 2與接觸插頭5，連接 P型矽基板6者。依S E Μ的外觀檢查時，可減低依斷線 檢測用配線1之帶電起因之畫像漂移的檢查不良。在此， Ρ +通道5 2係以比ρ型矽基板6之不純物濃度較高之濃度 植入不純物者。（省略ρ +通道5 2而僅以接觸插頭5進行 導通也可以）。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ 297公釐） -14- 562940 A7 B7 五、發明説明（货 (請先閱讀背面之注意事項再填寫本頁) 以上所說明之T E G構造，係均使用P型矽基板，惟 也可使用N型半導體基板。但是，這時候則設置p型阱領 域，而必須將上述通道領域適當地配置於該p型阱領域。 又，在上述任何實施例中，在晶圓全面僅裝載T E G也可 以，或在晶圓內混在地裝載T E G與產品晶片之方式也可 以。此時，T E G之配置係以均勻之節距配置在晶圓內也 可以，配置於變更半徑之同心圓上也可以，或配置在劃線 上也可以。又，對於適當地組合上述任何實施例之方式， 當然也有效。 又，若未形成η通道，也可得二極體效果，且可控制 電子之流動，則不必形成η通道。 又，揭示各種斷線檢測用配線之圖案或短路檢測用配 線之圖案，惟配線圖案係並不被限定於此些者，短路檢測 用配線與任一配線短路時，構成經由接觸插頭5從配線至 基板，或從基板至配線有電流流向一定方向者就可以。 經濟部智慧財產局8工消費合作社印製 又，若不是電位對比法，而是使用外觀檢查或電流吸 收法來檢測短路位置，則不需要具有二極體功能，而僅導 通也可以。由此，也可以用一模組就可簡單地判斷短路與 斷線之故，因而可改善檢查效率及製造良品率。 第1 6圖係表不藉由外觀檢查裝置來特定短路部位或 斷線部位的方式。該方式係藉由外觀檢查裝置（未圖示） ，將光或電子等荷電粒子束照射在T E G之表面，檢測所 得到之反射光（明視野光，或暗視野光），或二次電子或 反射電7·而反得T E G之表面構造的觀察畫像（原晝像 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ 297公釐） -15- 562940 A7 B7562940 A7 ______B7_ V. Description of the Invention (1) (Technical Field of the Invention) (Please read the precautions on the back before filling out this page) The present invention relates to an electronic device that inspects semiconductor devices, circuit substrates, and cc D components. Manufacturing technology. (Background of the Invention) In recent years, in order to strengthen the market competitiveness of products, shortening the product development period has become an essential requirement. However, until the electrical characteristics of the product are judged to be good or defective, it takes tens of days to enter the production line. Therefore, it may be too slow to wait for the results of the electrical characteristics inspection. In order to solve this problem, in the product development, there is a method of dividing the common process for each section, and performing an electrical inspection in the section, and feeding back the result to the process. method. The sample used to monitor this zone is called TEG (Test Element Group) short loop monitor, or test structure. These generic terms are hereinafter referred to as T E G. An example of T E G is disclosed in "Integrated Circuit Manufacturability, LEE PRESS, P26-29". The Intellectual Property Bureau of the Ministry of Economic Affairs, Industry and Consumer Cooperation, and Du Yin, a technology that specifies the short-circuit location at TEG, detects the state of the surface potential of the wiring pattern by the irradiation of electron beams or charged particle beams such as focused ion beams. Different, that is, the technique of obtaining the potential contrast to detect the defect. An example of a TEG using this technology is disclosed in 1 Microeleci.onic Test Structures for Rapid Automated Contactless Inline Defect Inspection 'IEEE Transactions on Semiconductor Manufacturing CNS) A4 specification (210X297 mm) -4- 562940 A7 B7 V. Description of invention (2) 1997 ". However, in the above-mentioned conventional technology, since all T E G patterns in the wafer have to be irradiated with charged particle rays, it takes a lot of inspection time. In particular, when each wafer has fewer defects, the component increases the ratio of the normal TEG pattern, not only for the inspection used to detect abnormal parts, but also for the time to inspect the normal TEG pattern. Part of the inefficient operation. That is, in the conventional technology, the TEG that efficiently specifies the position of the short circuit is not fully reviewed. Therefore, the time allocated to the inspection and analysis is more time allocated, and the time until the result is fed back to the manufacturing line is Delay 'without effectively improving yield. In particular, the Ding E G used in the potentiometry method has not been sufficiently reviewed. Also, in the conventional technology, short-circuit and disconnection cannot be separated efficiently, and inspection is performed in the same manner as described above, which takes a lot of time for analysis, and the time until the result is fed back to the manufacturing line is delayed. Effectively raise the yield rate. (Summary of the Invention) The object of the present invention is to improve the inspection efficiency using T E G (Test Element Group), thereby improving the yield. In order to achieve the above-mentioned object, the present invention, as described in the scope of the patent application, includes, for example, the use of a first wiring provided on an insulating layer formed on a substrate and an electrical connection to the substrate and provided on the insulating layer. The second wiring is used to inspect, and the inspection results are used to manage the electronic devices to manage the electronic paper size. Applicable to China National Standard (CNS) A4 specification (210X 297 mm) (Please read the precautions on the back before filling this page) Printed by the Intellectual Property Cooperative of the Ministry of Economic Affairs of the People's Republic of China-5-562940 A7 ___B7 V. Description of the invention (3) (Please read the precautions on the back before filling this page). It is characterized by having an inspection process of measuring resistance of both ends of the first wiring to check whether the first wiring is disconnected, and measuring resistance between the first wiring and the substrate to check the first wiring and the second wiring. Check the wiring for short circuit. In addition, it belongs to the inspection using a first wiring provided on an insulating layer formed on a p-type silicon substrate and a second wiring provided electrically on the insulating layer through an n-channel formed on the p-type silicon substrate. And an electronic device manufacturing method using the inspection result to manage the electronic device and manage the electronic device, which is characterized in that the resistance between the first wiring and the p-type silicon substrate is measured, and the first wiring and the Whether the second wiring is short-circuited. (Embodiment of the invention) An embodiment of the present invention will be described using drawings. Fig. 1 is a diagram showing a T E G structure that can detect not only short-circuit failure but also wire-break failure. Although not shown, the T E G structure is configured with a wafer full or a wafer that becomes the final product. Generally, the T E G structure is arranged together with other T E G structures that have different purposes such as poor contact. Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs First, the first wiring layer is provided with a wire break detection wiring 1 having a desired wiring width and wiring length in a meandering manner. The stylus electrodes 3 and 3 are arranged on both ends of the disconnection detecting wiring 1 and the presence or absence of a disconnection is confirmed by measuring the wiring resistance electrically. A plurality of short-circuit detection wirings 2 are arranged in parallel to the gaps of the wiring in the lengthwise direction of the disconnection detection wiring 1 (vertical direction in Fig. 1), and -6- this paper size applies the Chinese National Standard (CNS) Α4 specification (210 X 297 mm) 562940 Α7 Β7 V. Description of the invention (today (please read the precautions on the back before filling this page) The distance between adjacent wires becomes the desired size. Wire 1 for wire break detection and short circuit The detection wiring 2 is electrically insulated through the interlayer insulating film 4. A plurality of short-circuit detection wirings 2 are connected to the p-type silicon substrate 6 which is n-doped (ion-implanted) through the contact plugs 5, respectively. N-channel 7. The plurality of n-channels 7 are constructed to be electrically insulated from each other via the element separation area 8 (if it is kept insulated, it can be omitted), and the short-circuit detection wiring 2 is kept insulated. The wiring interval And the width of the wiring, and the representative size of the wiring process to be monitored is made from 0 · 1 to 1 micron. In order to monitor the frequency of each defect's frequency, then set the number of TEG, Wiring with each wiring interval is also possible. Hereinafter, a unit of TEG will be referred to as a module. Hereinafter, the method for detecting a short circuit fault in wiring will be described using the second figure. First, as shown in the figure, one probe 10 is contacted with the stylus electrode 3 connected to the disconnection detection wiring 1. The other is connected to a substrate electrode (not shown) in contact with the p-type silicon substrate 6 ) And use the measuring device 11 to measure the intermediate resistance. At this time, the substrate potential is higher than the potential of the probe 1 0. That is, if the substrate electrode is at the ground potential, a negative potential is given to the probe 1 0, and if the probe 10 is a ground potential, a positive potential is given to the substrate electrode. This is a diode function formed by the n channel 7 provided on the p-type silicon substrate 6, and if there is a short circuit, Via a substrate electrode (not shown) through the p-type silicon substrate 6, current (forward current of the diode) easily flows in the n channel of the short-circuited portion 13. When a current flows, it passes through the contact plug 5 for short-circuit detection. Wiring 2, short circuit 1 3. There is a current leakage to the wire 1 for disconnection detection. Therefore, the paper size of the stylus used for the stylus electrode 3 applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -7- 562940 A7 ___B7_ 5 、 Explanation of the invention (The horse probe 10 can detect the leakage current to detect the short circuit fault. (Please read the precautions on the back before filling out this page) The following 'Describes the τ EG that is judged to be a short circuit fault by the above electrical inspection. The specific method of the defect occurrence position, that is, the specific method by the potential contrast method will be described. The method of detecting the short-circuit part by the potential contrast method will be described using FIG. 3. At 0, the secondary electron 21 is released from the disconnection detection wiring 1. The disconnection detection wiring 1 and the P-type silicon substrate 6 are electrically insulated. However, when the disconnection detection wiring 1 is grounded via the conductive probe 2 2 and grounded, it becomes a state capable of supplying electrons. And a large number of secondary electrons 2 1 are emitted. The detector 2 3 is used to detect the released secondary electron 2 1, and the desired processing is performed at the signal section at the Intellectual Property Bureau of the Ministry of Economic Affairs, the Printing and Processing Department of the Industrial Cooperatives, and the display is displayed at the display section 2 5. As a bright scan of the heart with charged particle lines 20. On the one hand, the short-circuit detection wiring 2 in which no short circuit occurs is electrically connected to the p-type silicon substrate 6 through the contact plug 5 and the n-channel, but the n-channel 7 formed on the p-type silicon substrate 6 may have diode characteristics. The electronic system is not supplied to the short-circuit detection wiring 2. Therefore, the secondary electrons 21 are temporarily released from the surface of the short-circuit detection wiring 2, but the consumed secondary electrons 21 are not supplied from the P-type silicon substrate 6. Therefore, the short-circuit detection wiring 2 is generated. Charged, resulting in darker contrast. On the contrary, when there is a defective short circuit 13, the wiring where the short circuit 13 occurs is connected to the disconnection detection wiring 1 and becomes almost the same potential. Therefore, a large number of secondary electrons are emitted and disconnected. The detection wiring 1 also causes a large amount of secondary electrons to be emitted, which is more than -8- This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) 562940 A7 B7 V. Description of the invention (6) (Please read first Note on the back then fill in this page) Bright contrast. Thereby, the short-circuit detection wiring 2 in which the short-circuit 13 is generated can be visualized. In Figure 3, in order to obtain a potential comparison image, grounding is performed via a probe. In addition, the internal circuit of Ding EG is connected to the substrate, and the volume difference (capacitance difference) of the conductor 10 is used to charge the charged voltage. (The amount of secondary electrons emitted is determined by this), and the disconnection position or short-circuit position can be detected as the difference in potential contrast. The inspection method that basically compares images is a wired scanning method and a two-dimensional scanning image comparison method. As shown in Fig. 4 (a), the line scanning method is a recognition method of signal processing according to one-dimensional line scanning. It is possible to capture the irregularity change of the signal period of the potential comparison of the short-circuit detection wiring 2 ′, so as to make a special short-circuit profiler. In the Fourier transform, extract the disordered part of the period from the period of the main component of the normal part as a defect, or by obtaining the period or amplitude of the signal waveform of the normal part in advance and recognizing the abnormal amplitude of the signal period caused by the short circuit, calculate This coordinate is memorized to count the number of short circuits. The number of defects can be monitored by the number, or the short-circuit can be checked by using an electron microscope based on the coordinates of the defects. In this embodiment, the short-circuit detection wiring 2 printed by T E G, printed by the employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, is arranged at the same pitch in the longitudinal direction (the wiring length direction). Therefore, as shown by the arrow in Figure 4 (a), the charged beam scanning can be used to scan the seed between each pitch at a predetermined interval, and the short circuit of the TEG can be specified in a short time, and the disconnection failure can occur. position. Also, as shown in FIG. 4 (b), the comparison method of the two-dimensional scanning image is to sequentially access the two-dimensional image, and use the images from other fields to perform comparison and display the defect site. Specifically, two-dimensional meta portraits obtained by observing three T E G modules were used. The original paper size obtained τ EG (a) is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -9-562940 A7 B7___ V. Description of the invention (but (please read the precautions on the back before filling this page) Image Comparison between 26 and TEG (b) 28 image of day image 27 difference, then obtain the original day image 26 of TEG (a) and comparison image 2 of TEG (c) image 2 9 9 Difference image 2 8 /, confirm whether there is a difference exceeding threshold threshold Image, it is determined that there is an abnormality in that image, that is, it is determined that the TEG is defective (in this case, the TEG (b) is defective) 'method of calculating the coordinates. In order to improve the inspection sensitivity, the disconnection detection is used On one side of the wiring 1, a probe contact pin is used for the contact pins 3, 3 / and grounded, or a method of grounding the internal circuit in advance is more effective for comparison. However, if the disconnection detection wiring 1 Since the volume difference (capacitance difference) from the short-circuit detection wiring 2 is sufficient, it is not necessary to ground the stylus electrode 3, 3 / with the probe stylus. Intellectual Property Bureau of the Ministry of Economic Affairs As shown in Figure 5, when using this TEG structure to detect a broken wire The probe 10 is brought into contact with the stylus electrodes 3, 3 connected to both ends of the disconnection detection wiring 1 and the measurement of the wiring resistance is performed using the measuring device 11. If there is a disconnection 12, the wiring is The resistance is higher than the wiring resistance of the target specification, so it is confirmed whether there is a disconnection fault. As shown in Figure 6, when the potential disconnection method is used to identify the disconnection part, as described above, the object to be inspected If the module irradiates the charged particle beam 20, a part of the disconnection detection wiring 1, that is, the part where the disconnection 12 occurs, becomes a darker contrast. By capturing the end of the part that becomes the darker contrast (in the first The coordinates located on the far right and uppermost side in Figure 6 have broken lines 1 2), which can be easily specified. Below, the detailed fault detection when a broken line and a short circuit occur in a module will be described with reference to Figure 7. Method: This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -10- 562940 A7 B7 V. Description of the invention (Please read the notes on the back before filling this page) First, 'not shown but As mentioned above, after connecting to this disconnect The stylus electrodes 3 at both ends of the test wiring 1 contact the probe 10, and the resistance is measured by the measuring device 11 to confirm the existence of the disconnection 12. Then, as shown in FIG. 7, the substrate electrode (not shown) is measured. (Shown), and the resistance of the probe 10 contacted by the stylus electrode 3 connected to one end of the above-mentioned disconnection detection wiring 1 and the presence or absence of a short circuit 1 3. In the example shown in FIG. 7 (a), In some cases, the short circuit 1 cannot be confirmed due to the disconnection 12. In this way, as shown in FIG. 7 (b), the other end of the disconnection detection wiring χ is measured and connected to the stylus electrode 3 /, that is, The existence of short circuit 1 3 can be confirmed. Therefore, even when a disconnection 12 and a short circuit 1 3 occur simultaneously in a module, a correct inspection can be performed. The above sequence is put together in FIG. 8. First, the resistance between the stylus electrodes 3, 3 ^ connected to both ends of the disconnection detection wiring 1 is measured, and the presence or absence of a disconnection is checked (step 1). However, after printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, it is determined whether there is a disconnection between one of these stylus electrodes and the substrate-side electrode (step 2). At this time, when a disconnection is detected in step 1, the resistance between the other electrode of the stylus electrode and the substrate-side electrode is measured to check for a short circuit (step 3). With this series of sequences, it is possible to efficiently detect disconnection and short circuit, or mixed situations. In the following, a method for specifying a short-circuit location when a specific disconnection failure and a short-circuit failure occur in the same module will be described using FIG. 9. In addition, this T E G structure. By using the potential comparison method described above, not only a short circuit can be obtained, but also the comparison at the time of disconnection can be obtained, so the disconnection position and the short circuit position can be detected simultaneously. This paper size applies the Chinese National Standard (CNS) A4 specification (21〇 ×: 297mm) -11-562940 A7 B7 V. Description of the invention (9) (Please read the precautions on the back before filling this page} First, with Similarly, when the charged object beam 20 is irradiated on the module of the object to be inspected, a part of the disconnection detection wiring 1, that is, the place where the disconnection 12 occurs is in dark contrast, so the disconnection can be specified. Position. Also, the short-circuited position 13 is electrically connected to the disconnection detection wiring 1 so that a sufficient capacitance can be obtained for a brighter contrast and the short-circuited position can be specified. However, the short-circuited position can be specified. The disconnection detection wiring 1 for which the line is disconnected is determined by the length of the disconnected wiring. If the length of the wiring is too short, the charged voltage rises and becomes a darker contrast. If there is a short-circuited part in this part As a matter of course, the short-circuited part is assimilated with the darker contrast of the disconnection detection wiring 1, and it may become difficult to manifest it. In this case, for example, as shown in FIG. 9 (b), the connection to One of the darker contrasts The stylus electrode 3 of the disconnection detection wiring 1 is subjected to a stylus to apply a reference potential, so that the disconnection detection wiring 1 is changed to a brighter contrast, thereby identifying the short-circuited portion 13 as described above. The other TEG structure used to detect short circuit faults is shown in Figure 10. The TEG structure printed on the figure is printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. It is a layer of the above TEG structure. The upper-layer short-circuit detection wiring 2 Because it is connected to the lower-layer short-circuit detection wiring 2 through the through-hole 40, the p-type silicon substrate is connected to the n-channel, and the short-circuit position can be specified by the potential comparison method described above. The disconnection detection wiring 1 is on the top The lower layer is kept insulated to monitor the occurrence of each defect. In addition, in the above-mentioned laminated state, the defect occurrence of the lower layer can also be measured, and the upper and lower contact pins 3 are connected through the through hole 40. Paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) -12- 562940 A7 B7 V. Description of the invention (and (please read the precautions on the back before filling this page) 3 > also available .This TEG structure is effective to monitor the changes in the occurrence of defects according to the stack. In this TEG structure, after the lower layer is inspected, the upper layer is formed and inspected. At this time, the wiring resistance of the lower layer can be measured to check the formation of the upper layer. Consider the effect of applying the short-circuit detection wiring 2 through the through holes 40 to 40. Although not shown, it can increase the wiring width of the short-circuit detection wiring 2 and absorb the deviation when forming the through-holes. It is more conceivable. This is the same for the contact plug 5. Therefore, it is preferable that the width of the short-circuit detection wiring 2 series is wider than that of the disconnection detection wiring 1. This is ideal because the short-circuit detection wiring does not break. . At this time, it is a matter of course that the size is determined by considering the tolerance between the disconnection detection wiring 1 and the short-circuit detection wiring 2 of the potential comparison method. The other TEG structure used to detect short-circuit failure is shown in Figure 11. The TEG structure shown in the figure is limited to those that only detect short-circuit failure. Two short-circuit detection wirings are arranged in the gap between comb-shaped wiring 41. . In this way, if only short-circuits are detected, it is sufficient if the comb-shaped wiring has a common potential and the short-circuit detection wiring is in a non-conducting state with the comb-shaped wiring. Printed on Figure 12 shows the other TEG structures used to detect short-circuit defects. The TEG structure shown in the figure is a configuration of multiple short-circuit detection wiring, such as short-circuit detection wiring. 4 2 grounds are formed by a wiring. As a result, when a defective position in line scanning is specified, the scanning line can be reduced and a specific time can be shortened. Also, although it is not shown in the figure, the Chinese paper standard (CNS) A4 (210X 297 mm) applies to this paper size. -13- 562940 A7 B7 V. Description of the invention (cutting short-circuit detection wiring 4 2 forms a plurality of The contact plug 5 can also correspond to the disconnection of the short-circuit detection wiring 4 2. (Please read the precautions on the back before filling out this page.) Figure 13 shows other TEG structures used to detect short-circuit failure. 0 indicates The TEG structure shown in the figure is a plurality of contact plugs 5 connected to each short-circuit detection wiring 2. If the contact plug 5 is non-conducting, even if the short-circuit detection wiring 2 is short-circuited, the short-circuit will be missed by electrical inspection. Defects. In order to avoid this, a prepared contact plug can be provided to measure the presence or absence of defects with high accuracy. In the same manner as above, it is possible to cope with a disconnection of the short-circuit detection wiring 2. As shown in FIG. 14 Other TEG structures used to detect short-circuit failure. The TEG structure shown in the figure is to provide a stylus electrode 3 为了 in order to impart potential to the substrate, via p + channel 51 and contact plug 5, It is connected to p-type silicon substrate 6. It is effective when no current can be obtained from the substrate. Figure 15 shows other TEG structures used to detect short-circuit failures. The contact pin electrode 3 at one end of the disconnection detection wiring 1 is connected to the P-type silicon substrate 6 via the P + channel 5 2 and the contact plug 5. When the external inspection of the SEM is performed, the disconnection can be reduced. Poor inspection of the image drift caused by the electrified cause of the detection wiring 1. Here, the P + channel 5 2 is implanted with impurities at a higher concentration than the impurity concentration of the p-type silicon substrate 6. (Omitting ρ + channel 5 2 and It is also possible to use only the contact plug 5 for conduction.) This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) -14- 562940 A7 B7 V. Description of the invention (goods (please read the precautions on the back first) (Fill in this page) The TEG structures described above all use P-type silicon substrates, but N-type semiconductor substrates can also be used. However, at this time, a p-type well region is set up, and the above-mentioned channel region must be appropriately arranged in this area. p-type In addition, in any of the above embodiments, only TEG may be loaded on the entire wafer, or TEG and product wafers may be loaded on the wafer in a mixed manner. At this time, the TEG is configured with a uniform pitch. It may be arranged in a wafer, or may be arranged on a concentric circle with a changed radius, or may be arranged on a scribe line. Moreover, it is of course also effective to appropriately combine any of the embodiments described above. If η is not formed, Channels can also obtain diode effects, and can control the flow of electrons, so it is not necessary to form η channels. Also, various patterns of disconnection detection wiring or short circuit detection wiring patterns are disclosed, but the wiring pattern is not limited. In these cases, when the short-circuit detection wiring is short-circuited with any of the wirings, it is sufficient to constitute a current flowing from the wiring to the substrate through the contact plug 5 or from the substrate to the wiring in a certain direction. Printed by the Consumer Property Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. If it is not a potential comparison method, but a visual inspection or current absorption method is used to detect the short-circuit position, it does not need to have a diode function, and it can be turned on. Therefore, it is also possible to easily determine the cause of short circuit and disconnection with a single module, thereby improving inspection efficiency and manufacturing yield. Fig. 16 shows a method for specifying a short-circuit part or a disconnection part by an visual inspection device. This method uses a visual inspection device (not shown) to irradiate the surface of the TEG with a beam of charged particles such as light or electrons, and detect the reflected light (bright field light or dark field light), or secondary electrons or Reflected electricity 7. Observed portrait of TEG surface structure (original day image, the paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) -15- 562940 A7 B7
五、發明説明（P (請先閱讀背面之注意事項再填寫本頁) 14)，又取得一枚或兩枚其他領域之觀察結果（比較畫 像1 5 )，來判定此些之差畫像1 6之異常，俾確認有無 缺陷者。在圖中，表示檢查斷線的例子。 第1 7圖係表示使用吸收電流法之不良部位之特方法 的圖式。 經濟部智慧財產局8工消費合作社印製 首先，將探針1 0接觸於連接在斷線檢測用配線1之 觸針用電極3之一側。當將電子線等之荷電粒子線2 0照 射在T E G之表面，成爲使用探針可檢測該二次電子2 1 之放出量之相差，亦即檢測電流之收支。將在檢測器3 0 所檢測的電流變化。在信號處理部3 2進行所期望之處理 ，作成掃描畫像輸出至顯示部3 3。吸收電流法係使用以 上之原理者。特定短路缺陷之位置時，則在正常之短路檢 測用配線，電流不會流至探針，而在短路部位有電流流動 之故，因而可檢測短路缺陷。與上述之電位對比法同樣地 ，線掃描荷電粒子線之照射來檢測不連續點，或是將吸收 電流畫像作爲與掃描同步的二維畫像，進行與正常部之比 較檢查，成爲可特不良部位。又，使用該荷電粒子線2 0 ，取得短路部位之放大晝像也有效。又，特定斷線位置時 ，則在斷線部位，可確認吸收電流量之變化，藉著與電位 對比法時同樣之處理，記憶該座標，或是使用在照射所使 用的荷電粒子線2 0，直接可取得斷線部位之放大晝像。 第2 0圖係表示使用發光顯微鏡的短路部位之特定方 法的圖式。 首先，在觸針用電極3，3〃 ，接觸探針10並連接 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -16- 562940 A7 B7 五、發明説明（护 (請先閱讀背面之注意事項再填寫本頁) 電源1 0 3。如在以上所述的實施形態，若在該τ E G存 有短路1 3，則藉由該電源1 0 3流動電流。這時候，經 由藉由P型矽基板6與η通道7所形成的P N接合而流動 電流之故，因而在該Ρ Ν接合部發生發光現象（依短路之 發光1 0 1 )。在上層形成有配線，惟一般依順方向電流 之發光強度較高，而發光從該配線之間隙洩漏。使用發光 顯微鏡，捕捉該發光，成爲可檢測有無短路1 3，或短路 1 3之發生位置。然後，依據在此所得到之座標，進行 S Ε Μ或Τ Ε Μ等之物理分析。即可縮短不良解析時間。 這時候，藉由Ρ+通道與ρ型矽基板6所形成之ΡΝ接合， 也有發生發光現象之可能性（來自電極下之發光1 〇 2 ) 。藉由焊接點無法遮蔽發光時，來自該部分之發光，係並 不是依短路1 3所產生者之故，因而並不需要作爲缺陷加 以認識，或是記憶該座標。 使用在此所說明之發光顯微鏡的手法，並不僅特定短 路部位之位置，而且測定流在電源1 0 3之電流，也可確 認有無短路。 經濟部智慧財產局員工消費合作社印製 又，在如捕捉藉由在此所說明之Ρ型矽基板6與η通 道7所形成的Ρ Ν接合所產生之發光的Τ E G構成以外時 ，也可捕捉發光現象。例如將η通道作成ρ通道，並將ρ 型矽基板作成η型的矽基板時，若在短路檢查時之觸針施 加二極體之絕緣擊穿電壓以上之電壓，則可檢測接合部之 擊穿所產生的發光現象。 使用第1 8圖說明表示於第1圖的Τ E G之製程。首 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） -17- 562940 Α7 Β7 五、發明説明（年 (請先閱讀背面之注意事項再填寫本頁) 先，在s i晶圓進行蝕刻形成元件分離領域8所用之（b ):將S i〇2等之氧化膜以c V D等成膜在晶圓上面（C )。藉由C Μ P (化學機械硏磨）除去該氧化膜之過剩部 分，施以平坦化，形成所期望之元件分離領域8 ( d )。 之後，爲了將η通道7形成於所期盼之領域，進行離子植 入（e )。在其上面堆積S i〇2等之層間絕緣膜4 ( f ) ;以蝕刻形成埋進接觸插頭5所用之孔（g ):以W等金 屬埋進於孔內部之後（h );藉由C Μ P除去上面之過剩 之金屬材料以形成接觸插頭（i )。又，將S i 0 2等之層 間絕緣膜4形成於上面（j );形成配線圖案所用的配線 溝（k )。經由配線擴散防止之障膜（例如τ i N、 經濟部智慧財產局員工消費合作社印製V. Description of the invention (P (please read the notes on the back before filling this page) 14), and obtain one or two observation results in other fields (comparative portraits 1 5) to determine the difference of these portraits 1 6 If it is abnormal, confirm whether there is any defect. The figure shows an example of checking for disconnection. Fig. 17 is a diagram showing a special method of a defective part using a sink current method. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Industrial Cooperative Cooperative. First, the probe 10 is brought into contact with one of the stylus electrodes 3 connected to the disconnection detection wiring 1. When the charged particle beam 20 of an electron beam or the like is irradiated on the surface of TEG, a difference in the amount of discharge of the secondary electron 2 1 can be detected using a probe, that is, the current balance is detected. The change in current that will be detected at detector 30. The desired processing is performed in the signal processing section 32, and a scanned image is created and output to the display section 33. The sink current method uses the above principles. When the location of a short-circuit defect is specified, in a normal short-circuit detection wiring, a current does not flow to the probe, and a current flows in the short-circuited portion, so the short-circuit defect can be detected. As with the potential comparison method described above, line scanning scans the charged particle beams to detect discontinuities, or the absorption current image is used as a two-dimensional image synchronized with the scanning, and compared with the normal part, and it becomes a special defective part. . It is also effective to obtain an enlarged day image of a short-circuited portion using the charged particle beam 20. In addition, when the location of the disconnection is specified, the change in the amount of absorbed current can be confirmed at the disconnection location, and the coordinates can be memorized by using the same process as in the potential comparison method, or the charged particle beam used for irradiation 2 0 , Can directly get the enlarged day image of the disconnected part. Fig. 20 is a diagram showing a specific method of a short-circuit portion using a light-emitting microscope. First, the stylus electrodes 3, 3〃, contact the probe 10 and connect to this paper. The size of the paper applies the Chinese National Standard (CNS) A4 (210X297 mm) -16- 562940 A7 B7 5. Description of the invention (protection (please first (Please read the notes on the back and fill in this page again) Power supply 103. As in the embodiment described above, if there is a short circuit 13 in τ EG, a current flows through the power supply 103. At this time, via Due to the current flowing through the PN junction formed by the P-type silicon substrate 6 and the n-channel 7, a light emitting phenomenon occurs at the PN junction (based on short-circuited light emission 1 0 1). Wiring is formed on the upper layer, but generally The luminous intensity of the current in the forward direction is high, and the luminescence leaks from the gap of the wiring. Use a luminescence microscope to capture the luminescence and become a position where the presence of a short circuit 13 or a short circuit 13 can be detected. Then, based on this The physical coordinates of S Ε Μ or Τ Ε M can be reduced by analyzing the physical coordinates. At this time, the PN junction formed by the P + channel and the ρ-type silicon substrate 6 may cause a light emission phenomenon. (From under the electrode The light emission from the part is not caused by the short circuit 13 when the welding point cannot shield the light emission, so it is not necessary to recognize it as a defect or memorize the coordinates. Using the method of the light-emitting microscope described here, not only the location of the short-circuit location, but also the current flowing in the power source 103 can be measured, and the presence or absence of a short-circuit can also be confirmed. The light emission phenomenon can also be captured when the light emitting T EG structure generated by the PN junction formed by the P-type silicon substrate 6 and the η channel 7 described here is captured. For example, the η channel is made into a ρ channel, and When the ρ-type silicon substrate is made into an η-type silicon substrate, if the stylus is applied with a voltage equal to or higher than the dielectric breakdown voltage of the diode during the short-circuit inspection, the light-emitting phenomenon caused by the breakdown of the junction can be detected. Figure 8 illustrates the T EG process shown in Figure 1. The first paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) -17- 562940 Α7 Β7 5. Description of the invention (year ( (Read the precautions on the back before filling this page.) First, etching on the si wafer to form the element separation area 8 (b): forming an oxide film such as Si02 on the wafer with cVD or the like ( C). The excess portion of the oxide film is removed by CMP (chemical mechanical honing), and planarization is performed to form a desired element separation area 8 (d). Then, in order to form the n-channel 7 in a desired period In the desired area, ion implantation (e) is performed. An interlayer insulating film 4 (f) such as Si02 is deposited thereon; a hole (g) used to bury the contact plug 5 is formed by etching: buried with a metal such as W After entering the inside of the hole (h); remove the excess metal material above by CMP to form a contact plug (i). Further, an interlayer insulating film 4 such as S i 0 2 is formed on the upper surface (j), and a wiring groove (k) for forming a wiring pattern is formed. Barrier film for preventing diffusion through wiring (such as τ i N, printed by employee consumer cooperative of Intellectual Property Bureau, Ministry of Economy
TaN、Ta等）（末圖示），將Cu等金屬藉由電鍍或 濺鍍成膜於配線構（1 );藉由C Μ P除去平坦化過剩之 金屬。形成斷線檢測用配線1 ，短路檢測用配線2及觸針 用電極3 ，3 > 。又，上述任一蝕刻過程所用的圖案生成 ，係事先藉由微影成像過程來形成光阻罩幕，並除去罩幕 以外之部分者。變更一部分過程，將配線材料作成A 1或 W所形成也可以。當然儘量以類似於產品之過程加以製作 ’藉由T E G可抽出與產品相同之問題。 使用第1 9圖說明對本發明之製造線的反饋方法。設 T E G之製程並將S i晶圓輸入於製造線上，進行製造（ 步驟1 )。在該製程之所期望之過程期間，過程後，進行 晶圓之外觀檢查（例如在成膜後進行異物檢查；在蝕刻後 或C Μ P後進行外觀檢查；此些檢查後之s E Μ檢查等） 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -18- 562940 A7 B7 _(TaN, Ta, etc.) (not shown), metal such as Cu is deposited on the wiring structure by electroplating or sputtering (1); excess metal is planarized by CMP. The disconnection detection wiring 1, the short-circuit detection wiring 2 and the contact pin electrodes 3, 3 are formed. In addition, the pattern generation used in any of the above-mentioned etching processes is to form a photoresist mask through a lithography imaging process in advance, and remove parts other than the mask. A part of the process may be changed, and the wiring material may be formed as A 1 or W. Of course, try to make it in a process similar to the product. ’By T E G, the same problems as the product can be extracted. The feedback method for the manufacturing line of the present invention will be described with reference to FIG. 19. Set the T E G process and input the Si wafer on the manufacturing line for manufacturing (step 1). During the desired process of the process, after the process, the appearance of the wafer is inspected (such as foreign matter inspection after film formation; appearance inspection after etching or CMP; EMS inspection after these inspections) Etc.) This paper size applies to Chinese National Standard (CNS) Α4 specification (210X297 mm) -18- 562940 A7 B7 _
五、發明説明（P (請先閱讀背面之注意事項再填寫本頁) 之後（步驟2 )，藉由測試器或探針等進行電氣測試，並 進行T E G之良，不良判定（步驟3 )。依據電氣測試之 結果’（視需要一面參照外觀檢查之結果），選擇須解析 之T E G，而對該T E G，特定不良位置（步驟4 )。依 據該特定之不良之位置座標，進行依S EM或T EM之表 面’斷面之觀察或材料分析（步驟5 )，推定不良機構， 定出對策案（步驟6 )。視需要觀察缺陷發生頻度是否比 目標較多的判斷是否須做對策之後，進行所期望之對策（ 過程改善，裝置改善，裝置內淸掃等），將結果反映在以 後之批量，進行效果確認（步驟7 )。由此，可推進減低 缺陷，而可實現提高良品率。 如上所述，將短路檢測用配線2與P型矽基板6側電 氣式地連接，則即使在斷線檢測用配線1與短路檢測用配 線2之間發生短路，測定與斷線檢測用配線1連接的電極 及與P型矽基板6連接的電極之間的配線電阻，即可檢測 是否短路。 又，在P型矽基板6構成η通道而成爲具二極體功能 ，由此可構成藉由電位對比法的荷電粒子之照射也不會放 經濟部智慧財產局員工消費合作社印製 出二次電子，而是否短路之位置也可檢出作爲對比之相差 〇 由此，電氣式地測定複數T E G所構成之晶圓全面， 而縮小由此成爲不良的T E G之後，對於該不良丁 E G， 進行詳細檢查即可特定缺陷之發生位置之故，因而成爲可 有效率地捕捉缺陷之發生狀態，而在短時間內就可以推定 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -19- 562940 A7 B7 五、發明説明（垆 缺陷的發生模式，對該發生源施以對策，就可使製造線成 爲淸淨化，又可實現提高製造良品率。 (請先閱讀背面之注意事項再填寫本頁) 以下，對本發明之檢查系統進行說明。第2 1圖係說 明本發明之檢查系統的圖式。由儲存依探針檢查的T E G 之電氣測定資料庫6 1 ，保存T E G之設計資料，特別是 佈置資料7 1的C A D資料庫6 2，將驅動檢查裝置6 3 所用的檢查條件用以自動地或半自動地決定的檢查條件決 定手段6 3，及檢查裝置6 3所構成，並藉由電腦網路 6 0連接各該構成。檢查條件決定手段6 4係依其功能， 由檢查對象決定手段6 5 ，觀察條件決定手段6 6 ，檢查 條件生成手段6 7所構成。使用第2 2圖，說明此些之功 tb ^ 經濟部智慈財產局員工消费合作社印製 第2 2圖係表不決定檢查條件之次序。依據記載那一 晶圓，那一晶片’那一 T E G具有那一種電氣特性的電氣 測定結果7 0，藉由任意之基準來抽出檢查對象之故，因 而使用檢查對象決定手段6 5。亦即，若爲短路，則設定 電阻之下限；若爲斷線，則規定電阻之上限，對超出該値 者視作不良。以檢查對象決定手段6 5進行該篩選處理。 例如僅檢查不良品時，藉由檢查對象決定手段6 5，依據 某一基準（若爲短路不良時，將成爲指定之電阻値以下者 判斷爲不良T E G )輸出不良資料7 2。該不良資料7 2 係記載有成爲不良的晶片與T E G之種類。 另一方面，爲了決定觀察領域等而使用觀察條件決定 手段6 6。首先，讀取氣流格式之佈置資料7 1 ，並處理 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -20- 562940 A 7 B7 五、發明説明（乍 (請先閱讀背面之注意事項再填鳴本頁) 該資料。該處理之一種，係抽出各該T E G之座標之處理 。以晶胞各種等來選擇所期望之T E G，並將該領域作爲 例如左下（X m i n，Y m i η )右上（X m a X， Y m a x )座標加以輸出。如第4圖所述，在使用依荷電 束之電位對比來進行檢查時，藉佈置資料解析自動地算出 進行掃描方向與間苗掃描時之掃描間距。具體來說，掃描 間距係由短路檢測用配線2 (矩形領域）之對角座標求出 短路檢測用配線2每一·個之中心位置，並求出相鄰接之兩 個中心點間的距離來算出。由此，輸出觀察條件資料7 3 。將以上所述之不良資料7 2與觀條件資料7 3之雙方， 存取在檢查條件生成部G 7，俾自動地生成檢查條件7 4 〇 經濟部智慧財產局員工消費合作社印製 以下，對該檢查系統之運用形態說明兩個例子。第 2 3圖係表示說明本發明之檢查系統之第一運用形態的圖 式。作爲前提條件，同圖係經營半導體製造線的半導體製 造廠，從檢查裝置供應T E G之設計資料的情形。半導體 製造廠之檢查裝置使用者，係使用用戶終端8 0 ，須著表 示於以下的檢查條件生成之次序。首先，對電氣測定資料 庫6 1 ，檢索所期望之電氣測定結果7 0 ( 1 )，並將資 料發送至檢查裝置製造廠所有的檢查條件決定手段6 4 ( 2)。又，使用者係檢查被保存在檢查裝置製造廠保有的 CAD資料庫6 2之佈置資料7 1 (3)，並發送至檢查 條件決定手段6 4 ( 4 )。最後輸入用以生成檢查條件之 命令（5 )，並生成檢查條件，而轉送資料至檢査裝置（ 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -21 - 562940 A7 B7 __V. Description of the invention (P (please read the precautions on the back before filling this page) (step 2), perform electrical test with a tester or probe, etc., and judge the good and bad of TEG (step 3). According to the results of the electrical test '(refer to the results of the visual inspection if necessary), select the TEG to be analyzed, and specify the defective position for the TEG (step 4). According to the position coordinates of the specific defective, perform the SEM or T EM's surface 'cross-section observation or material analysis (step 5), estimation of a defective mechanism, and determination of a countermeasure (step 6). If necessary, observe whether the defect occurs more frequently than the target and determine whether it is necessary to take a countermeasure. Expected countermeasures (process improvement, device improvement, cleaning in the device, etc.), reflect the results in subsequent batches, and confirm the effect (step 7). As a result, defects can be reduced and the yield can be improved. As above As described above, when the short-circuit detection wiring 2 is electrically connected to the P-type silicon substrate 6 side, even if a short-circuit occurs between the disconnection detection wiring 1 and the short-circuit detection wiring 2, The wiring resistance between the electrode connected to the disconnection detection wiring 1 and the electrode connected to the P-type silicon substrate 6 can be used to detect the short circuit. In addition, the P-type silicon substrate 6 constitutes an n-channel and has a diode. Function, which can constitute the irradiation of the charged particles by the potential comparison method, and will not put the secondary electrons printed by the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, and the position of the short circuit can also be detected as a contrast. Therefore, the wafer formed by a plurality of TEGs is electrically measured in its entirety, and the TEGs that have become defective after shrinking are reduced. The detailed inspection of the defective EG can determine the location of the defect, so it becomes efficient. Capture the occurrence of defects, and in a short time it can be estimated that the paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -19- 562940 A7 B7 V. Description of the invention The countermeasures of the source can make the production line purify and improve the production yield. (Please read the precautions on the back before filling in this page) The following The inspection system of the present invention will be described. Figure 21 is a diagram illustrating the inspection system of the present invention. The electrical measurement database 6 1 of the TEG stored by the probe is stored, and the design data of the TEG is stored, especially the layout data 7 1 is a CAD database 6 2 that uses the inspection conditions used by the driving inspection device 6 3 to automatically or semi-automatically determine the inspection condition determining means 6 3 and the inspection device 63 and is composed of a computer network 6 0 Each of these components is connected. The inspection condition determination means 64 is composed of inspection object determination means 6 5, observation condition determination means 6 6, and inspection condition generation means 6 7 according to their functions. Using FIG. 22 to illustrate these Contribution tb ^ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, Figure 22 is a table that does not determine the order of inspection conditions. According to the electrical measurement result of which wafer, that wafer, that TEG has the electrical characteristics of 70, and the inspection target is extracted by an arbitrary reference, the inspection target determination means 65 is used. That is, if it is a short circuit, the lower limit of the resistance is set; if it is a disconnection, the upper limit of the resistance is specified, and it is considered bad if it exceeds that. This screening process is performed by inspection target determination means 65. For example, when only defective products are inspected, inspection object determination means 6 5 is used to output defective data 7 2 according to a certain criterion (if it is a short-circuit defect, it will be determined as the specified resistance 値 the following is judged as defective T E G). This defective material 7 2 describes the types of wafers and T E G that are defective. On the other hand, in order to determine an observation area, etc., observation condition determination means 6 6 is used. First, read the layout information 7 1 of the airflow format, and process the paper size to the Chinese National Standard (CNS) A4 (210X 297 mm) -20- 562940 A 7 B7 V. Description of the invention (at first (please read the back first) Please note this page and fill in this page again) This data. One of the processes is to extract the coordinates of each TEG. Select the desired TEG with various cell types, etc., and use this area as the lower left (X min, Y mi η) and output it in the upper right (X ma X, Y max) coordinates. As shown in Figure 4, when using the potential contrast of the charged beam to perform the inspection, the scanning direction and thinning are automatically calculated by analyzing the layout data. Scanning pitch during scanning. Specifically, the scanning pitch is obtained from the diagonal coordinates of the short-circuit detection wiring 2 (rectangular area), and the center position of each one of the short-circuit detection wiring 2 is obtained, and two adjacent ones are obtained. The distance between the center points is calculated. From this, the observation condition data 7 3 is output. Both the above-mentioned bad data 72 and the observation condition data 73 are stored in the inspection condition generation unit G 7 and are automatically generated. Generate check Condition 7 4 〇 The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints the following two examples of the operation form of the inspection system. Fig. 23 is a diagram illustrating the first operation form of the inspection system of the present invention. The prerequisites are the same as those of a semiconductor manufacturing plant that operates a semiconductor manufacturing line and supplies TEG design data from the inspection device. The inspection device user of the semiconductor manufacturing plant uses the user terminal 80 and must indicate the following inspection conditions The order of generation. First, the electrical measurement database 6 1 is searched for the desired electrical measurement result 70 (1), and the data is sent to all the inspection condition decision means 6 4 (2) of the inspection device manufacturer. The user checks the layout data 7 1 (3) stored in the CAD database 6 2 held by the inspection device manufacturer, and sends it to the inspection condition determination means 6 4 (4). Finally, the command for generating inspection conditions is input ( 5), and generate inspection conditions, and transfer the data to the inspection device (this paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -21 -562940 A7 B7 __
五、發明説明（P (請先閲讀背面之注意事項再填寫本頁) 6 )。第2 4圖係表示說明本發明的檢查系統之第二運用 形態的圖式。同圖係在檢查裝置使用者所管理之C A C資 料庫保有佈置資料，並記載利用該資料之情形。對這些以 外，與第2 3圖同樣之故，因而省略其詳細說明。 使用第2 5圖說明在上述之用戶終端8 0所顯示的 GU I (Graphical User Interface)。第 2 5 圖係表不說明 檢查條件決定處理之G U I畫面的圖式。指定如上所述的 輸入項目（檢查條件設定手段之I P位址，電氣測定結果 資料庫之I P位址，電氣測定結果檔案名稱等），計算機 或資料庫之I P位址，保存檔案之場所，或其檔案名稱而 進行處理。在此，在電氣測定結果補助資訊之輸入攔，輸 入記載用以辨別上述之良品與不良品的電氣特性値（電阻 値等之閾値）的檔案名稱。又，在C A D資料之補助資訊 之輸入欄，輸入記載T E G之種類及與佈置上之晶胞名稱 之對應，或佈置層號碼表等的檔案名稱。 經濟部智慧財產局員工消費合作社印製 如上所述地在檢查裝置製造廠保有檢查條件決定手段 6 4時，不必到各用戶之設備，即可進行檢查條件決定手 段所具有的檢查條件製作程式之變更，而成爲有效率。又 ，在檢查裝置用戶側，也可抑制過剩之設備投資，而具較 大優點。 以下，說明自動地生成該T E G之佈置資料的C A D 系統。第2 6圖係表示說明本發明之C A D系統的圖式。 首先，輸入T E G之斷線檢測用配線及短路檢測用配線之 配線寬度，配線間距，配線領域座標，或指定佈置層之號 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -22- 562940 A7 B7V. Description of the invention (P (please read the precautions on the back before filling this page) 6). Fig. 24 is a diagram illustrating a second operation mode of the inspection system of the present invention. The same figure shows the layout data in the C A C database managed by the user of the inspection device, and records the use of this data. Except for these, the same reason as in Fig. 23 is given, and therefore detailed description is omitted. The GU I (Graphical User Interface) displayed on the above-mentioned user terminal 80 will be described using FIG. 25. Figure 2 5 is a diagram that does not explain the G U I screen for the inspection condition determination process. Specify the input items as described above (IP address of inspection condition setting means, IP address of electrical measurement result database, electrical measurement result file name, etc.), computer or database IP address, place to save the file, or Their file names. Here, input the file name of the electrical characteristics 补助 (resistance 値, etc.) for discriminating the good and bad products mentioned above in the input block of the electrical measurement result support information. In the input field of the supplementary information of the C A D data, enter the file name that describes the type of T E G and the correspondence with the unit cell name on the layout, or the layout number table. The Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the inspection condition determination means 64 in the inspection device manufacturer as described above, and the inspection condition creation method included in the inspection condition determination means can be performed without going to each user's equipment. Change and become efficient. In addition, on the user side of the inspection device, excessive investment in equipment can be suppressed, which has great advantages. Hereinafter, a CAD system that automatically generates the layout data of the TEG will be described. Fig. 26 is a diagram illustrating a CA D system of the present invention. First, enter the wiring width, wiring pitch, wiring field coordinates, or the number of the designated layout layer for the wire break detection wiring and short circuit detection wiring of the TEG. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm)- 22- 562940 A7 B7
五、發明説明（2P (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 碼（步驟1 )。接受該輸入，開始C A D資料之自動佈置 處理。首先，從配線領域座標在佈置上確保佈置之領域（ 步驟2 )。之後，配置斷線檢測用配線成爲能從該領域之 一隅被收容於領域內。例如，斷線檢測用配線之間距係作 成短路檢測用配線與斷線檢測用配線之配線間距之兩倍， 則空出空間成可配短路檢測用配線（步驟3 )。之後，用 戶輸入配置短路檢測用配線之條數與該配線長度方向之配 線間隔之資料（步驟4 ;。依據該資料，將短路檢測用配 線仔細地配置在斷線檢測用配線之間隙（步驟5 )。這時 候，同時地，與短路檢測用配線同樣地，定義以通道層或 元件分離層所構成的擴散層，而以元件分離層隔離該間隙 。乂，對短路檢測用配線與用以連接該擴散層的接觸插頭 也加以佈置。然後，用戶輸入觸針用電極之中心座標與電 極尺寸（步驟6 )。接受該輸入，C A D系統係配置觸針 用電極（步驟7 )。然後，將斷線檢測用配線之兩端與觸 針用電極連接成不會接觸到配線領域（步驟8 )。又，也 配置用以連接觸針用電極基板之插頭。最後，用戶進行佈 置之配線檢查（步驟9 )，視需要以手動進行佈置修正（ 步驟10)。由此，生成佈置資料71(TEG之光罩之 佈置資料），而依據該佈置資料7 1可製造光罩。 將本發明之T E G實際適用於生產線時，爲了提高整 體T E G之面積（不良檢測面積與觸針用焊接點所作之面 積之總和）的不良檢測面積比率，成爲需要T E G之大面 積化。在第2 7圖所示T E G構造之適用形態的一例子。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -23- 562940 A7 B7 五、發明説明（孕 (請先閱讀背面之注意事項再填寫本頁) 隨著大面積化，特別是短路時，孤立配線之配線長度方向 之長度，其配線寬度也較窄，故預料成爲很難特定不良部 位。爲了解決此問題，藉由電氣測定可特定基本上之短路 部位地，作成以複數區劃分段一個T E G之構造。在同圖 中，作成大約1 0 0 # m X 1 0 0 # m之8行8列的矩陣 構成。將朝同圖之縱方向延伸的斷線檢測用配線1橫方向 地配置8系統，並將朝橫方向延伸的p阱層縱方向地配置 8系統。觸針用電極3，3 /係在斷線檢測用需要各兩個 〔（S1，S1。，（S2，S2>)，（S3， S 3 / )......〕，觸針用電極3 〃係在短路檢測用需要 各一個（D1，D2，D3，......)，而在同圖中，配 置合計2 4個。斷線之檢測係在連接於各該斷線檢測用配 線1之兩端的觸針用電極3，3 /進行8系統分量之測定 。短路之檢測係以各斷線檢測用配線1與各P阱層之電阻 來確認，亦即，對8系統之蛇行配線與8系統之P阱層， 全面地調查連接狀態（也設定斷線與短路同時地發生時， 斷線檢測用配線3，3 >係使用兩端之焊接點）。由此， 可特定在8行8列之那一區劃是否發生短路。 經濟部智慧財產局員工消費合作社印製 又，在第2 7圖表示不良事例與該時候之電氣測定結 果之關係（也參照同圖之下表）。發生斷線時（S 2領域 )，則在S 2與S 2 /之觸針時可檢測異常。發生短路時 〔（S 4，D 6 )領域〕，則在S 4與D 6，及S 4 >與 D 6之觸針時可確認異常，可特定到發生之小區劃。在其 後進行之詳細觀察時，則依據該結果而藉由V C法等來進 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -24- 562940 A7 __B7_ 五、發明説明（尊 行位置特定就可以。同時地發生斷線與短路時〔（S 6， D 4 )領域〕，則在S 6與D 4之觸針時看到異常。 (請先閱讀背面之注意事項再填寫本頁) 依照本發明，可提高使用T E G的檢查效率，由此可 提尚良品率。 (圖式之簡單說明） 第1圖係表示本發明之T E G構造的圖式。 第2圖係表示說明短路不良之檢測方法的圖式。 第3圖係表示說明短路不良之檢測方法的圖式。 第4圖係表示掃描方式與檢查算法的圖式。 第5圖係表示說明斷線不良之檢測方法的圖式。 第6圖係表示掃描方式與檢查算法的圖式。 第7圖係表示說明斷線不良與短路不良之檢測方法的 圖式。 第8圖係表示斷線不良與短路不之檢查流程的圖式。 第9圖係表示說明斷線不良與短路不良之檢測方法的 圖式。 經濟部智慧財產局8工消費合作社印製 第1 0圖係表不本發明之T E G構造的圖式。 %11圖係表不本發明之TEG構造的圖式。 弟1 2圖係表不本發明之T E G構造的圖式。 第13圖係表示本發明之TEG構造的圖式。 第14圖係表示本發明之TEG構造的圖式。 % 1 5圖係表不本發明之T EG構造的圖式。 第1 6圖係表示藉由外觀檢查裝置來檢測斷線部位之 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -25- 562940 A7 ___B7 五、發明説明（牢 方式的圖式。 (請先閲讀背面之注意事項再填寫本頁) 第1 7圖係表示藉由電流吸收法來檢測短路部位之方 式的圖式。 第18圖係表示本發明之TEG之製程的圖式。 弟1 9圖係表不對本發明之製造線之反饋方法的流程 〇 第2 0圖係表示藉由發光顯微鏡來檢測短路部位之方 式的圖式。 第2 1圖係表示說明本發明之檢查系統的圖式。 第2 2圖係表示檢查條件決定之次序的圖式。 第2 3圖係表示說明本發明之檢查系統的第一運用形 態的圖式。 第2 4圖係表示說明本發明之檢查系統的第二運用形 態的圖式。 第2 5圖係表示說明檢查條件決定處理之G U I晝面 的圖式。 第2 6圖係表示說明本發明之C A D系統的圖式。 第2 7圖係表示T E G構造之適用形態的一例子的圖 經濟部智慧財產局R工消費合作社印製 主要元件對照表 1 斷線檢測用配線 2，4 2 短路檢測用配線 3，3 > ，3 〃 觸針用電極 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -26- 562940 A7 B7 五、發明説明（本 4 56 78 層間絕緣膜 接觸插頭 P型矽基板 η通道 元件分離領域 0 ^ 探針 〇 1 1 測 定 器 1 2 斷 線 1 3 短 路 2 〇 荷 電 子 線 2 1 二 次 電 子 2 3， 3〇 檢 測 器 2 4， 3 2 信 號 處理部 2 5 ， 3 3 顯 示 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 5 1 ρ +通道 6 0 電腦網路 61 電氣測資料庫 6 2 C A D資料庫 6 3 檢查裝置 64 檢查條件決定手段 65 檢查對象決定手段 66 觀察條件決定手段 67 檢查條件生成手段 7 0 電氣測定結果 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -27- 562940 五、發明説明（ 7 1 7 2 7 3 7 4 8 0 10 1 10 2 10 3 A7 B7 2戶 佈置資料 不良資料 觀察條件資料 檢查條件 用戶終端 依短路之發光 來自電極下之發光 電源 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X297公釐） -28-V. Description of the invention (2P (Please read the notes on the back before filling this page) The code printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs (step 1). Accept this input and start the automatic layout processing of CAD data. First, from The area of the wiring area is coordinated to ensure the layout of the area (step 2). After that, the wiring for disconnection detection can be placed in one of the areas. For example, the distance between the wirings for disconnection detection is used for short-circuit detection. The wiring distance between the wiring and the disconnection detection wiring is doubled, so the space is free to be equipped with the short circuit detection wiring (step 3). After that, the user enters the number of the short circuit detection wiring and the wiring interval in the length direction of the wiring. (Step 4; Based on this information, carefully arrange the short-circuit detection wiring in the gap between the disconnection detection wiring (step 5). At this time, the same as the short-circuit detection wiring, define the channel layer Or a diffusion layer composed of an element separation layer, and the gap is separated by the element separation layer. Alas, the short-circuit detection wiring is used to connect the diffusion layer. The contact plugs of the layers are also arranged. Then, the user enters the center coordinates and electrode size of the stylus electrode (step 6). Accepting this input, the CAD system configures the stylus electrode (step 7). Then, the disconnection is detected The two ends of the wiring are connected to the stylus electrode so as not to touch the wiring area (step 8). Also, a plug for connecting the stylus electrode substrate is also provided. Finally, the user checks the layout of the wiring (step 9) If necessary, manually perform layout correction (step 10). From this, layout data 71 (layout data of the mask of the TEG) is generated, and a photomask can be manufactured according to the layout data 71. The TEG of the present invention is actually applicable to In the production line, in order to increase the ratio of the defective detection area of the entire TEG area (the sum of the defective detection area and the area made by the stylus welding point), it is necessary to increase the area of the TEG. The application of the TEG structure shown in Figure 27 An example of the shape. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -23- 562940 A7 B7 V. Description of the invention (pregnancy (please read the back first) (Please fill in this page again for attention.) As the area becomes larger, especially during short circuit, the wiring length of isolated wiring is narrower, and its wiring width is also narrower. Therefore, it is expected that it will be difficult to identify defective parts. In order to solve this problem, The electrical measurement can specify the basic short-circuit location and make a TEG structure divided by a plurality of sections. In the same figure, a matrix of 8 rows and 8 columns of about 1 0 0 # m X 1 0 0 # m is made. 8 systems are arranged in the horizontal direction of the disconnection detection wiring 1 extending in the longitudinal direction in the same figure, and 8 systems are arranged in the p-well layer extending in the horizontal direction in the longitudinal direction. For detection, two [[S1, S1. , (S2, S2 >), (S3, S 3 /) ...], each of the stylus electrodes 3 is required for short-circuit detection (D1, D2, D3, ...) ), And in the same figure, a total of 2 4 configurations. The disconnection detection is performed on the stylus electrodes 3, 3 connected to both ends of each of the disconnection detection cables 1/3/8 system component measurement. The detection of a short circuit is confirmed by the resistance of each disconnection detection wiring 1 and each P-well layer, that is, the connection status of the 8-system snake wiring and the 8-system P-well layer is fully investigated (the disconnection and When short-circuits occur at the same time, the disconnection detection wiring 3, 3 > uses solder joints at both ends). This makes it possible to specify whether or not a short circuit has occurred in one of the eight rows and eight columns. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Figure 27 shows the relationship between the bad case and the electrical measurement results at that time (see also the table below). When a disconnection occurs (S 2 area), an abnormality can be detected at the contact pins of S 2 and S 2 /. When a short circuit occurs ([S 4, D 6) area], the abnormality can be confirmed when the contact pins of S 4 and D 6 and S 4 > and D 6 are identified, and the area plot can be identified. In the detailed observations that follow, the VC method is used to enter the paper standard according to the results. The Chinese National Standard (CNS) A4 specification (210X 297 mm) is applied. -24- 562940 A7 __B7_ V. Description of the invention ( The position of the line can be specified. When disconnection and short circuit occur at the same time ([S 6, D 4) area], an abnormality is seen when contact pins of S 6 and D 4. (Please read the precautions on the back before (Fill in this page) According to the present invention, the inspection efficiency using TEG can be improved, thereby improving the yield rate. (Simplified description of the drawings) Figure 1 is a diagram showing the structure of the TEG of the present invention. Figure 2 is a diagram showing A diagram illustrating a method for detecting a short-circuit failure. Fig. 3 is a diagram illustrating a method for detecting a short-circuit failure. Fig. 4 is a diagram illustrating a scanning method and an inspection algorithm. Fig. 5 is a diagram illustrating detection of a disconnection failure. Method diagram. Figure 6 is a diagram showing the scanning method and inspection algorithm. Figure 7 is a diagram explaining the detection method of a broken wire and a short circuit. Figure 8 is a diagram showing a bad wire and a short circuit. Schematic of the inspection process. It is a drawing showing a method for detecting a broken wire and a short circuit. The 10th figure printed by the 8th Industrial Cooperative Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs is a diagram showing the TEG structure of the present invention.% 11 Schematic diagram of the TEG structure of the invention. Figure 12 is a diagram showing the TEG structure of the invention. Figure 13 is a diagram showing the TEG structure of the invention. Figure 14 is a diagram showing the TEG structure of the invention. The% 15 diagram is a diagram showing the T EG structure of the present invention. The 16 diagram shows that the paper size used to detect the broken part by the appearance inspection device is applicable to the Chinese National Standard (CNS) A4 specification (210X297). (Mm) -25- 562940 A7 ___B7 V. Description of the invention (Schematic diagram of the method. (Please read the precautions on the back before filling out this page) Figure 17 shows the method of detecting the short-circuit part by the current absorption method. Fig. 18 is a diagram showing the manufacturing process of the TEG of the present invention. Fig. 19 shows the flow of the feedback method for the manufacturing line of the present invention. Fig. 20 shows the detection of a short circuit by a light-emitting microscope. The pattern of the position of the part. Figure 2 1 is a table A diagram illustrating the inspection system of the present invention. Figs. 22 and 22 are diagrams showing the order in which inspection conditions are determined. Fig. 23 is a diagram showing the first operation form of the inspection system of the present invention. Figs. Fig. 2 is a diagram illustrating a second operation mode of the inspection system of the present invention. Figs. 25 and 5 are diagrams illustrating a GUI day surface for explaining inspection condition determination processing. Figs. 26 and 6 are diagrams illustrating a CAD system of the present invention. Fig. 27 is a diagram showing an example of the applicable form of the TEG structure. The comparison table of the main components printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, R Industrial Consumer Cooperatives, 1 Wiring for wire disconnection detection 2, 4 2 Wiring for short circuit detection 3, 3 >, 3 电极 stylus electrode This paper is applicable to Chinese National Standard (CNS) A4 specification (210X 297 mm) -26- 562940 A7 B7 V. Description of the invention (this 4 56 78 interlayer insulation film contact plug P-type silicon Substrate n-channel element separation area 0 ^ Probe 0 1 1 Detector 1 2 Wire break 1 3 Short circuit 2 0 Charge electron line 2 1 Secondary electron 2 3, 30 Detector 2 4, 3 2 Signal location Department 2 5 ， 3 3 Display (Please read the precautions on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5 1 ρ + Channel 6 0 Computer Network 61 Electrical Measurement Database 6 2 CAD Database 6 3 Inspection device 64 Means for determining inspection conditions 65 Means for determining inspection objects 66 Means for determining inspection conditions 67 Means for generating inspection conditions 7 0 Electrical measurement results The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -27- 562940 V. Description of the invention (7 1 7 2 7 3 7 4 8 0 10 1 10 2 10 3 A7 B7 2 poor layout data observation conditions data inspection conditions user terminal according to the short-circuit light from the light source under the electrode (please read first Note on the back, please fill out this page again) The paper size printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs applies the Chinese National Standard (CNS) A4 specification (210 X297 mm) -28-