TW524898B

TW524898B - A silicon wafer for epitaxial growth, an epitaxial wafer, and a method for producing it

Info

Publication number: TW524898B
Application number: TW089125060A
Authority: TW
Inventors: Akihiro Kimura; Hideki Sato; Ryuji Kono; Masahiro Kato; Masaro Tamatsuka
Original assignee: Shinetsu Handotai Kk
Priority date: 1999-11-25
Filing date: 2000-11-24
Publication date: 2003-03-21
Also published as: EP1154048A1; WO2001038611A1; EP1154048B1; JP2001151596A; US6626994B1; EP1154048A4; KR100741540B1; KR20010101656A; DE60045735D1; JP3601383B2

Abstract

There are provided a silicon wafer for epitaxial growth wherein a void type defect is not exposed on the surface where an epitaxial layer is grown, and a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer, and a method for producing an epitaxial wafer characterized in that a silicon wafer having void type defects exposed to the surface and/or void type defects in the part to the depth of at least 10 nm from the surface is subjected to heat treatment so that the void type defects may be eliminated and/or made into a form that does not become a generation source of SF, and an epitaxial layer is grown on the wafer surface. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it.

Description

524898 A7 B7 五、發明説明（1 ) 【技術領域】本發明係關於存在於磊晶層中之結晶缺陷較以往少之磊晶晶圓用基板及磊晶晶圓及其製造方彳去.。【背景技術】近年’隨者半導體兀件之局積體化，半導體中之結晶缺陷’尤其減少表面及表面附近之結晶缺陷變成重要之事項。因此’具有優於結晶性之磊晶層之磊晶晶圓之需要逐年增加。然而’雖然稱磊晶晶圓仍具有各種結晶缺陷，此係因對於裝置發生不良影響而降低良率，所以必須將此減低。多結晶化之嘉晶層中之結晶缺陷，具有報告稱：附著於形成於嘉晶層之嘉晶成長用砂晶圓（以下，有時只稱爲基板。）之粒子所發生（例如，岩淵他，第4 5次應用物理學關係連合講演會（1 9 9 8春季）2 8 a - P B — 1 )。亦即，爲了使磊晶層之一部不變成多結晶，只要去除基板上粒子之後進行磊晶成長。又，露出於基板表面之孔隙型缺陷（以下，有時只稱爲孔。）’雖然主要爲培養砂單結晶時所導入之Grown-in 缺陷中之空孔簇集（cluster )露出於晶圓表面者，但是以往此孔，被認爲磊晶成長後雖然會變成淺的坑，也不會成爲結晶缺陷（木村他，日本結晶成長學會誌2 4 ( 1 9 9 7 ) 4 4 4 )。然而，到現在稱爲磊晶積層缺陷（以後稱爲S F )之磊晶層中缺陷之發生原因尙未闡明，不本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填」524898 A7 B7 V. Description of the Invention (1) [Technical Field] The present invention relates to an epitaxial wafer substrate, an epitaxial wafer, and a manufacturing method thereof with fewer crystal defects existing in the epitaxial layer than in the past. [Background Art] In recent years, with the localization of semiconductor components, crystal defects in semiconductors have become an important issue, especially to reduce crystal defects on and near the surface. Therefore, the demand for epitaxial wafers having an epitaxial layer better than crystallinity is increasing year by year. However, although it is said that epitaxial wafers still have various crystal defects, this is because the yield is adversely affected by the device, so this must be reduced. The crystal defects in the polycrystallized Jiajing layer are reported to have occurred (eg, Iwabuchi) due to particles attached to a Jiajing growth sand wafer (hereinafter, sometimes referred to as a substrate) formed on the Jiajing layer. He, the 45th Joint Lecture on Applied Physics (Spring 1989) 2 8 a-PB — 1). That is, in order to prevent one part of the epitaxial layer from becoming polycrystalline, epitaxial growth may be performed after removing particles on the substrate. Also, the void-type defects (hereinafter sometimes referred to as holes only) exposed on the surface of the substrate are exposed mainly through clusters of voids among the Grown-in defects introduced during the culture of single crystals of sand. The surface, but in the past, this hole was considered to be a shallow pit after epitaxial growth, and it will not become a crystal defect (Kimura, Japan Society for Crystal Growth, 2 2 (1 997 7) 4 4 4). However, the cause of the defects in the epitaxial layer known as epitaxial layer defects (hereinafter referred to as SF) has not been clarified. The Chinese national standard (CNS) A4 specification (210X297 mm) is not applicable to this paper size (please first Read the notes on the back and fill it out again. "

、τ 經濟部智慧財產局員工消費合作社印製 -4- 524898 A7 B7 五、發明説明（2 ) 知其減低方法。【發明之揭示】本發明係鑑於此所發明者，其目的係提供一種減低 S· F發生之磊晶成長用矽晶圓及磊晶晶圓以及其製造方法〇解決上述問題之本發明，係一種磊晶成長用矽晶圓，其特徵爲：在至少磊晶層成長之表面不露出孔隙型缺陷之嘉晶成長用砂晶圓。像這樣，在至少磊晶層成長之表面不露出孔隙型缺陷之嘉晶成長用砂晶圓’係在嘉晶成長時可防止S F之發生。此係S F曉得了從孔隙型缺陷所發生，所以若將這種不具孔隙型缺陷之晶圓使用於磊晶基板時就可防止磊晶層之 S F發生所致。經濟部智慧財產局員工消費合作社印製按，通常之磊晶工程，係成長磊晶層之即前進行氫烘烤（hydrogen bake )，基板表面會受到某程度之侵蝕。因此，本發明之所謂「成長嘉晶層之表面」，實質上爲在這種氫烘烤之後，指成長磊晶層即前之基板表面（磊晶層與基板之境界面）。此時，不具從成長磊晶層之表面至少到1 0 n m深度之上述孔隙型缺陷較佳。此係在磊晶層成長即前之表面即使不露出孔隙型缺陷，若在從其表面到1 〇 n m深度具有孔隙型缺陷時恐有形成S F之虞。本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -5- 524898 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（3 ) 又，在上述磊晶成長用矽晶圓摻雜有氮較佳。此係若使用摻雜有氮之基板時，由於氮之效果，即使進行高溫之磊晶成長，因基板之體（bulk ))部之氧澱積核不會被消滅，所以，其後之裝置製程形成消滅區吸氣或吸附），可得到磊晶晶圓所致。並且，若是在上述本發明之磊晶成長用矽晶圓表面上形成有嘉晶層爲其特徵之嘉晶晶圓時’成爲嘉晶層完全無 S F，或較以往極爲被減低之高品質之磊晶晶圓。又，本發明係一種磊晶晶圓之製造方法，其特徵爲= 測定露出於矽晶圓表面之孔隙型缺陷之個數，及/或存在於從矽晶圓表面至少到1 0 n m深度之個數，選擇這些孔隙型缺陷個數爲既定値以下之矽晶圓，該被選擇之矽晶圓表面進行磊晶層成長。本發明係一種磊晶晶圓之製造方法，其特徵爲：例如從同一製造批次之晶圓抽取1枚或複數枚之晶圓，測定露出於矽晶圓表面之孔隙型缺陷之個數，及/或存在於從矽晶圓表面至少到1 0 n m深度之個數，這些孔隙型缺陷爲既定値以下，亦即，預先設定由使用者所要求之磊晶晶圓之規格（S F數之上限値）所容許之孔隙型缺陷數，選擇滿足此之晶圓以進行磊晶層成長。這樣做時，於製造磊晶晶圓時，不僅可減低不良晶圓，並且，可回饋到適合於因應使用者規格之磊晶晶圓用之矽單結晶晶圓之製造條件。又，本發明係一種磊晶晶圓之製造方法，其特徵爲；藉對於露出於表面之孔隙型缺陷及/或從表面至少到1 0 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填良 .裝· 訂線 -6- 524898 A7 B7 五、發明説明（4 ) n m之深度具有孔隙型缺陷之矽晶圓進行熱處理’在消滅上述孔隙型缺陷及/或不成爲S F發生源形態之後’在上述矽晶圓表面進行磊晶層之成長。像這樣，在表面及表面附近具有孔隙型缺陷，即使進行磊晶成長時就會發生S F之晶圓，在磊晶成長前藉進行熱處理，變化消滅表面及表面附近之孔或不發生S F形態之後形成磊晶層時，就可得到高品質之磊晶晶圓。這樣做時，不管矽單結晶晶圓之製造條件，就可得到磊晶成長時不會發生S F之磊晶晶圓。此時，作爲上述熱處理，在非氧化性環境下以 1 1 0 0〜1 3 0 0 °C溫度施加熱處理後，不至於冷卻到未滿7 0 0 °C連續地在氧化性環境下施加7 0 0 °C〜溫度之熱處理較佳。若採取這種熱處理條件時，藉初期之非氧化性環境之熱處理，就可將晶圓表面之自然氧化膜與表面附近孔隙內壁氧化膜向外方擴散，所以，在其後之氧化性環境之熱處理有效率地注入於格子間矽，可消滅表面附近之孔隙。關於露出於表面之孔隙，由於氧化膜之形成將開口形狀成爲光滑，可防止其後之磊晶成長成爲S F發生源。又，因在初期之熱處理後不將溫度降低到7 0 0 °C未滿，所以可防止成爲對於孔隙之格子間矽注入障礙之內壁氧化膜之再成長。又，將上述熱處理，也可以在磊晶工程之磊晶層成長前之氫烘烤後，導入惰性氣體下進行。本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填·, Τ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 524 524898 A7 B7 V. Description of Invention (2) Know how to reduce it. [Disclosure of the invention] In view of this inventor, the present invention aims to provide a silicon wafer and an epitaxial wafer for epitaxial growth which reduce the occurrence of SF, and a method for manufacturing the same. A silicon wafer for epitaxial growth, which is characterized in that: at least a surface of the epitaxial layer is grown, and a crystalline defect is not grown on the surface. In this way, the sand crystal for growth of Jiajing, which does not show void-type defects on at least the surface where the epitaxial layer grows, can prevent the occurrence of S F during the growth of Jiajing. This series of SFs knows the occurrence of porosity-type defects. Therefore, if such wafers without pore-type defects are used in epitaxial substrates, the occurrence of SFs in the epitaxial layer can be prevented. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Generally, the epitaxial project is a hydrogen bake immediately before the epitaxial layer is grown, and the substrate surface will be eroded to some extent. Therefore, the so-called "surface of the growth crystal layer" in the present invention is essentially the surface of the substrate (the interface between the epitaxial layer and the substrate) before the growth of the epitaxial layer after this hydrogen baking. At this time, it is preferable that the above-mentioned porosity-type defect not having a depth of at least 10 n m from the surface of the grown epitaxial layer. Even if the surface of the epitaxial layer before the epitaxial layer grows is not exposed with pore-type defects, if there are pore-type defects from the surface to a depth of 100 nm, there is a possibility that S F may be formed. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297mm) -5- 524898 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (3) In addition, the above-mentioned epitaxial growth silicon Circular doping with nitrogen is preferred. If a substrate doped with nitrogen is used in this system, due to the effect of nitrogen, even if epitaxial growth is performed at high temperature, the oxygen deposition core of the bulk portion of the substrate will not be eliminated, so the subsequent device In the process, the extinction zone is formed to absorb or adsorb), and the epitaxial wafer can be obtained. Moreover, if a Jiajing wafer having a Jiajing layer as a feature is formed on the surface of the above-mentioned epitaxial growth silicon wafer of the present invention, it becomes a Jiajing layer completely free of SF, or a high quality that is extremely reduced compared to the past. Epicrystalline wafer. In addition, the present invention is a method for manufacturing an epitaxial wafer, which is characterized by measuring the number of void-type defects exposed on the surface of a silicon wafer and / or existing in a depth of at least 10 nm from the surface of the silicon wafer. Number of silicon wafers with a number of pore-type defects selected below a predetermined threshold, the epitaxial layer growth of the selected silicon wafer surface. The invention is a method for manufacturing epitaxial wafers, which is characterized in that, for example, one wafer or a plurality of wafers are extracted from the same manufacturing batch of wafers, and the number of void-type defects exposed on the surface of the silicon wafer is measured. And / or the number existing from the surface of the silicon wafer to a depth of at least 10 nm, these porosity-type defects are below a predetermined threshold, that is, the specifications of the epitaxial wafer (the number of SFs are set in advance by the user) Upper limit 値) The number of pore-type defects allowed. Select wafers that meet this requirement for epitaxial layer growth. In doing so, not only the defective wafers can be reduced in the production of epitaxial wafers, but also the manufacturing conditions of silicon single crystal wafers suitable for epitaxial wafers according to user specifications can be fed back. In addition, the present invention is a method for manufacturing an epitaxial wafer, which is characterized in that: for void-type defects exposed on the surface and / or at least 10 from the surface, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 (Mm) (Please read the precautions on the back before filling in. Binding line-6- 524898 A7 B7 V. Description of the invention (4) nm silicon wafers with pore-type defects are heat-treated 'to eliminate the above pores After forming a type defect and / or not becoming a source of SF, the epitaxial layer is grown on the surface of the silicon wafer. As such, there are void-type defects on the surface and near the surface. Wafers can be obtained by performing heat treatment before epitaxial growth, changing the surface and the holes near the surface, or forming an epitaxial layer after SF formation does not occur. In this way, high-quality epitaxial wafers can be obtained. The manufacturing conditions of crystalline wafers can be used to obtain epitaxial wafers that do not undergo SF during epitaxial growth. At this time, as the above-mentioned heat treatment, the temperature is 1 1 0 to 1 3 0 ° C in a non-oxidizing environment. After the heat treatment, it is better not to cool to less than 700 ° C and continuously apply heat treatment at a temperature of 700 ° C to a temperature of oxidizing environment. If this heat treatment condition is adopted, the initial non-oxidizing environment is adopted. The heat treatment can diffuse the natural oxide film on the wafer surface and the oxide film on the inner wall of the pores near the surface to the outside. Therefore, the heat treatment in the subsequent oxidizing environment is efficiently injected into the silicon between the grids, which can eliminate the vicinity of the surface. Porosity. The pores exposed on the surface are smoothed by the formation of an oxide film, which prevents subsequent epitaxial growth from becoming the source of SF. In addition, the temperature is not reduced to 7 0 0 after the initial heat treatment. The temperature is not full, so it can prevent the growth of the oxide film on the inner wall which is a barrier to the inter-lattice silicon implantation. In addition, the above heat treatment can also be performed after hydrogen baking before the epitaxial layer growth of the epitaxial process. The introduction of inert gas is carried out. This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling in.

鍊經濟部智慧財產局員工消費合作社印製 524898 A7 ________B7 五、發明説明（5 ) 這樣做時’使用磊晶成長裝置在同一磊晶工程中因可安排熱處理所以非常有效率。並且，作爲上述矽晶圓，使用摻雜氮之矽晶圓較佳。像這樣，若使用摻雜氮晶圓時，由於氮之效果就可以得到高消滅效果。如以上所說明，就可製造減低S F發生之磊晶晶圓，可大幅度地提升裝置之良率。【實施發明之最佳形態】茲於下面詳細說明本發明之實施形態，但是本發明並非限定於這些。本發明人等爲了闡明發生於磊晶層之S F之發生原因，進行如下之實驗完成了本發明。 (實驗1 ) 經濟部智慧財產局員工消費合作社印製對於通常之拉起速度（約lmm/m i η )所培養之直徑8英吋之C Ζ矽單結晶晶圓（JEIDA規格），製作了 4枚形成大約4 // m之磊晶層之磊晶晶圓，對此晶圓進行選擇蝕刻，將使用了使用雷射光之表面檢查裝置（Tencol 公司製、Surf Scan 6200)所檢出之嘉晶表面之L P D ( Light Point Defec )以光學顯微鏡觀察時，嘉晶層表面之 S F存在有平均約2個/ 8英吋晶圓。關於這些磊晶層表面之S F，如第1 ( a ) ( b )所示從〈1 1 0〉方向進行截面TEM (透過型電子顯微鏡本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -8- A7 B7 524898 五、發明説明（6 ) )觀察。於此，第1 ( a )係顯微鏡觀察圖，第1 ( b ) 係將顯微鏡觀察圖爲依據將缺陷以模式表示之圖。並且，關於存在於晶圓之SF內之3個，放大觀察第1 ( a )之橢圓所圍住部分所觀察之結果表示於第2 ( a ) ( b )圖〜第4(a)(b)圖。與第1圖同樣各第2 (a)圖〜第4 (a)圖爲顯微鏡觀察圖，第2 (b)圖〜第4 (.b )圖係將顯微鏡觀察圖以模式表示之圖。曉得了任何情形，S F頂點之下存在有某些結晶缺陷。Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 524898 A7 ________B7 V. Description of Invention (5) When doing so, ’using an epitaxial growth device is very efficient because heat treatment can be arranged in the same epitaxial project. In addition, as the silicon wafer, a silicon wafer doped with nitrogen is preferably used. In this manner, when a doped nitrogen wafer is used, a high extermination effect can be obtained due to the effect of nitrogen. As described above, an epitaxial wafer with reduced S F generation can be manufactured, and the yield of the device can be greatly improved. [Best Mode for Carrying Out the Invention] Hereinafter, embodiments of the present invention will be described in detail, but the present invention is not limited to these. In order to clarify the reason for the occurrence of S F in the epitaxial layer, the present inventors performed the following experiments to complete the present invention. (Experiment 1) The Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs printed a 8-inch diameter C Zn silicon single crystal wafer (JEIDA specification) cultivated for a normal pull-up speed (about 1 mm / mi η), and produced 4 An epitaxial wafer with an epitaxial layer of approximately 4 // m is formed. Selective etching of this wafer will be performed using Jiajing detected by a surface inspection device (manufactured by Tencol, Surf Scan 6200) using laser light. When the surface LPD (Light Point Defec) is observed with an optical microscope, the SF on the surface of the Jiajing layer has an average of about 2/8 inch wafers. Regarding the SF on the surface of these epitaxial layers, as shown in Section 1 (a) (b), the cross-section TEM (transmission type electron microscope) is adopted in accordance with Chinese National Standard (CNS) A4 (210X297). (Centi) -8- A7 B7 524898 V. Description of Invention (6)) Observation. Here, the first (a) is a microscope observation diagram, and the first (b) is a diagram in which defects are represented in a pattern based on the microscope observation diagram. In addition, regarding the three existing in the SF of the wafer, enlarged observation of the portion enclosed by the ellipse of the first (a) is shown in Figs. 2 (a) (b) to 4 (a) (b). ) Figure. As in Figure 1, each of Figures 2 (a) to 4 (a) is a microscope observation diagram, and Figures 2 (b) to 4 (.b) are diagrams showing the microscope observation diagrams in a pattern. Knowing any situation, there are some crystal defects under the apex of SF.

E D X 分析(Energy Dispersive X-ray spectroscopy ) 之結果，曉得了這些都是具有內壁氧化膜之八面體孔。又，也曉得了從八面體孔向高度方向具1 0 nm左右，向橫方向離開2 0〜4 0 nm左右之位置作爲頂點發生有S F (實驗2 )將摻雜氮晶圓作爲基板使用時除了氮摻雜高濃度（3 X 1 0 1 4個/ c m 3 )之外，使用與實驗1同樣之基板製作了磊晶晶圓，關於S F進行了與實驗1同樣之調查。 . 其結果，磊晶層表面之S F都存在有數個8英吋左右。其中，與實驗1同樣關於3個S F從〈1 1 〇 >方向進行截面TEM觀察之結果表示於第5圖〜第7圖。依據此截面TEM觀察時，曉得了與摻雜氮時同樣在S F之正下方，從S F頂點離開1 0〜4 0 n m左右之位置，觀察到摻雜氮晶圓特有之棒狀、板狀之孔。本紙^尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫·As a result of E D X analysis (Energy Dispersive X-ray spectroscopy), it was understood that these are octahedral pores with an inner wall oxide film. It was also known that SF occurred from the octahedral hole in the height direction at about 10 nm, and the lateral distance was about 20 to 40 nm. As a vertex, SF occurred (Experiment 2). A doped nitrogen wafer was used as a substrate. In this case, an epitaxial wafer was fabricated using the same substrate as in Experiment 1 except that the nitrogen was doped at a high concentration (3 × 10 104 pieces / cm 3). The same investigation as in Experiment 1 was performed on SF. As a result, there were several SFs on the surface of the epitaxial layer of about 8 inches. Among them, the results of cross-section TEM observation of three S Fs from the <1 1 0 > direction as in Experiment 1 are shown in Figs. 5 to 7. Based on this cross-section TEM observation, it is known that it is directly below the SF, similar to the case when nitrogen is doped, and is separated from the apex of SF by a distance of about 10 to 40 nm. hole. The size of this paper applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling in.

訂線· 經濟部智慧財產局員工消費合作社印製 -9- 524898 經濟部智慧財產局員工消費合作社印製 A7 ______B7五、發明説明（7 ) 依據實驗1及實驗2之結果時，對於磊晶層之S F發生，與以往之觀點不同，明白了晶圓表面附近之孔隙型缺陷有所關聯。亦即，欲減低S F發生時，曉得了在晶圓表面附近不具有孔隙即可。按，從孔隙型缺陷發生S F之機制被認爲如下。摻雜氮時，孔隙係成棒狀•板狀，並且板狀之切口爲 2〇11111\15〇11111左右（第8(3)圖），在磊晶前氫烘烤即後藉蝕刻孔隙露出於表面形成坑之機率爲較高（第8 ( b )圖）。在此狀態進行磊晶成長時，由於從坑端之磊晶成長致使坑會被堵塞（第8 ( c )圖）。認爲其時發生不整合，於其後之磊晶成長將變成SF (第8 (d) 圖）。另外，不摻雜氮時，曉得了若在晶圓表面，開口部露出較大之孔隙型缺陷（第9 ( a )圖）時，因於磊晶工程之磊晶層成長前之氫烘烤，其形狀將變成具有圓形寬度廣而淺的坑（第9 ( b )圖），在等方性強的條件下（例如，S i Η 2 C 1 2作爲原料之減壓磊晶成長）雖然C〇P 不容易消失，但是，由於在異方性強條件下之成長（例如，S i HC 1 3作爲原料之常壓嘉晶成長）形成〇 · 4//m 左右之磊晶層時C〇P就會消失（第9 ( c )圖）（木村他，日本結晶成長學會24，（1997)444)。但是，存在於不摻雜氮晶圓中之八面體孔時因依深度而切口之大小會變化，所以其切口爲與棒狀•板狀孔相同程度大小之凹陷狀之坑形成在磊晶前氫烘烤即後時，認爲從此處發生SF (第9 (d)圖）。 i紙張凡度適用中國國家標準（CNS ) A4規格（210Χ297公釐) (請先閱讀背面之注意事項再填办 ,裝· 訂線 -10- 524898 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（8 ) 又，即使於摻雜氮、不摻雜氮之任一孔隙型缺陷，所發生之S F之頂點係從孔隙型缺陷至少離開1 0 n m。因此，欲確實地防止S F之發生，認爲成長磊晶層即前之表面至少到1 0 n m深度不存在孔隙型缺陷較佳。由以上之本發明者等之硏究，闡明了磊晶層之S F發生磊晶成長用晶圓之表面附近所存在之孔隙型缺陷有所關聯。因此，爲了防止S F之發生必須在磊晶成長用晶圓之表面附近未存在有孔隙型缺陷。按，在本發明所謂之「不露出孔隙型缺陷」或「不存在孔隙型缺陷」，係表示在磊晶成長時成爲S F發生源之孔隙型缺陷爲不露出或不存在。因此，在某特定條件所製作之磊晶成長用晶圓之表面附近，是否存在有成爲那種S F發生源之孔隙型缺陷，係在與其製造條件同一製造條件所製作之其他晶圓成長磊晶層，將在其表面所觀察之L P D使用光學顯微鏡或電子顯微鏡等以實體觀察等之手法即可判斷。實際欲製造無S F之磊晶晶圓時，有以下2種方法。其一係以往未被用做磊晶成長用晶圓，將在整個晶圓原本不存在之孔隙型缺陷之無缺陷晶圓作爲磊晶成長用晶圓使用，而在此晶圓表面成長磊晶層之方法。在這種無缺陷晶圓例如可使用F Z晶圓。或即使爲C Z晶圓，藉控制結晶拉起時之條件即可得到無缺陷晶圓，而就可以使用此〇另一方法，係在通常之條件製造，使用在晶圓表面及 I紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）一 -11 - (請先閱讀背面之注意事項再填寫) 裝·Ordering line · Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-9- 524898 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ______B7 V. Description of the invention (7) For the epitaxial layer according to the results of Experiments 1 and 2 The occurrence of SF is different from the previous view, and it is understood that the void type defects near the wafer surface are related. That is, when it is desired to reduce the occurrence of S F, it is known that there is no pore near the wafer surface. The mechanism by which SF occurs from a void-type defect is considered as follows. When nitrogen is doped, the pores are rod-shaped and plate-shaped, and the plate-shaped cutout is about 2011111 \ 15〇11111 (Figure 8 (3)), which is exposed by etching the pores after hydrogen baking before epitaxy. The probability of forming pits on the surface is high (Figure 8 (b)). When epitaxial growth is performed in this state, the pit is blocked due to the epitaxial growth from the pit end (Fig. 8 (c)). It is believed that unconformity occurred at that time, and subsequent epitaxial growth will become SF (Figure 8 (d)). In addition, when nitrogen is not doped, it is known that if a large pore-type defect is exposed at the opening on the wafer surface (Fig. 9 (a)), the hydrogen baking before the epitaxial layer grows due to the epitaxial process. , Its shape will turn into a pit with a wide and shallow circular width (Figure 9 (b)), under conditions of strong isotropy (for example, S i Η 2 C 1 2 as a raw material for reduced pressure epitaxial growth) although C 〇P is not easy to disappear, but due to growth under strong anisotropic conditions (for example, atmospheric pressure growth of Si HC 1 3 as a raw material) when the epitaxial layer of about 0.4 // m is formed Will disappear (Figure 9 (c)) (Kimura, Japan Society for Crystal Growth 24, (1997) 444). However, the octahedral pores present in an undoped nitrogen wafer will vary in size depending on the depth. Therefore, the pits are recessed pits of the same size as the rod-shaped or plate-shaped pores. Immediately after the pre-hydrogen baking, SF is thought to have occurred from here (Figure 9 (d)). i Paper Fandu applies Chinese National Standard (CNS) A4 specifications (210 × 297 mm) (please read the precautions on the back before filling, binding line-10-524898 Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (8) In addition, even for any porosity defect doped with nitrogen or non-doped nitrogen, the apex of the SF that has occurred is at least 10 nm away from the porosity defect. Therefore, it is necessary to reliably prevent SF It is considered that it is better to grow the epitaxial layer, that is, the front surface does not have porosity defects at a depth of at least 10 nm. From the above investigation by the present inventors, it is clarified that the epitaxial growth of the SF of the epitaxial layer occurs. Pore-type defects existing near the surface of the wafer are related. Therefore, in order to prevent the occurrence of SF, there must be no porosity-type defects near the surface of the epitaxial growth wafer. According to the present invention, "not exposed" "Porosity-type defects" or "there are no porosity-type defects" means that the pore-type defects that became the source of SF during epitaxial growth are not exposed or absent. Therefore, crystals for epitaxial growth produced under certain conditions Near the surface, is there a porosity defect that becomes the source of that SF? The epitaxial layer is grown on other wafers made under the same manufacturing conditions as the manufacturing conditions. The optical microscope or electron is used for the LPD observed on the surface. Microscopes can be judged by physical observation, etc. There are two methods to actually produce SF-free epitaxial wafers. One is the wafer that has not been used for epitaxial growth in the past. Non-defective wafers that do not have porosity defects are used as epitaxial growth wafers, and an epitaxial layer is grown on the surface of the wafer. For such non-defective wafers, for example, FZ wafers can be used. Or even For CZ wafers, defect-free wafers can be obtained by controlling the conditions when the crystal is pulled up. This method can be used. The other method is to manufacture under normal conditions. It is used on the wafer surface and the I paper scale is applicable to China. Standard (CNS) A4 specification (210X297 mm) 1-11-(Please read the precautions on the back before filling)

、1T 谦- 524898 經濟部智慧財產局員工消費合作社印製 A7 ___B7__五、發明説明（9 ) 體（bulk )部具有孔隙型缺陷之C Z晶圓，藉對於此施加熱處理，以消滅孔隙型缺陷，或將孔隙型缺陷成爲不會變成S F發生源形態之後，進行磊晶成長之方法。本發明係依據上述想法查明諸條件所完成者。 ’茲於下面表示本發明流程之一例，但是本發明並非限於這些。欲製造本發明之磊晶矽晶圓時，作爲磊晶成長用矽晶圓，製作全體晶圓不具孔隙型缺陷之晶圓、或至少在成長磊晶層之表面無露出孔隙型缺陷之晶圓。於此，作爲全體晶圓不具孔隙型缺陷之晶圓，具有控制F Z晶圓、或C Z結晶拉起時之V / G ( V :拉起速度、G :結晶固液界面之溫度坡度），在排除空孔簇集或轉位簇集之條件下拉起結晶之方法所得到之無缺陷C Z晶圓 (無Grown-in缺陷之晶圓）。這種F Z晶圓主要也使用於離散裝置（discrete device )用，從來沒有使用於本申請作爲對象之所謂積體電路形成用之磊晶成長用基板之情形。又’關於上述無缺陷c Z 晶圓，也是以低成本可得到磊晶晶圓般之特性之基板所開發者，所以，以往完全沒有在此晶圓再形成磊晶層使用之想法。但是，藉將這種晶圓作爲磊晶成長用矽晶圓使用，就可防止S F之發生。又，關於C Z晶圓，係依據其結晶拉起條件或有無摻雜氮孔之形態（尺寸或形狀）會變化’所以’從特定製造本紙張尺度適用中國國家標準（CNS )^4規格（21〇x297公釐） (請先閲讀背面之注意事項再填寫·1T Qian-524898 Printed by A7 _B7__ of the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (9) CZ wafers with bulk defects in the bulk, and apply heat treatment to eliminate the defects. Or, the method of epitaxial growth is performed after the pore-type defect becomes a morphology of SF generation source. The present invention is based on the above ideas to find out the conditions to complete. An example of the flow of the present invention is shown below, but the present invention is not limited to these. When the epitaxial silicon wafer of the present invention is to be manufactured, as the epitaxial growth silicon wafer, a wafer having no void defects in the entire wafer or a wafer having no void defects exposed at least on the surface of the growing epitaxial layer is prepared. . Here, as the wafers that do not have void defects in the whole wafer, they have the V / G (V: pull-up speed, G: temperature gradient of the solid-liquid interface of the crystal) that controls the FZ wafer or CZ crystal pull-up. The defect-free CZ wafers (wafers without Grown-in defects) obtained by the method of pulling up and crystallizing the conditions of vacant hole clusters or index clusters. This FZ wafer is also mainly used in discrete devices, and has never been used in the so-called integrated circuit formation substrates for epitaxial growth that are the subject of this application. Also, the above-mentioned non-defective c Z wafer is also a developer of a substrate that can obtain epitaxial wafer-like characteristics at a low cost. Therefore, there has been no idea of forming an epitaxial layer on this wafer at all. However, by using this wafer as a silicon wafer for epitaxial growth, the occurrence of S F can be prevented. In addition, the CZ wafer is based on its crystal pull-up conditions or the shape (size or shape) of doped nitrogen pores. Therefore, the Chinese National Standard (CNS) ^ 4 specification (21) applies to specific paper sizes. (21 〇x297 mm) (Please read the notes on the back before filling in ·

訂線 -12- 524898 A7 B7 五、發明説明（10 ) 條件所製作之晶圓抽取1枚或複數枚之晶圓’而測定露出於其晶圓表面之孔隙型缺陷之個數、及/或從其晶圓表面存在於至少到1 〇 n m深度之孔隙型缺陷之個數，預先設定這些孔隙型缺陷爲既定値以下，亦即，使用者所要求之磊晶晶圓之規格（S F數之上限値）可容許之孔隙型缺陷數，若欲滿足此値時，將在此製造條件所製作之晶圓使用於磊晶層之成長用時，就可減低不良晶圓。又’可求得發生於製造條件（單結晶拉起條件）與磊晶層之S F之關係，所以可回饋於適合於磊晶晶圓用之矽單結晶晶圓之製造條件。關於露出於晶圓表面之孔隙型缺陷，若依據使用上述雷射光表面檢查裝置，在現況可測定0 · 08〜0 · 1 // m左右之尺寸。又，關於存在於從表面到1 0 n m深度之孔隙型缺陷，係將測定對象之晶圓以熱氧化形成2 0 n m左右之氧化膜之後，以蝕刻去除氧化膜之後測定即可〇經濟部智慧財產局員工消費合作社印製另者，不像上述限定C Z單結晶之製造條件，在從通常之C Z拉起速度（約lmm/m i η左右）所培養之 C Ζ單結晶所製作之晶圓，或多或少在其表面及體（bulk )部一定存在有孔隙（vend )。但是，即使具有這種孔隙型缺陷之晶圓，對於晶圓施加熱處理，在至少磊晶層成長正前之表面無露出孔隙之晶圓，孔隙從其表面至少到深度 1 0 n m之間就可認爲不會存在有孔隙之晶圓。欲設定此熱處理條件時，關於露出於晶圓表面之孔隙 (坑），係在熱處理後形成磊晶層時其露出形狀爲不會變本紙張又度適用中國國家標準（CNS ) A4規格（210X297公釐） -13- 524898 A7 B7 五、發明説明（11 ) 成S F發生源程度之光滑形狀之坑即可，所以，將坑之形狀與S F之發生關係藉以實驗求取即可設定熱處理條件。又，作爲可消滅未露出於晶圓表面之孔隙型缺陷之適當熱處理，係依存在於孔隙之形狀或尺寸。因此，考慮所施加熱處理之晶圓製造條件（單結晶之拉起條件等）以實驗方式求取適當熱處理條件即可。作爲進行這些熱處理之熱處理爐，並非特別加以限制，可列舉加熱器加熱式之批次爐、或燈加熱式之R T A ( Rapid Thermal Anneal )爐。又，也可將使用磊晶成長裝置組套於磊晶工程。作爲具體熱處理，通常，因在欲熱處理之晶圓表面形成有自然氧化膜，所以，首先作爲初段熱處理在非氧化性環境、較佳爲含有氫之環境下加熱爲1 1 0 Ot〜 1 3 0 0 t，不僅去除表面之自然氧化膜，並且將孔隙型缺陷之內壁氧化膜藉外方擴散加以去除。於未滿1 1 〇〇 °C，表面之自然氧化膜之去除式內壁氧化膜之外方擴散容易變成不充分。因表面之自然氧化膜之去除爲可在短時間進行，所以，也可以在其即後切換爲氬等對於基板無蝕刻作用之氣體繼續進行內壁氧化膜之外方擴散。藉此，露出於表面之孔隙（坑），由於表面之矽原子之遷移變成光滑，內部之孔隙係被去除內壁氧化膜，而變成容易接受格子間矽。接著，作爲第2段熱處理，在氧化性環境以7 0 0〜 1 3 0 〇 °C溫度施加熱處理。藉此，因在表面形成熱氧化膜，所以，表面之坑形狀就變成更加光滑。又，因氧化之本&張尺度適用中國國家標準（〇~5)八4規格（210'乂297公釐） (請先閱讀背面之注意事項再填寫. 裝—— 線經濟部智慧財產局員工消費合作社印製 -14- 524898 A7 B7 五、發明説明（12 經濟部智慧財產局員工消費合作社印製進行在晶圓內部注入有格子間矽，所以，在初段之熱處理去除內壁氧化膜之孔隙有效率地注入格子間矽，而塡滿於孔隙。若是7 0 0 t以上時，進行發生孔隙消滅之充分格子間矽之注入。按，在初段之熱處理後暫且冷卻爲7 0 0 °C未滿之溫度時，因會發生內壁氧化膜之再成長，所以初段與第2段之熱處理，就不必冷卻爲7 0 0 °C未滿連續性地進行較佳。於此熱處理所形成之晶圓表面之氧化膜係以氟酸水溶液去除之後供爲磊晶成長之用。又，使用嘉晶成長裝置進彳了熱處理時，於嘉晶工程中之嘉晶層成長則之氫烘烤去除表面之自然氧化膜之後，將環境氣體切換爲氬等惰性氣體，在導入惰性氣體之狀態下藉施加熱處理，將未露出於晶圓表面之孔隙型缺陷之內壁氧化膜有效地使其外方擴散，因矽原子之遷移即可消滅孔隙。此時，作爲進行氫烘烤後之熱處理之環境爲置換爲 1 0 0 %惰性氣體、或不必將惰性氣體與氫之比率固定爲一定値，也可以混合惰性氣體與氫氣，而在其比率時間性地變化狀態下進行熱處理。按，作爲惰性氣體導入氬氣時，氬氣與氫氣之比率爲3 : 1左右較佳。若將施加如上述熱處理之晶圓作爲基板通常所使用之方法進行磊晶成長時，就可製造S F之發生極爲被抑制之嘉晶晶圓 ° 按，從起初就製作無孔隙型缺陷之磊晶成長用矽晶圓時或以其後之熱處理欲消滅孔隙型缺陷等時之任何狀況，Order line-12- 524898 A7 B7 V. Description of the invention (10) The wafer produced under the conditions (1) Extract one or a plurality of wafers' to determine the number of void-type defects exposed on the wafer surface, and / or From the number of pore-type defects existing on the wafer surface at a depth of at least 10 nm, these pore-type defects are set to a predetermined value or less, that is, the specifications of the epitaxial wafer (of the SF number required by the user) Upper limit 値) The allowable number of void-type defects. If this requirement is to be met, defective wafers can be reduced by using wafers produced under these manufacturing conditions for the growth of epitaxial layers. Also, the relationship between the manufacturing conditions (single crystal pull-up conditions) and the S F of the epitaxial layer can be obtained, so it can be used to feedback the manufacturing conditions of silicon single crystal wafers suitable for epitaxial wafers. With regard to the void-type defects exposed on the wafer surface, if the above-mentioned laser light surface inspection device is used, a size of about 0 · 08 to 0 · 1 // m can be measured in the current situation. In addition, the porosity defect existing from the surface to a depth of 10 nm can be measured by thermally oxidizing the wafer to be measured to form an oxide film of about 20 nm, and then removing the oxide film by etching. Wisdom of the Ministry of Economy Unlike the production conditions of the CZ single crystal, which is limited to the manufacturing conditions of the CZ single crystal, the wafer produced by the C z single crystal cultivated from the normal CZ pull-up speed (about 1 mm / mi η), There must be more or less pores (vend) on its surface and bulk. However, even for wafers with such void-type defects, if heat treatment is applied to the wafer, there is no wafer with pores exposed at least on the surface just before the epitaxial layer grows. The pores can be at least 10 nm deep from their surface. No voided wafers are expected. When setting this heat treatment condition, the pores (pits) exposed on the surface of the wafer are formed when the epitaxial layer is formed after the heat treatment so that the shape of the exposed paper will not change the paper and the Chinese National Standard (CNS) A4 specification (210X297) (Mm) -13- 524898 A7 B7 V. Description of the invention (11) It is sufficient to form a pit with a smooth shape to the extent of SF generation. Therefore, the relationship between the shape of the pit and the SF can be experimentally determined to set the heat treatment conditions. The proper heat treatment to eliminate void-type defects not exposed on the wafer surface depends on the shape or size of the voids. Therefore, considering the manufacturing conditions of the wafer to which the heat treatment is applied (such as the pull-up condition of the single crystal), it is only necessary to experimentally determine the appropriate heat treatment conditions. The heat treatment furnace that performs these heat treatments is not particularly limited, and examples thereof include a batch furnace of a heater heating type or a RTA (Rapid Thermal Anneal) furnace of a lamp heating type. In addition, an epitaxial growth device may be used in the epitaxial process. As a specific heat treatment, generally, a natural oxide film is formed on the surface of the wafer to be heat treated. Therefore, as a preliminary heat treatment, it is first heated in a non-oxidizing environment, preferably an environment containing hydrogen, to 1 1 0 Ot to 1 3 0. 0 t, not only removes the natural oxide film on the surface, but also removes the oxide film on the inner wall of the pore defect by external diffusion. At temperatures below 11,000 ° C, the natural oxide film on the surface can easily become insufficiently diffused outside the inner wall oxide film. The removal of the natural oxide film on the surface can be performed in a short time, so it can be switched to argon and other gases that do not have an etching effect on the substrate and then continue to diffuse outside the oxide film on the inner wall. As a result, the pores (pits) exposed on the surface become smooth due to the migration of silicon atoms on the surface, and the internal pore system is removed from the inner wall oxide film, and it becomes easy to accept inter-lattice silicon. Next, as a second-stage heat treatment, a heat treatment is applied in an oxidizing environment at a temperature of 700 to 1300 ° C. As a result, a thermal oxide film is formed on the surface, so that the surface pit shape becomes smoother. In addition, because of the oxidation of the & Zhang scale is applicable to the Chinese National Standard (0 ~ 5) 8 4 specifications (210 '乂 297 mm) (please read the precautions on the back before filling in. Packing-Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the employee consumer cooperative -14- 524898 A7 B7 V. Description of the invention (12 Printed by the employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the interstitial silicon is injected into the wafer. Porosity is efficiently injected into the interstitial silicon, and is filled with pores. If it is more than 700 t, implantation of sufficient interstitial silicon with pore elimination occurs. Press, temporarily cool to 700 ° C after the initial heat treatment At sub-temperatures, re-growth of the inner wall oxide film may occur, so the heat treatment of the first stage and the second stage does not need to be cooled to 700 ° C and less than continuous. It is better to perform the heat treatment. The oxide film on the wafer surface is removed for the epitaxial growth after the hydrofluoric acid solution is removed. In addition, when the heat treatment is performed using a Jiajing growth device, the hydrogen is baked and removed during the growth of the Jiajing layer in the Jiajing project. surface After the natural oxide film, the ambient gas is switched to an inert gas such as argon, and the heat treatment is performed under the state of introducing the inert gas to effectively diffuse the outer oxide film on the inner wall of the pore-type defect that is not exposed on the wafer surface. Porosity can be eliminated due to the migration of silicon atoms. At this time, the environment for heat treatment after hydrogen baking is replaced with 100% inert gas, or it is not necessary to fix the ratio of inert gas to hydrogen to a certain value, or it can be mixed. The inert gas and hydrogen are heat-treated in a state where the ratio changes over time. When argon is introduced as an inert gas, the ratio of argon to hydrogen is preferably about 3: 1. When epitaxial growth is performed by using a circle as a substrate, it is possible to manufacture a Jiajing wafer whose SF occurrence is extremely suppressed. Pressing, when making a silicon wafer for epitaxial growth without void defects from the beginning, or The subsequent heat treatment is to eliminate any situation such as void type defects, etc.

請先閱讀背 fL 項再填Please read the fL item before filling

訂，線本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -15 524898 經濟部智慧財產局員工消費合作社印製 A7 __B7__五、發明説明（13 ) 也從磊晶晶圓之消滅效果等之觀點，作爲基板使用摻雜氮之晶圓雖然較佳，但是，欲培養摻雜氮之矽單結晶時，只要使用公知之方法即可。亦即，例如以C Z法培養矽單結晶棒時，預先在石英坩堝內放入氮化物、或在矽熔液中投入氮化物，或藉將環境氣體成爲含有氮之環境等，就可在拉起結晶中摻雜氮。此際，藉調整氮化物之量或氮氣之濃度或導入時間等，即可控制結晶中之摻雜量。茲舉出本發明之實施例，詳細說明本發明，但是本發明爲並非限定於此。 (實施例1 ) 在1 8英吋石英坩堝放進原料多結晶矽，而拉起了直徑6英吋、方位〈1 0 0〉、導電型P型矽單結晶棒。坩堝之迴轉速度定爲4 r p m，結晶迴轉速度定爲1 5 r pm。於此，邊將拉起速度控制成變爲0 · 5 4〜 0 . 5 2 m m / m i η範圍進行砍單結晶之拉起，將V / G (V :拉起速度、G :結晶固液界面之溫度坡度）成爲 0 · 152 〜0 · 146mm2/°C-min。於此所得到之矽單結晶棒切出晶圓，製作了 4枚磊晶成長用矽晶圓〇並且，製作了 4枚在此磊晶成長用矽晶圓表面形成約 4 // m之磊晶層之磊晶晶圓，對於此晶圓進行選擇性蝕刻，使用具有使用雷射光之表面檢查裝置（Tencol公司製、本紙張尺度適用中國國家標準（CNS〉A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫·The paper size of the paper is in line with the Chinese National Standard (CNS) A4 specification (210X297 mm) -15 524898 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 __B7__ V. Invention Description (13) From the standpoint of erasing effect, although it is preferable to use a nitrogen-doped wafer as the substrate, if a silicon single crystal doped with nitrogen is to be cultivated, a known method may be used. That is, for example, when silicon single crystal rods are cultured by the CZ method, nitrides are put in a quartz crucible in advance, or nitrides are put into a silicon melt, or the environment gas is turned into an environment containing nitrogen. Doped with nitrogen during crystallization. In this case, the amount of doping in the crystal can be controlled by adjusting the amount of nitride, the concentration of nitrogen, or the introduction time. Examples of the present invention will be described in detail, but the present invention is not limited thereto. (Example 1) A 18-inch quartz crucible was charged with raw polycrystalline silicon, and a P-type silicon single crystal rod having a diameter of 6 inches and an orientation of <100> was pulled up. The rotation speed of the crucible is set to 4 r p m and the crystal rotation speed is set to 15 r pm. Here, while controlling the pull-up speed to be 0.5 · 4 ~ 0.52 mm / mi η, perform pull-up of the single crystal, and V / G (V: pull-up speed, G: crystallization solid-liquid Interface temperature gradient) becomes 0 · 152 ~ 0 · 146mm2 / ° C-min. The silicon single crystal rod obtained here was cut out of wafers, and 4 silicon wafers for epitaxial growth were produced. Furthermore, 4 silicon wafers were formed on the surface of the silicon wafer for epitaxial growth to have a thickness of about 4 // m. An epitaxial wafer with a crystal layer. For selective etching of this wafer, use a surface inspection device using laser light (manufactured by Tencol, the paper size applies to Chinese national standards (CNS> A4 size (210X297 mm)) (please Read the notes on the back before filling in ·

訂線 -16- 524898 A7 B7 ____ 五、發明説明（14 )Order -16- 524898 A7 B7 ____ V. Description of the invention (14)

Surf Scan 62 00 )所檢出之磊晶表面之L p D以光學顯微鏡加以觀察。其結果，關於任一晶圓在磊晶晶圓全面未觀察到S F。 (實施例2 ) 將矽單結晶以通常之拉起速度（約1 m m / m i η ) 摻雜氮加以培養，製作了 4枚直徑8英吋之C Z矽單結晶晶圓（結晶軸方位〈1 〇〇〉、p型、1 0 Ω c m、氧氣濃度15ppma ( JEIDA規格）、氮濃度lxlO1個 / c m 3 ° 接著，對此矽晶圓，在加熱器加熱方式之批次爐’在氬氣環境下在1 2 0 〇 °C溫度進行1小時熱處理之後’未將晶圓從爐中取出不冷卻於8 0 0 °C以下’連續地在氧氣環境下於1 2 0 0 °C溫度進行1 0分鐘之濕氧化。熱處理後，去除表面之氧化膜，觀察此矽晶圓表面之孔隙型缺陷時，任何晶圓，皆未發現在晶圓表面之孔隙型缺陷。經濟部智慧財產局員工消費合作社印製與實施例1同樣，製作了 4枚在此磊晶成長用矽晶圓表面形成約4 //m之嘉晶層之嘉晶晶圓’將嘉晶表面之 L P D以光學顯微鏡觀察。其結果，關於任一磊晶晶圓全面都未觀察到S F。 (比較例）不摻雜氮以外與實施例2同樣，將矽單結晶以通常之拉起速度（約lmm/m i η )加以培養，製作了 4枚直本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -17- 524898 at B7 五、發明説明（15 ) 徑8英吋之C Z砍單結晶晶圓（結晶方位〈1 0 0〉、P 型、lOQcm、氧氣濃度15ppma ( JEID A規格）〇製作了 4枚在此磊晶成長用矽晶圓表面，不進行熱處理等直接形成約4 // m之磊晶層之磊晶晶圓’將磊晶表面之L PD以光學顯微鏡觀察。其結果，磊晶層表面之S F 爲存在有平均約2個/ 8英吋晶圓。按，本發明係並非限定於上述實施形態。上述實施形態，係例示而已，具有與記載於本發明之申請專利範圍之技術思想實質上相同之構成，可發揮同樣作用效果，任何者皆包含於本發明之技術範圍。圖式之簡單說明第1圖係表示截面丁 E Μ觀察情形之圖，（a )係顯微鏡觀察圖，（b )係依據顯微鏡觀察圖將缺陷以模式表示之圖。第2圖係關於未摻雜氮之晶圓表示截面T EM觀察之結果之放大圖，（a )係顯微鏡觀察圖，（b )係將顯微鏡觀察圖以模式表示之圖。第3圖係關於未摻雜氮之晶圓表示截面T E Μ觀察之另外結果之放大圖，（a )係顯微鏡觀察圖，（b )係將顯微鏡觀察圖以模式表示之圖。第4圖係關於未摻雜氮之晶圓表示截面T EM觀察之其他結果之放大圖，（a )係顯微鏡觀察圖，（b )係將 (請先閲讀背面之注意事項再填寫·L p D on the epitaxial surface detected by Surf Scan 6200) was observed with an optical microscope. As a result, no S F was observed in all of the epitaxial wafers. (Example 2) Silicon single crystals were doped with nitrogen at a normal pull-up speed (about 1 mm / mi η) and cultured to produce 4 CZ silicon single crystal wafers with a diameter of 8 inches (crystal axis orientation <1 〇〇〉, p-type, 10 Ω cm, oxygen concentration 15ppma (JEIDA standard), nitrogen concentration lxlO1 / cm 3 ° Then, the silicon wafer was heated in a batch furnace of a heater heating method in an argon atmosphere. After heat treatment at 1 200 ° C for 1 hour, 'the wafer is not taken out of the furnace and is not cooled below 80 ° C', and is continuously performed at 1 2 0 ° C in an oxygen environment for 1 0 Wet oxidation in minutes. After heat treatment, remove the oxide film on the surface and observe the pore-type defects on the surface of this silicon wafer. No pore-type defects were found on the surface of any wafer. The printing was the same as in Example 1. Four Jiajing wafers were formed on the surface of this epitaxial growth silicon wafer to form a 4 // m Jiajing layer. The LPD on the surface of Jiajing was observed with an optical microscope. As a result, no SF was observed across any of the epitaxial wafers. ) Except for non-doped nitrogen, as in Example 2, silicon single crystals were cultivated at a normal pull-up speed (about 1 mm / mi η), and four straight paper sizes were made to comply with Chinese National Standard (CNS) A4 specifications ( 210X297 mm) -17- 524898 at B7 V. Description of the invention (15) CZ cut single crystal wafer with 8 inches in diameter (crystal orientation <10 0>, P type, 10Qcm, oxygen concentration 15ppma (JEID A specification) 〇4 epitaxial wafers were formed on the surface of the epitaxial silicon wafer for epitaxial growth, and an epitaxial layer of about 4 // m was formed directly without heat treatment. The L PD on the epitaxial surface was observed with an optical microscope. As a result, the SF on the epitaxial layer surface has an average of about 2/8 inch wafers. According to this, the present invention is not limited to the above-mentioned embodiment. The above-mentioned embodiment is merely an example, and has and is described in the application of the present invention The technical idea of the patent scope is substantially the same in structure and can exert the same effect, and any one is included in the technical scope of the present invention. Brief Description of the Drawings Figure 1 is a diagram showing the observation situation of the section D EM, (a) Department of microscope observation, (B) is a diagram showing defects in a pattern according to a microscope observation diagram. FIG. 2 is an enlarged view of a result of a cross-section T EM observation of an undoped nitrogen wafer, (a) is a microscope observation diagram, (b) Fig. 3 is a view showing a microscope observation pattern in a mode. Fig. 3 is an enlarged view showing another result of TE M observation on a cross section of an undoped nitrogen wafer, (a) is a microscope observation diagram, and (b) is a microscope observation diagram. The figure is shown in a pattern. Figure 4 is an enlarged view of other results of cross-sectional T EM observations on a wafer not doped with nitrogen, (a) is a microscope observation chart, and (b) is (please read the first Please fill in the matters needing attention

訂經濟部智慧財產局員工消費合作社印製本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -18"Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) -18 "

524898 A7 B7 五、發明説明（16 ) 顯微鏡觀察圖以模式表示之圖。第5圖係關於摻雜氮表示截面T E Μ觀察結果之放大圖。第6圖係關於摻雜氮表示截面Τ Ε Μ觀察之另外結果之放大圖。第7圖係關於摻雜氮表示截面Τ Ε Μ觀察之其他結果之放大圖。524898 A7 B7 V. Description of the invention (16) Microscope observation diagrams are shown as patterns. Fig. 5 is an enlarged view of the observation result of the cross section TEM with respect to the doped nitrogen. Fig. 6 is an enlarged view of another result of observation of the doped nitrogen indicating section T EM. Fig. 7 is an enlarged view of other results of observation of the cross section T EM with doped nitrogen.

第8 (a)〜（d)係於摻雜氮晶圓，表示形成SF 之情形之說明圖。第9 ( a )〜（d )係於未摻雜氮晶圓，表示形成 S F之情形之說明圖。 (請先閱讀背面之注意事項再填寫本頁) 餐βτ ¾本頁、1Τ 線經濟部智慧財產局員工消費合作社印製本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） -19-The eighth (a) to (d) are explanatory diagrams showing a case where SF is formed on a nitrogen-doped wafer. Numbers 9 (a) to (d) are explanatory diagrams showing the case where S F is formed on an undoped nitrogen wafer. (Please read the precautions on the back before filling in this page) Meal βτ ¾ This page, printed by 1T Consumers' Cooperative of Intellectual Property Bureau of Ministry of Economic Affairs, printed on paper This paper applies Chinese National Standard (CNS) Α4 specification (210 × 297 mm) -19 -

Claims

嚴補 524898 申請專利範圍第89 1 25060號專利申請案中文申請專利範圍修正本民國9 1年6月修正 1 . 一種嘉晶成長用砂晶圓，係利用CZ (紫氏長晶 )法或F Z (浮融帶長晶）法製造，在表面形成有磊晶層，其特徵爲：至少在成長磊晶層之表面不露出孔隙型缺陷。 2 ·如申請專利範圍第1項之磊晶成長用矽晶圓，其中上述孔隙型缺陷爲不存在於從成長磊晶層之表面至少到 1 Ο n m之深度。 3 .如申請專利範圍第1項之磊晶成長用矽晶圓，其中上述磊晶成長用矽晶圓摻雜有氮。 4 ·如申請專利範圍第2項之磊晶成長用矽晶圓，其中上述磊晶成長用矽晶圓摻雜有氮。 5 ·如申請專利範圍第1項至第4項中任一項所述之磊晶成長用矽晶圓，其中在磊晶成長用矽晶圓的表面上形成磊晶層。 6 _ —種磊晶晶圓之製造方法，其特徵爲：由來自使用者要求的磊晶晶圓的S F數的上限値預先設定可容許的磊晶成長用矽晶圓的孔隙型缺陷數，利用C Z (紫氏長晶 )法或F Z (浮融帶長晶）法製造矽晶圓，測定露出於前述矽晶圓表面之孔隙型缺陷之個數、及/或從前述矽晶圓表面至少到1 〇 n m深度所存在之孔隙型缺陷之個數，選本紙張尺度適用中國國家操準（CNS ) A4規格（210X297公釐） h.hNP > (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 8 8 8 8 ABCD 524898 六、申請專利範圍 (請先閲讀背面之注意事項再填寫本頁) 擇這些孔隙型缺陷之個數爲前述預先設定的可容許的孔隙型缺陷數以下之矽晶圓，在該被選擇之矽晶圓表面進行晶晶層之成長。 7 . —種磊晶晶圓之製造方法，其特徵爲：利用C Z (紫氏長晶）法製造對於從露出於表面之孔隙型缺陷及/或表面至少到1 0 n m深度具有孔隙型缺陷之矽晶圓，藉由對前述矽晶圓進行熱處理，消滅上述孔隙型缺陷及/或成爲不變成S F (疊差）發生源之形態之後，在上述矽晶圓表面進行磊晶層之成長。 8 .如申請專利範圍第7項之磊晶晶圓之製造方法，其中上述熱處理係在非氧化性環境下於1 1 0 0〜 1 3 0 0 °C的溫度下施加熱處理後，未冷卻到7 0 0 t以下而連續地在氧化性環境下施加在7 0 0〜1 3 0 0 t的溫度的熱處理。 9 ·如申請專利範圍第7項之磊晶晶圓之製造方法，其中將上述熱處理，在磊晶工程之磊晶層成長前之氫烘烤後，導入惰性氣體進行。經濟部智慧財產局員工消費合作社印製 1 〇 _如申請專利範圍第6項至第9項之任一項之磊晶晶圓之製造方法，其中作爲上述矽晶圓，使用被摻雜氮之矽晶圓。本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -2-Yan Bu 524898 Patent Application No. 89 1 25060 Patent Application Chinese Patent Application Amendment The Republic of China Amended June 2011 1. A sand crystal wafer for the growth of Jiajing, which uses the CZ (Ziguchi long crystal) method or FZ It is manufactured by the (floating-melt-band growth) method, and an epitaxial layer is formed on the surface, which is characterized in that at least the surface of the grown epitaxial layer does not expose pore-type defects. 2. If the silicon wafer for epitaxial growth of item 1 of the patent application scope, the above-mentioned porosity type defect does not exist at a depth of at least 10 nm from the surface of the grown epitaxial layer. 3. The epitaxial silicon wafer for epitaxial growth as described in item 1 of the patent application scope, wherein the aforementioned silicon wafer for epitaxial growth is doped with nitrogen. 4 · If the silicon wafer for epitaxial growth is described in item 2 of the patent application scope, wherein the silicon wafer for epitaxial growth is doped with nitrogen. 5. The epitaxial silicon wafer for epitaxial growth as described in any one of claims 1 to 4, wherein an epitaxial layer is formed on the surface of the epitaxial silicon wafer for epitaxial growth. 6 _ — A method for manufacturing an epitaxial wafer, which is characterized by the following: the upper limit of the SF number from the epitaxial wafer requested by the user; the allowable number of pore-type defects of the silicon wafer for epitaxial growth is set in advance, A silicon wafer is manufactured by the CZ (purple growth crystal) method or the FZ (float-melt belt growth) method, and the number of void-type defects exposed on the surface of the silicon wafer is measured, and / or at least from the surface of the silicon wafer The number of porosity defects existing to a depth of 10 nm, the paper size is selected to apply China National Standard (CNS) A4 specifications (210X297 mm) h.hNP > (Please read the precautions on the back before filling in this (Page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 8 8 8 8 ABCD 524898 VI. Patent application scope (please read the precautions on the back before filling this page) Select the number of these porosity defects as the previously set For silicon wafers with an allowable number of void-type defects, a crystal layer is grown on the surface of the selected silicon wafer. 7. A method of manufacturing an epitaxial wafer, characterized by: using the CZ (Zizi's crystal) method to produce a pore-type defect from the surface-type pore-type defect and / or the surface has a pore-type defect at a depth of at least 10 nm After the silicon wafer is subjected to a heat treatment to eliminate the above-mentioned pore-type defects and / or become a form that does not become a source of SF (stacking difference), an epitaxial layer is grown on the surface of the silicon wafer. 8. The method for manufacturing an epitaxial wafer according to item 7 of the scope of patent application, wherein the heat treatment is performed in a non-oxidizing environment at a temperature of 1 1 0 to 1 3 0 ° C without cooling to The heat treatment is continuously applied at a temperature of 700 to 1 300 t under an oxidizing environment under 700 t. 9. The method for manufacturing an epitaxial wafer according to item 7 of the scope of patent application, wherein the above heat treatment is performed by introducing an inert gas after hydrogen baking before the epitaxial layer growth of the epitaxial project. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 10_ If the patent application scope of any of the 6th to 9th of the epitaxial wafer manufacturing method, wherein as the above silicon wafer, doped with nitrogen doped Silicon wafer. This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) -2-