^υυ 5181twf.d〇c/〇〇8^ υυ 5181twf.d〇c / 〇〇8
發明說明（< 本發明是有關於一種半導體封裝結構及其製程，且 牛寸別疋有關於一種利用極薄金屬作爲承載器的晶圓等級封 裝及其製程。 在半導體封裝產業中，銅箔（copper化⑴是極常被應 用的材料’其可以作爲印刷電路板(PCB)的積層配線材料， 1者^帶式承載器(tape carrier)的配線材料等。目前現有 之銅泊=料以厚度爲18微米(0.5盎司）及35微米（1盎司） 爲主’最低厚度不超過8微米。然而受限於圖案化銅箔層 時’係利用濕式蝕刻方式，會有底切現象(undercut)，因此 線路之線寬及間距均無法有效降低。目前較普及化爲厚度 12微米的銅箔所形成間距爲15〇微米之線路圖案（trace pattern) ° 對於半導體封裝而言，提高封裝密度一直是業界追 求的目標，因此更細微化的線路圖案是市場迫切的需求， 比如間距爲60微米的線路圖案。若欲滿足間距6〇微米的 線路需求，理論上需要厚度3-5微米的極薄銅箔，才可能 達成。近期日本三井公司（MITSUI)發表一種3微米厚度之 極薄銅箔量產技術，其係由承載金屬層、黏著層及極薄銅 箔三層結構組成之複合銅箔。其中，承載金屬層爲厚度 100-150微米(4-5密爾）的銅箱，將極薄銅箱積層於基板後， 可以輕易將承載金屬層及黏著層剝離，而獲得厚度3微米 之銅箔。由於此種銅箔厚度極薄，可形成之較小線寬及間 距之線路。 此外’晶圓等級構裝（wafer level package)爲—種高 (請先閱讀背面之注意事項再填寫本頁) .¾¾^ •丨！丨丨丨丨訂-!丨-丨丨丨- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公釐） 512500 5 181 twf.d〇c/〇〇8 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（l) 密度封裝，由於其直接將承載器與晶圓接合後，再進行晶 圓切割，每一封裝單元之面積與晶片相同。而且，此種封 裝訊號傳輸路徑極短，可以提高產品效能。由於晶圓等級 封裝，係同時進行多個晶片封裝，可以簡化製程，降低製 造成本。 本發明就是利用極薄銅箔直接進行晶圓級封裝，以 其較小之線寬及間距，形成密度更高之封裝。 本發明提供一種轉移凸塊封裝，係利用極薄金屬形 成多個轉移凸塊，配置於晶片之主動表面，且分別對應每 一個焊墊。於焊墊與轉移凸塊間，分別配置異方性導電材 質，以形成電性連接。 依照本發明的一較佳實施例，轉移凸塊之厚度約介 於3-5微米。轉移凸塊可以爲一^階梯轉移凸塊，由突出部、 銲球墊及連接突出部與銲球墊之連接部分構成，而以突出 部與焊墊連接。而階梯轉移凸塊厚度則介於5-10微米， 突出部與銲球墊或連接部分則有2-3微米的厚度差異。異 方性導電材質則包括異方性導電膠或異方性導電膜。 本發明亦提出上述轉移凸塊封裝的晶圓級封裝製 程，包括：提供一承載層，並在其上透過一黏著層積層一 薄金屬層；定義薄金屬層，以形成多個轉移凸塊。接著， 、 將轉移凸塊連同承載層配置於一晶圓之主動表面，轉移凸 塊則分別對準晶圓上各晶片的焊墊，並且在焊墊與轉移凸 塊之間配置一異方性導電材質，使得每一轉移凸塊分別藉 由異方性導電材質與焊墊電性連接。然後，固化異方性導 4 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) 礞 丨丨-丨丨丨丨訂·丨丨丨丨--丨- . 512500 5181 twf.doc/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（h) 電材質，並去除承載層；接著進行切割製程，將晶片分離。 依照本發明之較佳實施例’在定義薄金屬層後，還 可以進行一厚度縮減製程，以形成上述之階梯轉移凸塊， 而以突出部與焊墊連接。至於異方性導電材質包括異方性 導電膠，或異方性導電膜，可以形成於晶圓之焊墊上，或 者轉移凸塊上。而厚度縮減製程包括半蝕刻法或者壓印 法。 爲讓本發明之上述和其他目的、特徵、和優點能更 明顯易懂，下文特舉一較佳實施例，並配合所附圖式，作 詳細說明如下： 圖式之簡單說明： 第1圖至第5圖繪示依照本發明第一較佳實施例的 一種轉移凸塊封裝之製程剖面圖。 第3A圖繪示另一種異方性導電材質的應用。 第3B圖繪示對應於第3圖及第3A圖中轉移凸塊與 焊墊連接部分的放大示意圖。 第5A圖繪示對應於第3A圖之轉移凸塊封裝。 第5B圖繪示對應於第4圖且黏著層未去除之轉移 凸塊封裝。 第6圖至第11圖繪示依照本發明之第二較隹實施 例一種轉移凸塊封裝之製程剖面圖。 第7A圖繪示對應第7圖之俯視圖。 第I2圖繪示本發明轉移凸塊封裝的另一種應用。 圖式之標示說明： 5 本紙張尺度適用中國國家標準（CNS)A4規;^ (210 X 297公ϋ __ (請先閱讀背面之注意事項再填寫本頁} --裝[Explanation of the Invention] The present invention relates to a semiconductor packaging structure and a manufacturing process thereof, and to a wafer-level packaging using a very thin metal as a carrier and a manufacturing process thereof. In the semiconductor packaging industry, copper foil (Copper is a material that is often used. It can be used as a laminated wiring material for printed circuit boards (PCBs), one of them is a wiring material for tape carriers, etc. At present, the existing copper copper materials The thickness is 18 microns (0.5 ounces) and 35 microns (1 ounces). The minimum thickness is not more than 8 microns. However, when limited by the patterned copper foil layer, the wet etching method is used and there will be an undercut. ), So the line width and pitch of the circuit cannot be effectively reduced. At present, it is more popular to form a trace pattern with a pitch of 15 microns formed by a copper foil with a thickness of 12 microns. It is the goal pursued by the industry, so a more refined circuit pattern is an urgent demand in the market, such as a circuit pattern with a pitch of 60 microns. To meet the demand for a circuit with a pitch of 60 microns In theory, very thin copper foil with a thickness of 3-5 microns can be achieved. Recently, Mitsui Japan (MITSUI) announced a mass production technology for a very thin copper foil with a thickness of 3 microns, which consists of a carrier metal layer, an adhesive layer and Composite copper foil consisting of three layers of ultra-thin copper foil. Among them, the carrying metal layer is a copper box with a thickness of 100-150 microns (4-5 mils). After the ultra-thin copper box is laminated on the substrate, the carrying metal can be easily The layer and the adhesive layer are peeled off to obtain a copper foil with a thickness of 3 micrometers. Due to the extremely thin thickness of this copper foil, it is possible to form a line with a smaller line width and pitch. In addition, the 'wafer level package' is- Kind of height (please read the notes on the back before filling out this page). Standard (CNS) A4 specification (21〇X 297 mm) 512500 5 181 twf.d〇c / 〇〇8 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (l) Due to its density packaging Bond the carrier directly to the wafer before proceeding Wafer dicing, the area of each package unit is the same as the wafer. In addition, this package signal transmission path is extremely short, which can improve product efficiency. Because wafer-level packaging, multiple wafer packages are carried out at the same time, which can simplify the process and reduce manufacturing Cost. The present invention uses ultra-thin copper foil to directly perform wafer-level packaging, with its smaller line width and pitch, to form a higher-density package. The present invention provides a transfer bump package, which is formed using ultra-thin metal. Each transfer bump is disposed on the active surface of the wafer and corresponds to each pad. An anisotropic conductive material is respectively arranged between the pad and the transfer bump to form an electrical connection. According to a preferred embodiment of the present invention, the thickness of the transfer bump is about 3-5 microns. The transfer bump may be a stepped transfer bump, which is composed of a protruding portion, a solder ball pad, and a connecting portion connecting the protruding portion and the solder ball pad, and the protruding portion is connected to the solder pad. The thickness of the step transfer bump is between 5-10 microns, and there is a difference of 2-3 microns between the protrusion and the solder ball pad or the connection part. The anisotropic conductive material includes an anisotropic conductive adhesive or an anisotropic conductive film. The invention also proposes the wafer-level packaging process for the transfer bump package described above, including: providing a carrier layer and laminating a thin metal layer through an adhesive layer thereon; defining a thin metal layer to form a plurality of transfer bumps. Next, the transfer bumps and the supporting layer are arranged on the active surface of a wafer, the transfer bumps are respectively aligned with the pads of each wafer on the wafer, and an anisotropy is arranged between the pads and the transfer bumps. The conductive material enables each transfer bump to be electrically connected to the bonding pad through an anisotropic conductive material. Then, solidify the anisotropy guide 4 The paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) (Please read the precautions on the back before filling this page) 订 丨 丨-丨 丨 丨 丨 Order · 丨 丨 丨 丨-丨-. 512500 5181 twf.doc / 008 A7 B7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (h) Electrical material and remove the bearing layer; Wafer separation. According to the preferred embodiment of the present invention, after the thin metal layer is defined, a thickness reduction process may be performed to form the step transfer bumps described above, and the protrusions are connected to the pads. As for the anisotropic conductive material, including anisotropic conductive adhesive, or an anisotropic conductive film, it can be formed on a pad of a wafer or on a transfer bump. The thickness reduction process includes a half-etching method or an embossing method. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1 FIG. 5 to FIG. 5 are cross-sectional views of a manufacturing process of a transfer bump package according to a first preferred embodiment of the present invention. Figure 3A illustrates the application of another anisotropic conductive material. FIG. 3B is an enlarged schematic diagram corresponding to the connecting portion between the transfer bump and the pad in FIGS. 3 and 3A. FIG. 5A illustrates a transfer bump package corresponding to FIG. 3A. FIG. 5B shows the transfer bump package corresponding to FIG. 4 without the adhesive layer removed. 6 to 11 are cross-sectional views showing a process of a transfer bump package according to a second comparative embodiment of the present invention. FIG. 7A shows a top view corresponding to FIG. 7. Figure I2 illustrates another application of the transfer bump package of the present invention. Schematic description: 5 This paper size is applicable to China National Standard (CNS) A4; ^ (210 X 297 public ϋ __ (Please read the precautions on the back before filling this page})-
1 1_1 ϋ n> 1 mmMK mmmt Mmmmm Mmmm§ ^M§ mmMW p 512500 5 181 twf.doc/008 A7 B7 五、發明說明（4 )100 、 200 薄金屬基材 承載層 黏著層 薄金屬層 經濟部智慧財產局員工消費合作社印製 102 、 202 104 、 204 106 、 206 106a :轉移凸塊 110、220 :晶圓 112、114、222、224 :晶片 116、226 :主動表面 118、228 :焊墊 120、230 :保護層 122 :異方性導電膠 122a :異方性導電膜 124 :導電粒子 130、234 :切割線 208 :階梯轉移凸塊 210 :突出部 212 :連接部分 214 :銲球墊 T :厚度差 232 :異方性導電材質 236 :焊罩 238 :靜球 實施例 請參照第1圖至第5圖，其繪示依照本發明第一較 (請先閱讀背面之注意事項再填寫本頁) -裝 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 512500 5 181 twf.doc/008 A7 B7 經濟部智慧財產局員Η消費合作社印製 五、發明說明（V) 佳實施例的一種轉移凸塊封裝之製程剖面圖。首先請先# 照第1圖，本發明之封裝主要係建構於一薄金屬基材1〇〇 上，而薄金屬基材100主要係由承載層l〇2(carrier)及薄金 屬層106(thin metal layer)所組成，薄金屬層1〇6藉由一黏 著層104(adhesive)積層（laminate)於承載層102之一面。其 中承載層102之材質比如是銅或是其他金屬，甚至非金屬， 其厚度約介於100-150微米(4-5密爾）；薄金屬層106，比 如是銅箱(copper foil)，其厚度則約介於3-5微米。黏著層 104又稱剝離層，用於後續剝離承載層102與薄金屬層1〇6 之用。 請參照第2圖，接著進行薄金屬層106之定義，比 如以微影蝕刻的方式，形成多個轉移凸塊106a(：ti*aiisfei· bump pad)。由於薄金屬層106之厚度極薄，因此可以製 成線寬極窄之圖案（轉移凸塊），以進行晶圓級封裝。 請參照第3圖，晶圓llO(wafer)係由多個晶片112、 114(chip)所構成，其具有一主動表面116(active surface)。 主動表面116上具有多個焊墊118(bonding pad)，作爲晶 片112、114內部電路對外之接點；而保護層120(passiVati〇n) 則覆蓋於主動表面116，僅暴露出焊墊118的部分，以保 護晶片112、114。接著將整個薄金屬基材1〇〇，包括轉移 凸塊106a連同承載層102，配置於晶圓110之主動表面 116，且讓每一轉移凸塊106a對準焊墊118，而在轉移凸 塊106a與焊墊118間配置一異方性導電材質 122(anisotropic conductive material)。此異方性導電材質 7 (請先閱讀背面之注意事項再填寫本頁) 一丨裝 • ϋ ϋ 1 ϋ _li n n 一5J n n n n n n I I · 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 512500 A7 B7 5 1 8 1 twf.doc/008 五、發明說明（&) 122可以先行形成於晶圓11〇之焊墊118上，或者先行形 成於轉移凸塊106a之表面。異方性導電材質122包括異 方性導電膠（anisotropic conductive paste，ACP)，可以用網 版印刷（screen printing)的方式形成。請同時參照第3A圖， 其繪示另一種異方性導電材質的應用。異方性導電材質亦 包括異方性導電膜 122a(anisotropic conductive film， ACF)，其採用貼附（attach)的方式形成。 請參照第3B圖，其繪示對應於第3圖及第3A圖中 轉移凸塊與焊墊連接部分的放大示意圖。根據異方性導電 膠及異方性導電膜的特性，在轉移凸塊106a的區域由於 受到擠壓，使得其內含之導電粒子124(conductive particle) 緊鄰而形成導通；而其他區域因未受到足夠之擠壓變形， 因而不形成電性導通。然而後續還需對異方性導電材質122 加熱，使之固化（curing)。 請參照第4圖，接著去除承載層102，比如以蝕刻 的方法去除之。至於黏著層104則是選擇性去除，若黏著 層104爲一般性絕緣黏著物質，則直接以剝除(peel 0ff)或 蝕刻的方式去除。若黏著層104亦爲異方性導電材質，則 可以保留而作爲後續轉移凸塊l〇6a對外部電路（比如印刷 電路板)連接之用。 請參照第5圖，進行一切割製程，沿著晶片112、114 間的切割線130(scribe line)，將晶片112、114分離，以 形成個別已封裝完成之晶片。第5圖中所示爲未保留黏著 層104，且採用異方性導電膠爲焊墊118與轉移凸塊106a 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -n n I I I I l l ϋ ϋ I ϋ I I al 1 ϋ n 一-口’ I ϋ 1 ϋ I ϋ I · (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 512500 5 1 8 ltwf.doc/008 B7 五、發明說明（7 ο 之連接的轉移凸塊封裝。 (請先閱讀背面之注意事項再填寫本頁) 請參照第5A圖，其繪示對應於第3A圖之轉移凸塊 封裝，所採用爲異方性導電膜122a，且黏著層104已剝除。 請參照第5B圖，其則繪示對應於第4圖且黏著層104未 去除之轉移凸塊封裝。若黏著層已去除，轉移凸塊可以直 接以表面焊接技術（SMT)，對外部電路連接。 請參照第6圖至第11圖，其繪示依照本發明之第 二較佳實施例一種轉移凸塊封裝之製程剖面圖。本發明中 轉移凸塊的型態，除了上述立方塊型態外，亦可以形成階 梯轉移凸塊型態（step bump pad)。請先參照第6圖，同樣 地，本實施例之封裝主要亦建構於一薄金屬基材200上， 而薄金屬基材200主要係由承載層202與薄金屬層206構 成，薄金屬層206藉由一黏著層204稹層於承載層202之 一面。其中承載層202之材質比如是銅或是其他金屬，甚 至非金屬，其厚度約介於100-150微米(4-5密爾）；薄金屬 層206，比如是銅箔，其厚度則約介於5-10微米。 經濟部智慧財產局員工消費合作社印製 請參照第7圖，並同時參照第7A圖，其繪示對應 第7圖之俯視圖。進行薄金屬層206之定義，比如以微影 鈾刻的方式，形成多個階梯轉移凸塊208。每一階梯轉移 凸塊208包括突出部210、銲球墊214(ball pad)以及連接 突出部210與銲球墊214的連接部分212(C〇nnecti〇n portion)。由於薄金屬層206之厚度極薄，因此所形成之 階梯轉移凸塊208之線寬及間距均可以縮小，密度更高， 以利於進行晶圓級封裝。 9 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 512500 A7 B7 5 181 twf.doc/008 五、發明說明) (請先閱讀背面之注意事項再填寫本頁) 請參照第8圖’接著進行一厚度縮減製程，將階梯 轉移凸塊208中銲球墊214及連接部分212的厚度縮減， 使得突出部210與銲球墊214及連接部分212的厚度差Τ 約2-3微米。而厚度縮減的方法可以利用半蝕刻 etching)的方法’利用光阻覆盍突出部21 〇而触刻銲球墊214 及連接部分212。或者，利用壓印（coin)的方法，沖壓銲球 墊214及連接部分212，使其變形厚度縮減。 經濟部智慧財產局員工消費合作社印製 請參照第9圖，晶圓220係由多個晶片222、224 所構成，其具有一主動表面226。主動表面226上具有多 個焊墊228，作爲晶片222、224內部電路對外之接點；而 保護層230(passivation)則覆蓋於主動表面226，僅暴露出 焊墊228的部分，以保護晶片222、224。接著將整個薄金 屬基材200，包括階梯轉移凸塊208連同承載層202，配 置於晶圓220之主動表面226，且讓每一階梯轉移凸塊208 中突出部210分別對準焊墊228，而在階梯轉移凸塊208 的突出部210與焊墊228間配置一異方性導電材質232。 此異方性導電材質232可以先行形成於晶圓220之焊墊228 上，或者先行形成於階梯轉移凸塊208之表面。同樣地， 異方性導電材質232包括異方性導電膠，可以用網版印刷 的方式形成。異方性導電材質亦包括異方性導電膜，其採 用貼附的方式形成。本實施例中係以異方性導電膜爲例， 其他之應用則與前述實施例相似，在此不再贅述。後續還 需對異方性導電材質232加熱，使之固化(curing)。 請參照第10圖，接著去除承載層202，比如以蝕刻 本紙張尺度適用中國國豕標準（CNS)A4規格（210 X 297公釐） 512500 5 181 twf. doc/00 8 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（t) 的方法去除之。至於黏著層204則如前述實施例，爲選擇 性去除，此實施例中以黏著層2〇4爲異方性導電材質爲例， 則可以保留而作爲後續階梯轉移凸塊208對外部電路（比 如印刷電路板）連接之用。 請繼續參照第11圖，進行一切割製程，沿著晶片 222、224間的切割線234，將晶片222、224分離，以形 成個別已封裝完成之晶片。 請參照第12圖，其繪示本發明轉移凸塊封裝的另 一種應用。本實施例中，階梯轉移凸塊208可以利用異方 性導電膠或異方性導電膜，形成後續與外部電路之連接， 亦可以利用其他方式進行接合。以第12圖所示結構爲例， 對於已剝除黏著層204之轉移凸塊封裝而言，可以進一步 進行焊罩236(solder mask)之塗佈，塗佈於階梯轉移凸塊 208之表面及塡充於階梯轉移凸塊208之間，僅暴露出銲 球墊214表面。此層焊罩236除了可以保護階梯轉移凸塊 208表面，避免其氧化，還可以限制後續銲料流動範圍， 提高可靠度。經過焊罩236塗佈後，轉移凸塊封裝已可以 直接進行表面焊接製程（SMT)，與外部電路連接。甚至還 可以在銲球墊214上植接銲球238，作爲封裝對外之接點， 形成類似球格陣列式封裝(ball grid array，BGA)型態。 綜上所述，本發明至少具有下列優點： 1.本發明利用薄金屬層形成轉移凸塊作爲承載器， 可以得到更小之線寬及間距，提高封裝密度。 2·本發明之轉移凸塊封裝製程，適於晶圓等級封裝， (請先閱讀背面之注意事項再填寫本頁) .裝 訂丨丨丨丨丨丨丨 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 512500 5 181twf.doc/008 A7 B7 五、發明說明（[ύ) 可以獲得密度更高之封裝，並簡化封裝製程，降低製造成 本。 雖然本發明已以一較佳實施例揭露如上，然其並非 用以限定本發明，任何熟習此技藝者，在不脫離本發明之 精神和範圍內，當可作些許之更動與潤飾，因此本發明之 保護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) .裝 了 _ n 1· emmf eamm 、 me— ammmm mmmmmm Mam§ emmmm BB1 I i 言 經濟部智慧財產局員工消費合作社印製 12 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）1 1_1 ϋ n > 1 mmMK mmmt Mmmmm Mmmm§ ^ M§ mmMW p 512500 5 181 twf.doc / 008 A7 B7 V. Description of the invention (4) 100, 200 Thin metal substrate carrier layer Adhesive layer Thin metal layer Ministry of Economy Wisdom Printed by 102, 202, 104, 204, 106, and 206 106a of employees' cooperatives of the Property Bureau: transfer bumps 110, 220: wafers 112, 114, 222, 224: wafers 116, 226: active surfaces 118, 228: pads 120, 230: protective layer 122: anisotropic conductive adhesive 122a: anisotropic conductive film 124: conductive particles 130, 234: cutting line 208: step transfer bump 210: protruding portion 212: connecting portion 214: solder ball pad T: thickness Difference 232: Anisotropic conductive material 236: Welding cover 238: Static ball embodiment Please refer to Figure 1 to Figure 5, which shows the first comparison according to the present invention (please read the precautions on the back before filling this page) -The size of the paper is in accordance with the Chinese National Standard (CNS) A4 (210 X 297 mm) 512500 5 181 twf.doc / 008 A7 B7 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and printed by the Consumer Cooperatives An example process cross-sectional view of a transfer bump package. First please first according to Figure 1. The package of the present invention is mainly constructed on a thin metal substrate 100, and the thin metal substrate 100 is mainly composed of a carrier layer 102 and a thin metal layer 106 ( The thin metal layer 106 is laminated on one side of the carrier layer 102 by an adhesive layer 104 (adhesive). The material of the carrier layer 102 is, for example, copper or other metals, or even non-metals. The thickness of the carrier layer 102 is about 100-150 microns (4-5 mils). The thin metal layer 106 is, for example, a copper foil. The thickness is about 3-5 microns. The adhesive layer 104 is also called a release layer, and is used for subsequent peeling of the carrier layer 102 and the thin metal layer 106. Referring to FIG. 2, the definition of the thin metal layer 106 is performed, for example, a plurality of transfer bumps 106 a (: ti * aiisfei · bump pad) are formed by lithographic etching. Since the thickness of the thin metal layer 106 is extremely thin, a pattern (transfer bump) with extremely narrow line width can be made for wafer-level packaging. Referring to FIG. 3, the wafer 110 (wafer) is composed of a plurality of wafers 112, 114 (chips), which has an active surface 116 (active surface). The active surface 116 has a plurality of bonding pads 118 (bonding pads), which serve as external contacts for the internal circuits of the wafers 112 and 114; and a protective layer 120 (passiVatiOn) covers the active surface 116, exposing only the bonding pads 118. To protect the wafers 112, 114. Next, the entire thin metal substrate 100, including the transfer bump 106a and the carrier layer 102, is arranged on the active surface 116 of the wafer 110, and each transfer bump 106a is aligned with the bonding pad 118, and the transfer bump is An anisotropic conductive material 122 (anisotropic conductive material) is disposed between the 106a and the bonding pad 118. This anisotropic conductive material 7 (Please read the precautions on the back before filling out this page) 丨 Install • ϋ ϋ 1 ϋ _li nn a 5J nnnnnn II · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 512500 A7 B7 5 1 8 1 twf.doc / 008 V. & Description 122 may be formed on the pads 118 of the wafer 110 in advance or on the surface of the transfer bump 106a. The anisotropic conductive material 122 includes an anisotropic conductive paste (ACP), which can be formed by screen printing. Please also refer to Figure 3A, which illustrates the application of another anisotropic conductive material. The anisotropic conductive material also includes an anisotropic conductive film 122a (anisotropic conductive film, ACF), which is formed by attaching. Please refer to FIG. 3B, which is an enlarged schematic diagram corresponding to the connection portion between the transfer bump and the pad in FIGS. 3 and 3A. According to the characteristics of the anisotropic conductive adhesive and the anisotropic conductive film, the area of the transfer bump 106a is squeezed, so that the conductive particles 124 (conductive particles) contained in the transfer bump 106a are in close proximity to form conduction; other areas are not Sufficient compression deformation does not form electrical conduction. However, the anisotropic conductive material 122 needs to be heated to cure it. Please refer to FIG. 4, and then remove the carrier layer 102, for example, by etching. As for the adhesive layer 104, it is selectively removed. If the adhesive layer 104 is a general insulating adhesive substance, it is directly removed by peeling or etching. If the adhesive layer 104 is also an anisotropic conductive material, it can be retained and used as a subsequent transfer bump 106a for connection to an external circuit (such as a printed circuit board). Referring to FIG. 5, a dicing process is performed, and the wafers 112 and 114 are separated along a scribe line 130 between the wafers 112 and 114 to form individual packaged wafers. Figure 5 shows that the adhesive layer 104 is not retained, and the anisotropic conductive adhesive is used as the solder pad 118 and the transfer bump 106a. 8 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm)- nn IIII ll ϋ ϋ I ϋ II al 1 ϋ n One-port 'I ϋ 1 ϋ I ϋ I · (Please read the precautions on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives 512500 5 1 8 ltwf.doc / 008 B7 V. Description of the invention (7 ο connected transfer bump package. (Please read the precautions on the back before filling out this page) Please refer to Figure 5A, which shows the figure corresponding to Figure 3A The transfer bump package uses an anisotropic conductive film 122a and the adhesive layer 104 has been peeled off. Please refer to FIG. 5B, which shows a transfer bump package corresponding to FIG. 4 without the adhesive layer 104 removed. If the adhesive layer has been removed, the transfer bump can be directly connected to the external circuit by surface soldering technology (SMT). Please refer to FIGS. 6 to 11, which show a transfer bump according to a second preferred embodiment of the present invention. Cross-sectional view of the process of block packaging. In the present invention, the type of transfer bumps, In addition to the cube type, a step bump pad can also be formed. Please refer to FIG. 6 first. Similarly, the package of this embodiment is also mainly constructed on a thin metal substrate 200. The thin metal substrate 200 is mainly composed of a carrier layer 202 and a thin metal layer 206. The thin metal layer 206 is formed on one side of the carrier layer 202 by an adhesive layer 204. The material of the carrier layer 202 is copper or other materials. Metals, even non-metals, have a thickness of about 100-150 microns (4-5 mils); thin metal layers 206, such as copper foil, have a thickness of about 5-10 microns. Employees, Bureau of Intellectual Property, Ministry of Economic Affairs Please refer to Figure 7 and Figure 7A for the printing of the consumer cooperative, which shows the top view corresponding to Figure 7. The definition of the thin metal layer 206, such as lithographic engraving, forms a plurality of step transfer protrusions. Block 208. Each step transfer bump 208 includes a protruding portion 210, a ball pad 214 (ball pad), and a connecting portion 212 (Connectin) portion connecting the protruding portion 210 and the solder ball pad 214. Due to the thin metal layer The thickness of 206 is extremely thin, so the step transfer formed Both the line width and pitch of block 208 can be reduced, and the density is higher to facilitate wafer-level packaging. 9 This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) 512500 A7 B7 5 181 twf. doc / 008 V. Description of the invention) (Please read the precautions on the back before filling this page) Please refer to Figure 8 'and then perform a thickness reduction process to transfer the solder ball pad 214 and the connection portion 212 in the step 208 The thickness is reduced so that the thickness difference T between the protrusion 210 and the solder ball pad 214 and the connection portion 212 is about 2-3 microns. The method of reducing the thickness may be a method of semi-etching), using a photoresist to cover the ridge protrusion 21 and touching the solder ball pad 214 and the connection portion 212. Alternatively, by using a coin method, the solder ball pad 214 and the connection portion 212 are punched to reduce the deformation thickness. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Please refer to FIG. 9. The wafer 220 is composed of a plurality of wafers 222 and 224 and has an active surface 226. The active surface 226 has a plurality of bonding pads 228, which serve as external contacts for the internal circuits of the wafers 222 and 224. A protective layer 230 (passivation) covers the active surface 226, exposing only a portion of the bonding pads 228 to protect the wafer 222 , 224. Next, the entire thin metal substrate 200, including the step transfer bumps 208 and the carrier layer 202, is disposed on the active surface 226 of the wafer 220, and the protrusions 210 in each step transfer bump 208 are respectively aligned with the pads 228. An anisotropic conductive material 232 is disposed between the protruding portion 210 and the pad 228 of the step transfer bump 208. The anisotropic conductive material 232 may be formed on the pads 228 of the wafer 220 in advance, or may be formed on the surface of the step transfer bump 208 in advance. Similarly, the anisotropic conductive material 232 includes an anisotropic conductive adhesive, which can be formed by screen printing. The anisotropic conductive material also includes an anisotropic conductive film, which is formed by attaching. In this embodiment, an anisotropic conductive film is taken as an example, and other applications are similar to the foregoing embodiments, and details are not described herein again. Subsequently, the anisotropic conductive material 232 needs to be heated to cure it. Please refer to Figure 10, and then remove the carrier layer 202. For example, the Chinese National Standard (CNS) A4 specification (210 X 297 mm) is applied to the dimensions of this paper. 512500 5 181 twf. Doc / 00 8 A7 B7 Intellectual property of the Ministry of Economic Affairs Printed by the Bureau's Consumer Cooperatives 5. Method of Invention Note (t) is removed. As for the adhesive layer 204, as in the previous embodiment, for selective removal, in this embodiment, the adhesive layer 204 is used as an example of an anisotropic conductive material, and it can be retained as a subsequent step transfer bump 208 to an external circuit (such as Printed circuit board) connection. Please continue to refer to FIG. 11 to perform a dicing process, and separate the wafers 222 and 224 along the cutting line 234 between the wafers 222 and 224 to form individual packaged wafers. Please refer to FIG. 12, which illustrates another application of the transfer bump package of the present invention. In this embodiment, the step transfer bump 208 may use an anisotropic conductive adhesive or an anisotropic conductive film to form a subsequent connection with an external circuit, or may be joined by other methods. Taking the structure shown in FIG. 12 as an example, for a transfer bump package in which the adhesive layer 204 has been stripped, a solder mask 236 (solder mask) can be further coated on the surface of the step transfer bump 208 and It is filled between the step transfer bumps 208, and only the surface of the solder ball pad 214 is exposed. In addition to protecting the surface of the step transfer bump 208 from oxidation, this layer of solder cover 236 can also limit the subsequent solder flow range and improve reliability. After the solder mask 236 is applied, the transfer bump package can be directly subjected to a surface soldering process (SMT) and connected to an external circuit. It is even possible to plant solder balls 238 on the solder ball pads 214 as the external contacts of the package to form a ball grid array (BGA) type. In summary, the present invention has at least the following advantages: 1. The present invention uses a thin metal layer to form a transfer bump as a carrier, which can obtain a smaller line width and pitch, and improve packaging density. 2. The transfer bump packaging process of the present invention is suitable for wafer-level packaging, (please read the precautions on the back before filling this page). Binding 丨 丨 丨 丨 丨 丨 This paper size applies to China National Standards (CNS) A4 specification (210 X 297 mm) 512500 5 181twf.doc / 008 A7 B7 V. Description of the invention ([ύ) can obtain higher density packaging, simplify the packaging process, and reduce manufacturing costs. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling out this page). Installed _ n 1 · emmf eamm ， me— ammmm mmmmmm Mam§ emmmm BB1 I i Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economy 12 This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm)