TW509840B - Method of checking EEPROM data with an embedded CRC - Google Patents
Method of checking EEPROM data with an embedded CRC Download PDFInfo
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- TW509840B TW509840B TW90115201A TW90115201A TW509840B TW 509840 B TW509840 B TW 509840B TW 90115201 A TW90115201 A TW 90115201A TW 90115201 A TW90115201 A TW 90115201A TW 509840 B TW509840 B TW 509840B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
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Abstract
Description
509840 A7 B7 五、發明説明(丨 ) 本發明為有關電腦記憶體。更特別的是,本發明為有關 用以檢查儲存在電可抹除可程式唯讀記憶體(EEPROM)内之 完整資料。 CRC已經成為多年來電腦工業完整的一部份,實際的演 算法在網際網路上是完全免費的。簡要介紹循環冗餘核對 (CRC)已經由加州8&111(^八0 1;8公司之111^118(:〇«先生所撰 寫,他的技術筆記 99_11 可在 http://www.acius.com/ACIDOC/CMU/ CMU79909.HTM網頁上找到。另一篇介紹由Eric-Paul先生所 寫,可在 http://utopia.knoware.nl/users/eprebel/Communication/CRC/網 頁上找到。然而,最好的對CRC作一般介紹的是由Rocksoft Pty公司之Ross Williams先生所撰寫,篇名稱為“ CRC錯誤偵測 演算法之無痛苦指導”,可在 ftp://ftp.rocksoft.com/dients/rocksoft/ papers/rcr_v3.txt網頁上找到,所有的文章一併都在此後作為 參考。 現存各種方法以便計算二位元資料之檢查數,以便能看 到例如在經由通訊頻道送出後,假如資料不改變的話。循 環冗餘核對(CRC)是一種通用的方法,用以保護二位元資 料。在過去,不同的CRC存在導致naming架構。 CRC產生器可如同圖1中硬體的一部份,指定的產生器多 項式為g(x)=x16+x12+x5+xG而初始設定為OxFFFF,例如,在與 CRC最重要位元x〇r之後,二位元資料之每個位元(b)移位 進入CRC暫存器中。產生器的這部份確保CRC的循環部分, X0R結果也***至CRC位元5與12之中。在處理位元b的過 -4 - 本紙張尺度適用中國國家檩準(CNS) A4規格(210X297公釐) 509840 A7 B7 五、發明説明(2 ) 程裡,所有目前的CRC位元(修改過的或未修改過的)向左 移動一個位置。假如必須進行處理一個位元組,所有8個 位元必須一個接著一個處理,最重要位元首先處理。 其他人可在軟體中建立CRC產生器,也就是與硬體相類 似的。此解決方案分別地處理每俩位元,使用C程式語 言,程式碼可為: unsigned short crc = OxFFFF ; unsigned short temp ; unsigned char byte = 0x5A ; "just as an example unsigned short index ; for (index = 0 ; index <= 7 ; index++) { temp = (crc » 15)A(byte » 7); crc «= 1 ; if (temp) { crc Λ= 0x1021 ; } byte «= 1 ; } 首先,計算b與cl5(循環值)X0R,然後CRC位元向左移位 (cO變成0),循環值必須在cO、c5與cl2中處理。假如循環 值等於1,位元c 0、c 5與cl2在同一時間經由以值0001 0000 -5 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 509840 A7 B7 五、發明説明(3 ) 0010 0001 (0x1021)執行XOR CRC。假如循環值等於0,CRC應該 以值 0000 0000 0000 0000執行 XOR。以 0x0000執行 XOR CRC並未 改變CRC,且因此而忽略。最後,下一個將要處理的位元 準備完成。 唯讀記憶體( ROM)是一種内容無法改變之記憶體簡單的 種類,即使發生電力損耗。在製造期間内容便已經程式化 過,並在這之後無法變更。唯讀記憶體用於非常高用量控 制應用上,其中簡單而低單位成本是關鍵的,而單位成本 是來自於在記憶體晶片中大量製造程式。 其他一般非揮發性記憶體有PROMs、EPROMs、 EEPROMs 〇可程式唯讀記憶體(PROM)可由使用者經由一不 可逆轉的程序而程式化;一旦寫入,可程式唯讀記憶體便 不能改變。可抹除可程式唯讀記憶體(EPROM)允許經由暴 露於強烈紫外線燈光下可徹底改變。電可抹除可程式唯讀 記憶體(EEPROM)是可改變的,經由使用較大的電流以便重 新設定内部記憶體細胞格。可抹除可程式唯讀記憶體 (EPROM)與電可抹除可程式唯讀記憶體(EEPROM)是非常有 用的,因為它們可以保留電力損耗的殘存;然而,它們能 夠在一段有限的時間裡只用非常慢的速度重新程式化(寫 入)。電可抹除可程式唯讀記憶體的進一步地討論可在 William D· Brown與 Joe E. Brewer(IEEE Press,Piscataway,NJ,1998) “ 非 揮發性半導體記憶體技術,了解與使用NVSM裝置之综合指 導,,第 37-39, 42-47, 67, 115-120, 129-133, 192-193, 309以及 352頁之中 找到,以上都在此後作為參考。 -6 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)509840 A7 B7 V. Description of the Invention (丨) The present invention relates to computer memory. More specifically, the present invention relates to checking the complete data stored in electrically erasable and programmable read only memory (EEPROM). CRC has been a complete part of the computer industry for many years. The actual algorithm is completely free on the Internet. A brief introduction to the cyclic redundancy check (CRC) has been written by California 8 & 111 (^ 80 0 1; 8 company 111 ^ 118 (: 〇 «), his technical note 99_11 is available at http: //www.acius. com / ACIDOC / CMU / CMU79909.HTM webpage. Another introduction, written by Mr. Eric-Paul, can be found at http://utopia.knoware.nl/users/eprebel/Communication/CRC/ webpage. However The best general introduction to CRC is written by Mr. Ross Williams of Rocksoft Pty Company. The title is "Painless Guide to CRC Error Detection Algorithm", available at ftp://ftp.rocksoft.com/ Found on the dients / rocksoft / papers / rcr_v3.txt webpage, all articles are hereby incorporated by reference. Various methods exist to calculate the check of two-digit data so that you can see, for example, after sending it through a communication channel, if If the data does not change. Cyclic redundancy check (CRC) is a general method to protect binary data. In the past, the existence of different CRCs led to the naming architecture. The CRC generator can be like a part of the hardware in Figure 1. Part, the specified generator polynomial is g (x) = x16 + x12 + x5 + xG and the initial setting is OxFFFF. For example, after the most significant bit xCRC with the CRC, each bit (b) of the two-bit data is shifted into the CRC register. Generator This part ensures the cyclic part of the CRC, and the X0R result is also inserted into the CRC bits 5 and 12. In the processing bit b is over -4-This paper size applies to China National Standard (CNS) A4 specifications (210X297) (Centi) 509840 A7 B7 5. In the description of the invention (2), all current CRC bits (modified or unmodified) are shifted to the left by one position. If a byte group must be processed, all 8 bits The elements must be processed one after the other, the most important bits being processed first. Others can create CRC generators in software, which is similar to hardware. This solution processes each two bits separately, using the C programming language, The code can be: unsigned short crc = OxFFFF; unsigned short temp; unsigned char byte = 0x5A; " just as an example unsigned short index; for (index = 0; index < = 7; index ++) {temp = (crc »15) A (byte» 7); crc «= 1; i f (temp) {crc Λ = 0x1021;} byte «= 1;} First, calculate b and cl5 (cycle value) X0R, and then shift the CRC bit to the left (cO becomes 0), the cycle value must be at cO, c5 Handle with cl2. If the circulation value is equal to 1, bits c 0, c 5 and cl2 pass the value 0001 0000 -5 at the same time-this paper size applies Chinese National Standard (CNS) A4 specification (210X 297 mm) 509840 A7 B7 V. Invention Explanation (3) 0010 0001 (0x1021) performs XOR CRC. If the loop value is equal to 0, the CRC should perform XOR with the value 0000 0000 0000 0000. Executing the XOR CRC at 0x0000 does not change the CRC and is therefore ignored. Finally, the next bit to be processed is ready. Read-only memory (ROM) is a simple type of memory whose contents cannot be changed, even if power is lost. The content is programmed during manufacturing and cannot be changed after that. Read-only memory is used for very high-volume control applications, where simplicity and low unit cost are key, and unit cost comes from a large number of manufacturing programs in the memory chip. Other general non-volatile memories are PROMs, EPROMs, and EEPROMs. Programmable read-only memory (PROM) can be programmed by the user through an irreversible process; once written, programmable read-only memory cannot be changed. Erasable Programmable Read-Only Memory (EPROM) allows for radical changes through exposure to strong UV light. Electrically erasable and programmable read-only memory (EEPROM) can be changed by using a larger current to reset the internal memory cells. Erasable Programmable Read-Only Memory (EPROM) and Electrically Erasable Programmable Read-Only Memory (EEPROM) are very useful because they can retain the residual power loss; however, they can be used for a limited period of time Reprogramming (writing) only at a very slow speed. Further discussion of electrically erasable programmable read-only memory can be found in William D. Brown and Joe E. Brewer (IEEE Press, Piscataway, NJ, 1998) "Nonvolatile semiconductor memory technology, understanding and using NVSM devices General guidance, pages 37-39, 42-47, 67, 115-120, 129-133, 192-193, 309, and 352, all of which are hereafter used as reference. -6-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
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五、發明説明(4 ^池中或是低電池力環境中之電可抹除可程式唯讀記 ,的操作,不明確地歸因於缺乏對程式化高電壓的良好 4制因此’錯誤窝人的機會遠大於良好控制的環境。了 解儲存的貝料疋否錯誤是令人期待的,因此也就是說,一 種用以確保儲存於可程式唯讀記憶體中之資料完整性之方 法與裝置之技藝中的需求。 本發明經由提供至少-個連接至兩組方塊之保持鎖存 裔’以解決前述技藝中之問題。第一組方塊包括資料,第 -組万塊包括關於第—組方塊中的資料之循環冗餘核對資 釩、。一旦從第一組資料方塊讀取資料,來自相關的CRC方 塊之CRC貝釩也同樣讀取。讀取的資料應用於crc演算法, 以便產生目前的(:11(::值。所讀取的資料應用於crc演算法, 以便產生目前的CRC值。目前的CRC值與從相關的crc方塊 獲得的CRC、訊作比較,假如此兩者CRC值為相同,資料视 為有效。否則,資料則為無效。依據此結論,發出適♦的 信號。 ^ 其他與進一步的主題、特色和優點可從以下本發明目前 的較佳具體實施例得到,這些實施例是為了揭露的目的而 公開,並與附圖一起參考。 圖1圖示出前述技藝之CRC硬體; 圖2為本發明之資料方塊與CRC方塊之架構圖; 圖3為本發明產生CRC值的方法之流程圖; 圖4為根據本發明寫入可證明的資訊之方法之流程圖; 以及 , 本紙張尺賴中國國冢料(CNS) A4«^i^i_97公釐) 五、發明説明(5 圖5為根據本發明讀取可證明的資訊之方法之流程圖。 本發明應用至可程式唯讀記憶體、可抹除可程式唯讀記 憶體’以及電可抹除可程式唯讀記憶體。然而,本發明可 使用於任何記憶體種類,其中包含在記憶體内的資料是否 如同當它在寫入時,或是在寫入時間與讀取時間之間資科 是否為錯誤,是令人期待想知道的。 1寫入的可程式唯讀記憶體基礎RFID標鑛^ 離範例 反分離問顯: 反分離指的是在操作的中段過程中,分離電裝置與其電 力來源的動作。此問題特別強調的是由智慧卡或其他儲存 裝置之金融上或是安全上的處理,其中有關的帳戶資料儲 存於卡上而非中央資料庫之中。由ATM卡所操作的銀行帳 戶資料儲存於銀行資料庫之中,而非在ATM卡上。在這個 例子中應該沒有反分離問題,因為在ATM卡上並無資料改 變0 假如所擁有的並非是中央資料庫而是遠端儲存資料庫, 則某些用來放置以確認資料之安全防護從資料庫正確地接 收與寫入。這些安全防護用來察覺環境條件,而這些環境 條件發生在執行期間以及在執行之間。假如智慧卡放置在 皮包或是車子的左邊,將會遭遇擠壓、扭曲、溫度、震 動、以及濕度等因素,包含在智慧卡裡所有整合的資料在 這些壓力下無法假設其為正確。 本發明應用CRC保護,因此以下的内容排序可決定儲存 -8-V. Description of the invention (4) The operation of erasing the programmable read-only memory in the pool or in a low-battery environment is not clearly attributed to the lack of a good 4 system for stylized high voltage. Human opportunities far outweigh a well-controlled environment. It is desirable to know whether stored materials are erroneous, so that is to say, a method and device to ensure the integrity of data stored in programmable read-only memory The need in the art. The present invention solves the problems in the foregoing art by providing at least one holding latch that is connected to two sets of blocks. The first set of blocks includes information, and the first block includes information about the first set of blocks. The cyclic redundancy check of the data in the Vanadium. Once the data is read from the first set of data blocks, the CRC from the relevant CRC block is also read. The read data is applied to the crc algorithm to generate the current (: 11 (:: value. The read data is applied to the crc algorithm in order to generate the current CRC value. The current CRC value is compared with the CRC and information obtained from the relevant crc block, if so the two CRC Value At the same time, the information is considered valid. Otherwise, the information is invalid. Based on this conclusion, appropriate signals are sent. ^ Other and further topics, features and advantages can be obtained from the following presently preferred embodiments of the present invention, these implementations The example is disclosed for the purpose of disclosure and is referred to with the accompanying drawings. Fig. 1 illustrates the CRC hardware of the aforementioned technique; Fig. 2 is a structural diagram of a data block and a CRC block of the present invention; and Fig. 3 is a CRC generated by the present invention. Flow chart of the method of value; Figure 4 is a flow chart of the method of writing provable information according to the present invention; and, this paper rule is based on China National Tomb Material (CNS) A4 «^ i ^ i_97 mm) V. Invention (5 FIG. 5 is a flowchart of a method for reading provable information according to the present invention. The present invention is applied to a programmable read-only memory, a programmable read-only memory that can be erased, and an electrically erasable programmable read-only memory. Read memory. However, the present invention can be applied to any kind of memory, whether the data contained in the memory is as it is when writing, or whether the asset is wrong between the time of writing and the time of reading Is People are looking forward to knowing. 1Writable programmable read-only memory based RFID tag ^ Anti-separation example of anti-separation: Anti-separation refers to the action of separating the electrical device and its power source during the middle of the operation. This The problem is particularly emphasized by the financial or security processing of smart cards or other storage devices, in which the relevant account data is stored on the card rather than in a central database. The bank account data operated by the ATM card is stored in The bank database, not the ATM card. In this example, there should be no anti-separation problem, because there is no data change on the ATM card. 0 If you have not a central database but a remote storage database, Certain security protections are placed to confirm that the data is correctly received and written from the database. These security protections are used to detect environmental conditions that occur during and between executions. If the smart card is placed on the left side of the bag or the car, it will experience compression, distortion, temperature, vibration, and humidity. All the integrated information contained in the smart card cannot be assumed to be correct under these pressures. The present invention applies CRC protection, so the following content ordering can determine storage -8-
A7 ---------- B7 五、發明説- 貝料疋否與一開始寫入時相同,或是已經有所改變。此觀 心廣泛地為磁碟驅動磁軌所應用,雖然並未被可程式唯讀 圮憶體所採納,直到本發明的出現。 唯讀記憧艚的遥作: 電可抹除可程式唯讀記憶體狀態(0或丨)經由在一段時間 應用南電壓而改變。在薄介質上之高電壓引起少量電荷穿 越薄氧化物,當足夠的電荷通過氧化物時,在電可抹除可 程式唯讀記憶體浮動閘門上之結果電壓電荷將使得數位資 料狀態改變。經由翻轉資料儲存格與讀取資料儲存格電 流’從電可抹除可程式唯讀記憶體讀取出資料狀態。當閘 門上之正電荷引起電流時,在η頻遒資料儲存格浮動閘門 上<負電荷將使得沒有電流流動。在資料從〇到丨改變或是 從1到〇,在此點上是蠻隨機的,並且乃是根據感應放大器 測量所得到的電流門檻值。 電可抹除可程式唯讀記憶體的另一方面為其資料的保 留。電荷只能在有限的時間保留在浮動閘門上,雖然這已 經有百年了。4了此原因,我們不想在電可抹除可程式唯 讀記憶體開始讀取正確值之第一時間停止程式化資料儲存 格,因為在稍後的時間部分資料儲存格可能轉換其狀態。 經由高溫加速電荷的損耗以及當然地,每個資料儲存=具 有不同的電荷損耗傾向。舉例如何程式化電可抹除可程式 唯讀記憶體,確保電可抹除可程式唯讀記憶體能妥善 式化,以便稍後的電荷損耗不會使得資料無效是令二人: 的。假如無法保證-個堅固的程式循環,則在稍後的=A7 ---------- B7 Fifth, the invention said-whether the material is the same as the original writing, or has been changed. This concept was widely used by disk drive tracks, although it was not adopted by programmable read-only memory until the invention. Remote operation of read-only memory: Electrically erasable programmable read-only memory state (0 or 丨) is changed by applying a south voltage over a period of time. The high voltage on the thin medium causes a small amount of charge to pass through the thin oxide. When enough charge passes through the oxide, the resulting voltage charge on the electrically erasable programmable read-only memory floating gate will cause the state of the digital data to change. By flipping the data cell and reading the data cell current ’, the data state is read from the electrically erasable and programmable read-only memory. When a positive charge on the gate causes a current, < negative charge on the floating gate of the n-frequency data cell will cause no current to flow. The data changes from 0 to 丨 or from 1 to 0, which is quite random at this point, and it is based on the current threshold value measured by the sense amplifier. Another aspect of electrically erasable programmable read-only memory is the retention of its data. Charges can only remain on floating gates for a limited time, although this has been the case for hundreds of years. For this reason, we do not want to stop programming the data cell as soon as the electrically erasable programmable read-only memory starts to read the correct value, because some data cells may change their state at a later time. Accelerated charge loss through high temperature and, of course, each data store = has a different charge loss tendency. For example, how to program the electrically erasable and programmable read-only memory to ensure that the electrically erasable and programmable read-only memory can be properly formatted so that the later charge loss will not invalidate the data. If a robust program loop cannot be guaranteed, then =
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過程強調的是有關電壓檢查架構上的另一不確定:如 知高電壓水準與時間好得足以提供給特殊儲存格成功的程 式?由於流程的變動,電可抹除可程式唯讀記憶體甚至從 位元到位元發生變動’真實地了解其唯—的方法便是讀取 此後的資料。在智慧卡整合電路上這已經是已知的問題一 當面電壓好得足以提供程式化時此類決定的問題。本發明 的安全防護之-為在程式運作後,RF標籤在程式化之後馬 上返回讀取電可抹除可程式唯讀記憶體内容。假如訊問者 並未在交易時間取回正確的資料,則警報響起提醒人們交 易並未正確地發生。對於立即的檢查這是好的,但如何確 認稍後的資料讀取方法與目前寫入的方法是相同的?此問 題可由本發明解決。 請參考附圖。在本發明中,描述記憶體一如每個方塊具 有資料區段以及相關的CRC區段,如圖2所示。本發明的較 佳具體實施例為電可抹除可程式唯讀記憶體,在其他具體 實施例中雖然可能有其他類型記憶體,卻是在不達背申請 專利總結範圍與精神下。每個資料方塊(2 2,2 4,2 6,· 2 8)具有相關的(^〇:方塊(3 2,3 453 6,.38分別相對地)。 同時,描述也閉鎖了閂門,此閂門閉鎖了即將寫入至記憶 體中之資料。這些閂門只是為了關閉即將寫入的資料,且 並非是本發明恰當的方法。對本發明而言,任何閃門或是 其同類物都是可用的。 CRC值的產生如圖3所示,首先,經由CRC計算器4 2送出 資料40,其中CRC計算器並依序地產生CRC值44。在較佳 __— _-11 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 509840 A7 B7 五、發明説明(9 ) 裝 具體實施例中,CRC方塊將包括在寫入指令送至裝置期間 所計算出的CRC值,如此一來,每次資料方塊寫入,CRC計 算器在指令送出期間將計算出CRC值,並且當程式化實際 地發生時,CRC與資料方塊一同程式化至CRC方塊之中。此 指令通常包括方塊資料與方塊位址,因此資料方塊的相關 CRC值將包括有關在其自身方塊中之資料,以及方塊位址 的資訊。 寫入操作將牽涉到送出指令到裝置上,當CRC產生器42 在指令期間計算CRC值4 4時,此裝置放置即將寫入保持鎖 存器1 2之資料。請注意,即將算出的CRC值44是完整的寫 入指令的一部份,完整的寫入指令傳統上包括:寫入op 碼、記憶體位址以及記憶體資料。在指令(包括資料與方 塊位址)與傳送用之檢查CRC—起送出後,假如最後結果 CRC符合檢查CRC,則與方塊資料一起載入最後結果CRC至 一或多個保持鎖存器之中。在此同時,完整的保持鎖存器 資料(資料加上CRC值)寫入至電可抹除可程式唯讀記憶 體。 特定的寫入操作如圖4所示。首先,即將寫入至電可抹 除可程式唯讀記憶體中之資料在步驟404中提供。接下來在 步騾406中使用所提供的資料計算出CRC值。在此之後,步 驟408資料寫入至電可抹除可程式唯讀記憶體上之資料方塊 的資料區段。最後,在步騾410中CRC值寫入至資料方塊的 CRC區段,而流程結束於步騾412。 當讀取資料方塊時,也同時讀取資料方塊以及相關的 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 509840 A7 B7 五、發明説明(1() CRC方塊。讀取的子系統必須計算什麼必須在crc方塊中, 並決定CRC是否正確。因此,為了通過讀取流程,讀取器 子系統· 1)發出讀取指令;2 )從記憶體讀取資料方塊,包 括一般資料以及CRC值;3)針對即將寫入剛剛讀取的資料 之寫入指令而計算CRC值;4)使用比較器一同比較所計算 的CRC以及讀取記憶體之€11(:值。比較器是技藝中一已知簡 單%路所組成,而比較的是兩個最後大小的資料,比較器 僅推斷兩者資料是否相同。來自比較器的信號可用來當作 信號通知其他資料是否正確或錯誤之電路。 俶如目前計算的CRC值(依據所讀取的資料)並不符合從 記憶體讀取之CRC值,則會有以下情形發生:1}在資料方 塊中之資料已經改變;2)儲存於CRC方塊中之CRC值已經改 變;或是3)裝置將資料寫入至錯誤的方塊。在任何情況 下,資料被認為是錯誤的並發出適當的信號。例如,假如 貧料被認為是正確的,則發出正確的信號,否則發出錯誤 的信號。另一方面,僅當資料被認為是正確時,才會發出 單一仏號。在此狀況中電路必須注意信號,並且假如沒有 到來’則視同資料為錯誤的而因此處理。在另一具體實施 例中,僅當資料是錯誤時才可能發出。在此狀況中電路必 須注意信號,並且假如到來時,則視同資料為錯誤的而因 此處理。 本發明的讀取操作如圖5所示。特別地,在步驟5〇4開始 操作,其中資料是從電可抹除可程式唯讀記憶體資料方塊 上之資料區段讀取出來。接下來在步騾506中,從資料方塊 -13- 509840 A7 B7The process emphasizes another uncertainty about the structure of the voltage check: How do you know that the high voltage level and time are good enough to provide a successful procedure for a particular cell? Due to the changes in the process, the electrically erasable programmable read-only memory even changes from bit to bit. The only way to truly understand its uniqueness is to read the data afterwards. This is already a known issue on smart card integration circuits-the issue of such decisions when the face voltage is good enough to provide programming. The safety protection of the present invention is that after the program is operated, the RF tag is read back on the horse after the programming, and the contents of the programmable read-only memory can be erased. If the interrogator does not retrieve the correct information during the transaction time, an alarm sounds to remind people that the transaction did not occur correctly. This is fine for an immediate check, but how do you make sure that the later data read method is the same as the current write method? This problem can be solved by the present invention. Please refer to the drawings. In the present invention, the description memory, like each block, has a data section and an associated CRC section, as shown in FIG. 2. The preferred embodiment of the present invention is electrically erasable and programmable read-only memory. Although other types of memory may be available in other embodiments, it is within the scope and spirit of the patent summary. Each data block (2 2, 2 4, 2 6, 2 8) has a correlation (^ 〇: block (3 2, 3 453 6, .38 respectively). At the same time, the description also locks the latch door, The latches lock the data that is about to be written into the memory. These latches are only for closing the data that are about to be written, and are not a proper method of the present invention. For the present invention, any flash door or its equivalent is It is available. The generation of the CRC value is shown in Figure 3. First, the data 40 is sent via the CRC calculator 42, and the CRC calculator sequentially generates the CRC value 44. In the better __— _-11-this The paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 509840 A7 B7 V. Description of the invention (9) In the specific embodiment, the CRC block will include the CRC calculated during the writing instruction sent to the device Value, in this way, each time a data block is written, the CRC calculator will calculate the CRC value during the sending of the instruction, and when the programming actually takes place, the CRC is programmed into the CRC box with the data block. This instruction Usually includes box data and box addresses, so the data box ’s The relevant CRC value will include information about its own block and the address of the block. The write operation will involve sending the instruction to the device. When the CRC generator 42 calculates the CRC value 4 4 during the instruction, this device Place the data to be written into the holding latch 12. Please note that the CRC value 44 to be calculated is part of the complete write instruction. The complete write instruction traditionally includes: write op code, memory address And memory data. After the command (including data and block address) and the check CRC for transmission are sent out, if the final result CRC matches the check CRC, the final result CRC is loaded with the block data to one or more holds. At the same time, the complete holding latch data (data plus CRC value) is written into the electrically erasable programmable read-only memory. The specific write operation is shown in Figure 4. First The data to be written to the electrically erasable and programmable read-only memory is provided in step 404. Next, the CRC value is calculated using the provided data in step 406. After that, the data is written in step 408 To electricity Erase the data section of the data block on the programmable read-only memory. Finally, the CRC value is written to the CRC section of the data block in step 410, and the flow ends at step 412. When the data block is read , And also read the data box and related -12- This paper size applies Chinese National Standard (CNS) A4 specifications (210X297 mm) 509840 A7 B7 V. Description of the invention (1 () CRC box. The subsystem must be read Calculate what must be in the crc block and determine whether the CRC is correct. Therefore, in order to pass the reading process, the reader subsystem · 1) issues a read instruction; 2) reads the data block from memory, including general data and CRC 3) Calculate the CRC value for the write instruction that is about to write the data just read; 4) Use the comparator to compare the calculated CRC with the € 11 (: value of the read memory. The comparator consists of a known simple method in the art, and compares the two data of the last size. The comparator only infers whether the data of the two are the same. The signal from the comparator can be used as a signal to inform other circuits whether the data is correct or incorrect.俶 If the currently calculated CRC value (based on the data read) does not match the CRC value read from the memory, the following situations will occur: 1) the data in the data box has changed; 2) stored in the CRC The CRC value in the box has changed; or 3) The device writes data to the wrong box. In any case, the information is considered incorrect and the appropriate signal is given. For example, if lean material is considered to be correct, the correct signal is sent, otherwise the wrong signal is sent. On the other hand, a single 仏 is issued only when the information is considered correct. In this case, the circuit must pay attention to the signal, and if it does not arrive ', it is treated as if the data is wrong. In another embodiment, it is possible to issue only when the information is wrong. The circuit must pay attention to the signal in this situation, and if it arrives, it is treated as if the data is wrong. The reading operation of the present invention is shown in FIG. 5. Specifically, the operation is started at step 504, where the data is read from the data section on the data block of the electrically erasable programmable read-only memory. Next in step 506, from the data box -13- 509840 A7 B7
之CRC區段讀取出CRC值,此值與先前讀取的資料方塊之資 料區段有關。從技藝中所述可了解,上述兩個讀取操作可 簡化為一個讀取操作,其中讀取單一資料流並分析資料元 素與CRC元素。在任何情況下,經由使用CRC計算器計算出 目前的CRC值,步驟508。在步驟510中,比較器用來比較目 如的CRC值(依據所讀取的資料)以便讀取CRC值(依據所寫 入的資料)。在步騾512中,決定兩者CRC值是否相同(也就 是資料是正確的)。假如測試為正(是)的,則執行步驟514 並發出正確的#號。否則,執行分支到步驟516,並發出錯 誤的信號而流程結束於步騾518。從技藝中所述可了解,在 不達背本發明的精神下,本發明交替的具體實施例只在正 確資料決定時(也就是CRC值為相同時)或只在錯誤資料決 定時(也就是CRC值為不同時)發出信號。 因此本發明非常適合執行本主體,並獲得最後的與所提 過的優點,以及其他的利益。當完成描繪、描述:發明 後,以及參考本發明特殊較佳具體實施例而定義後,這些 參考並不包含發明的限制,而且也沒有這樣的限制。本發 明允許在形式與/或功能上修改、更替、改變以及同等替 代物,如同在適當的技藝中發生在一般的技藝身上。本: 明所描繪與描述的較佳具體實施例是只有示範性,而且並 非是發明的全部範圍。因此本發明傾向於只限制在申請專 利總結之精神與範圍内,並在各方面對於同等替代物=著 充分的認知。 -14 - 本紙張尺度適财®目家標準(cSiTII規格(21GX 297公釐)—The CRC section reads the CRC value, which is related to the data section of the previously read data block. As can be understood from the art, the above two read operations can be reduced to one read operation, in which a single data stream is read and the data elements and CRC elements are analyzed. In any case, the current CRC value is calculated by using a CRC calculator, step 508. In step 510, the comparator is used to compare the target CRC value (based on the data read) to read the CRC value (based on the written data). In step 512, determine whether the CRC values are the same (that is, the data is correct). If the test is positive (YES), go to step 514 and issue the correct # sign. Otherwise, execution branches to step 516 and signals an error and the flow ends at step 518. It can be understood from the description of the art that, without departing from the spirit of the present invention, the specific alternate embodiment of the present invention is only when the correct data is determined (that is, when the CRC value is the same) or only when the wrong data is determined (that is, When the CRC value is different). Therefore, the present invention is very suitable for implementing the subject, and obtains the final and mentioned advantages, as well as other benefits. When the description and description of the invention are completed, and after being defined with reference to the specific preferred embodiments of the present invention, these references do not include the limitations of the invention, and there is no such limitation. The present invention allows modifications, substitutions, alterations and equivalent substitutions in form and / or function, as in the case of appropriate craftsmanship. The preferred embodiments depicted and described in this specification are exemplary only and are not the full scope of the invention. Therefore, the present invention tends to be limited to the spirit and scope of the summary of the patent application, and in all respects, it is fully aware of equivalent substitutes. -14-This paper size is suitable for financial and commercial standards (cSiTII specification (21GX 297 mm) —
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JP (1) | JP2004501466A (en) |
KR (1) | KR20020063159A (en) |
CN (1) | CN1436308A (en) |
AU (1) | AU2001273605A1 (en) |
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Cited By (3)
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TWI406289B (en) * | 2007-09-26 | 2013-08-21 | Toshiba Kk | Semiconductor memory device and its control method |
TWI410054B (en) * | 2005-09-21 | 2013-09-21 | Semiconductor Energy Lab | Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit |
TWI599904B (en) * | 2016-03-30 | 2017-09-21 | 緯創資通股份有限公司 | Electronic apparatus and data verification method using the same |
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US6938201B2 (en) * | 2002-09-05 | 2005-08-30 | Agilent Technologies, Inc. | Error detection system for a FIFO memory |
US7409623B2 (en) | 2004-11-04 | 2008-08-05 | Sigmatel, Inc. | System and method of reading non-volatile computer memory |
DE102006040644A1 (en) * | 2006-08-30 | 2008-03-13 | Robert Bosch Gmbh | Correction procedure for a reprogrammable microprocessor |
JP4564520B2 (en) | 2007-08-31 | 2010-10-20 | 株式会社東芝 | Semiconductor memory device and control method thereof |
CN101908976A (en) * | 2010-07-28 | 2010-12-08 | 新太科技股份有限公司 | Method for designing backup security policy for double-computer transaction file |
CN101963912A (en) * | 2010-10-12 | 2011-02-02 | 浪潮电子信息产业股份有限公司 | Implementation method for storing and checking hardware configuration information of system |
CN102025448B (en) * | 2010-11-18 | 2013-11-06 | 华为技术有限公司 | Common public radio interface service transmitting/receiving method and device |
CN102480333B (en) * | 2010-11-22 | 2014-08-13 | 华为技术有限公司 | Line coding method as well as synchronous processing method and device of coded data block |
FR2976697B1 (en) | 2011-06-17 | 2013-07-05 | Morpho | SECURE TRANSFER BETWEEN NON-VOLATILE MEMORY AND VOLATILE MEMORY |
CN102890657B (en) * | 2012-10-10 | 2016-04-27 | 深圳市航盛电子股份有限公司 | The method that the reading and writing data of a kind of EEPROM of minimizing is made mistakes |
CN105070321B (en) * | 2015-08-18 | 2019-03-08 | 珠海市一微半导体有限公司 | The quick test circuit and method of memory device |
CN106776362B (en) * | 2015-11-24 | 2019-12-03 | 中芯国际集成电路制造(上海)有限公司 | The control method and device of memory |
CN108828529B (en) * | 2018-06-25 | 2022-03-25 | 中国电子科技集团公司第三十八研究所 | Anti-irradiation wave control special integrated circuit |
CN109947590A (en) * | 2019-03-27 | 2019-06-28 | 奇瑞商用车(安徽)有限公司 | A kind of method of data redundancy verification in automobile electronic system |
CN114006678B (en) * | 2021-11-01 | 2024-04-19 | 合肥华控天芯科技有限公司 | Method for quickly acquiring source of received frame by FC-AE equipment |
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ATE298440T1 (en) * | 1998-01-19 | 2005-07-15 | Zebra Technologies Corp | ELECTRONIC IDENTIFICATION SYSTEM WITH TRANSMISSION ERROR CORRECTION SYSTEM |
US6237124B1 (en) * | 1998-03-16 | 2001-05-22 | Actel Corporation | Methods for errors checking the configuration SRAM and user assignable SRAM data in a field programmable gate array |
-
2001
- 2001-06-20 AU AU2001273605A patent/AU2001273605A1/en not_active Abandoned
- 2001-06-20 WO PCT/US2001/041063 patent/WO2001098872A2/en not_active Application Discontinuation
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI410054B (en) * | 2005-09-21 | 2013-09-21 | Semiconductor Energy Lab | Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit |
US8627170B2 (en) | 2005-09-21 | 2014-01-07 | Semiconductor Energy Laboratory Co., Ltd. | Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit |
US9009563B2 (en) | 2005-09-21 | 2015-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit |
US9294126B2 (en) | 2005-09-21 | 2016-03-22 | Semiconductor Energy Laboratory Co., Ltd. | Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit |
TWI406289B (en) * | 2007-09-26 | 2013-08-21 | Toshiba Kk | Semiconductor memory device and its control method |
TWI599904B (en) * | 2016-03-30 | 2017-09-21 | 緯創資通股份有限公司 | Electronic apparatus and data verification method using the same |
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CN1436308A (en) | 2003-08-13 |
WO2001098872A3 (en) | 2002-10-03 |
WO2001098872A2 (en) | 2001-12-27 |
JP2004501466A (en) | 2004-01-15 |
KR20020063159A (en) | 2002-08-01 |
EP1295140A2 (en) | 2003-03-26 |
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