TW455976B

TW455976B - Endpoint detection method of chemical mechanical polishing process

Info

Publication number: TW455976B
Application number: TW89116300A
Authority: TW
Inventors: Jen-Fa Lu; Jen-Peng Fan; Ruei-Ping Juang; Tian-Jen Hu
Original assignee: Taiwan Semiconductor Mfg
Priority date: 2000-08-11
Filing date: 2000-08-11
Publication date: 2001-09-21

Abstract

The present invention discloses a kind of endpoint detection method for chemical mechanical polishing (CMP) process. The invented method is suitable for use in the integrated circuit process that adopts the self-aligned contact having plural polysilicon layers. After the first polysilicon layer, the first inter-polysilicon dielectric layer, the second polysilicon layer, and the second inter-polysilicon dielectric layer are continually formed on a semiconductor substrate, the third polysilicon layer is formed. After a silicon nitride layer is formed on the third polysilicon layer, an inter-layer dielectric layer is formed and is followed by using the CMP method to perform a planarization treatment onto the inter-layer dielectric layer. The endpoint detection method for CMP process stated above uses a laser light beam to irradiate on the inter-layer dielectric layer and measure the intensity of the reflected light. The key point of the present invention is to find the derivative function through the intensity variations of reflected light versus time, and use the slope of derivative function versus time to establish the endpoint of CMP.

Description

456976 五、發明說明α) 技術領域：本發明係關於一種針對層間介電層進行化學機械研磨製程的方法，特別是關於一種化學機械研磨製程之終點的偵測方法。發明背景：最近幾年’各積體電路公司為降低營運成本以提高產品的競爭力’積體電路的集積密度（packing Density)快速增加。為了增加積體電路的集積密度，不但元件的尺寸必須縮小’元件與元件之間的距離也必須縮小。為了達到上述的目的’積艘電路的每一層都必須達到全面的平坦度 (Global Planarization)。近年來化學機械研磨技術 . (Chemical Mechanical Polishing; CMP)的快速發展，便是為了獲致全面平坦度的目的《甚至可以說，化學機械研磨技術的發展，是積體電路的集積密度得以快速增加的關鍵技術。首先請參考圖一，其顯示習知技藝中進行層間介電層之化學機械研磨製程的示意圖。首先利用習知標準的製程在一半導體基板10上形成淺渠溝隔離（Shallow Trench Isolation) 12，並因而定義出主動元件區。接著利用習知的製程.技術形成金氧半場效電晶體，其包含有閛極介電層 (Gate Dielectric)14、閘極導電層16、淡摻雜源極/汲極 (未顯示在圖上）、源極/没極1 8、氮化石夕間隙壁 (Sidewall Spacer)20、以及氮化矽頂蓋（Nitride456976 V. Description of the Invention α) Technical Field: The present invention relates to a method for performing a chemical mechanical polishing process on an interlayer dielectric layer, and more particularly to a method for detecting an end point of a chemical mechanical polishing process. BACKGROUND OF THE INVENTION: In recent years, 'the integrated circuit companies have reduced the operating costs to increase the competitiveness of their products', and the packing density of integrated circuits has increased rapidly. In order to increase the integration density of integrated circuits, not only the size of the components must be reduced, but also the distance between the components must be reduced. In order to achieve the above-mentioned goal, 'Each layer of the shipbuilding circuit must achieve global planarity (Global Planarization). In recent years, the rapid development of chemical mechanical polishing technology (Chemical Mechanical Polishing; CMP) is for the purpose of achieving comprehensive flatness. "It can even be said that the development of chemical mechanical polishing technology is the increase in the density of integrated circuits. Key technologies. Please refer to FIG. 1 first, which shows a schematic diagram of a chemical mechanical polishing process for performing an interlayer dielectric layer in a conventional technique. First, a conventional standard process is used to form Shallow Trench Isolation 12 on a semiconductor substrate 10, and an active device region is thus defined. Next, a conventional metal oxide field-effect transistor is formed using a conventional manufacturing process. It includes a gate dielectric layer (Gate Dielectric) 14, a gate conductive layer 16, and a lightly doped source / drain (not shown in the figure). ), Source / nonpolar 1 8, side wall spacer (Sidewall Spacer) 20, and silicon nitride top cover (Nitride

465916 五'發明說明（2)465916 Five 'invention description (2)

Cap) 22。其中閘極導電層16係針及離子蝕刻技術所形成。形达複日日夕層進仃微影 X 形成所述氮化矽間隙壁2(1¾ § a 矽頂蓋2 2的作用，係做為接嬙„ ^ U和亂化 1又场後續開啟自動對準接觸窗Cap) 22. The gate conductive layer 16 is formed by needles and ion etching technology. The shape of the lithography X day and night layer X forms the silicon nitride spacer 2 (1¾ § a silicon top cover 2 2), which acts as a connection ^ ^ U and chaos 1 and then open the automatic alignment Quasi-contact window

(Self-aligned Contacts a 57 3T ^ ^ ^ W ^ act)之非卓向性蝕刻製程的蝕刻故點，其厚度約為600埃。在形忐笛 ★ s ^ 仕办成笫一複晶石夕層間介雷層2 cj 之後，沉積一層複晶矽層，並藉由 _ 椅由微影及#刻技術形志窠一複晶石夕層2 4。接下來在形成第-曰弟一複日日石夕層間介電層2 6之沉積-層複晶石夕層，並藉由微影及钱刻技術形成第三曰晶矽層2 8。其中所述第-複晶續層間介電層2 3和第二複 =矽層間介電層2 6之厚度的總和約為3 5 〇〇埃。接下來形成間介電層3 0，並利用化學機械研磨法進行平垣化處理。所述化學機械研磨製程中，需要將原先厚度為13〇⑽埃 $層間介電層30研磨至約9 7 0 0埃，因此需要利用研磨終點貞測法（endp〇int detect ion)來控制研磨的終點，以防研磨不足或研磨過量。所述終點偵測法是以一雷射光束照射 $ =述層間介電層30上’並量測其反射光的強度。反射光 ♦者所剩餘層間介電層30薄膜之厚度的不同而有不同的干 =致應因而有不同的光強度。利用正規化之光強度為縱 ’以.時間為橫韩’利用光強度隨時間變化的斜率便可分 2出薄膜之厚度，因此便可據以進行化學機械研磨終點的惟，如圖一所示’因為形成自動對準接觸窗的緣故，間極上方的氮化矽間隙壁2 0和氮化矽頂蓋2 2形成如圖一欠圓贩狀’此圓旅狀的氮化矽層會影響自動對準接觸窗(Self-aligned Contacts a 57 3T ^ ^ ^ W ^ act) is an etching failure point of the non-directional etching process, and its thickness is about 600 Angstroms. After the shape of the flute ★ s ^ 办办笫笫 into a polycrystalline stone interlayer interstitial mine layer 2 cj, a layer of polycrystalline silicon layer was deposited, and by _ chair 由微影 and # 刻技术Xi layer 2 4. Next, a first-layer polysilicon layer is deposited, and a third polycrystalline silicon layer 28 is formed by lithography and money engraving techniques. The sum of the thicknesses of the first-multicrystalline continuous interlayer dielectric layer 23 and the second multi-crystalline silicon interlayer dielectric layer 26 is about 3500 angstroms. Next, an inter-dielectric layer 30 is formed, and a planarization process is performed by a chemical mechanical polishing method. In the chemical mechanical polishing process, the original interlayer dielectric layer 30 having a thickness of 13.0 Angstroms is required to be ground to about 9700 Angstroms. Therefore, it is necessary to control the polishing by using an end detection method. The end point to prevent insufficient grinding or excessive grinding. In the endpoint detection method, a laser beam is irradiated onto the interlayer dielectric layer 30 and the intensity of the reflected light is measured. Reflected light ♦ The thickness of the remaining interlayer dielectric layer 30 film varies with the thickness of the film, and therefore has different light intensities. Using the normalized light intensity as the vertical, and the time as the horizontal Korean, the slope of the light intensity with time can be used to divide the thickness of the film, so the end point of the chemical mechanical polishing can be used, as shown in Figure 1. It shows' Because of the formation of the self-aligning contact window, the silicon nitride spacer 20 and the silicon nitride top cover 22 above the pole are formed as shown in Figure 1. This round silicon nitride layer will Affects automatic alignment of the contact window

45597 6 五'發明說明（3) (self-aligned contact)之非等向性蝕刻製程之穩定性，因而造成蝕刻終點的判斷錯誤。 μ 接下來請參考圖二’為了改善此一缺點，業界通常在所述第三複晶矽層28之上加上一層氮化矽層29，其厚度約為4 0 0埃。此時因該氮化矽層2 9係一平面的結構，而不若氮化矽間隙壁2 0和氮化矽頂蓋2 2形成圓弧狀，因此不會影響自動對準接觸窗（self-aligned contact)之非等向性# 刻製程之穩定性，以期改善姓刻終點彳貞測的準確性。惟’在加上所述氮化矽層29之後，雷射光束之反射光的強度遽減，反又造成研磨終點偵測的困難，如圖三所示。圖三的縱軸為正規化後的反射光強度，而橫轴為時間的變化’由圖三可知正規化後的反射光強度僅在〇.〇和-〇. 2之間變化，使得研磨終點的偵測不易控制，經常會有很大的偏差，造成研磨後之層間介電層3 0之厚度的歧異甚大，嚴重影響製程的良率。因此，發展出一種能準確偵測研磨終點的方法，便成為積體電路業界一項十分重要的課題=> 發明概述：本發明的主要目的為提供一種針對層間介電層進行化學機械研磨製程的方法。本發明的次要目的為提供一種化學機械研磨製程之終點的偵測方法。本發明揭露一種化學機械研磨製程之研磨終點的彳貞測45597 6 Description of the 5 'invention (3) (self-aligned contact) The stability of the anisotropic etching process, which caused the judgment of the etching end point to be wrong. μ Next, please refer to FIG. 2 'In order to improve this shortcoming, the industry usually adds a silicon nitride layer 29 on the third polycrystalline silicon layer 28 with a thickness of about 400 angstroms. At this time, because the silicon nitride layer 29 is a planar structure, if the silicon nitride spacer wall 20 and the silicon nitride top cover 22 are formed in an arc shape, it will not affect the automatic alignment of the contact window. -aligned contact) 的非异向性 # The stability of the engraving process, in order to improve the accuracy of the last name engraving test. However, after adding the silicon nitride layer 29, the intensity of the reflected light of the laser beam decreases, which in turn causes difficulty in detecting the polishing end point, as shown in Figure 3. The vertical axis of Figure 3 is the intensity of the reflected light after normalization, and the horizontal axis is the change of time. From Figure 3, it can be seen that the intensity of the reflected light after normalization only changes between 0.0 and -0.2, making the end point of grinding It is difficult to control the detection, and often there is a large deviation, which causes great differences in the thickness of the interlayer dielectric layer 30 after grinding, which seriously affects the yield of the process. Therefore, the development of a method that can accurately detect the end point of polishing has become a very important subject in the integrated circuit industry = > Summary of the Invention: The main purpose of the present invention is to provide a chemical mechanical polishing process for interlayer dielectric layers. Methods. A secondary object of the present invention is to provide a method for detecting an end point of a chemical mechanical polishing process. The present invention discloses a method for measuring the end point of grinding in a chemical mechanical grinding process

/16 5 9 7 6 用採 }於 4 ί 用明 1 說i 明，發法五方層砂晶複層數複有具並窗觸接準對發晶層晶複碎複二晶 1 第複第和三成、第形層在續矽，陸晶層上複矽板二晶基第複體、三導層第半電成 1介形在間，。層後程矽之製晶路複電一體第 be 楨、的層層電介間層矽用述射利所雷並。一，理用層處利電化係介坦，間平法層行方成進測形層偵再電的，介點後間終之廣磨層述研矽所之化對程氮法製層磨磨一研研成械械形機機上學學之化化本函的。導磨度其研強求的間光時射對反化其變測度量強並的的上光間層射時電反對介述數間所函層將導述於述所在所在點用射重禾照的並東明，光發數械機學化訂 ly 帝率斜 b /1 變間寺日著隨度強光取求 1ΦΙ 例施實個 - 的明發本在發本在數函導算計時路著電隨器度分強微光一將用，利中是例法施方實的個數一函另導的之明入輸數函的化變間出械數求機函式學導程化求的用在數^ 。函接數導直函算，導計中出上例求腦施以電實能述個功所一數用另函利的導並明的，發加腦本附電在上的.，台接數機外函磨一導研，導算的計化來變零間於時近著趨隨量度. 化強變光的算間計時來使量要化然變盡間不時並限 ’有中之程同過不的以例限施有實的。佳佳測最最读的，的明間點發之終本秒磨 4 在2 研。至之線ο 曲 ο 數於函介導量为匕白同變不的致間獲時會限，有數’ 函中為量化變間時佳最到得以秒 2/ 16 5 9 7 6 Yong Cai} 于 4 明明 1 Explanation, the five-layered sand crystal multiple layers of the hair method have parallel window contact quasi-opposite to the hair crystal layer and the complex second crystal 1 The third and third layers are formed on the silicon, the second silicon substrate is the second complex body on the land crystal layer, and the third semiconducting layer is half electrically formed in the middle. The layer of silicon is made of silicon, and the compound circuit is integrated. The layer of dielectric is interlayer silicon. First, the physical and chemical processing system is Jiedan, and the intermediate level method is used to measure and detect the layer and then re-energized. After the intermediate point, the wide grinding layer is described by the Institute of Silicon Research. This letter has been transformed into a mechanical and mechanical machine. The time-resolved time-resolved pair of the time-resolved pair is reversed, and the time-varying layer of the light-reduced layer is strongly opposed. The time-rejection of the time-resolved layer will be described at the point where the rendition is located. The combination of Dongming and Guangfa, the number of mechanical mechanics, ly, the emperor's rate, b / 1, and the degree of light with the degree of light, 1ΦΙ Example of the implementation of a-Mingfa's copy of the book, and the number of instructions to calculate the timing The electrification of the follower will be used in the low light level. The advantage is the number of examples. The function of another function is the function of the input and output functions. In the number ^. Correspondence can be calculated directly. If the above example is taken out of the guide, the brain can apply electricity to describe a work station. If you use another letter to guide and make it clear, send the brain attached to the electricity. A computer-based external function grinds a guide, and the calculation of the calculation changes to zero, which is a trend that is closely related to the time. The calculation of the time to change the intensity of the light to the time to make the amount of time to change the time to time and time limit. Cheng Tong's example is limited in its application. The best read by Jia Jiatest, Ming Jian Dian, the end of this second mill 4 in 2 research. To the line ο 曲 ο The number in the function is the same. The conductivity is limited to the same time, but the time is limited. In the function, the best time is quantified.

455976 五、發明說明（5) 圖號說明 1 〇 -半導體基板 1 4-閘極介電層 1 8 -源極/汲極 2 2-氮化矽頂蓋 2 4-第二複晶矽層 2 8 -第三複晶矽層 3 0 -層間介電層本發明法。在本發氧半場效電 1，在形成之後再形成化製程。首先請學機械研磨半導體基板 Isolation 義出主動元效電晶體* 閘極導電層極/汲極1 8 1 2 -淺渠溝隔離 1 6-閘極導電層 2 0 -氮化矽間隙壁 2 3 -第一複晶矽層間介電層 2 6 -第二複晶矽層間介電層 2 9 -氮化矽層係揭露一種化學機械研磨製程之終點的偵測方明的一個實施例中，係將其運用在具有四個金晶體的靜態隨機存取記憶體（SRAM)的製程第三複晶矽層後，在其上形成一層氮化矽層，層間介電層，並利用化學機械研磨法進行平坦參考圖二，其顯示本發明進行層間介電層之化製程的示意圖。首先利用習知標準的製程在一 10上形成淺渠溝隔離（Shallow Trench )1 2或場氧化矽層做為絕緣隔離之用，並因而定件區。接著利用習知的製程技術形成金氧半場其包含有間極介電層（Gate Dielectric)l4、 1 6、淡摻雜源極/汲極（未顯示在圖上）、源 ‘氮化石夕間隙壁（S i d e w a 1 1 S p a c e r ) 2 0、以及氮455976 V. Description of the invention (5) Description of drawing number 1 〇-semiconductor substrate 1 4-gate dielectric layer 1 8-source / drain 2 2-silicon nitride cap 2 4-second polycrystalline silicon layer 2 8-Third polycrystalline silicon layer 30-Interlayer dielectric layer The method of the present invention. In this oxygen half-field-effect electric power 1, a chemical process is formed after the formation. First, learn to mechanically polish the semiconductor substrate. Isolation defines the active element transistor. * Gate conductive layer / drain 1 8 1 2-Shallow trench isolation 1 6-Gate conductive layer 2 0-Silicon nitride spacer 2 3 -The first polycrystalline silicon interlayer dielectric layer 2 6-the second polycrystalline silicon interlayer dielectric layer 2 9-the silicon nitride layer is a method for detecting the end of a chemical mechanical polishing process, After applying it to the third polycrystalline silicon layer in the process of static random access memory (SRAM) with four gold crystals, a silicon nitride layer, an interlayer dielectric layer was formed thereon, and a chemical mechanical polishing method was used. Refer to FIG. 2 for a flat view, which shows a schematic diagram of an interlayer dielectric layer process of the present invention. First, a conventional standard process is used to form a shallow trench isolation (Shallow Trench) 12 or a field silicon oxide layer for insulation isolation, and thus the component area. A metal-oxygen half field is then formed using a conventional process technique. The metal-oxygen half field contains gate dielectrics (16, 16), lightly doped source / drain electrodes (not shown in the figure), and the source 'nitride gap. Wall (Sidewa 1 1 S pacer) 2 0, and nitrogen

五、發明說明（6) 化矽頂蓋（Ni tride Cap)22。其中閘極導電層16# 一複晶^進行微技術㈣第化石夕間隙壁2G和氮化碎頂蓋22的作用，係做為後續動對準接觸窗（Sel卜al igned c〇ntact)之自程的蝕刻终點，直®声幼盏Rnn+6 . 等 14麵刻製心* “ 其厚為埃°在形成第一複晶石夕居間介電層23之&，沉積一層複晶矽層層第二複晶…。接下來在形成=== 技術带成ί後七先’儿積一層複晶矽層’並藉由微影及蝕刻 ί = 晶發層28’其上並覆蓋-層…層29 二厚度、力為400埃。其中所述第—複晶矽層間介電 ί二矽層間介電層26之厚度的總和約丨35_。接下 :形成廣間介電層30’並利用化行：製…背景說明所述，在第三複晶石夕層28之：；=: 氮化矽層29的目的，是在於形：二”所迷隙壁2。和氮切頂蓋22形成圓弧狀，因此 1 (S6lf'allgned contacts ::製程之穩定性’可以大幅改善蝕刻終點偵測的準確性。 ^ 其中所述閘極介電層U係以熱氧化法（Thermal 〇Xidatl〇n)所形成之氧化碎層，其厚度在3〇埃至8〇埃之間。在形成所ϋ閘極介電& 14之冑或之後，冑常加入一道啟始電壓調整的離子佈植製程（圖上未顯示）。所述間極導電層16係以低屋化學氣相沉積法（L〇W PressureV. Description of the invention (6) Ni tride Cap 22. Among them, the gate conductive layer 16 # is a complex crystal, which performs micro-techniques. The role of the 2G fossil barrier wall and the nitrided cap 22 is used as a subsequent alignment contact window (Sel igned coontact). The end point of the self-etching process, Straight® Acoustic Rnn + 6. Etched on 14 sides to make the center * "Its thickness is Angstrom °. When forming the first polycrystalline interlayer dielectric layer 23 & The second silicon layer is the second silicon layer .... Then, after the formation of the === technology belt, the first seven layers of "multi-layer silicon silicon layer" are formed and covered by lithography and etching. -Layer ... Layer 29 with a thickness of 400 angstroms, where the sum of the thickness of the first-multicrystalline silicon interlayer dielectric, the second silicon interlayer dielectric layer 26, is about 35 mm. Next: forming a wide dielectric layer 30 'And use the chemical line: to make ... the background description stated that in the third polycrystalite layer 28 :; =: the purpose of the silicon nitride layer 29 is to shape: two "the gap wall 2. It forms an arc with the nitrogen-cut top cover 22, so 1 (S6lf'allgned contacts :: stability of the process' can greatly improve the accuracy of the detection of the etching end point. ^ The gate dielectric layer U is thermally oxidized The oxide layer formed by the method of Thermal OXidatln has a thickness between 30 angstroms and 80 angstroms. After the formation of the gate dielectric & 14 or later, a start is often added. Voltage-adjusted ion implantation process (not shown in the figure). The interelectrode conductive layer 16 is formed by a low-house chemical vapor deposition method (L0W Pressure

Chemical Vapor Deposition;以後皆簡稱為 LpcVD)或其(Chemical Vapor Deposition; hereinafter referred to as LpcVD) or

4^5976 五、發明說明（7) 他之化學氣相沉積法形成之一層複晶矽層’其厚度介於 8 0 0埃至4 0 〇〇埃之間。所述複晶矽層的摻雜有兩種方法，其中之一係以砷或磷摻入反應氣體矽烷（Silane)中，使砷或磷與矽同步沉積；另一方法係先沉積一本質複晶矽層，再以離子佈植的技術將砷或磷摻雜入該複晶矽層内《隨後’以L P C V D或電漿增強式化學氣相沉積法（Plasma Enhanced Chemical Vapor Deposition;以後皆簡稱為 PECVD)技術沉積一氮化矽層，其厚度約為6 0 0埃。接著利用傳統的微影和非等向反應性離子蝕刻技術，以CF4為反應氣體來蝕刻該氤化矽層，再用C 1 2為反應氣體來蝕刻複晶矽層，以形成具氮化矽頂蓋2 2的閘極結構。接著以氧氣電漿灰化法和濕式去光阻法剝除掉用以定義閘極結構的光阻。此外，若欲得到電阻較低的閘極導電層1 6，亦可在所述複晶石夕層上沉積一層石夕化金屬層（Silicide Layer)。所述淡摻雜源極/汲極區係以能量介於20至80 KeV的砷或磷離子進行離子佈植所形成，.其摻雜濃度介於1 E丨2到 5 E 1 3原子/平方公分之間。所述淡摻雜源極/汲極區的作用是減低熱電子效應（Hot Electron Effect)。接下來在所述閘極結構的側壁形成介電質間隙壁2 0。所述介電質間隙壁20的製程，是先用LPCVD或是PECVD技術形成一層厚度介於100 0至300 0埃的氮化;e夕層，再以CF 4做為反應氣體藉由非等向反應性離子蝕刻法進行回蝕刻而成。此時所述閘極結構已整個被氮化ί夕所包覆，包括其氮化石夕頂蓋2 2和其側壁的介電質間隙壁2 0，以利後續自動對準接觸窗4 ^ 5976 5. Description of the invention (7) A layer of a polycrystalline silicon layer formed by another chemical vapor deposition method has a thickness between 800 angstroms and 400 angstroms. There are two methods for doping the polycrystalline silicon layer, one of which is doping arsenic or phosphorus into the reactive gas Silane to deposit arsenic or phosphorus and silicon simultaneously; the other method is to deposit an essentially complex Crystalline silicon layer, and then doped arsenic or phosphorus into the polycrystalline silicon layer by ion implantation technology. "Subsequently, LPCVD or plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition; hereinafter referred to as" PECVD) technology deposits a silicon nitride layer with a thickness of about 600 Angstroms. Then, using conventional lithography and anisotropic reactive ion etching technology, CF4 is used as a reactive gas to etch the tritiated silicon layer, and C 1 2 is used as a reactive gas to etch the polycrystalline silicon layer to form silicon nitride. The gate structure of the top cover 2 2. The photoresist used to define the gate structure is then stripped off using an oxygen plasma ashing method and a wet photoresist removal method. In addition, if a gate conductive layer 16 having a lower resistance is desired, a silicide layer may be deposited on the polycrystalline stone layer. The lightly doped source / drain region is formed by ion implantation with arsenic or phosphorus ions having an energy between 20 and 80 KeV. Its doping concentration ranges from 1 E 丨 2 to 5 E 1 3 atoms / Between square centimeters. The role of the lightly doped source / drain region is to reduce the hot electron effect. Next, a dielectric spacer 20 is formed on the side wall of the gate structure. The manufacturing process of the dielectric spacer 20 is to first form a layer of nitride with a thickness of 100 to 300 angstroms by using LPCVD or PECVD technology, and then use CF 4 as a reaction gas. It is etched back by a reactive ion etching method. At this point, the gate structure has been completely covered with nitride, including its nitride top cover 22 and the dielectric gap wall 20 of its side wall, so as to facilitate subsequent automatic alignment of the contact window.

第10頁 4 5 597 6 五、發明說明（8) (Self-aligned Contact)製程的進行。接下來進行離子佈植’以能量介於3 0至100 KeV的砷或磷離子4 9進行離子佈植形成濃捧雜的源極/ί及極18’其播雜濃度介於IE〗4到 5 Ε 1 6原子/平方公分之間。其中所述第一複晶矽層間介電層23和第二複晶矽層間 "電層26皆為氧化<5夕層’其厚度的總和約為Mo 〇埃a所述氮化矽層29係利用LPCVD或是PECVD技術所形成，其厚度約為40 0埃。所述層間介電層30亦為氧化矽層，其原始'厚度約為130 00埃。為了進行平坦化步驟，需要利用化^機二研磨法將其研磨至約9 7 0 0埃* 為了解決習知技藝中，因為加入平坦的氮化矽層29而致使反射光強度減弱的現象，本發明針對化學機械終點偵測的技術進行改進β如圖三所示，習知技術是正規化之光強度為縱軸，以時間的變化為橫軸，度隨時間變化的钭率來決定化學機械研磨的終點，铁強 2射光強度減弱的關係，Α習知技術之研磨終點；測：常會有很大的偏差，造成研磨後之層間介電層3〇之廢、-歧異甚大，嚴重影響製程的良率。本發明為了解決此一的題，將原先正規化之光強度隨著時間變化的函數圖型'^問二）求得其一次導函數（derivative function)，使j圖標的縱軸為正規化之光強度的微分值，而橫軸依舊/座間，如圖四所示。如此一來，函數圖型的起伏變化便舍幅加大，如圖四所示在〇· 2和_〇· 3 (光強度/時間）之大化’以此函數的斜率來進行研磨終點之偵測的準確产2變又《大Page 10 4 5 597 6 V. Description of the invention (8) (Self-aligned Contact) process. Next, carry out ion implantation 'with arsenic or phosphorus ions with an energy between 30 and 100 KeV 4 9 and carry out ion implantation to form a concentrated source / pole and electrode 18' whose impurity concentration is between IE 4 to 5 Ε 1 between 6 atoms / cm 2. The first polycrystalline silicon interlayer dielectric layer 23 and the second polycrystalline silicon interlayer " electrical layer 26 are both oxide < 5x5 layer ", and the sum of their thicknesses is about Mo. Angstroma. The 29 series is formed by LPCVD or PECVD technology, and its thickness is about 40 Angstroms. The interlayer dielectric layer 30 is also a silicon oxide layer, and its original thickness is about 130,000 Angstroms. In order to perform the flattening step, it is necessary to grind it to about 9700 angstroms using a chemical polishing method. * In order to solve the phenomenon that the intensity of reflected light is weakened by adding a flat silicon nitride layer 29 in the conventional art, The technology for chemical mechanical endpoint detection is improved in the present invention. As shown in Fig. 3, the conventional technology uses the normalized light intensity as the vertical axis, the time change as the horizontal axis, and the rate of change over time to determine the chemistry. The relationship between the end point of mechanical grinding, the weakening of the light intensity of iron 2 and the end point of A conventional technology; Measurement: There will often be a large deviation, which will cause the interlayer dielectric layer 30 to be scrapped after grinding, and the difference will be very serious, which will seriously affect Yield of the process. In order to solve this problem, the present invention obtains a derivative function of the function pattern of the previously normalized light intensity over time, so that the vertical axis of the j icon is normalized. The differential value of the light intensity, while the horizontal axis is still / between seats, as shown in Figure 4. In this way, the fluctuation of the function pattern will be increased. As shown in Figure 4, the end point of the grinding will be increased by 0.2 and _0.3 (light intensity / time). The accurate detection of 2 changes

第11頁 455976 五、發明說明（9) 幅提高。如圖五所示，針對一整盒之二十四片半導體晶片而言，依此技術研磨後之層間介電層3 0的厚度會相當一致 (約為9 7 0 0埃），可大幅提升製程的良率。在本發明的一個實施例中，求取光強度隨著時間變化之導函數的方法是利用一微分器電路計算導函數；在本發明的另一個實施例中，將光強度隨著時間變化的函數輸入一外接的電腦，並利用所述電腦上計算導函數的程式求出導函數；在本發明的另一個實施例中，直接利用化學機械研磨機台上附加的導函數功能以求出導函數。在求導函數的過程中，並不盡然要使時間的變化量趨近於零來計算，以不同之有限時間變化量來計算光強度隨著時間變化的導函數，會獲致不同的導函數曲線。在本發明的最佳實施例中，有限時間的變化量介於0. 0 1至2 4秒之間，最佳的有限時間變化量為1 2秒，以得到最佳之研磨終點的偵測。以上所述係利用較佳實施例詳細說明本發明，而非限制本發明的範圍，而且熟知此技藝的人士亦能明瞭，適當而作些微的改變與調整，仍將不失本發明之要義所在，亦不脫離本發明之精神和範圍。Page 11 455976 V. Description of the invention (9) Increased. As shown in Figure 5, for a whole box of 24 semiconductor wafers, the thickness of the interlayer dielectric layer 30 after grinding according to this technology will be quite consistent (about 97000 Angstroms), which can be greatly improved. Yield of the process. In one embodiment of the present invention, a method for obtaining a derivative function of light intensity as a function of time is to use a differentiator circuit to calculate the derivative function. In another embodiment of the present invention, the light intensity as a function of time is changed. The function is input to an external computer, and the derivative function is calculated using a program for calculating the derivative function on the computer. In another embodiment of the present invention, the derivative function function on the chemical mechanical polishing machine is used directly to obtain the derivative. function. In the process of deriving the derivative function, it is not necessary to calculate the change amount of time as close to zero as possible. Calculating the derivative function of light intensity over time with different finite time changes will result in different derivative function curves. In the preferred embodiment of the present invention, the change in the finite time is between 0.01 and 24 seconds, and the optimal change in the finite time is 12 seconds to obtain the best detection of the grinding end point. . The above description uses the preferred embodiments to explain the present invention in detail, but not to limit the scope of the present invention, and those skilled in the art will also understand that making small changes and adjustments appropriately will still lose the essence of the present invention. Without departing from the spirit and scope of the invention.

第12頁 455976 圖式簡單說明圖式的簡要說明：圖一顯示習知技藝中進行層間介電層之化學機械研磨製程的示意圖。圖二顯示習知技藝中如圖一所示，並在第三複晶矽層之上加上一層氮化5夕層的示意圖。圖三是如圖二之結構中，利用習知的化學機械研磨製程之研磨終點的偵測技術，所得之正規化後的反射光強度對時間變化的曲線圖。圖四是如圖二之結構中，利用本發明的化學機械研磨製程之研磨終點的偵測技術，所得之正規化後的反射光強度對時間變化的曲線圖。圖五是利用本發明的技術所得到之研磨後層間介電層厚度的不意圖Page 12 455976 Brief description of the diagram Brief description of the diagram: Figure 1 shows a schematic diagram of the chemical mechanical polishing process of the interlayer dielectric layer in the conventional art. Fig. 2 shows a schematic diagram of the conventional technique shown in Fig. 1, and a nitride layer is added on the third polycrystalline silicon layer. Figure 3 is a graph of the normalized reflected light intensity versus time in the structure shown in Figure 2, using the conventional polishing technique for detecting the end point of the CMP process. FIG. 4 is a graph showing the normalized reflected light intensity versus time in the structure shown in FIG. 2 by using the grinding end point detection technology of the chemical mechanical polishing process of the present invention. Figure 5 is a schematic diagram of the thickness of the interlayer dielectric layer after polishing obtained by using the technology of the present invention

第13頁Page 13

Claims

d b b y / b' 六、申請專利範圍申請專利範圍： 1. 一種化學機械研磨製程之研磨終點的偵測方法，適用於採用自動對準接觸窗並具有複數層複晶矽層的積體電路製程，在一半導體基板上陸續形成第一複晶矽層、第一複晶矽層間介電層、第二複晶矽層、和第二複晶矽層間介電層之後，形成第三複晶矽層，在第三複晶矽層之上形成一層氮化矽層之後，再形成層間介電層，並利用化學機械研磨法對所述層間介電層進行平坦化處理，所述化學機械研磨製程之研磨終點的偵測方法，係利用一雷射光束照射在所述層間介電層上並量測其反射光的強度；其特徵在於將所述反射光的強度變化對時間求其導函數，並利用所述導函數對時間的斜率制訂研磨的終點。dbby / b '6. Scope of patent application Patent scope: 1. A method for detecting the polishing end point of a chemical mechanical polishing process, which is suitable for a integrated circuit manufacturing process that automatically aligns contact windows and has multiple layers of polycrystalline silicon layers. After a first polycrystalline silicon layer, a first polycrystalline silicon interlayer dielectric layer, a second polycrystalline silicon layer, and a second polycrystalline silicon interlayer dielectric layer are successively formed on a semiconductor substrate, a third polycrystalline silicon layer is formed. After forming a silicon nitride layer on the third polycrystalline silicon layer, an interlayer dielectric layer is formed, and the interlayer dielectric layer is planarized by a chemical mechanical polishing method. The method for detecting the end point of grinding uses a laser beam to irradiate the interlayer dielectric layer and measure the intensity of its reflected light; it is characterized by finding the derivative function of the intensity of the reflected light with respect to time, and The slope of the derivative with respect to time is used to formulate the end point of grinding.

第14頁 455976 六、申請專利範圍終點的偵測方法，其中求取所述導函數的方法是直接利用化學機械研磨機台上附加的導函數功能為之。 5. 如申請專利範圍第1項所述之化學機械研磨製程之研磨終點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定在0 . 0 1秒至2 4秒之間。 6. 如申請專利範圍第1項所述之化學機械研磨製程之研磨終點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定為1 2秒。於用路在適電，，體後法積層方的發測層晶偵矽複的晶之點複層終層上磨數最研複成之有形程具上製並板磨窗基研觸體械接導機準半學對一化動在種自，一用程 7採製成層的形電點再介終，間磨層層研發述之化所程氣對製層法磨一磨研成研械形械機上機學之學化層化述矽用所晶利-複並理之，處層層化上電坦最介平述間·行所層進上強層的電光介射間反層述述所所將在於射在照徵束特光其射 ’ 雷度一強用的利光係射 ’反法其方測測.量偵並的間時對數函導述所用利並數函。導點其終求的間磨時研對訂化制變率度斜第其圍，範法利方專測請偵申的如T點 8終磨研之程製磨研械機學 t /-Ί 之述所 73« 用利是法方的數函導述所取求中Page 14 455976 VI. Patent Application Endpoint detection method, in which the method of obtaining the derivative function is directly using the additional derivative function function on the chemical mechanical polishing machine. 5. The method for detecting the polishing end point of the chemical mechanical polishing process according to item 1 of the scope of the patent application, wherein in the process of obtaining the derivative function, the time variation is set to 0.01 to 2 4 Between seconds. 6. The method for detecting the grinding end point of the chemical mechanical polishing process according to item 1 of the scope of the patent application, wherein in the process of obtaining the derivative function, the time change is set to 12 seconds. In the test method, the test layer was laminated on the back of the body, and the test point was laminated on the final layer of the silicon layer. The quasi-semi-learning of the guide machine is at the same time. Once the electroforming point of the layer is collected in process 7 and then the intermediate layer is developed, the process gas is milled into a grinding machine. The mechanization of mechanical machine mechanics layering describes the crystals used in silicon-combined, and the layering of the electric tan is the most intermediary between the plane and the upper layer of the electro-optic dielectric interlayer. The description will be based on the illuminance of the illuminating beam, the light of the strong beam, the light of the strong light, and the method of anti-method. The temporal logarithmic function of the detection and introduction of the logarithmic function is introduced. The lead time and the final time of the grinding process are tailored to the customized system's rate of change, and Fan Fa Lifang specifically measures, such as the T point 8 final grinding process. Ί 的述所 73 «Use of profit is the method of the French function

第15頁 4 5 5976 六、申請專利範圍微分器電路為之。 9. 如申請專利範圍第7項所述之化學機械研磨製程之研磨終點的偵測方法，其中求取所述導函數的方法是將光強度隨著時間變化的函數輸入一外接的電腦，並利用所述電腦上計算導函數的程式為之。 10. 如申請專利範圍第7項所述之化學機械研磨製程之研磨終點的偵測方法，其中求取所述導函數的方法是直接利用化學機械研磨機台上附加的導函數功能為之。 11. 如申請專利範圍第7項所述之化學機械研磨製程之研磨終點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定在0 . 0 1秒至2 4秒之間。 1 2 .如申請專利範圍第7項所述之化學機械研磨製程之研磨終點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定為1 2秒。 1 3. —種化學機械研磨製程之研磨終點的偵測方法，首先在一半導體基板上形成一層介電層，並利用化學機械研磨法對所述介電層進行平坦化處理，所述化學機械研磨製程之研磨終點的偵測方法，係利用一雷射光束照射在所述層間介電層上並量測其反射光的強度；其特徵在於Page 15 4 5 5976 VI. Scope of patent application Differentiator circuit is for this purpose. 9. The method for detecting the polishing end point of the chemical-mechanical polishing process according to item 7 of the scope of the patent application, wherein the method for obtaining the derivative function is to input a function of the change in light intensity with time into an external computer, and This is done using a program that calculates a derivative function on the computer. 10. The method for detecting the end point of a chemical mechanical polishing process as described in item 7 of the scope of the patent application, wherein the method of obtaining the derivative function is to directly use the additional function of the derivative function on the chemical mechanical polishing machine. 11. The method for detecting a grinding end point of a chemical mechanical polishing process as described in item 7 of the scope of patent application, wherein in the process of obtaining a derivative function, a time change amount is set to 0.01 to 2 4 Between seconds. 1 2. The method for detecting a polishing end point of a chemical mechanical polishing process according to item 7 of the scope of patent application, wherein in the process of obtaining a derivative function, a time change amount is set to 12 seconds. 1 3. A method for detecting a polishing end point of a chemical mechanical polishing process. First, a dielectric layer is formed on a semiconductor substrate, and the dielectric layer is planarized by using a chemical mechanical polishing method. The method for detecting the grinding end point of the grinding process is to use a laser beam to irradiate the interlayer dielectric layer and measure the intensity of its reflected light;

第16頁 45 597 6 六、申請專利範圍將所述反射光的強度變化對時間求其導函數，並利用所述導函數對時間的斜率制訂研磨的終點。 14.如申請專利範圍第13項所述之化學機械研磨製程之研磨終點的偵測方法，其中求取所述導函數的方法是利用一微分器電路為之。第圍範專請申如研之程製磨研械機學化之述所法方測偵的點終磨光將是法方的數函導述所取求項 3 中 Ί-Χ 其所用利並腦電的接外。一之入為輸式數程函的的數化函變導間算時計著上隨腦度電強述 1 6.如申請專利範圍第1 3項所述之化學機械研磨製程之研磨終點的偵測方法，其中求取所述導函數的方法是直接利用化學機械研磨機台上附加的導函數功能為之。 17.如申請專利範圍第13項所述之化學機械研磨製程之研磨终點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定在0. 0 1秒至2 4秒之間。 1 8 .如申請專利範圍第1 3項所述之化學機械研磨製程之研磨終點的偵測方法，其中所述求取導函數的過程中，將時間的變化量設定為1 2秒。Page 16 45 597 6 6. Scope of patent application Find the derivative function of the intensity change of the reflected light with respect to time, and use the slope of the derivative function with time to determine the end point of grinding. 14. The method for detecting a grinding end point of a chemical mechanical polishing process according to item 13 of the scope of the patent application, wherein a method for obtaining the derivative function is to use a differentiator circuit. Fan Wei specially asked Shen Ruyan to make a research on the mechanization of mechanization. The final polishing of the method will be the method used in the introduction of the mathematical function. And connect the EEG. The input and output functions of the input function are calculated according to the above-mentioned brain power. 1 6. Detection of the polishing end point of the chemical mechanical polishing process as described in item 13 of the scope of patent application. The measuring method, wherein the method of obtaining the derivative function is to directly use the additional derivative function function on the chemical mechanical polishing machine. 17. The method of detecting the polishing end point of the chemical mechanical polishing process according to item 13 of the scope of patent application, wherein in the process of obtaining the derivative function, the amount of time change is set to 0.1 to 2 seconds to 2 Between 4 seconds. 18. The method for detecting a grinding end point of a chemical mechanical polishing process as described in item 13 of the scope of patent application, wherein in the process of obtaining a derivative function, a time change amount is set to 12 seconds.

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