TW439152B - Non-oxygen precipitating Czochralski silicon wafers - Google Patents

Non-oxygen precipitating Czochralski silicon wafers Download PDF

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TW439152B
TW439152B TW88115125A TW88115125A TW439152B TW 439152 B TW439152 B TW 439152B TW 88115125 A TW88115125 A TW 88115125A TW 88115125 A TW88115125 A TW 88115125A TW 439152 B TW439152 B TW 439152B
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wafer
temperature
oxygen
heat
scope
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Robert J Falster
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Memc Electronic Materials
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Abstract

The present invention relates to a process for the treatment of Czochralski single crystal silicon wafers to dissolve existing oxygen clusters and precipitates, while preventing their formation upon a subsequent oxygen precipitation heat treatment. The process comprises (i) heat-treating the wafer in a rapid thermal annealer at a temperature of at least 1150 DEG C in an atmosphere having an oxygen concentration of at least 1000 ppma, or alternatively (ii) heat-treating the wafer in a rapid thermal annealer at a temperature of at least about 1150 DEG C and then controlling the rate of cooling from the maximum temperature achieved during the heat-treatment through a temperature range in which vacancies are relatively mobile in order to reduce the number density of vacancies in the single crystal silicon to a value such that oxygen precipitates will not form if the wafer is subsequently subjected to an oxygen precipitation heat-treatment.

Description

4391 52 —^一 ~—----------- 五、發明說明(1) —一· ---- 發明範, t發明大致有關於半導體材料基底的製備,特別有關於 1 =圓’ ^同於製造電子元件。本發明尤其有關於處理切 斯基單晶矽晶圓之製程’以熔解存在之氧塊及沈澱,. 5時防止其在後續氧沈澱熱處理上形成。 ~單晶石夕’其係製造半導體電子元件時多數製程的必備材 料’且通常是以所謂切克勞斯基製程來製備,其中將單一 米予晶沈入炫解矽中且接著緩慢抽出而生長。因為熔解矽是 ^入石英掛堝中,因此受到各種雜質的污染其中主要是 $。在矽熔解塊,的溫度中,氡會變成晶格,直到它到達一 /辰度,其由熔解塊溫度中的矽氧熔解度,以及固化矽中氧 的貫際分離係數所決定。這些濃度與製造電子元件製程的 —般溫度下固態矽中的氧熔解度相’比,前奢較大,因為晶 體疋從熔解塊中生長再冷卻,因此其中的氣炫解度會快速 減少’因此在產生的晶塊或晶圓中,氧會出現在超飽和浪 。 在製造電子元件的通常使用的熱處理角期中,會形成氧^ 沈澱成核中心而且最後生長為大的氧塊戒沈澱。這些沈澱 在晶圓的活化元件區域中的出現會妨礙元件的操作。通常 為了表示此問題,電子元件製造製程包栝/序列步驟,其 設計目的是製造矽在接近晶圓表面具有〆區域或地方,其 並無氧沈澱(通稱為裸露區或無沈澱區)<=例如裸露區能在 高低高熱序列如(a)氧外擴散熱處理,在惰性氣體周圍以 4391 5 2 五 '發明說明(2) (大於1 1 0 0 °C )的高溫,至少約4小時的周期中,(b )以低溫 (6 0 0至7 5 0。(:)形成氧沈澱成核中心,及(c )在1 0 0 0至1 1 5 0 °C的高溫令氧(Si 02)生長沈澱。如F. Shi mura所寫的文 章:半導體矽晶技術,Academic Press, Inc出版,加州 聖地牙哥(1989),361-367頁,在此作參考。 然而最近先進的電子元件製造製程如DRAM製造製程已開 始使高溫步驟的使用減到極少^雖然這些製程中的一部分 可保有足夠的高溫製程步驟以製造出裸露區,仍而材料的 公差太小因而無法大量生產。其他趨勢為,極先進的電子 兀件製造製程完全不包括外擴散步驟。因為活化元件區域 中氧沈遇又的:關問冑’因此這些電子元件的製造必須使用 十:毅 &•條件下不能於晶圓中形成任何氧 因此需要一種製程,ώ … ^ 由此在元件製造前先熔解矽晶圓中 # a月總結 b可防止晶圓中未來形成氧沈澱。 因此本發明的目的是 及其製備製程,其中氧餘’、一種切克勞斯基單晶矽晶圓, 圓,其不會於氧沈殺執處^殺已溶解;以及提供此一晶 簡言之,本發明是;理時形成氧沈殿或塊。 克勞斯基單晶矽晶圓^制f以快速高熱退火器作熱處理切 ―無在後續熱處理步驟中^二,以熔解氧塊,及防止未來沈 °c之溫度,具有至少約^成。該製程包括:在至少約115 0 晶圓以熔解存在氧塊及志00 ppma之氧濃度大氣,熱處理 產生一晶圓’其不能在氧沈澱熱處 439152 五、發明說明(3) 理時形成氧沈澱。 本發明更是指一種熱處理切克勞斯基單晶矽晶圓之製 程,以熔解氧沈澱或塊,及防止未來沈澱在後續熱處理步 驟中形成。該製程包括:以至少約115 0 °c之溫度,以快速· 高熱退火器熱處理晶圓’以溶解存在氧塊或沈殿,及控制 熱處理晶圓之冷卻率至小於約9 5 0 °c之溫度,以產生一晶 圓,其不能在氧沈殿熱處理時形成氧沈澱。 本發明又是指一種熱處理切克勞斯基單晶石夕晶圓之製 程,以炫解氧沈殿或塊’及防止未來沈丨殿在後續熱處理步 騍中形成。該製程包括:以至少約1 1 5 0 °C之大氣溫度,以 快速高熱退火器1熱處理晶圓’以熔解存在氧塊或沈澱。接 著將熱處理晶圓以大於約2 0 °C之率,冷卻至約9 5 0至1 1 5 0 °C間之溫度,以及接著以約9 5 0至1 1 5 0 °C間之溫度熱退火 以產生一晶圓,其不能在氧沈澱熱處理時形成氧沈澱。 由以下說明可了解本發明的其他目的及特徵^ K圭實施例之詳細說明 本發明的製程提供的裝置可得到一種單晶石夕晶圓’具有 減少的氧沈澱或塊濃度,以及與這些沈澱相關的減少缺 陷。此外’本製程製造的晶圓大致在任何後續氧沈澱熱處 理(如以8 0 〇 C的溫度將晶圓退火4小時,及接著以1 〇 0 〇 的概度將晶圓退火丨6小時)期間,不會形成氧沈澱。本發 明的製程因此可以將各種預存的缺陷如大的氧塊及整個晶 圓t的某些種ϋ應,聲施陷("〇〖sr,〕核心消除或是熔 解’即使晶圓在作氧沈殿熱處理。4391 52 — ^ 一 ~ -------------- V. Description of the invention (1) — 一 · ---- Inventive range, tThe invention is generally related to the preparation of semiconductor material substrates, especially about 1 = Circle '^ Same as manufacturing electronic components. In particular, the present invention relates to a process for processing a Chesky single crystal silicon wafer 'to melt existing oxygen blocks and precipitates, and prevent them from forming on subsequent oxygen precipitation heat treatments at 5 o'clock. ~ Single crystal stone 'It is an indispensable material for most processes in the manufacture of semiconductor electronic components' and is usually prepared by the so-called Cheklaussky process, in which a single meter of Yujing is sunk into a brilliant silicon and then slowly extracted. Grow. Because the molten silicon is put into a quartz hanging pot, it is contaminated with various impurities, mainly $. At the temperature of the silicon melting block, plutonium will change into a lattice until it reaches one degree / degree, which is determined by the degree of silicon-oxygen melting at the temperature of the melting block and the intersegment separation coefficient of oxygen in the solidified silicon. These concentrations are 'compared with the degree of oxygen melting in solid silicon at normal temperatures during the manufacture of electronic components. The former is relatively large, because the crystals grow from the melting block and then cool down, so the degree of gaseous dissolution will rapidly decrease.' Therefore, in the generated crystal block or wafer, oxygen will appear in the supersaturated wave. In the commonly used heat treatment angle stage for the manufacture of electronic components, an oxygen precipitation nucleation center is formed and finally grows into a large oxygen block or precipitation. The presence of these deposits in the active element area of the wafer can hinder the operation of the element. Usually to indicate this problem, the electronic component manufacturing process package / sequence steps are designed to manufacture silicon with a plutonium region or place close to the wafer surface, which has no oxygen precipitation (commonly known as bare or no-precipitation regions) < = For example, the exposed area can be subjected to high and low heat sequences such as (a) oxygen external diffusion heat treatment, and around the inert gas with a temperature of 4391 5 2 5 'Invention Description (2) (higher than 1 1 0 0 ° C) for at least about 4 hours During the cycle, (b) forms oxygen precipitation nucleation centers at low temperatures (600 to 7500), and (c) causes oxygen (Si 02 at high temperatures of 100 to 1150 ° C) ) Growth and precipitation. Articles written by F. Shimura: Semiconductor Silicon Technology, Academic Press, Inc., San Diego, California (1989), pages 361-367, here for reference. However, recent advanced electronic component manufacturing Processes such as DRAM manufacturing processes have begun to reduce the use of high-temperature steps to a minimum ^ Although some of these processes can maintain enough high-temperature process steps to create exposed areas, material tolerances are too small for mass production. Other trends are , Extremely advanced electronic components The manufacturing process does not include an external diffusion step at all. Because the oxygen sink in the active element area is met: the question is asked. Therefore, the manufacture of these electronic components must use ten: Yi & A manufacturing process,… ^ Therefore, the silicon wafer is first melted before the element is manufactured. # A month summary b can prevent the formation of oxygen precipitation in the wafer in the future. Therefore, the object of the present invention is its manufacturing process, where A Cheklauski single crystal silicon wafer, round, which does not dissolve in the oxygen sinking killing place; and to provide this crystal, in short, the present invention is to form an oxygen sinking hall or block in time. Crow SK monocrystalline silicon wafers are manufactured using a rapid high-temperature annealer for heat treatment cutting-not in the subsequent heat treatment steps, in order to melt the oxygen block and prevent the temperature from sinking to ° C in the future. Including: at least about 1150 wafers are melted in the presence of oxygen blocks and oxygen concentration of 00 ppma, the heat treatment produces a wafer 'cannot be in the oxygen precipitation heat place 439152 5. Description of the invention (3) Oxygen precipitation is formed during processing. The present invention is even more The process of heat-treating a Cheklauski single crystal silicon wafer to melt oxygen precipitation or blocks and prevent future precipitation from forming in subsequent heat treatment steps. The process includes: at a temperature of at least about 115 0 ° c, to fast and high heat The annealer heat-treats the wafer to dissolve the presence of oxygen blocks or Shen Dian, and controls the cooling rate of the heat-treated wafer to a temperature of less than about 950 ° C to produce a wafer that cannot form oxygen precipitates during the oxygen Shen Dian heat treatment. The present invention also refers to a process for heat-treating a Cheklaussky monocrystalline wafer to illuminate the oxygen sinking hall or block and prevent future sinking halls from being formed in subsequent heat treatment steps. The process includes: thermally treating the wafer 'with a rapid high-temperature annealer 1 at an atmospheric temperature of at least about 150 ° C to melt the presence of oxygen blocks or precipitates. The heat-treated wafer is then cooled at a rate of greater than about 20 ° C to a temperature between about 950 to 1 150 ° C, and then heated at a temperature between about 950 to 1 150 ° C. Anneal to produce a wafer that cannot form an oxygen precipitate during the oxygen precipitation heat treatment. Other objects and features of the present invention can be understood from the following description. ^ Detailed description of the embodiments. The device provided by the process of the present invention can obtain a single crystal wafer with reduced oxygen precipitation or block concentration, Related defects reduction. In addition, the wafer manufactured by this process is roughly during any subsequent oxygen precipitation heat treatment (such as annealing the wafer at a temperature of 800 ° C for 4 hours, and then annealing the wafer at a temperature of 1000 ° for 6 hours). No oxygen precipitation will occur. The process of the present invention can therefore cope with various pre-existing defects such as large oxygen blocks and certain kinds of the entire wafer t, acoustically trap (" 〇 〖sr,] the core is eliminated or melted 'even if the wafer is being processed. Oxygen Shendian heat treatment.

第8頁 五、發明說明(4) 本發明製程的啟始材料是單晶矽晶圓,其已從單晶矽塊 (根據習用切克勞斯基晶體生長方法而生長)中分切出。這 些方法以及標準矽切分,重疊,蝕刻,及拋光技術等的揭 示,例如可參考F . Sh i mur a所寫的文章:半導體碎晶技 術,Academic Press, Inc出版1989,及石夕化學飯刻(J· Brabmaier ed.) '紐約 Springer-Verlag 出版 1982 (在此供 參考)。矽晶圓可以拋光或者可以重疊及蝕刻但是不拋 光。此外,晶圓會有空洞或是自間隙點缺陷,如主要是本 質點缺陷。例如晶圓的空洞可以是從中心到邊緣,自間隙 主要是從中心到邊緣,或是它包括主要材料空洞的中央核 心,其被自間隙$要材料的軸向對稱環所包圍。 切克勞斯基生長矽通常具有的氧濃度是在約5χ1〇Π至約 9χ1017原子/cm3 (ASTM標準F-121-83)。因為晶圓的氧沈澱 動作大致上被本製程所去除(即大致以無氧沈澱產生晶 圓’即使在氧沈殿熱處理中),啟始晶圓具有的氧濃度會 f 圍之中或是範圍以外’該範圍是切克勞斯基製程所能 得到的。依單晶石夕塊的冷卻(從石夕溶點溫度(約1 4 )到 至約35(rc的範圍)率而定,會在單晶矽塊中形成 氧沈澱成核中心,而晶圓是由矽塊中切除所產生。 啟始材料中這些成核中心的是否出現對於本發明並不重 要。然而較佳的,可以用本發明的快迷高熱退火熱處理來 溶解這些中心。 根據本發明的製程,首先將單晶矽晶圓作熱處理步驟, 其中將晶圓加熱到上升的溫度。較佳的,此熱處理步驟是Page 8 V. Description of the invention (4) The starting material of the process of the present invention is a single crystal silicon wafer, which has been cut out from a single crystal silicon block (grown according to the conventional Cheklausky crystal growth method). These methods and the standard silicon slicing, overlapping, etching, and polishing techniques are disclosed. For example, refer to the article written by F. Sh i mur a: Semiconductor chip technology, Academic Press, Inc. 1989, and Shixi Chemical Rice. Engraved (J. Brabmaier ed.) 'New York Springer-Verlag published 1982 (here for reference). Silicon wafers can be polished or can be overlapped and etched but not polished. In addition, the wafer may have voids or self-gap point defects, such as mainly natural point defects. For example, the cavity of the wafer can be from the center to the edge, and the gap is mainly from the center to the edge, or it includes the central core of the main material cavity, which is surrounded by the axially symmetrical ring of the material from the gap. Cheklaussky-grown silicon typically has an oxygen concentration in the range of about 5x1010 to about 9x1017 atoms / cm3 (ASTM standard F-121-83). Because the wafer's oxygen precipitation action is roughly removed by this process (ie, the wafer is generated by an oxygen-free precipitation 'even in the oxygen sink heat treatment), the initial oxygen concentration of the wafer will be within or outside the range. 'This range is available in the Cheklaussky process. Depending on the cooling rate of the monocrystalline stone block (from the melting point temperature of the stone block (about 1 4) to about 35 (rc)), an oxygen precipitation nucleation center will be formed in the single crystal silicon block, and the wafer It is produced by cutting away from the silicon block. The presence or absence of these nucleation centers in the starting material is not important to the present invention. However, it is preferred that these centers can be dissolved by the high temperature annealing heat treatment of the present invention. According to the present invention In the manufacturing process, a single crystal silicon wafer is first subjected to a heat treatment step, wherein the wafer is heated to an elevated temperature. Preferably, this heat treatment step is

第9頁 '4391 52 五、發明說明(5) 在快速高熱退火器中執行,其中晶圓快速沾 处的加埶?,丨n , 度,而且以該溫度退火較短的時間。通常e w〜目標溫 曰曰圓的、、B?办 UMJC ’較佳是至少1175°c,更佳是至少12〇()。槪度超過 是在約1 2 00 °C與1 2 7 5 °C之間。晶圓通常維姓—C ’而最佳 一秒,通常至少是數秒(如至少3秒),較佳是數咖度至少· 20,30 ’ 40,50秒),而且依預存缺陷而定,斗十秒(如 達約6 0秒(接近一般快速熱退火器的極限)。 4 π 了向 可以在數種一般快速高熱退火("RTA11 )姨中& , / ~ r的往— 作快速高熱退火,其中用數排高功率燈炮將久θ 裡中 J分日日圓加细 RTA爐能快速的將矽晶圓加熱,如其能以數秒睹 …、° 呀間將晶圓 從室溫加熱到1 213 0 °C。這種一般RT A爐之一是4 ω m σ州山景市 的AGAssociates生產的模型610爐子。 、 若是晶圓熱處理時的加熱溫度超過11 50 °c則合姑^ 、J w便各種子苜 存氧塊及0 Ϊ S F掠心炫解。此外,它會增加晶圓由曰 网τ日日格空洞 的密度數目。 j 最新的資訊建議某些與氧相關的缺陷,如環氧化感應 疊缺陷(0ISF) ’是咼溫成核氧堆疊,會被高空洞濃^的2 現所分解。此外在高空洞區域中,氧聚集相信是在g溫 透的發生’這與低空洞濃度的區域相反,其表現更2 Z於 缺少氧沈澱成核中心的區域。因為氧沈澱動作受到空洞濃 度的影響,所以能在本發明製程中控制熱處理晶圓中空= 密度的數目,以避免在後續氧沈澱熱處理中產生氧沈澱。 在本發明製程的第一實施例中,藉由控制大氣可以(&至 少部分的)控制熱處理晶圓中的空洞濃度,其中作熱處Page 9 '4391 52 V. Description of the invention (5) It is performed in a rapid high-temperature annealing machine, where the wafer is quickly attached? , N, degrees, and annealing at this temperature for a short time. Usually, e w ~ target temperature is round, and B? To do UMJC 'is preferably at least 1175 ° C, and more preferably at least 120 (). The excess temperature is between approximately 1 200 ° C and 1 2 7 5 ° C. The wafer usually has a surname of -C ', and the best one second is usually at least a few seconds (such as at least 3 seconds), preferably a few degrees (at least 20, 30' 40, 50 seconds), and it depends on the pre-existing defects, Fight for ten seconds (such as up to about 60 seconds (close to the limit of general rapid thermal annealing). 4 π direction can be used in several general rapid high thermal annealing (" RTA11) aunt & Rapid high-temperature annealing, in which several rows of high-powered cannons are used to heat J wafers for a long time. The RTA furnace can quickly heat silicon wafers. If they can be seen in a few seconds ..., ° Yeah, the wafers from room temperature Heating to 1 213 0 ° C. One of this general RT A furnace is 4 ω m σ model 610 furnace produced by AG Associates of Mountain View, Zhou. If the heating temperature during wafer heat treatment exceeds 11 50 ° c, then it will be ^, J w, various kinds of alfalfa oxygen storage blocks and 0 Ϊ SF grazing solution. In addition, it will increase the number of holes in the wafer from the grid to the grid. The latest information suggests that some oxygen related Defects, such as epoxidation induced stacking defects (0ISF), are nucleated oxygen stacks at high temperatures and will be divided by 2 In addition, in the high-cavity region, oxygen accumulation is believed to occur at g temperature permeability. This is in contrast to the low-cavity concentration region, which behaves more 2 Z in the region lacking the oxygen precipitation nucleation center. Because the oxygen precipitation action is affected by the cavity The effect of concentration can be used to control the number of hollows = density of the heat-treated wafer in the process of the present invention to avoid oxygen precipitation in the subsequent oxygen precipitation heat treatment. In the first embodiment of the process of the present invention, by controlling the atmosphere, ( & at least in part) control the concentration of voids in the heat-treated wafer

第10頁 43915 2 五' 發明說明(6) 理 〇 最 新 的實 驗證據建議大量氧出現時會減_ -少〜.熱一處建一晶J8L 中 空 ------ 洞 的 濃茗 。在與任何特殊理論無關之下 ,相信在氧中 作 的 快 速 高熱 退火處理會導致矽表面面的氧 化,結果是產 生 矽 白 間 隙的 向内流動。此自間隙的向内流 動會產生一種' 作 用 1 即 因發 生再合併,開始時是在表面接 著向内流動, 而 逐 漸 改 變空 洞濃度的分布。 不 是 那種 機制,都會在本發明製程的第 一實施例中於 出 現 包 括 氧的 大氣中執行快速熱退火步驟, 亦即,退火是 在 包 括 氧 氣(0 2) ^水氣,或是含氧化合為有 氣體(其能氧 化 暴 露 的 矽表 面)的大氣中執行。因此大氣是完全由氧或 是 氧 化 合 為有 氣’體所組成,或是又包括非氧 氣體如氬。惟’ 要 注 意 當大 氣完全是氧氣時,大氣最好包 括至少約 0. 001大氣(at m.)的氧氣分壓,或是每百萬原子有1000個 粒 子(ppma) 〇 尤其是,氧氣在大氣中的分壓 會至少約為 0. 002 at m (2000 ppma),更好是0.005atm (5000 ppma) , 且 最 佳 是0. 01 atm (10,000 ppma) ° 本 質 點 缺陷 (空洞及矽自間隙)能以和溫度 有關的擴散率 擴 散 通 過 〇〇 ra 早日曰 矽。因此本質點缺陷的濃度分 布是本質點缺 陷 擴 散 度 的函 數,而再合併率是溫度的溫度 。例如本質點 缺 陷 在 快 速高 熱退火步驟中將晶圓退火時的 溫度附近,較 有 活 動 性 i ΦΚ 而在7 0 0 °C的溫度下的任何一般實際時間中 大 致 是 不 動作 的。最新的實驗證據建議空洞 的有效擴散 率 在 低 於約7 0 0 t:或許高達8 0 0 °C,9 0 0 °C 甚至1 0 0 0 °c 之 下 1 會 大幅 減慢,因此可以將空洞在任何 一般實際時間Page 10 43915 2 5 'Description of the invention (6) Principle 〇 The latest actual test results suggest that when a large amount of oxygen appears, it will be reduced _-less ~. Hot build a crystal J8L hollow ------ the concentration of holes. Irrespective of any particular theory, it is believed that the rapid and high-temperature annealing in oxygen will cause the oxidation of the silicon surface, resulting in the inward flow of silicon white spaces. This inward flow from the gap will have a 'action 1', that is, due to the recombination, it will start to flow inward on the surface, and gradually change the distribution of the cavity concentration. It is not that kind of mechanism. In the first embodiment of the process of the present invention, the rapid thermal annealing step is performed in the atmosphere where oxygen is included. That is, the annealing is performed in the atmosphere including oxygen (0 2) ^ Performed in the atmosphere with gases (which can oxidize exposed silicon surfaces). Therefore, the atmosphere is composed entirely of oxygen or oxidized into a gas, or it also includes non-oxygen gases such as argon. However, it should be noted that when the atmosphere is completely oxygen, the atmosphere preferably includes a partial pressure of oxygen of at least about 0.001 atmosphere (at m.), Or 1000 particles (ppma) per million atoms. In particular, oxygen is The partial pressure in the atmosphere will be at least about 0.002 atm (2000 ppma), more preferably 0.005atm (5000 ppma), and most preferably 0.011 atm (10,000 ppma) ° Essential point defects (voids and silicon Gap) can diffuse through 〇〇ra early called silicon at a temperature-dependent diffusivity. Therefore, the concentration distribution of essential point defects is a function of the dispersion of essential point defects, and the recombination rate is the temperature of temperature. For example, the essential point defect is near the temperature at which the wafer is annealed in the fast high thermal annealing step, is more active i Φκ, and is substantially inactive at any ordinary actual time at a temperature of 700 ° C. The latest experimental evidence suggests that the effective diffusion rate of cavities is below about 7 0 t: perhaps as high as 8 0 ° C, 9 0 ° C, or even below 1 0 0 ° c1, which can significantly slow down, so that the Hollow at any general actual time

第11頁 五、發明說明(7) 視為不動作的。 因此在本發明第二實施例中,藉由梓制晶圓―的一洽卻率 (在空洞較活動的溫度範圍中)可以(.至少部_...分的)控制熱處 -'™._——w.... ...... 理晶圓中的空洞濃度,其中空洞是較為活動的。當晶圓溫_ 度隨著溫度範圍而減少時,晶圓表面的空洞擴散即.會j肖 除,因而導致空洞濃度分布的變化,而變化幅度是依晶圓 雉持在此溫度範圍的時間以及溫度大小而定,大致上較高 的溫度及較長的擴散時間會增加擴散。通常從退火溫度到 空洞實際上不動作的溫度(如約為9 5 0 °C )的平均冷卻率最 好不大於每秒2 0 °C,更佳是不大於1 0 °C,最佳是不大於每 秒 5 〇C。 , 或者高溫退火後的晶圓溫度可以快速減少(如以大於約 2 (Γ C /秒的率)到小於約1 1 5 0 °C但是大於約9 5 0 °C,而且依 維持溫度而維持一段時間。例如在接近1 1 5 0 eC的溫度,僅 需要數秒(如至少2,3,4,6或更多秒),然而在接近9 5 0 °C與要數分鐘(如至少2,3,4,6或更多分鐘)才足以減少 空洞濃度。 一旦晶圓冷卻到溫度範圍以外的溫度,其中晶格空洞在 單晶矽中的活動性較大,與冷卻率不會大幅影響晶圓的沈 澱特性,因此不會接近臨界點。 通常是在相同大氣中執行冷卻步驟,其中作加熱步驟。 適當的溫度例如包括氮化大氣(亦即包括氮氣(N2)的大 氣,或是含化合氣體的氮氣如阿模尼亞,其能將暴露石夕表 面氮化);氧化(含氧氣)大氣;非氧化,非氮化大氣(如Page 11 V. Description of the invention (7) It is regarded as non-operation. Therefore, in the second embodiment of the present invention, the thermal treatment can be controlled (at least at least _... minutes) by the uniformity rate (in the temperature range in which the cavity is relatively active) of the silicon wafer-'™ ._—— w .... ...... The concentration of holes in the wafer, where the holes are more active. When the temperature of the wafer decreases with the temperature range, the void diffusion on the wafer surface will be eliminated. This will cause the change in the concentration distribution of the cavity, and the change will depend on the time that the wafer is held in this temperature range. Depending on the temperature, generally higher temperatures and longer diffusion times increase diffusion. Generally, the average cooling rate from the annealing temperature to the temperature at which the cavity does not actually operate (such as about 950 ° C) is preferably not greater than 20 ° C per second, more preferably not greater than 10 ° C, and most preferably Not more than 5 ℃ per second. Or, the temperature of the wafer after high temperature annealing can be rapidly reduced (for example, at a rate greater than about 2 (Γ C / sec) to less than about 1 150 ° C but greater than about 9 50 ° C, and it is maintained according to the maintenance temperature. For a period of time, for example, at a temperature close to 1 15 0 eC, it only takes a few seconds (eg at least 2, 3, 4, 6 or more seconds), while at a temperature close to 9 50 ° C and a few minutes (eg at least 2, 3, 4, 6 or more minutes) is sufficient to reduce the void concentration. Once the wafer is cooled to a temperature outside the temperature range, the lattice voids are more mobile in the single crystal silicon, and the cooling rate will not significantly affect the crystal The round sedimentation characteristic will not approach the critical point. Usually, the cooling step is performed in the same atmosphere, and the heating step is performed. Suitable temperatures include, for example, a nitrogen atmosphere (that is, an atmosphere including nitrogen (N2), or a compound containing nitrogen). Nitrogen of the gas, such as ammonium, can nitrify the surface of the exposed stone); oxidizing (containing oxygen) atmosphere; non-oxidizing, non-nitriding atmosphere (such as

第12頁Page 12

五、發明說明(8) 氬,,氖,二氧化碳),及其合併。 雖然本製程_使用的快速熱處理會導致少量氧從晶圓的 前表面及後表面向外擴散,然而產生的熱處理晶圓具有大 致均勻的内間隙氧濃度,其係離開矽表面距離的函數。例· 如熱處理晶圓會具有大致均勻的内間隙氧濃度’即從晶圓 中心到約1 5微米矽表面中的晶圓區域,更好的是從矽中心 到約1 0微米矽表面中的晶圓區域,更佳的是從矽中心到晶 圓區域(其係約5微米石夕表面),而最佳的是從石夕中心到晶 圓區域(其係約3微米矽表面)。本文中的大致均勻氧濃度 是指氧濃度的變化不超過50%,最好不超過20%,且最佳是 不超過1 0 %。 11 由此觀之,可以達成本發明的數個目的,而且在不違反 本發明的範圍下可以在上述成分及製程中作各種變化,因 此意欲將上述說明書中的所有内容視為敘述性而非一種限 制涵意V. Description of the invention (8) Argon, neon, carbon dioxide), and combinations thereof. Although the rapid thermal processing used in this process will cause a small amount of oxygen to diffuse outward from the front and back surfaces of the wafer, the resulting thermally processed wafer has a substantially uniform inter-gap oxygen concentration as a function of the distance from the silicon surface. For example, if the heat-treated wafer will have a substantially uniform interstitial oxygen concentration, that is, from the wafer center to the wafer area in the silicon surface of about 15 microns, more preferably from the silicon center to the silicon surface in the silicon surface of about 10 microns. The wafer area is more preferably from the silicon center to the wafer area (which is about 5 micrometers of silicon surface), and the best is from the Shi Xi center to the wafer area (which is about 3 micrometers of silicon surface). The term "substantially uniform oxygen concentration" herein means that the change in oxygen concentration does not exceed 50%, preferably does not exceed 20%, and most preferably does not exceed 10%. 11 From this point of view, several purposes of the invention can be achieved, and various changes can be made in the above ingredients and processes without departing from the scope of the invention. Therefore, it is intended that all the contents in the above description should be regarded as narrative rather than narrative. Implication of restriction

第13頁Page 13

Claims (1)

六、申請專利範圍 1. 一種用以熱處理切克勞斯基單晶矽晶圚以熔解氧沈澱 之製程,該製程包括在一快速熱退火器之中以至少約1 1 5 0 °C之溫度,具有至少約1 〇 〇 〇 ppma氧濃度之大氣將晶圓作 熱處理。 2. 如申請專利範圍第1項之製程,其中以約1 2 0 0 °C至約 1 2 75 X:間之溫度將晶圓作熱處理。 3. 如申請專利範圍第1或2項之製程,其中大氣具有至少 約2000 ppma之氧濃度。 4. 如申請專利範圍第1或2項之製程,其中大氣具有至少 約5000 ppma之氧濃度。 5. 如申請專利1範圍第1或2項之製程,其中大氣具有至少 約10000 ppma之氧濃度。 6. 如申請專利範圍第1或2項之製程,其中將晶圓作熱處 理至少約2 0秒。 7. 如申請專利範圍第1或2項之製程,其中將晶圓作熱處 理至少約4 0秒。 8 · —種用以熱處理切克勞斯基單晶矽晶圓以熔解氧沈殿 之製ψ.,該製程包括: 在一快速高熱退火器中,以至少約1 1 5 0 °C之溫度將 晶圓作熱處理,及控制冷卻率,從熱處理期間達成之最高 溫度至一溫度範圍,其中空洞較能移動以減少單晶矽中空 洞之數目密度至一值,俾晶圓作一氧沈澱熱處理時不會在 熱處理晶圓中形成氧沈澱。 9 .如申請專利範圍第8項之製程,其中以約1 2 0 0 °C至約6. Scope of patent application 1. A process for heat-treating Cheklaussky single crystal silicon crystalline silicon to precipitate by melting oxygen, the process includes a rapid thermal annealing machine at a temperature of at least about 1 150 ° C The wafer is heat treated in an atmosphere with an oxygen concentration of at least about 1,000 ppma. 2. If the process of applying for the first item of the patent scope, wherein the wafer is heat-treated at a temperature of about 12 0 ° C to about 1 2 75 X :. 3. If the process of claim 1 or 2 is applied, the atmosphere has an oxygen concentration of at least about 2000 ppma. 4. The process of claim 1 or 2 in which the atmosphere has an oxygen concentration of at least about 5000 ppma. 5. If the process of item 1 or 2 of the scope of patent application 1 is applied, wherein the atmosphere has an oxygen concentration of at least about 10,000 ppma. 6. If the process of claim 1 or 2 is applied for, the wafer is thermally processed for at least about 20 seconds. 7. If the process of claim 1 or 2, the wafer is thermally processed for at least about 40 seconds. 8 · —A system for heat-treating a Cheklauski single-crystal silicon wafer to melt oxygen Shen Dian. The process includes: In a rapid high-temperature annealing machine, the temperature is at least about 1 150 ° C. The wafer is heat treated, and the cooling rate is controlled, from the highest temperature reached during the heat treatment to a temperature range, in which the cavity can move more to reduce the number density of the cavity in the single crystal silicon to a value. When the wafer is subjected to an oxygen precipitation heat treatment No oxygen precipitation will form in the heat-treated wafer. 9. The process according to item 8 of the scope of patent application, in which the temperature ranges from about 120 ° C to about 第U頁 六、申請專利範圍 1 2 7 5 °C間之溫度將晶圓作熱處理。 10. 如申請專利範圍第8項之製程,其中將冷卻率控制 在熱處理期間達成之最高溫度至約9 0 0 °C溫度之間。 11. 如申請專利範圍第8,9或1 0項之製程,其中冷卻率· 少於2 0 °C /秒。 12. 如申請專利範圍第8,9或1 0項之製程,其中冷卻率 少於1 0 °C /秒。 13. 如申請專利範圍第8,9或1 0項之製程,其中冷卻率 少於5 °C /秒。 14. 如申請專利範圍第8,9或1 0項之製程,其中以氮化 大氣冷卻晶圓。’ 15. 如申請專利範圍第8,9或1 0項之製程,其中以氧化 大氣冷卻晶圓。 16. 如申請專利範圍第8,9或1 0項之製程,其中以非氮 化非氧化大氣冷卻晶圓。 17. —種用以熱處理切克勞斯基單晶矽晶圓之製程,以 熔解氧塊及防止在後續之氧沈澱熱處理中形成沈澱,該製 程包括: 在一快速高熱退火器中,以至少約1 1 5 0 °C之大氣溫 度將晶圓作熱處理以熔解預存之氧塊; 將熱處理之晶圓以大於約2 0 °C之率,冷卻至約9 5- 0 至1 1 5 0 °C間之溫度;以及 以約9 5 0至1 1 5 0 °C間之溫度將冷卻之晶圓熱退火以 產生一晶圓,其不會在一氧沈澱熱處理時形成氧沈澱。Page U VI. Patent Application Scope The wafer is heat treated at a temperature between 1 2 7 5 ° C. 10. If the process of claim 8 is applied, the cooling rate is controlled between the highest temperature reached during the heat treatment and a temperature of about 900 ° C. 11. If the process of applying for patent No. 8, 9 or 10, the cooling rate is less than 20 ° C / second. 12. In the process of applying for patent No. 8, 9 or 10, the cooling rate is less than 10 ° C / s. 13. If the process of claim 8, 9 or 10 is applied for, the cooling rate is less than 5 ° C / s. 14. In the process of applying for patent No. 8, 9 or 10, the wafer is cooled with a nitriding atmosphere. ‘15. For a process in the scope of claim 8, 9, or 10, in which the wafer is cooled with an oxidizing atmosphere. 16. For the process of applying for patent No. 8, 9 or 10, in which the wafer is cooled with a non-nitrogenated non-oxidizing atmosphere. 17. —A process for heat-treating a Cheklauski single crystal silicon wafer to melt oxygen blocks and prevent precipitation from forming in subsequent oxygen precipitation heat treatments. The process includes: In a rapid high-temperature annealer, at least At a temperature of about 1 150 ° C, the wafer is heat-treated to melt the pre-existing oxygen blocks. The heat-treated wafer is cooled to a temperature of about 9 5- 0 to 1 15 0 ° at a rate greater than about 20 ° C. Temperature between C; and thermally annealing the cooled wafer at a temperature between about 950 and 1500 ° C to produce a wafer that does not form an oxygen precipitate during an oxygen precipitation heat treatment. 第15頁 4 3 9] 52 六、申請專利範圍 18. 如申請專利範圍第1 7項之製程,其中以約1 2 0 0 °C至 約1 275 t間之溫度將晶圓作熱處理。 19. 如申請專利範圍第1 7或1 8項之製程,其中以約9 5 0 °C之溫度將冷卻晶圓作熱退火約2分鐘。 2 0 .如申請專利範圍第1 7或1 8項之製程,其中以約9 5 0 °C之溫度將冷卻晶圓作熱退火約6分鐘。 21. 如申請專利範圍第1 7或1 8項之製程,其中以約1 1 5 0 °C之溫度將冷卻晶圓作熱退火約2秒。 22. 如申請專利範圍第1 7或1 8項之製程,其中以約1 1 50 °C之溫度將冷卻晶圓作熱退火約6秒。Page 15 4 3 9] 52 6. Scope of Patent Application 18. If the process of item 17 in the scope of patent application is applied, the wafer is heat-treated at a temperature between about 12 0 ° C and about 1 275 t. 19. For the process of claim 17 or 18, the cooling wafer is thermally annealed at a temperature of about 950 ° C for about 2 minutes. 20. The process of item 17 or 18 of the scope of patent application, wherein the cooled wafer is thermally annealed at a temperature of about 950 ° C for about 6 minutes. 21. If the process of claim 17 or 18 is applied for, the cooled wafer is thermally annealed at a temperature of about 115 ° C for about 2 seconds. 22. For the process of claim 17 or 18, the cooling wafer is thermally annealed at a temperature of about 1 150 ° C for about 6 seconds.
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