TW420833B - Overlay correction method of wafer alignment - Google Patents

Overlay correction method of wafer alignment Download PDF

Info

Publication number
TW420833B
TW420833B TW87105927A TW87105927A TW420833B TW 420833 B TW420833 B TW 420833B TW 87105927 A TW87105927 A TW 87105927A TW 87105927 A TW87105927 A TW 87105927A TW 420833 B TW420833 B TW 420833B
Authority
TW
Taiwan
Prior art keywords
wafer
alignment
masks
alignment points
points
Prior art date
Application number
TW87105927A
Other languages
Chinese (zh)
Inventor
Hung-Jang Shie
Shin-Sheng You
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Priority to TW87105927A priority Critical patent/TW420833B/en
Application granted granted Critical
Publication of TW420833B publication Critical patent/TW420833B/en

Links

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

This invention is about a kind of overlay correction method of wafer alignment and includes the following procedures: the fields waited to expose are formed by plural scribe lines on the wafer surface; the initial mask and the subsequent mask are provided and each individually has the first layer pattern and the second layer pattern corresponding to the fields; plural original-alignment marks are formed at the positions corresponding to the scribe lines on the initial mask and the subsequent mask, respectively; the initial mask is used to define wafer so as to form the first layer pattern on the field; plural of the first alignment marks corresponding to the original alignment mark are formed on the scribe lines of the wafer; the subsequent mask is used to align the whole area of the wafer so as to obtain a plurality of the second alignment marks corresponding to the original alignment mark on the scribe lines of the wafer; the error between the first alignment mark and the second alignment mark is calculated and the overlay correction of alignment is then performed according to the error.

Description

/20833 A7 B7 經滴部中央標準局貝工消費合作社印製 五、發明説明(1 ) 本發明係有调一種晶圓對準(alignment)之重疊校正 (overlay correction)方法,特別有關於一種在切割道(scribe lines)上設置複數個對準點(alignment marks)以計算後續光 罩與晶圓位置之誤差,而進行重疊校正之方法。 目前積體電路製程主要是在晶圓上對導體、半導體、 及絕緣材料施以薄膜沈積、微影步驟、及蝕刻、摻雜等技 術,以形成高集積度之電子元件,如電晶體或電容等。然 而隨著進入極大型積體電路製程(ULSI)後,由於尺寸大小 (feature size)之縮減(shrink)及製程之繁複,微影步驟 (photolithography)之解析度(resolution)及重疊準確率 (overlay accuracy)之要求均大為提高,傳統之曝光顯影方 式顯已不符所需。 一般而言,如第1圖所示,重昼錯誤(overlay error)較 容易發生在對準和曝光之步驟,例如在曝光製程中,光罩 140和晶圓1〇〇之間的相對位置錯誤,透鏡120之失真或 放大倍率之錯誤,以及因溫度偏移導致之曝光系統160之 .不穩定均是發生重疊錯誤之主因。 此外,當光學步進機(optic stepper)採用光罩-晶圓直 接對準之方式時(in-axis ; TTL : through the lens),傳統 對準製程係先在光罩140上製作一全區對準記號142、 144,並利用利用曝光系統160之氦—氖雷射(He-Ne Laser) 來對準晶圓之記號102、104,,以測量晶圓100之相對位 置,其次再由光學步進機(optic stepper)以步進且重複 (step-and~repeat)之方式曝光,因此在晶圓1〇〇上通常分成 請 讀 背 面 之 注 項 再 填 寫忒 本私 頁 訂 本紙張尺度適用中國國家標準(CNS Μ4規格(210X29"?公釐> 經满部中央標隼局負工消费合作社印聚 420^7J ; A7 _____B7 五、發明説明(2) 複數個待製區(field)l〇6,並以切割道1〇1予以分割,在光 罩140上’則對應該待製區1〇6形成所欲之圖案 (pattern)146 ’再以區對區之方式經由透鏡以步進且重 複之方式曝光,以將圖案移轉至各待製區〗〇6。 然而以上述在光罩14〇上製作一全區對準記號、 144 ’來對準晶圓之記號1G2、1{)4之方式,只能做晶圓 相對位置之對準’亦即待製區與待製區間(i__field)之相 對位置對準,但無法對同一待製區本身(intra—field)進行對 準,例如利用不同光罩對同一待製區1〇6進行曝光顯影製 程以移轉不同圖案時,可能因各步進機之放大倍率不同而 造成朱真之現象。 有鑑於此’本發明之目的為在以全區對準記號來做晶 圓相對位置或待製區與待製區間(inter_field)之對準後,再 對同一待製區本身(intra-field)進行對準❶ 其特徵為在切割道(scribe lines)上設置複數個對準點 (alignment marks)以計算後續光罩與晶圓位置之誤差而進 行重整校JL。 m 為達成上述目的,本發明提供一種晶圓對準之重疊校 正方法’包推'下列步驟:於該晶圓表面形成一由複數條切 割道分割形成之待製區;提供一初始光罩及後續光罩,其 分別具有對應該待製區之第一層圖案及第二層圖案,且在 該初始光罩及後續光罩對應該些切割道之1位置各形成有複 數個原始對準點;以該初始光罩定義該晶圓而於該待製區 形成一第一層圖案,並於該晶圓之該些切割道上形成對應 4 本紙浪尺度適用中國國家榡隼(CNS ) A4規篇(2丨0 ·〆297公嫠) ---------ΛI------訂------線 _ - ί锖先閲讀背面之注意事項再填寫本頁) 經满部中次標隼局員工消費合作社印裝 A7 B7 五、發明説明(3 ), 該些原始對準點之複數個第一對準點;以該後續光罩全區 對準該晶圓,並於該晶圓之該些切割道上,取得對應該後 續光罩之該些原始對準點之複數個第二對準點;計算該些 第一對準點與該些第二對準點之誤差;及依據該誤差進行 對準之重疊校正。 本發明提供之另一種晶圓對準之重疊校正方法,包括 下列步驟:(a)於該晶圓表面形成一由複數條切割道分割形 成之複數個待製區;(b)提供複數個光罩,其分別具有對應 該些待製區之複數層圖案,且在該些光罩對應該些切割道 之位置各形成有複數個原始對準點;(c)以該些光罩之第一 層光罩定義該晶圓而於該些待製區形成一第一層圖案,並 於該晶圓之該些切割道上形成對應該些原始對準點之複數 個第一對準點;(d)以該些光罩之第二層光罩全區對準該晶 圓,並於該晶圓之該些切割道上,取得對應該第二層光罩 之該些原始對準點之複數個第二對準點;(e)計算該些第一 對準點與該些第二對準點之誤差;⑴依據該誤差進行晶圓 對準之重疊校正;(g)以該第二層光罩定義該晶圓而於該些 待製區形成一第二層圖案;及(li)依序,對該些光罩之後續 光罩重複該步驟(d)至(g)。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1圖係顯示傳統微影製程中,以全區對準記號做待 ---------Λ------"------線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210Χ297公釐) 經濟部中央梯準局員工消費合作社印製 A7 ^----_B7 五、發明説明(4) '— 製區與待製區間(inter-field)之對準示意圖; 第2圖係顯示本發明之一實施例中,以初始光罩定義 該晶圓而於待製區形成一第一層圖案,並於切割道上形成 對應原始對準點(Xn,Yn)之複數個第一對準點(χη,,γη’)之 示意圖; 第3囷係顯示本發明之一實施例中,以後續光罩全區 對準該晶圓,並依據後續光罩之原始對準點(Χη,Υη),取得 對應切割道上之複數個第二對準點(Χη’,,Υη,’)之示意圖; 第4圖係顯示第2、3圖之第一對準點(Χη’,γη,)與第 二對準點(Χη’,,γη’’)之誤差示意圖;及 第5圖係顯示本發明方法之步驟流程圖。 實施例 請參閱第5圖,本實施例之一種晶圓對準之重叠校正 方法,包括下列步驟:首先依據步驟1G,於晶圓表面形成 複數個待製區,其次依據步驟20,提供複數個光罩其分 別具有對應該些待製區之複數層圖案,且各形成有複數個 原始對準點。 接著依據步驟30,以該些光罩之第—層光罩定義該晶 圓而於該些待製區形成-第-層圖案,並形成對應該些原 始對準點之複數個第一對準點。 然後依據步驟4G,以該些光罩之第二層光罩全區對準 該晶圓’並取得對應該第二層光罩之該些(原始對準點之複 數個第二對準點。 其次依據步釋50,計算該些第一對準點與該些第二對 ---------1------訂------線 c锖先閲讀背面之注意事項再填寫本f) 本紙張尺度適用中國國家標準(CNS ) A4«L# ( 210 X297^ ]~~- 經滴部中央標準局員工消費合作社印聚 420o〇3 A7 B7 五、發明説明(5) 準點之誤差,並依據該誤差進行晶圓對準之重疊校正。 依序如步驟60,對該些光罩之後續光罩重複上述步驟 30至50,例如先以該第二層光罩定義該晶圓而於該些待 製區形成一第二層圖案,接著對第三層光罩或其後續光罩 重複上述步驟以計算第三或後續之對準點誤差,並據以進 行重疊校正。 以下即以兩層之初始光罩及後續光罩為例說明,如第 2至4圖所示^ , 請參閱第2圖,其顯示本發明之一實施例中,以初始 光罩240定義該晶圓200而於待製區206形成一第一層圖 案,並於切割道201上形成對應原始對準點(Χη,γη)之複數 個第一對準點(Χη’,Υη,)之示意圖。 其中晶圓200表面一般係形成一由複數條切割道201 分割形成之待製區206,而微影製程則需利用各層光罩來 進行曝光顯影,例如提供一第2圖之初始光罩240及第3 圖之後續光罩340,其分別具有對應該待製區206之第一 層圖案246及第二層圖案346,且在該初始光罩240及後 續光罩340對應該些切割道241、341之位置各形成有複 數個原始對準點(Χη,Υη)。 接著以該初始光罩240定義晶圓200而於待製區206 形成一第一層圖案(未顯示),並於該晶圓200之該些切割 道201上形成對應原始對準點(Χη,Υη)之複數個第一對準 點(Χη’,Υη’)。例如當光學步進機(optic stepper)採用光罩-晶圓直接對準之方式時(in-axis ; TTL : through the lens) 本紙張尺度適用中國國家標準{ CNS ) A4規格< 210X297公潘) -----------Λ------訂-------嗥 (#先閱讀背面之注意事項再填寫本頁) • η 第87105927號專利說明書修正頁 Α7 Β7 修正日期:89.(½ -—--——? 修正 經濟部智慧財產局員工消費合作社印製 五、發明說明(6 ) ,可先在初始光罩240上製作一全區對準記號242、244, 並利用曝光系統260之氦-氖雷射(He-Ne Laser)來對準晶 圓之記號202、204,其次再由光學步進機(optic stepper) 以區對區(inter-fie丨d)之方式測量晶圓200之相對位置,經 由透鏡220依步進且重複(step-and-repeat)之方式曝光,以 將第一層圖案移轉至待製區206 » 請參閱第3圖,其顯示本發明之一實施例中,以後續 光罩340全區對準該晶圓200,並依據後續光罩之原始對 準點(Χη,Υη),取得對應切割道201上之複數個第二對準點 (Χη’’,Υη’’)。例如先在後續光罩340上製作一全區對準記 號342、344,並利用氦-氖雷射(He-Ne Laser)來對準晶圓 之記號202、204,其次再由光學步進機(optic stepper)以區 對區(inter-field)之方式進行全區對準,以測量晶圓200之 相對位置,並依據後續光罩340之原始對準點(Χη,γη),進 行待製區本區(intra-field)之對準,取得對應切割道201上 之複數個第二對準點(Xn’’,Yn’’)。 接著請參閱第4圖,計算該些第一對準點(Χη’,Υη’) 與該些第二對準點(Xn’%Yn’’)之誤差,例如位移誤差 (translation error)、旋轉誤差(rotation error)及放大倍率誤 差(magnification error),並依據該誤差進行晶圓對準之重 疊校正。 當已經定義第一層圖案之晶圓200,完成重疊校正 後,即可進行後續光罩340之曝光顯影製程,以在待製區 206移轉第二層之圖案。 本紙張尺度適用中國國家標準(CNS〉A4規格(210 X 297公釐) U ^1 * n n I n I I (請先閱讀背面之注意事項再填寫本頁> 4 20〇 Α7/ 20833 A7 B7 Printed by the Central Bureau of Standardization of the Ministry of Industry and Technology, Fifth, Invention Description (1) The present invention has an overlay correction method for adjusting a wafer alignment. A plurality of alignment marks are set on the scribe lines to calculate the subsequent error between the position of the photomask and the wafer, and the method of overlapping correction is performed. At present, the integrated circuit manufacturing process mainly uses thin film deposition, lithography steps, and etching and doping techniques on conductors, semiconductors, and insulating materials on the wafer to form high-integration electronic components, such as transistors or capacitors. Wait. However, after entering the ultra large integrated circuit manufacturing process (ULSI), due to the shrinkage of the feature size and the complexity of the process, the resolution and overlay accuracy of the photolithography step (overlay) The accuracy) requirements have been greatly improved, and the traditional exposure and development methods have obviously not met the requirements. In general, as shown in Figure 1, overlay errors are more likely to occur during the alignment and exposure steps. For example, during the exposure process, the relative position between the mask 140 and the wafer 100 is incorrect. The distortion of the lens 120 or the error of the magnification, and the instability of the exposure system 160 caused by the temperature shift are the main causes of the overlapping error. In addition, when an optical stepper adopts a mask-wafer direct alignment method (in-axis; TTL: through the lens), the conventional alignment process first creates a full area on the mask 140 Alignment marks 142, 144, and use He-Ne Laser of exposure system 160 to align wafer marks 102, 104 to measure the relative position of wafer 100, followed by optical The stepper (optic stepper) is exposed in a step-and-repeat manner, so it is usually divided on the wafer 100. Please read the notes on the back and fill it out. China National Standard (CNS Μ4 Specification (210X29 "? Mm) > Printed by the Central Bureau of Standards and Construction, Consumer Cooperatives, 420 ^ 7J; A7 _____B7 V. Description of the Invention (2) A plurality of fields to be produced (l) 〇6, and divided by the cutting path 101, on the mask 140, 'the desired pattern corresponding to the area to be prepared 106 is formed 146', and then step by step through the lens in a zone-to-zone manner. And repeat the exposure in order to transfer the pattern to each area to be prepared. The above method of making a full-area alignment mark on the photomask 14 and 144 'to align the wafer marks 1G2, 1 {) 4, can only do the alignment of the relative position of the wafer', that is, the area to be processed and The relative position of the waiting area (i__field) is aligned, but the same waiting area itself (intra-field) cannot be aligned. For example, using different photomasks to expose and develop the same waiting area 10 to develop different processes In the patterning, the phenomenon of Zhu Zhen may be caused by the magnification of each stepper. In view of this, the purpose of the present invention is to make the relative position of the wafer or the area to be processed and the area to be processed by using the alignment mark of the entire area. (Inter_field) alignment, and then align the same intra-field itself ❶ It is characterized by setting a plurality of alignment marks on the scribe lines to calculate the subsequent photomask and In order to achieve the above-mentioned object, the present invention provides a method for 'overlapping' the wafer alignment, including the following steps: forming a plurality of scribe lines on the surface of the wafer to divide it. Formed waiting area; provide initial The initial mask and the subsequent mask respectively have a first layer pattern and a second layer pattern corresponding to the area to be processed, and a plurality of each are formed at one position of the initial mask and the subsequent mask corresponding to the cutting paths. Original alignment point; define the wafer with the initial mask to form a first layer pattern on the area to be processed, and form corresponding 4 paper waves on the scribe lines of the wafer for China National Cricket (CNS) A4 Regulations (2 丨 0 · 〆297 嫠) --------- ΛI ------ Order ------ Line _-ί 锖 Please read the precautions on the back before filling in this Page) A7 B7 printed by the Consumers ’Cooperative of the Ministry of Standards and Technology Administration of the People ’s Republic of China 5. Description of the Invention (3), the plurality of first alignment points of the original alignment points; align the wafer with the whole area of the subsequent mask And obtaining a plurality of second alignment points corresponding to the original alignment points of the subsequent photomasks on the dicing lines of the wafer; calculating an error between the first alignment points and the second alignment points; and The overlap correction of the alignment is performed based on the error. The present invention provides another method for aligning and superimposing wafers, including the following steps: (a) forming a plurality of regions to be processed divided by a plurality of scribe lines on the surface of the wafer; (b) providing a plurality of light Masks, each having a plurality of layers corresponding to the areas to be prepared, and a plurality of original alignment points formed at positions corresponding to the cutting lanes of the masks; (c) a first layer of the masks A photomask defines the wafer and forms a first layer pattern on the regions to be processed, and forms a plurality of first alignment points corresponding to the original alignment points on the scribe lines of the wafer; (d) using the The second layer of masks of the photomasks are aligned with the wafer over the entire area, and a plurality of second alignment points corresponding to the original alignment points of the second layer of masks are obtained on the scribe lines of the wafer; (E) Calculate the errors between the first alignment points and the second alignment points; (i) Perform wafer alignment overlap correction based on the errors; (g) Define the wafer with the second layer of mask and The areas to be processed form a second layer pattern; and (li) sequentially, subsequent light to the masks Repeating the step (d) to (g). In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1 In the traditional lithography process, the whole area alignment mark is used to treat --------- Λ ------ " ------ line (Please read the precautions on the back before (Fill in this page) This paper size applies the Chinese National Standard (CNS) Λ4 specification (210 × 297 mm) Printed by the Consumer Cooperatives of the Central Government Bureau of the Ministry of Economic Affairs A7 ^ ----_ B7 V. Description of Invention (4) Schematic diagram of alignment with the inter-field; Figure 2 shows an embodiment of the present invention, the wafer is defined by an initial mask to form a first layer pattern in the to-be-processed area, and cut A schematic diagram of a plurality of first alignment points (χη ,, γη ') corresponding to the original alignment points (Xn, Yn) is formed on the track; the third unit shows that in one embodiment of the present invention, the whole area of the subsequent mask is aligned to the Wafer, and according to the original alignment points (Xη, Υη) of subsequent photomasks, a plurality of second Schematic diagram of the alignment points (Xη ',, ηη,'); Figure 4 shows the first alignment point (Xη ', γη,) and the second alignment point (Xη' ,, γη '') in Figures 2 and 3. The error diagram; and FIG. 5 is a flowchart showing the steps of the method of the present invention. Please refer to FIG. 5 for an embodiment. A wafer alignment overlap correction method in this embodiment includes the following steps: firstly, a plurality of regions to be processed are formed on the wafer surface according to step 1G, and secondly, a plurality of regions are provided according to step 20 The photomasks each have a plurality of layer patterns corresponding to the regions to be processed, and each has a plurality of original alignment points. Then, according to step 30, the first layer of the masks is used to define the crystal circle to form a first layer pattern in the regions to be processed, and a plurality of first alignment points corresponding to the original alignment points are formed. Then according to step 4G, the second layer of the photomasks is used to align the wafer with the entire area of the wafer ', and the second alignment points corresponding to the second layer of photomasks (original alignment points) are obtained. Step 50, calculate the first alignment points and the second pairs --------- 1 ------ order ---- line c ---- read the precautions on the back first Fill in this f) This paper size applies to Chinese National Standards (CNS) A4 «L # (210 X297 ^] ~~-Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Distillery 420o03 A7 B7 V. Description of the invention (5) Punctuality According to the error, the wafer alignment overlap correction is performed in sequence. As step 60, the above steps 30 to 50 are repeated for subsequent masks of the masks, for example, the crystal mask is first defined by the second mask. A second layer pattern is formed in the areas to be processed, and then the above steps are repeated for the third layer of mask or its subsequent mask to calculate the third or subsequent alignment point errors, and the overlap correction is performed accordingly. Take the two-layer initial mask and subsequent mask as an example, as shown in Figures 2 to 4 ^, please refer to Figure 2, which shows an implementation of the present invention In the example, the initial mask 240 is used to define the wafer 200 to form a first layer pattern on the region to be processed 206, and a plurality of first alignment points corresponding to the original alignment points (Xη, γη) are formed on the scribe line 201 ( Χη ′, Υη,). The surface of the wafer 200 is generally formed by a plurality of dicing tracks 201 divided into regions to be processed 206, and the lithography process requires the use of various layers of masks for exposure and development, such as providing a The initial mask 240 in FIG. 2 and the subsequent mask 340 in FIG. 3 respectively have a first layer pattern 246 and a second layer pattern 346 corresponding to the region 206 to be processed, and the initial mask 240 and the subsequent light A plurality of original alignment points (Xη, Υη) are formed at the positions of the mask 340 corresponding to the cutting paths 241 and 341. Then, the initial mask 240 is used to define the wafer 200 and a first layer pattern is formed in the region to be processed 206 ( (Not shown), and a plurality of first alignment points (Xη ', Υη') corresponding to the original alignment points (Xη, Υη) are formed on the scribe lines 201 of the wafer 200. For example, when an optical stepper (optic stepper) using photomask-wafer direct alignment (in-axis; TTL: through the lens) This paper size is applicable to Chinese National Standard (CNS) A4 specification < 210X297 male pan) ----------- Λ ------ Order -------嗥 (#Read the precautions on the back before filling this page) • η No. 87105927 Patent Specification Amendment Page A7 Β7 Revision Date: 89. (½ -——————? Amendment printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (6): First, a full-area alignment mark 242, 244 can be made on the initial mask 240, and a He-Ne Laser of the exposure system 260 is used to align the wafer. Marks 202 and 204 are followed by an optical stepper to measure the relative position of the wafer 200 in an inter-fie manner, and step-and-repeat through the lens 220 (step-and- repeat) to expose the first layer pattern to the area to be processed 206 »Please refer to FIG. 3, which shows an embodiment of the present invention, aligning the wafer 200 with the entire area of the subsequent photomask 340, According to the original alignment points (Xη, Υη) of the subsequent photomask, a plurality of second alignment points (Xη '', Υη '') corresponding to the cutting track 201 are obtained. For example, a full-area alignment mark 342, 344 is made on the subsequent photomask 340, and a helium-neon laser (He-Ne Laser) is used to align the wafer marks 202, 204, and then by an optical stepper (Optic stepper) Perform full-area alignment in an inter-field manner to measure the relative position of the wafer 200, and perform the area to be prepared according to the original alignment points (Xη, γη) of the subsequent photomask 340 Intra-field alignment, to obtain a plurality of second alignment points (Xn '', Yn '') corresponding to the cutting track 201. Then refer to FIG. 4 to calculate the errors between the first alignment points (Xη ', Υη') and the second alignment points (Xn '% Yn' '), such as translation error, rotation error ( rotation error) and magnification error (magnification error), and the wafer alignment overlap correction is performed according to the error. After the wafer 200 of the first layer pattern has been defined and the overlap correction is completed, the subsequent exposure and development process of the photomask 340 can be performed to transfer the pattern of the second layer in the area to be processed 206. This paper size applies to Chinese national standards (CNS> A4 size (210 X 297 mm) U ^ 1 * n n I n I I (Please read the precautions on the back before filling in this page> 4 20〇 Α7

Β7 由於本實施例之微影製程,係先以全區對 (請先閱讀背面之注意事項再填寫本頁) 準記號對光罩與晶圓進行全區即區對區(inter_field)對 準,定出晶圓之相對位置後,接著於切割道上設置複數個 對準點,以進行待製區本區之對準’取得重疊錯誤(overlay error)值後,由步進機進行重疊校正’再予以曝光顯影,移 轉正確之圖案至待製區上’如此光罩和晶圓之間的相對位 置錯誤,透鏡之失真或放大倍率之錯誤,以及因溫度偏移 導致之曝光系統之不穩定均可藉以修正,使微影製程之重 疊規格(overlay specification)較為寬鬆。 本發明中所應用之物質材料,並不限於實施例所引述 者,其能由各種具恰當特性之物質和形成方法所置換,且 本發明之結構空間亦不限於實施例引用之尺寸大小。 雖然本發明已以一較佳實施例揭露如下,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可做些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者為準。 符號說明 經濟部智慧財產局員工消費合作社印數 光罩〜14〇 ;晶圓〜100 ;透鏡〜120 ;曝光系統〜160 ;全區 對準記號〜142、144 ;晶圓記號〜102、104 ;待製區〜106 ;切 割道〜101 ;圖案〜146 ;原始對準點〜(Χη,Υη);第一對準點 〜(又11’,丫11’);第二對準點〜(又11,’,丫11,,);初始光罩〜240;晶圓 〜200 ;待製區〜206 ;切割道〜201 ;後續光罩〜340 ;第一 層圖案~246 ;第二層圖案~346 ;切割道〜241、341 ;全區對 準記號〜242、244 ;曝光系統〜260 ;晶圓記號〜202、204 ;透 鏡〜220 ;全區對準記號〜342、344。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)Β7 Because of the lithography process of this embodiment, the whole area is first aligned (please read the precautions on the back before filling this page). After the relative position of the wafer is determined, a plurality of alignment points are set on the dicing path to perform the alignment of the local area of the to-be-processed area. After obtaining an overlay error value, the stepper performs an overlay correction and then gives it. Exposure and development, transfer the correct pattern to the area to be processed 'so that the relative position between the mask and the wafer is wrong, the lens is distorted or the magnification is wrong, and the exposure system is unstable due to temperature deviation. By this, the overlay specification of the lithography process is loosened. The material materials used in the present invention are not limited to those cited in the examples, they can be replaced by various materials and forming methods with appropriate characteristics, and the structural space of the present invention is not limited to the dimensions cited in the examples. Although the present invention has been disclosed in the following with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. Symbol descriptions: Intellectual Property Bureau, Ministry of Economic Affairs, Employees' Cooperative Printing Copies Mask ~ 14; Wafers ~ 100; Lenses ~ 120; Exposure System ~ 160; All-area alignment marks ~ 142,144; Wafer marks ~ 102,104; Area to be prepared ~ 106; Cutting path ~ 101; Pattern ~ 146; Original alignment point ~ (χη, Υη); First alignment point ~ (and 11 ', y11'); Second alignment point ~ (and 11, ' , Ya11 ,,); initial mask ~ 240; wafer ~ 200; waiting area ~ 206; cutting path ~ 201; subsequent mask ~ 340; first layer pattern ~ 246; second layer pattern ~ 346; cutting Lanes ~ 241, 341; full area alignment marks ~ 242, 244; exposure system ~ 260; wafer marks ~ 202, 204; lenses ~ 220; full area alignment marks ~ 342, 344. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

修正日期:89.09.1$Last revision date: 89.09.1 $ 經濟部智慧財產局員工消費合作杜印製 顧 第87丨〇5927號申請專利範圍修正本啟 C8 D8 一種晶圓對準之重疊校正方法,包括下列步驟: 於該晶圓表面形成一由複數條切割道分割形成之待 製區; 提供一初始光罩及後續光罩,其分別具有對應該待製 區之第一層圖案及第二層圖案,且在該初始光罩及後續光 罩對應該些切割道之位置各形成有複數個原始對準點; 以該初始光罩定義該晶圓而於該待製區形成一第一 層圖案,並於該晶圓之該些切割道上形成對應該些原始對 準點之複數個第一對準點; 以該後續光罩全區對準該晶圓,並於該晶圓之該些切 割道上,取得對應該後續光罩之該些原始對準點之複數個 第二對準點; 計算該些第一對準點與該些第二對準點之誤差;及 依據該誤差進行晶圓對準之重疊校正。 2.如申請專利範圍第1項所述之方法,其中,該對準 方式係以氮-氣雷射進行D 3‘如申請專利範圍第1項所述之方法,其中,該初始 光罩及後續光罩於一既定位置包括至少一全區對準記號。 4. 如申請專利範圍第3項所述之方法,其中,該晶圓 於一既定位置包括一對應該全區對準記號之記號,用以進 行全區對準,定出該晶圓之相對位置。 5. 如申請專利範圍第1項所述之方法,其中,該誤差 包括一位移誤差。 6·如申請專利範圍第1項所述之方法,其中,該誤差 10 本紙張尺度適用_—國豕標準(CNS)A4規格(2ι〇 X视公楚) " 一 -: 一Employees' Cooperation of Intellectual Property Bureau of the Ministry of Economic Affairs, Du Yinzhi Gu No. 87 丨 〇5927 Application for Patent Scope Amendment Rev. C8 D8 A wafer alignment overlapping correction method includes the following steps: A plurality of strips are formed on the surface of the wafer. A to-be-prepared area formed by dividing the cutting lane; providing an initial photomask and a subsequent photomask, each having a first layer pattern and a second layer pattern corresponding to the to-be-produced area, and corresponding to the initial photomask and the subsequent photomask A plurality of original alignment points are formed at the positions of the scribe lines; the wafer is defined by the initial mask to form a first layer pattern in the region to be processed, and corresponding ones are formed on the scribe lines of the wafer. A plurality of first alignment points of the original alignment point; align the wafer with the entire area of the subsequent mask, and obtain a plurality of the original alignment points corresponding to the subsequent mask on the cutting lines of the wafer A second alignment point; calculating an error between the first alignment points and the second alignment points; and performing an overlap correction of wafer alignment based on the error. 2. The method according to item 1 of the scope of patent application, wherein the alignment method is D 3 ′ using a nitrogen-gas laser. The method according to item 1 of the scope of patent application, wherein the initial mask and The subsequent photomask includes at least one full-area alignment mark at a predetermined position. 4. The method as described in item 3 of the scope of patent application, wherein the wafer includes a pair of marks corresponding to a full-area alignment mark at a predetermined position for performing full-area alignment and determining the relative position of the wafer. position. 5. The method according to item 1 of the patent application scope, wherein the error includes a displacement error. 6. The method as described in item 1 of the scope of patent application, wherein the error 10 paper size is applicable _-National Standard (CNS) A4 specification (2ι〇 X depending on the public) " a-: a 經 濟 部 智 慧 財 產 局 員 消 費 合 社 印 製 六、甲讀^專fi k圍 包括一旋轉誤差。 7. 如申請專利範圍第】項所述之方法’其中,該誤差 包括一放大倍率誤差。 8. 種晶圓對準之重疊校正方法,包括下列步驟: (a) 於該晶圓表面形成複數個待製區; (b) 提供複數個光罩,其分別具有對應該些待製區之複 數層圖案,且各形成有複數個原始對準點; (c) 以該些光罩之第一層光罩定義該晶圓而於該些待 製區形成一第一層圖案,並形成對應該些原始對準點之複 數個第一對準點; (d) 以該些光罩之第二層光罩全區對準該晶圓,並取得 對應該第二層光罩之該些原始對準點之複數個第二對準 枣I·- A8 B8 C8 D8 閱 讀 背 之 注 意 事 項 再 填 k 點; (e)計算該些第一對準點與該些第二對準點之誤差,並 依據該誤差進行晶圓對準之重疊校正;及; (〇對該些光罩之後續光罩重複上述步驟(C)至(e)。 9. 如申請專利範圍第8項所述之方法,其中,該步驟 (a)為於該晶圓表面形成一由複數條切割道分割形成之複 數個待製區。 10. 如申請專利範園第9項所述之方法,其中,該步 驟(b)為提供複數個光罩,其分別具有對應該待製區之複數 層圖案,且在該些光罩對應該些切割道之位置各形成有複 數個原始對準點。 一種晶圓對準之重疊校正方法,包括下列步驟: 11 頁 I I I I I 訂 線 本紙張尺㈣靴NS)織格⑵〇 x 297公釐) 4 4 一一· ^ A8 B8 C8 D8 利範圍 (a) 於該晶圓表面形成一由複數條切割道分割形成之 複數個待製區; (b) 提供複數個光罩’其分別具有對應該些待製區之複 數層圖案’且在該些光罩對應該些切割道之位置各形成有 複數個原始對準點; (C)以該些光罩之第一層光罩定義該晶圓而於該些待 製區开^成一第一層圖案,並於該晶圓之該些切割道上形成 對應該些原始對準點之複數個第一對準點; (d) 以該些光罩之第二層光罩全區對準該晶圓,並於該 晶圓之該些切割道上,取得對應該第二層光罩之該些原始 對準點之複數個第二對準點; (e) 計算該些第一對準點與該些第二對準點之誤差; (f) 依據該誤差進行晶圓對準之重疊校正; (g) 以該第二層光罩定義該晶圓而於該些待製區形成 一第二層圖案;及 (h) 依序對該些光罩之後續光罩重複步驟(句至。 (請先閲讀背面之注意事項再填寫本頁) 裝 ----訂---------^ 經濟部智慧財產局員工消費合作社印製Printed by the Consumer Affairs Bureau of the Intellectual Property Agency of the Ministry of Economic Affairs 6. Cooperative readings include a rotation error. 7. The method according to item [Scope of the Patent Application], wherein the error includes a magnification error. 8. An overlapping alignment method for wafer alignment, including the following steps: (a) forming a plurality of regions to be processed on the surface of the wafer; (b) providing a plurality of photomasks, each of which has a corresponding number of regions to be processed. A plurality of layers of patterns, each of which is formed with a plurality of original alignment points; (c) a first layer of masks of the masks is used to define the wafer and a first layer of patterns is formed in the regions to be processed, and corresponding to A plurality of first alignment points of the original alignment points; (d) aligning the wafer with the entire area of the second layer of the masks, and obtaining the original alignment points corresponding to the second layer of the masks; A plurality of second alignment dates I ·-A8 B8 C8 D8 Notes for reading the back and fill in k points; (e) Calculate the errors between the first alignment points and the second alignment points, and perform crystallography based on the errors. Overlap correction of circular alignment; and (0) Repeat the above steps (C) to (e) for subsequent masks of these masks. 9. The method according to item 8 of the scope of patent application, wherein this step ( a) To form a plurality of areas to be processed on the surface of the wafer, which are formed by dividing a plurality of scribe lines. The method according to item 9 of Lee Fan Garden, wherein step (b) is to provide a plurality of photomasks, each of which has a plurality of layer patterns corresponding to the area to be prepared, and the positions of the photomasks corresponding to the cutting lines A plurality of original alignment points are formed each. A method of wafer alignment overlap correction includes the following steps: 11-page IIIII Binding Book Paper Ruler Boots NS) Weave Grid 〇 × 297 mm) 4 4 One One · ^ A8 B8 C8 D8 Advantages (a) Form a plurality of areas to be formed on the wafer surface divided by a plurality of cutting lanes; (b) Provide a plurality of photomasks' which respectively have a plurality of areas corresponding to those areas to be produced Layer patterns' and a plurality of original alignment points are formed at the positions of the masks corresponding to the scribe lines; (C) the first layer of masks of the masks is used to define the wafer and the areas to be processed; A first layer pattern is formed, and a plurality of first alignment points corresponding to the original alignment points are formed on the scribe lines of the wafer; (d) the entire area of the second layer masks of the masks are aligned Align the wafer and obtain the alignment on the scribe lines of the wafer. A plurality of second alignment points of the original alignment points of the second mask; (e) calculating the errors between the first alignment points and the second alignment points; (f) performing wafer alignment based on the errors Standard overlap correction; (g) defining the wafer with the second layer of mask and forming a second layer pattern on the areas to be processed; and (h) repeating the steps of the subsequent masks of the masks in order (Sentence to. (Please read the precautions on the back before filling out this page) Binding ---- Order --------- ^ Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
TW87105927A 1998-04-17 1998-04-17 Overlay correction method of wafer alignment TW420833B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW87105927A TW420833B (en) 1998-04-17 1998-04-17 Overlay correction method of wafer alignment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW87105927A TW420833B (en) 1998-04-17 1998-04-17 Overlay correction method of wafer alignment

Publications (1)

Publication Number Publication Date
TW420833B true TW420833B (en) 2001-02-01

Family

ID=21629903

Family Applications (1)

Application Number Title Priority Date Filing Date
TW87105927A TW420833B (en) 1998-04-17 1998-04-17 Overlay correction method of wafer alignment

Country Status (1)

Country Link
TW (1) TW420833B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6405096B1 (en) * 1999-08-10 2002-06-11 Advanced Micro Devices, Inc. Method and apparatus for run-to-run controlling of overlay registration

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6405096B1 (en) * 1999-08-10 2002-06-11 Advanced Micro Devices, Inc. Method and apparatus for run-to-run controlling of overlay registration

Similar Documents

Publication Publication Date Title
TW530361B (en) Multi-layer registration control for photolithography processes
JP3328323B2 (en) Method for manufacturing phase shift mask and method for manufacturing semiconductor integrated circuit device
TW588414B (en) Alignment method, overlap inspecting method and mask
US6841315B2 (en) Graytone mask and manufacturing method thereof
JP5645261B2 (en) Photomask manufacturing method
JP2006208429A (en) Method for forming double-side mask
TW541642B (en) Wafer alignment method
JPWO2004077155A1 (en) Photomask and semiconductor device manufacturing method
TW407302B (en) Photomask for use in manufacturing semiconductor and method of forming resist pattern
TW420833B (en) Overlay correction method of wafer alignment
WO2023236254A1 (en) Photomask pattern correction method, system, photomask and preparation method therefor
JP4029828B2 (en) Method for manufacturing double-sided mask blank and method for manufacturing double-sided mask
JP5644290B2 (en) Photomask manufacturing method
JP2003297742A (en) Multiple exposure method and computer-readable recording medium for recording multiple exposure method program
TWI755683B (en) Method of repairing a photomask, method of manufacturing a photomask, photomask, and method of manufacturing a display device
US7579121B2 (en) Optical proximity correction photomasks
JP2003248296A (en) Exposure mask and method of manufacturing the same, and method of forming transfer pattern
TW390978B (en) Method of inspecting the mask pattern by use of vernier with separate exposure alignment
US7581203B2 (en) Method and apparatus for manufacturing multiple circuit patterns using a multiple project mask
JP3120345B2 (en) Phase shift mask and semiconductor device
TWI809696B (en) Photolithographic pattern overlay correction method, mask pattern generation method, and system
TW455747B (en) Method inspecting segmented exposure alignment of photomask
JP3529967B2 (en) Manufacturing method of photomask blanks with alignment marks
TW451295B (en) Method to calibrate the alignment system of exposure machine and lens device
TW587200B (en) Method for improving intrafield overlay accuracy

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MK4A Expiration of patent term of an invention patent