TW327242B - Method of global planarization in fabricating integrated circuit devices - Google Patents
Method of global planarization in fabricating integrated circuit devicesInfo
- Publication number
- TW327242B TW327242B TW085111201A TW85111201A TW327242B TW 327242 B TW327242 B TW 327242B TW 085111201 A TW085111201 A TW 085111201A TW 85111201 A TW85111201 A TW 85111201A TW 327242 B TW327242 B TW 327242B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- sacrificial material
- integrated circuit
- circuit devices
- fabricating integrated
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 4
- 239000000463 material Substances 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 5
- 238000005530 etching Methods 0.000 abstract 2
- 230000001419 dependent effect Effects 0.000 abstract 1
- 238000005498 polishing Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/554,501 US5885900A (en) | 1995-11-07 | 1995-11-07 | Method of global planarization in fabricating integrated circuit devices |
Publications (1)
Publication Number | Publication Date |
---|---|
TW327242B true TW327242B (en) | 1998-02-21 |
Family
ID=24213600
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW085111201A TW327242B (en) | 1995-11-07 | 1996-09-13 | Method of global planarization in fabricating integrated circuit devices |
Country Status (5)
Country | Link |
---|---|
US (1) | US5885900A (zh) |
EP (1) | EP0773581A1 (zh) |
JP (1) | JPH09167800A (zh) |
KR (1) | KR970030624A (zh) |
TW (1) | TW327242B (zh) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6395620B1 (en) * | 1996-10-08 | 2002-05-28 | Micron Technology, Inc. | Method for forming a planar surface over low density field areas on a semiconductor wafer |
JP3111928B2 (ja) | 1997-05-14 | 2000-11-27 | 日本電気株式会社 | 金属膜の研磨方法 |
US6280644B1 (en) * | 1998-06-05 | 2001-08-28 | Agere Systems Guardian Corp. | Method of planarizing a surface on an integrated circuit |
US6180525B1 (en) | 1998-08-19 | 2001-01-30 | Micron Technology, Inc. | Method of minimizing repetitive chemical-mechanical polishing scratch marks and of processing a semiconductor wafer outer surface |
US6140200A (en) | 1998-09-02 | 2000-10-31 | Micron Technology, Inc. | Methods of forming void regions dielectric regions and capacitor constructions |
US6051496A (en) * | 1998-09-17 | 2000-04-18 | Taiwan Semiconductor Manufacturing Company | Use of stop layer for chemical mechanical polishing of CU damascene |
US6287972B1 (en) * | 1999-03-04 | 2001-09-11 | Philips Semiconductor, Inc. | System and method for residue entrapment utilizing a polish and sacrificial fill for semiconductor fabrication |
US6258711B1 (en) * | 1999-04-19 | 2001-07-10 | Speedfam-Ipec Corporation | Sacrificial deposit to improve damascene pattern planarization in semiconductor wafers |
DE10022656B4 (de) * | 2000-04-28 | 2006-07-06 | Infineon Technologies Ag | Verfahren zum Entfernen von Strukturen |
KR100363093B1 (ko) * | 2000-07-28 | 2002-12-05 | 삼성전자 주식회사 | 반도체 소자의 층간 절연막 평탄화 방법 |
US6383935B1 (en) | 2000-10-16 | 2002-05-07 | Taiwan Semiconductor Manufacturing Company | Method of reducing dishing and erosion using a sacrificial layer |
DE10147929C1 (de) * | 2001-09-28 | 2003-04-17 | Infineon Technologies Ag | Verfahren zum Herstellen einer Halbleiterstruktur und Verwendung des Verfahrens |
KR100439047B1 (ko) * | 2001-12-29 | 2004-07-05 | 주식회사 하이닉스반도체 | 반도체 소자의 평탄화 방법 |
TWI237327B (en) * | 2003-11-18 | 2005-08-01 | Powerchip Semiconductor Corp | Method of forming barrier layer |
US7393789B2 (en) * | 2005-09-01 | 2008-07-01 | Micron Technology, Inc. | Protective coating for planarization |
US7838427B2 (en) * | 2006-01-13 | 2010-11-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for planarization |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
US20090133908A1 (en) * | 2007-11-28 | 2009-05-28 | Goodner Michael D | Interconnect structure for a microelectronic device, method of manfacturing same, and microelectronic structure containing same |
US20120264300A1 (en) * | 2011-04-13 | 2012-10-18 | Nanya Technology Corporation | Method of fabricating semiconductor component |
CN103854967B (zh) * | 2012-11-30 | 2017-09-22 | 中国科学院微电子研究所 | 平坦化处理方法 |
DE102015106441B4 (de) * | 2015-04-27 | 2022-01-27 | Infineon Technologies Ag | Verfahren zum Planarisieren eines Halbleiterwafers |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB375258A (en) * | 1930-02-19 | 1932-06-23 | Renault Louis | Improvements in or relating to the ports of internal combustion engines |
US4671851A (en) * | 1985-10-28 | 1987-06-09 | International Business Machines Corporation | Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique |
US4944836A (en) * | 1985-10-28 | 1990-07-31 | International Business Machines Corporation | Chem-mech polishing method for producing coplanar metal/insulator films on a substrate |
US4874463A (en) * | 1988-12-23 | 1989-10-17 | At&T Bell Laboratories | Integrated circuits from wafers having improved flatness |
US5284804A (en) * | 1991-12-31 | 1994-02-08 | Texas Instruments Incorporated | Global planarization process |
US5312512A (en) * | 1992-10-23 | 1994-05-17 | Ncr Corporation | Global planarization using SOG and CMP |
US5362669A (en) * | 1993-06-24 | 1994-11-08 | Northern Telecom Limited | Method of making integrated circuits |
JPH07249626A (ja) * | 1994-03-10 | 1995-09-26 | Toshiba Corp | 半導体装置の製造方法 |
US5516729A (en) * | 1994-06-03 | 1996-05-14 | Advanced Micro Devices, Inc. | Method for planarizing a semiconductor topography using a spin-on glass material with a variable chemical-mechanical polish rate |
-
1995
- 1995-11-07 US US08/554,501 patent/US5885900A/en not_active Expired - Lifetime
-
1996
- 1996-09-13 TW TW085111201A patent/TW327242B/zh active
- 1996-10-29 EP EP96307796A patent/EP0773581A1/en not_active Withdrawn
- 1996-11-07 JP JP8294282A patent/JPH09167800A/ja active Pending
- 1996-11-15 KR KR1019960054151A patent/KR970030624A/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
JPH09167800A (ja) | 1997-06-24 |
EP0773581A1 (en) | 1997-05-14 |
KR970030624A (ko) | 1997-06-26 |
US5885900A (en) | 1999-03-23 |
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