2i942〇 A6 B6 經濟部中央標準局Λ工消费合作社印製 五、發明説明（1 ) 本發明是與一可Μ將一二維區塊的输入元素轉換成為一 二维區塊的输出元素的影像轉換器有關。本發明並且與一 使用本影像轉換器的電視傳输糸統Μ及此電視傳输系統的 發射器和接收器有關。 為了要降低位元傳输率而將一數位電視訊號作二維影像 轉換是一已知的方法。一雷視影像會先被分成由NxH (通 常是8x8)個畫面元素所構成的次影像然後這些次影像會 被轉換成為由NxN個係數所構成的區塊。位元傳輸率的降 低則可藉由僅傳送最重要的係數而得以達成。在接收器内 ，所接收到的係數則被Μ區塊為單位地轉換成為由N X N個 耋面元素所構成的次影像。一般而言，這些工作均是使用 離散餘弦轉換（DCT) Μ及其反轉換（iDCT)。 此處的二維影像轉換可以分割成為依序執行的兩種分開 的-維轉換。在第一次轉換中，每一列的耋面元素均會被 轉換成後文所稱的產品元素列。接著這些一列列的產品元 素會被Μ行的方式作第二次轉換*然後成為係數。在反轉 換中，每一行的係數則會被Μ類似的方式轉換成為產品元 素行；之後在第二次轉換中|每一列的產品元素均會被轉 換成為一列耋面元素。一般而言，對列所作的轉換稱為「 水平轉換J ，對行作的轉換則稱為「垂直轉換J 。將已被 DCT轉換成列的產品元素Κ行的方式再送往處理，這樣的 動作稱為轉置；在反轉換（i DCT)中，同樣的定義亦適用。 雖然下文文中，我們僅考慮正轉換（DCT)的情形，但同樣 的考慮亦可用於反轉換（iDCT)中。同時下文中區換大小將 (請先閲讀背面之注意事項再埸寫本頁) :p 丨裝· 訂. Γ, 本紙張尺度遴用中國國家標準（CNS)甲4规格（210 X 297公* ) 82.3. 40,000 ^t942〇 A6 B6 經濟部中央標準局貝工消费合作社印製 五、發明説明（2 ) 被假設為8 X 8。 與本文（詳细說明）第一段中所描述的具有相同功能的影 像轉換器已在歐洲專利EP-A 0 424 119號中有所介紹。此 一已知的影像轉換器由一個一維轉換器構成，後者先將一 區塊中所有的叢面元素K列的方式進行轉換，並將所得的 產品元素置在一轉置記憶體（水平轉換）中。然後再將所有 轉置過的產品元素送入同樣的一維轉換器Μ計算其係數（ 垂直轉換）。垂直轉換在水平轉換未全部完成前無法開始 〇 在對一有8x8個畫面元素的區^i做全二維轉換時，在即 時處理的情形下，可用的時間有64僩與產生晝面元素的取 樣頻率同樣的時鐘週期。在已知的影轉換中，轉換8列影 像元素的工作必須在這些時鐘週期的半數|也就是32個週 期中進行。因此盡面元素必須Μ兩倍的逮率送入影像轉換 器。對檷準的，具有傳統的20兆赫時鐘振盪率的電視信號 而言，這是相當不利用；因為高時鐘振盪率對晶片面積Μ 及功率濟耗均有不良影響。這是一涸嚴重的缺點，特別是 對可機式的產品諸如數位攝錄影機而言。而且，雙倍的時 鐮振徽率會相當程度地陏礙數位高解像度電視（HDTV)的發 展，因為其基礎就是建立在非常高的時鐘振通率上。 本發明的目的就是要提供一涸可以改進上述缺點的影像 轉換器。為達此目的，此影像轉換器的特徴為包含了一個 可交替地選擇一區塊的一糸列輸入元素或是前一個區塊的 已轉置過的產品元素*並將之送入一維轉換器的多工器。 (請先閲讀背面之注意事項再塡寫本頁) 本紙張尺度遴用中國國家標準（CNS)甲4规格（210 X 297公釐） 82.3. 40,000 ^1^42〇 a6 _B6 五、發明説明（3 ) 藉由對前一涸區塊’而非本區塊的資料進行第二次轉換的 方法，刖前述的第二次轉換可在一區塊的第一次轉換完成 前進行。因此不再需要在垂直轉換開始之前’ W兩倍的速 率將一區塊的有耋面元素送入轉換器。 本影像轉換器其—較佳的霣施方式之特徵為’它包含有 可將選定的糸列元素以平行的方式送人一維轉換器的元件 。—巨一列元素已具平行形態，則此列即被進行水平轉換 ,而一行產品元素則被進行垂直轉換。在這些轉換進行時 ，下一列元素的準備工作刖可繼續進行。此工作是Μ正常 取樣頻率進行，故較高的振盪率在任何地方均不會發生。 每一髑產品元素，每一個由產生的係數以及每一個 由ii)CT產生的畫面元素均是由送入一維轉換器的系列元素 中的八個元素的線性組合所構成。文獻上已刊載有許多計 算方法，使得乘法運算所需的次數（理論上每個產品元素 褥要8次，也就是每列需要6 4次）被降低到可Μ接受的程 度，舉例來說，每列1 6次乘法理算。上述的被稱為” D C Τ butterfly”的計算法指出下列嫌點方向：⑴盡面元素藉由 加減法埋算而安排成群，⑵對這些元素群進行乘法運算* ®乘出來的结果再利用加減法予K姐合。一個很好的例子 在歐洲專利EP 0 286 1 83中有所說明。 ------------—ο-------裝------訂—h線 —- (請先閲讀背面之注意事項再^:寫本頁) 經濟部中央標準局員工消费合作社印製 選步 對同 可的 為樣 態這 形。 的合 器姐 換性 轉線 維的 1 定 本預 , 多 中許 式行 方進 腌時 霣同 的素 佳元 較列 1 前 在的 定 面不 畫器 中法 者乘 後僩 , 這 倍。 多器 許法 上乘 快入 法送 算並 計存 績儲 連， 的群 用成 所姐 前序 目依 比被 法是 箄素 計元 一準 - i家 躍 國 中 用 適 s)2i942〇A6 B6 Printed by the Central Standards Bureau of the Ministry of Economy, Industry and Consumer Cooperatives V. Description of the invention (1) The present invention is an image that can convert an input element of a two-dimensional block into an output element of a two-dimensional block Converter related. The invention also relates to a TV transmission system using the image converter and the transmitter and receiver of the TV transmission system. In order to reduce the bit transmission rate, it is a known method to convert a digital TV signal into a two-dimensional image. A thunder vision image is first divided into sub-images composed of NxH (usually 8x8) screen elements and then these sub-images are converted into blocks composed of NxN coefficients. The reduction of the bit transmission rate can be achieved by transmitting only the most important coefficients. In the receiver, the received coefficients are converted into a secondary image composed of N × N facets in units of M blocks. Generally speaking, these works are using discrete cosine transform (DCT) M and its inverse transform (iDCT). The two-dimensional image conversion here can be divided into two separate-dimensional conversions performed sequentially. In the first conversion, the faceted elements of each column will be converted into the product element columns referred to below. Then these columns of product elements will be converted a second time by M rows * and then become coefficients. In the inversion conversion, the coefficients of each row will be converted into product element rows in a similar manner; then in the second conversion | the product elements of each column will be converted into a column of flat elements. Generally speaking, the conversion to the column is called "horizontal conversion J", and the conversion to the row is called "vertical conversion J." The product element K rows that have been converted into columns by DCT are then sent to the process. The action is called transposition; in reverse conversion (i DCT), the same definition also applies. Although in the following, we only consider the case of forward conversion (DCT), but the same considerations can also be used in reverse conversion (iDCT). At the same time, the size of the middle area below will be changed (please read the precautions on the back before writing this page): p 丨 install · order. Γ, the paper size is selected according to the Chinese National Standard (CNS) A 4 specifications (210 X 297 g * ) 82.3. 40,000 ^ t942〇A6 B6 Printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. The description of invention (2) is assumed to be 8 X 8. It is the same as that described in the first paragraph of this article (detailed description) The functional image converter has been introduced in European Patent EP-A 0 424 119. This known image converter consists of a one-dimensional converter, which first combines all the cluster elements K in a block Conversion by column, and place the resulting product elements In a transposed memory (horizontal conversion). Then all the transposed product elements are sent to the same one-dimensional converter M to calculate its coefficient (vertical conversion). The vertical conversion cannot start before the horizontal conversion is completed. 〇When performing a full two-dimensional conversion on an area with 8x8 screen elements, in the case of real-time processing, the available time is 64 clock cycles that are the same as the sampling frequency at which the day surface elements are generated. In the image conversion, the conversion of 8 columns of image elements must be performed in half of these clock cycles |, that is, 32 cycles. Therefore, all the elements must be sent to the image converter twice the catch rate. For the standard, with For traditional TV signals with a 20 MHz clock oscillation rate, this is quite unused; because the high clock oscillation rate has an adverse effect on the chip area M and power consumption. This is a serious shortcoming, especially for the machine. Products such as digital camcorders. Moreover, double the time sickle symbol rate will greatly hinder the development of digital high-resolution TV (HDTV), because its foundation is built on The clock vibration rate is always high. The purpose of the present invention is to provide a video converter that can improve the above disadvantages. To achieve this purpose, the feature of this video converter is to include a block that can alternately select a block A list of input elements or the transposed product elements of the previous block * and send them to the multiplexer of the one-dimensional converter. (Please read the precautions on the back before writing this page) This paper size Use the Chinese National Standard (CNS) Grade 4 specifications (210 X 297 mm) 82.3. 40,000 ^ 1 ^ 42〇a6 _B6 V. Description of the invention (3) By comparing the previous “block” instead of this block ’s The method for the second conversion of data. The aforementioned second conversion can be performed before the completion of the first conversion of a block. Therefore, it is no longer necessary to send a block of faceted elements into the converter at twice the rate before vertical conversion begins. The feature of this image converter, which is the preferred method of application, is that it contains elements that can send the selected elements of the column to the one-dimensional converter in a parallel manner. -A column of elements has a parallel form, then this column is converted horizontally, and a row of product elements is converted vertically. While these conversions are in progress, the preparation of the next column of elements can continue. This work is carried out at the normal sampling frequency, so higher oscillation rates will not occur anywhere. Each element of the product, each generated coefficient, and each picture element generated by ii) CT are composed of a linear combination of eight elements in the series of elements fed into the one-dimensional converter. Many calculation methods have been published in the literature, so that the number of times required for multiplication (theoretically 8 times per product element mattress, that is, 6 4 times per column) is reduced to an acceptable level. For example, 16 multiplications per column. The above-mentioned calculation method called “DC Τ butterfly” points out the following suspected directions: (1) All elements are arranged into groups by addition and subtraction, and (2) multiplication of these element groups * ® the result of multiplication is reused Addition and subtraction are given to Sister K. A good example is described in European Patent EP 0 286 1 83. ------------— ο ------- installed ------ order—h line—- (please read the notes on the back first ^: write this page) Economy The printing and selection steps of the Ministry of Central Standards Bureau ’s employee consumer cooperatives are the same as those of Tongke. The pre-set version of the reversing transfer dimension of the device's sister is pre-determined. When the multi-mode Xu Fangjin is marinated, the same Su Jiayuan is better than the one before the column 1 in the fixed-face drawing device. The multi-device Xufa method is superior, the fast-entry method is used to calculate and store the performance storage company, and the group is used as the sister. The predecessor, the target, and the method are by comparison. The standard is the standard-ijia Yueguo middle school uses s)
釐 公 7 29 X S 82.3. 40,000 219420 Α6 Β6 經濟部中央標準局R工消费合作社印製 五、發明説明（4 ) 斷地接收不同的乘法係敝。循序式計算法看來具有減少硬 體構成的乘法器的數目之優點；但實際上，此類轉換器必 須具有許多暫存器Μ使儲存加滅法所造成的中間结果。上 述的暫存器需要較大的晶Η面積，但同時也會有較大的功 率消耗，因為一塊晶片的功率消耗主要是由暫存器的數目 所決定的。而a—較快的乘法器亦需消耗較多的功率。 構成計算線性組合所需的乘法器的較佳方式為利用組合 式雷路I具工作原理為對一输入數字乘上一預定的固定數 字。針對每一個固定的乘數，其相關的乘法器均可被最佳 化，使得其佔有最小的面積。這樣賴由前述的固定的乘法 器而對產品元素進行同步運算的方式 > 已被證實具有較小 的晶Η面積及較少的功率消耗。 本影像轉換器之一更佳實施方式為，它可接受一指示所 接受到的區塊的動態的動態信號，此時一糸列元素的兩個 預定的部份就會被依序送入一維的轉換器，做為對前述動 態信號的一預定值的反應。 藉由參考下面有翮本發明之實腌方式的具體說明，Μ上 所提的Μ及其它有關本發明的各方面均可獲得清楚的閫釋 。在這些例圖中： 圖一為根據本發明所設計之電視糸统的圖示。 圖二為根據本發明之影像轉換器的功能性結構。 _三為使用於釅二中所示之影像轉換器的一維DCT轉換 器。 圖四及圖六為在圖二中之影像轉換器中所發生之信號。 (請先閲讀背面之注意事項再瑣寫本頁) 本紙張尺度遴用中《國家標準（CNS)甲4规格（210 X 297公釐） 82.3. 40,000 219420 A6 B6 經濟部中央標準局S工消费合作社印製 五、發明説明（5) 阃五所示為_二之影像轉換器中所使用的切換電路。 _七為一可進行反影像轉換之影像轉換器的實施方式。 _八為發生於圖七中之影像轉換器中的一些信號。 _一所示為一使用本發明之影像轉換器的電視糸統。此 電視糸統包含了一繡碼雷路A * —解碼電路B ，以及一連 接_者之傅输頻道C 。此傳输頻道可為無線連接或是有線 連接式。然而，它也可以是磁性或是光學的儲存媒體。編 碼雷路A可能構成電視發射器之一部份，且解碼電路B亦 可構成雷視接收器之一部份。特別的是，這涸電視糸統可 能是以影‘攝影機或是厢1、像iis影機之方式存在。在這種情 形下刖編碼電路A及解碼電路B共存於一裝置中。 編碼雷路A自影像信號源1接收一電視影像信號x(t)。 在類比/數位轉換器2中，類比式之影像信5c(t)M — fs之 取樣頻率取樣後，轉換成八位元之晝面元素x(n)。這些晝 面元素先儲存在影像記憶體3中。然後，晝面元素是Μ區 塊，舉例來說一 8x8畫面元素區塊x(i,k)的方式自影像記 憶體中讀取出來*再送入第一僩影像轉換器4及一動態檢 測器5中。此動態檢測器5本質上乃為一已知之結構，且 可藉描述於歐洲專利EP-A 0 282 135中之方式構成。它可 在檢測得8x8的畫面元素區塊内部的動態後發出一動態信 號MI)。在此後的描述中將假設影像轉換器4之功用為實施 離散餘弦轉換。此轉換器可將每一個出現之晝面元素區塊 轉換成為一 8x8之係數區塊y(u,v)。此一影像轉換器之一 實豳方式下文將會有詳细的討論。值得注意的是，此影像 -7- 本紙張尺度適用tS國家標準（CNS)甲4規格（210 X 297公；^ ) 82.3. 40,000 (請先閲讀背面之注意事項再璜寫本頁) 21^42〇 A6 B6 蛭濟部中央標準局®工消費合作杜印製 五、發明説明（6 ) 轉換器可Μ動態可適性的方式操作。為達成此目檷，此影 像轉換器因而必須接受一動態信號MD。影像轉換器4之f系 數y(u,v)之區塊循序地送入—亦接受動態信號MD之掃瞄器 6 。针對每一區塊此掃瞄器送出一序列之係數y(n)至一可 變長度之編碼器7 。掃瞄器6及可變長度之編碼器7均為 已知之结構。此可變長度編碼器將每一係數y(n>t序列编 碼成為可變長度碼的序列，·此可變長度碼的序列所含之位 元敝較之原來的8x 8係數y(u,v>之區塊有相當程度之減少 。此編碼序列Μ及動態信號MD傅轤時是藉多工器8而採用 時間分割多工（time-divid ion multiplex)的方式，其信 號形式則為眠衢序列z ( j )。 反向搡作則定在解碼霄路B中進行。在分工器 (demultiplexer)中，煽碼序列K及動態信號MD·均可由 接收到的脈衝系列Z ·( 重新獲得。這些編碼序列接著送 入可變長度之解碼器使重建係數y’（n>之序列。一區 塊形成雷路12接收此序列Μ及動態MD，，並由這些資料中 構成係數y”i,k)之8x8大小的區塊。接下來造些係數即 被送入第二影像轉換器13中。此轉換器進行反向離散餘弦 轉換nDCT)使得每一區塊的係數均可被重新轉換成為由8 x8個畫面元素x’（i,k>構成的區域。這些耋面元素區塊 均儲存在一影像記憶體14中。所有儲存在影像記憶體中的 耋面元素共同構成一完整影像；此影像之形成是藉由一數 位/類比韓換器15使原先之數位信號轉換成類比信號 X ’ U ) Μ便顯示在顯示幕1 6上。 (請先閲讀背面之ii意事項再填寫本頁} 本紙張尺_度迷用中國國家標準（CNS)甲4规格（210 X 297公釐） 82.3. 40,000 m1』42〇 A6 _B6 五、發明説明（7 ) 圖二所示為構成部份編碼罨路A之影像轉換器4之實施 方式。如下文中所將描述者•解碼罨路B中的影像轉換器 13有著類似的構造。現在所要描述的是在沒有動態 (MD = 0)的情形下，影像轉換器4處理一 8x8的盡面元素區 塊的操作情形。 一區塊之耋面元素x(i，k)M —列列的方式出現在電路上 ，並且送入循序-平行轉換器20，此循序-平行轉換器自 控制霜路26接受控制信號tl。這些控制信號的選擇方式是 可Μ使得一列i上的8個耋面元素x(i,0)....x(i.7)同時 為可獲取狀態。這一列的畫面元素是以平行的方式送入一 多工器21的输入端。如下文中所將敘述的，此多工器的第 二输入端乃定Μ平行的方式自轉置記憶體24中接受一行8 個產品元素》根據選擇信號t2，此選擇器可以將一列的盡 面元素或是一行的產品元素送入切換電路22。在另一相關 的情形（無動態）中，可能改此切換電路的输出端和输入端 在内部是直接連接的。由多工器21所選擇的元素系列（即 一列的書面元素是一行的產品元素）則被送入一維轉換器 24 ° 經濟部t央標準局R工消費合作社印繁 _3所示为可執行離散餘弦轉換（DCT)之一維轉換器的 實施方式。它是由一群可KK預定的方式姐合一送入的元 素糸列的8個元素10. ..17的加法器及減法器30U)所成 構。此處所形成的元素I之姐合再送入乘法器31(i)，其 功用為將送入的數字乘上一預定的倍數。在圖中每一涸乘 法器的倍數均已標示出來。這些乘過的數字再由一些加法 -9 - 82.3. 40,000 (請先閲讀背面之注意事項再塡寫本頁) 本紙張尺度適用中國國家標準（CNS)甲4规格（210 X 297公笼） ^1-942〇 A6 B6 經濟部中央標準局R工消费合作社印製 五、發明説明（8 ) 器及減法器32(i>重姐，Μ構成8髑输出元素00...07 。 每一個输出值均是由所有榆入值的線性姐合構成。有鼷此 一維轉換器之詳耋描述可參見前面所提的歐洲專利ΕΡ 0 286 183號。注意本圖中的輸入端及输出端並未按照數字 大小順序排列。 回到圖二所示，一維轉換器23的输出0(0 )...0(7)乃是 送入一轉置記憶體24以及一平行-循序轉換器25。此平行 -循序轉換器接收控剌信號t5，以將同時出現的输出元素 轉換成為Μ取樣頻率fs存在的循序形式。轉置記憶體2 4包 含有第一記憶體241 Μ及第二記憶體242 *並分別接受寫 入位址ΟΙ ，WA2 ，以使儲存输出元素。而且，轉置記憶 體又分別接受讀取位址R A 1 ，R A 2 ，Μ便將之前所儲存的 输出元素送至多工器的第二输入端。此處各種的控制信號 ，寫入位址以及讀取位址均是由控制電路26產生。為達成 此功能，此電路接受取樣頻率fs，動態信號MD及裝置重置 脈衝FRS 。此裝置重置脈衝是由影像信號源1處獲得（見 圖一）。 圖四乃是時序圖的方式顯示在影像轉換器4中的各種信 號。目前正在處理當中的畫面元素區塊之列；的一系列元 素x<i,k>是檷示在A行。在圖中所舉的例子為* A行所示 為區塊N的最後一列元素\ (0,7)..^(7,7>(在時間丁1内） ，Μ及下一個區塊N + 1的第一列元素<(0,0)...)((0,7)(在 時間Τ2内）。循序-平行轉換器20的檐出信號則是標示在 Β行。依據圖中的r(7)和「（0)所示，區塊Ν的第7列元素 (請先閲讀背面之注意事項再塡寫本頁) -0. -裝. ,ΤΓ. Λ',線. 本紙張尺度適用中國®家標準（CNS)甲4规格（210 X 297公货） 82.3. 40,000 A6 B6 2-^420 五、發明説明（9 ) (請先閲讀背面之注意事項再項寫本頁) (T2内）Μ及區塊NM(T3内）的第0列元素乃是以平行的方 式依序出現在多工器21的第一输入端上。控制此多工器的 挖制信號則是顯示在E行。 下列的程序是發生在時間T2内。在T2的前半段内，多工 器選擇了畫面元素列「（7)並將其送入轉換器23。圖中的F 行顯示對「（7)進行的（水平 > 轉換乃是在這段時間内進行 的。同時，為此行所安排的記憶體的寫入位址亦送至第一 記憶照241 。圈中的G行顯示此寫入位址之值為R7，也就 是說此水平轉換的结果是儲存在第一記憶體241的列7中 。在T2時段的後半段，一讀取位址被送至第二記憶體2 42 ，亦即前述的第二記憶艚提供出一列之前儲存的元素的值 。圖中的D行中顯示此讀取位置為C7，亦即此記憶體的第 7行為所謅取的對象。這一行的資料可藉多工器21而出現 在轉換器23的输入端上。此行是在T2時段的後半段被轉換 。在本時段終結時，轉換後的行會送入平行-循序轉換器 25。如圖中的I行所示，轉換後的結果，即係數y(0,7) ...y(7,7)在下一涸時段T3中為可獲取的循序態。為求完 輅說明起見，注意這些仍然是與前一僑區塊N-1相闞的係 數。 經濟部中央標準局員工消費合作钍印袋 在前面描述的例子中，區塊N的每一列畫面元素均已被 轉換，且其结果定儲存在第一記憶賵241中。下面的程序 是發生在時段T3中。在T3的前半中，多工器仍先選擇了循 序-平行轉換器的输入列並將之選入轉換器23。此為區塊 N + 1的「（〇)列。現在轉換的結果要儲存在第二記憶體242 -11 - 本紙張尺度適用中國國家標準（CNS)甲4规格（210 X 297公釐） 82.3. 40,000 21942〇 A6 B6 經濟部中央標準居興工消费含作社印製 五、發明説明（10 ) 中。為此功能，此記憶艏須由寫入位址WA2撵供位址資料 。圖中的Η行顯示此寫入位址之值為R0，亦即此水平轉換 的结果是儲存在第二記憶體2 42的第0行内。在Τ3時段的 後半段，讀取位址R/U送至第一記憶賭241 ，故之前所儲 存的一系列元素又再度被讀取。圖中的C行顯示此讀取位 址R/U的值為C0，亦即第一記憶體241的第0行為被讀取 的對象。此行元素經由多工器21而可出現在轉換器23的输 入端h。在Τ3畤段的後半段，此行元素被轉換。由此得到 的係數在下一次時數T4内被送入平行-循序轉換器。如圖 中的T行所示，這些係數即為與區塊N相藺的以〇,〇)..· y((7，0>。 現在此影像轉換器在線路上出一 8x8的耋面元素區塊且 檢測到此區塊内有動態存在（MD = 1)的情形下的操作情形將 被給予一詳细的解釋。然而，在解釋此埋作情形之前，圖 二中的切換電路須做一詳细的描述。圖五為此切換電路的 功能性结構圖。它包含了一由開關22 1 ( i )所姐成的受到控 制信號t 4所控制的第一開鼷系列。鬮中所示的開闞的位置 為使得所有的输入D0...D7均直接與相應的輪出Q0...Q7 相連接。而當開關在圖中未顯示的位置時，输出Q4...Q7 會成為雛線吠態或是接受到一固定值0 。然而轤出Q0... Q3卻是可與目前的糸列元素的偶數输入端DO，D2，D4， D6或是奇數输入端Dl，D3，D5，D7相連。奇數或是偁數输 入端的選擇是由可操控另一群開闞222 (ί)控制信號13所控 制。控制信號t3和t4均是由控制雷路2δ產生（見圖二）。這 (請先閲讀背面之注意事項再螭寫本頁) JQ. •丨裝· 訂· -線_ _ -12- 本紙張尺度適用中國國家標準（CNS)甲4规格（21〇 χ 297公釐） 82.3. 40,000 經濟部中央標準局R工消费合作杜印製 2^942〇 A6 _B6 五、發明説明（11 ) 些控制信號提供了下列的搡作吠況（i)目前出現的列可直 接通過，iii>目前出現的行在MD = 0的情形下可直接通過， (iii)在MD = 1的情形下，目前出現的行之偁數及奇數元素可 順序通遇。注意圖五中的切換電路的输入端及输出端的編 號順序是與轉換器23的输入端及檢出端相同。 圖六中再度以時序圖的方式顯示當區塊N中檢測出動態 時*發生在影像轉換器中的各種信號。此圖中的E行所顯 示者為此切換雷路是使所有元素通過（AL)，或是使输入的 糸列元素的偶數元素（EV)或奇數元素（0D)通過。在區塊N 的水平轉換（各時段T的前半段）以及前一個區塊的垂 直轉換t (T2之前的時段Μ及T2時段本身的後半段），這裡 所描述的與前一個例子並無不同。然而，當時區塊Ν進行 垂直轉換時（自Τ3開始的時段的後半段），此切換電路順序 地將一行元素的偶數Κ及奇數元素送入轉換器。詳细地說 ，阃中的Ρ行顯示，區塊Ν的第一行c(0)的偶數部份 c«(0) Μ及奇數部份cQ(0)在時段T3的後半段被順序地轉 換。 圖七所示為影像轉換器13之一建構方式（見圖^)，其功 用為執行反向離散餘弦轉換。由圖中可Μ明顯看出，此反 向影像轉換器的功能性結構與前面所描述的影像轉換器4 有密切闞連*故兩稱轉換器的元件之間有相同的參考數字 。兩者之間的主要差別是在於反向影像轉換器中的一維轉 換器23是被改計為進行反轉換的。雖然此一維轉換器的具 髑结構並未圖示出來，但卻可由它處獲得，例如前面所提 (請先閱讀背面之注意事項再塡寫本頁) 線. -13- 本紙張尺度遑用中困國家標準（CNS)甲4规格（210 X 297公釐〉 82.3. 40,000 21^420 A6 B6 «濟部中央標準局R工消費合作杜印* 五、發明説明（12 ) 的歐洲專利EP 0 286 183。現在所要描述的是，控制線路 更進一步的以不同的順序提供不同的控制信號，寫入位址 Μ及讅取位置。 在反向轉換時，行的（垂直）轉換以及接下來的列的（水 平）轉換依序進行。圖八所示為，Μ時序圖的方式表示發 生在影像轉器13内部的各種信號。圖中的Α行顯示影轉換 器循序地接受區塊N的最後一行係數y’（0,7).. .y，（7,7) 以及區塊N + 1的第一行係數y’（〇,〇).. .y，（0,7)。圖中的 Β行顴示，這些元素行分別在Τ2及Τ3時段内成為可獲取之 平行狀鰭。多Τ：器則交替地選擇一（循序-平行轉換器 2〇的输出 > 元素行Μ及一（轉置記憶體24的输出）列。在 _八中所示的例子中假設區塊Ν中有動態存在。圖中的Ε 行顯示切換線路22先將接收到的區塊Ν的一元素行的偶數 元素（EV)送入轉換器23，然後再將奇數元素（01))送入。轉 換後的结果則是以行的方式儲存在第一記憶體2 4 1中。此 處的特例為，區塊Ν的最後一行c(7)在時段Τ2的前半段内 被轉換。如G行所示，一值為c7的寫入位址WA1在此轉換 «程中被送入第一記憶賵，也就是說轉換的结果將會儲存 在此記憶艏的第7行中。在時段T2的後半段中，如G行所 示，一值為R7的黷取位置RA2被送至第二記憶體242 。此 意謂著前一酒區段N-1的最後一列「（7)被謓取並轉換。在 T2時段終了時，轉換後的列會被送入平行-循序轉換器 25。如阃中的I行所示，轉換後的结果為循序的可獲取態 χ’（7,0)...χ·(7,7)。為了說明的完整起見，注意造些畫 -14- 各紙張尺度適用中a國家櫟準（CNS〉甲4規格（210 X 297公 82.3· 40,〇〇〇 (請先《讀背面之注意事項再螭寫本頁) _裝- 訂. •線. 219420 Afi A6 B6 五、發明説明（13 ) 區 的 中 搏 憶 記 1 第 在 。 存 的儲 1 及 N-M 塊行 區素 個元 1 的 前 1 於N+ _ 塊 是區 均個 素一 元下 面 理整 處完 受被 接可 地行 序素 循元 内之 T3現 段出 時故 在態 式動 方無 的中 似1 類H+ Μ 塊 均區 列設 素假 元中。 的八換 卩蹰轉 塊。地 (請先閲讀背面之注意事項再現良本頁) 丨裝. 訂. •線. 經濟部t央標準局貝工消费合作社印製 本紙張又度適用中國國家標準（CNS)甲4规格（210 X 297公: 82.3. 40,000Centimeter 7 29 X S 82.3. 40,000 219420 Α6 Β6 Printed by R Industry and Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs V. Description of Invention (4) Receive different multiplication systems without interruption. The sequential calculation method seems to have the advantage of reducing the number of hardware-constructed multipliers; but in practice, such converters must have many temporary registers M to store intermediate results caused by the addition and extinction method. The above-mentioned scratchpad requires a larger crystal area, but at the same time, it also consumes more power, because the power consumption of a chip is mainly determined by the number of scratchpads. The a-faster multiplier also consumes more power. The preferred way of constructing the multiplier required to calculate the linear combination is to use the combined Lewis I tool operating principle to multiply an input number by a predetermined fixed number. For each fixed multiplier, the associated multiplier can be optimized so that it occupies the smallest area. The method of synchronizing the product elements by means of the aforementioned fixed multiplier has been proven to have a smaller crystal area and less power consumption. One of the better embodiments of the image converter is that it can receive a dynamic signal indicating the dynamics of the received block, at this time two predetermined parts of a row of elements will be sent to the one-dimensional As a response to a predetermined value of the aforementioned dynamic signal. By referring to the following specific description of the actual curing method of the present invention, the M mentioned above and other aspects related to the present invention can be clearly explained. In these example figures: Figure 1 is a diagram of a TV system designed according to the present invention. Figure 2 is a functional structure of an image converter according to the present invention. _3 is a one-dimensional DCT converter used in the image converter shown in Section 2. Figures 4 and 6 show the signals that occur in the image converter in Figure 2. (Please read the precautions on the back and then write down this page) This paper is used in the selection of "National Standard (CNS) A 4 specifications (210 X 297 mm) 82.3. 40,000 219420 A6 B6 Ministry of Economic Affairs Central Standards Bureau S industrial consumption Printed by the cooperative. V. Description of the invention (5) 阃 五 shows the switching circuit used in the image converter. _7 is an implementation of an image converter capable of reverse image conversion. _Eight are some signals that occur in the image converter in FIG. _1 shows a TV system using the image converter of the present invention. This TV system includes an embroidered code Thunder Road A * — decoding circuit B, and a connection channel _of the Fu channel. The transmission channel can be wireless or wired. However, it can also be a magnetic or optical storage medium. Encoding Thunder Road A may form part of the TV transmitter, and decoding circuit B may also form part of the Thunder Vision receiver. In particular, this TV system may exist in the form of a video camera or box 1, like an iis video camera. In this case, the encoding circuit A and the decoding circuit B coexist in a device. The encoded mine road A receives a television image signal x (t) from the image signal source 1. In the analog-to-digital converter 2, the sampling frequency of the analog video signal 5c (t) M-fs is sampled and converted into an eight-bit diurnal element x (n). These diurnal elements are stored in the image memory 3 first. Then, the day surface element is an M block, for example, an 8x8 screen element block x (i, k) is read from the image memory * and then sent to the first Xun image converter 4 and a motion detector 5 in. This motion detector 5 is essentially a known structure and can be constructed by the method described in European Patent EP-A 0 282 135. It can send out a dynamic signal MI after detecting the dynamic inside the block of 8x8 picture elements). In the following description, it will be assumed that the function of the image converter 4 is to implement discrete cosine conversion. This converter can convert each block of diurnal elements to an 8x8 coefficient block y (u, v). One of the practical ways of this video converter will be discussed in detail below. It is worth noting that this image-7- This paper scale is applicable to the tS National Standard (CNS) A4 specification (210 X 297 g; ^) 82.3. 40,000 (please read the precautions on the back before writing this page) 21 ^ 42〇A6 B6 Printed by the Central Bureau of Standards of the Ministry of Economy, Economy, Industry and Consumer Cooperation 5. Description of the invention (6) The converter can be operated in a dynamic and adaptable manner. To achieve this goal, the image converter must therefore receive a dynamic signal MD. The blocks of the f-coefficient y (u, v) of the image converter 4 are sequentially fed into the scanner 6 which also receives the dynamic signal MD. For each block, the scanner sends a sequence of coefficients y (n) to a variable-length encoder 7. Both the scanner 6 and the variable-length encoder 7 are known structures. This variable-length encoder encodes each coefficient y (n> t sequence into a variable-length code sequence. The sequence of the variable-length code contains bits compared to the original 8x 8 coefficient y (u , v > block has been reduced to a considerable extent. The coding sequence M and the dynamic signal MD Fu Shishi adopt the time-divided multiplex (time-divid ion multiplex) method by the multiplexer 8, and the signal form is sleep The sequence z (j). The reverse operation is fixed in the decoding road B. In the demultiplexer, the code sequence K and the dynamic signal MD · can be recovered from the received pulse series Z · (. These The encoded sequence is then sent to a variable-length decoder to reconstruct the sequence of coefficients y '(n>. A block forming Lei Lu 12 receives this sequence M and dynamic MD, and the coefficients y "i, k are formed from these data ) Of 8x8 size blocks. Next, some coefficients are sent to the second image converter 13. This converter performs inverse discrete cosine conversion (nDCT) so that the coefficients of each block can be converted back to 8 x8 screen elements x '(i, k > constitute the area. These facets The element blocks are stored in an image memory 14. All the faceted elements stored in the image memory together form a complete image; this image is formed by a digital / analog converter 15 to make the original digital signal Converted to an analog signal X'U) Μ will be displayed on the display screen 16. (Please read the ii matters on the back and then fill in this page) This paper ruler uses the Chinese National Standard (CNS) A 4 specifications (210 X 297 mm) 82.3. 40,000 m1 ”42〇A6 _B6 V. Description of the invention (7) Figure 2 shows the implementation of the image converter 4 that constitutes part of the coding path A. As described below • Decoding The image converter 13 in Lulu B has a similar structure. Now what is to be described is the operation of the image converter 4 processing an 8x8 endless element block in the absence of dynamics (MD = 0). The block surface element x (i, k) M—the way of the column appears on the circuit, and is sent to the sequential-parallel converter 20, which receives the control signal tl from the control frost road 26. These controls The signal is selected in such a way that The eight x elements (x (i, 0) ... x (i.7) are simultaneously available. The picture elements in this column are sent in parallel to the input of a multiplexer 21. As follows As will be described, the second input terminal of the multiplexer adopts a parallel manner to accept a row of 8 product elements from the transposed memory 24. According to the selection signal t2, the selector can convert a row of all elements or The product elements of one line are fed into the switching circuit 22. In another related situation (no dynamic), it may be changed that the output and input of the switching circuit are directly connected internally. The series of elements selected by the multiplexer 21 (that is, the written elements in one column are the product elements in one row) are sent to the one-dimensional converter 24 ° Indicated by the Ministry of Economic Affairs, Central Standards Bureau, R Industrial and Consumer Cooperative Ind. An implementation of a one-dimensional converter that performs discrete cosine transform (DCT). It is composed of a group of 8 elements 10 ... 17 adder and subtractor 30U) which can be sent in a unit by the KK predetermined method. The elder sister of the element I formed here is then sent to the multiplier 31 (i), and its function is to multiply the entered number by a predetermined multiple. The multiples of each multiplier in the figure have been marked. These multiplied numbers are added by some additions -9-82.3. 40,000 (please read the precautions on the back before writing this page) This paper scale is applicable to China National Standard (CNS) Grade 4 (210 X 297 male cage) ^ 1-942〇A6 B6 Printed by the R and Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (8) Device and subtractor 32 (i> Sister, Μ constitute 8 output elements 00 ... 07. Each output The values are made up of linear combinations of all elm input values. For a detailed description of this one-dimensional converter, please refer to the aforementioned European Patent No. EP 0 286 183. Note that the input and output terminals in this figure are They are not arranged in numerical order. Returning to Figure 2, the output 0 (0) ... 0 (7) of the one-dimensional converter 23 is sent to a transposed memory 24 and a parallel-sequential converter 25 The parallel-to-sequential converter receives the control signal t5 to convert the simultaneous output elements into a sequential form where the sampling frequency f exists. The transposed memory 24 includes a first memory 241 M and a second memory 242 * and accept write address ΟΙ, WA2, respectively, to store the output element. And The transposed memory respectively accepts the read addresses RA 1, RA 2, and M sends the previously stored output elements to the second input of the multiplexer. Here various control signals, write addresses and read The addresses are generated by the control circuit 26. To achieve this function, this circuit accepts the sampling frequency fs, the dynamic signal MD and the device reset pulse FRS. The device reset pulse is obtained from the image signal source 1 (see Figure 1) Figure 4 shows the various signals displayed in the image converter 4 in the form of a timing chart. The column of screen element blocks currently being processed; a series of elements x < i, k > are shown on line A. The example in the figure is * row A shows the last column of block N elements (0,7) .. ^ (7,7> (within time 1), M and the next block N + The first column element of 1 < (0,0) ...) ((0,7) (within time T2). The signal from the eaves of the sequential-parallel converter 20 is marked on line B. According to the figure As shown in r (7) and "(0), the elements in the seventh column of block N (please read the precautions on the back before writing this page) -0. -Install., TΓ. Λ ', Line. This Paper scale Use China® Home Standard (CNS) Grade 4 specifications (210 X 297 public goods) 82.3. 40,000 A6 B6 2- ^ 420 V. Invention description (9) (Please read the precautions on the back and write this page) (T2 Inner) The elements in column 0 of Μ and block NM (in T3) appear sequentially on the first input of multiplexer 21 in a parallel manner. The excavation signal controlling this multiplexer is displayed on Line E. The following procedure occurs during time T2. In the first half of T2, the multiplexer selects the screen element column "(7) and sends it to the converter 23. The F line in the figure shows that the (horizontal > conversion performed on" (7) is here It took place over a period of time. At the same time, the write address of the memory arranged for this line is also sent to the first memory photo 241. The G line in the circle shows the value of this write address as R7, that is to say this The result of the horizontal conversion is stored in row 7 of the first memory 241. In the second half of the T2 period, a read address is sent to the second memory 2 42, that is, the aforementioned second memory stern provides a row The value of the previously stored element. Line D in the figure shows that the reading position is C7, which is the object taken by the seventh behavior of this memory. The data in this line can appear in the conversion by the multiplexer 21 The input of the device 23. This line is converted in the second half of the T2 period. At the end of this period, the converted line will be sent to the parallel-sequential converter 25. As shown in line I in the figure, after conversion , The coefficients y (0,7) ... y (7,7) are available in a sequential state in the next period T3. For the sake of completeness Note that these are still coefficients that are comparable to the previous Qiao block N-1. In the example described earlier, each column of screen elements in block N has been converted, and The result must be stored in the first memory 241. The following procedure occurs in the period T3. In the first half of T3, the multiplexer still selects the input column of the sequential-parallel converter and selects it into the converter 23. This is the "(〇) row of block N + 1. The conversion result is now stored in the second memory 242 -11-This paper scale is applicable to the Chinese National Standard (CNS) A 4 specifications (210 X 297 mm ) 82.3. 40,000 21942〇A6 B6 Central Standard Home Economics Consumption of the Ministry of Economic Affairs, including the printing of the company's five, invention description (10). For this function, this memory bow must be written by the address WA2 to provide address data. The Η line in the middle shows that the value of the write address is R0, that is, the result of this horizontal conversion is stored in the second line of the second memory 2 42. In the second half of the T3 period, read the address R / U Sent to the first memory bet 241, so the previously stored series of elements are read again The line C in the figure shows that the value of the read address R / U is C0, that is, the object of the 0th row of the first memory 241 is read. The elements of this line can appear in the conversion through the multiplexer 21 The input terminal h of the device 23. In the second half of the T3 section, the elements of this line are converted. The resulting coefficients are sent to the parallel-to-sequential converter in the next hour T4. As shown in line T in the figure, These coefficients are equal to block N, 〇, 〇 .. y ((7, 0>. Now the image converter is on the line out of an 8x8 block of block elements and detected in this block A detailed explanation will be given to the operation situation with dynamic presence (MD = 1). However, before explaining this buried situation, the switching circuit in Fig. 2 must be described in detail. Figure 5 shows the functional structure of the switching circuit. It consists of a first series of open reels controlled by the control signal t 4 made by the switch 22 1 (i). The position of the open gates shown in Pang is such that all inputs D0 ... D7 are directly connected to the corresponding wheel outputs Q0 ... Q7. When the switch is in a position not shown in the figure, the outputs Q4 ... Q7 will become barbed or receive a fixed value of 0. However, Q0 ... Q3 can be connected to the current even-numbered input terminals DO, D2, D4, D6 or odd-numbered input terminals D1, D3, D5, D7. The selection of the odd-numbered or input-numbered input is controlled by the control signal 13 that can control another group of open gates 222 (ί). The control signals t3 and t4 are generated by the control mine 2δ (see Figure 2). This (please read the precautions on the back before writing this page) JQ. • 丨 installation · order · -line _ _ -12- This paper size is applicable to China National Standard (CNS) A 4 specifications (21〇χ 297 mm ) 82.3. 40,000 Central Government Bureau of Economics, R, Industry and Consumer Cooperation Du Printed 2 ^ 942〇A6 _B6 V. Description of the invention (11) These control signals provide the following barking conditions (i) The current column can be directly passed , Iii> The currently appearing line can be passed directly in the case of MD = 0, (iii) In the case of MD = 1, the current number of rows and odd elements of the currently appearing line can be met in sequence. Note that the numbering sequence of the input terminal and output terminal of the switching circuit in Fig. 5 is the same as the input terminal and detection terminal of the converter 23. Figure 6 again shows the various signals that occur in the image converter when motion is detected in block N in the form of a timing diagram. The line E shown in this figure switches the lightning path to pass all the elements (AL), or to pass the even-numbered elements (EV) or odd-numbered elements (0D) of the input column elements. In the horizontal conversion of block N (the first half of each period T) and the vertical conversion of the previous block t (the period M before T2 and the second half of T2 itself), the description here is no different from the previous example . However, when the block N performs vertical conversion (the second half of the period starting from T3), the switching circuit sequentially sends the even-numbered K and odd-numbered elements of a row of elements to the converter. In detail, the P line in the image shows that the even part c «(0) M and the odd part cQ (0) of the first line c (0) of the block N are sequentially in the second half of the period T3 Convert. Fig. 7 shows one of the construction methods of the image converter 13 (see Fig. ^), And its function is to perform inverse discrete cosine conversion. It can be clearly seen from the figure that the functional structure of this reverse image converter is closely connected with the image converter 4 described above. Therefore, the components of the two converters have the same reference number. The main difference between the two is that the one-dimensional converter 23 in the reverse image converter is converted to reverse conversion. Although the structure of this one-dimensional converter is not shown, it can be obtained from other places, such as the one mentioned above (please read the precautions on the back before writing this page). -13- Use the National Standard (CNS) Grade A 4 (210 X 297 mm) 82.3. 40,000 21 ^ 420 A6 B6 «The Ministry of Economic Affairs, Central Standards Bureau R Industrial and Consumer Cooperation Du Yin * Fifth, the European Patent EP of the invention description (12) 0 286 183. What is to be described now is that the control circuit further provides different control signals in different orders, writes the address M and takes the position. In the reverse conversion, the line (vertical) conversion and the next The (horizontal) conversion of the columns is performed in order. Figure 8 shows that the M timing diagram represents the various signals that occur inside the image converter 13. Line A in the figure shows that the image converter sequentially accepts the block N The coefficient y '(0,7) ... y, (7,7) in the last row and the coefficient y' (〇, 〇) ... y, (0,7) in the first row of the block N + 1 are shown in the figure. The B line in the zygomatic display shows that these element lines become parallel fins that can be obtained during the T2 and T3 periods. Multiple T: devices alternate Select one (the output of the sequential-parallel converter 20> element row M and one (the output of the transposed memory 24). In the example shown in _8, assume that there is a dynamic presence in block N. The Ε line display switching circuit 22 first sends the even-numbered elements (EV) of the one-element line of the received block N to the converter 23, and then sends the odd-numbered elements (01)). The converted result is The row mode is stored in the first memory 241. The special case here is that the last row c (7) of block N is converted in the first half of the period T2. As shown in row G, a value of c7 The write address of WA1 is sent to the first memory in this conversion process, which means that the result of the conversion will be stored in line 7 of this memory bow. In the second half of the period T2, such as line G As shown, a raster position RA2 with a value of R7 is sent to the second memory 242. This means that the last row of the previous wine section N-1 "(7) is picked and converted. At the end of the T2 period At this time, the converted column will be sent to the parallel-to-sequential converter 25. As shown in line I in the example, the converted result is the sequentially available state χ '(7,0) ... χ · (7,7). For the sake of completeness of the description, pay attention to making some paintings-14- Each paper scale is applicable to the national oak standard (CNS> A 4 specifications (210 X 297 public 82.3 · 40, 〇 〇〇 (please read "Precautions on the back and then write this page") _Fill-book. • Line. 219420 Afi A6 B6 V. Description of the invention (13) The first stroke in the area 1 is in. The stored storage 1 And the first 1 of the prime element 1 of the NM block line is in the N + _ block is the area of the prime element one element. The finishing place is received after the line sequence is accepted. The T3 within the element is out of state. None of the H + M blocks in the Class 1 H-M block are listed in the primitive dummy. The eight-for-no change block. Place (please read the precautions on the back of this page to reproduce the good page first) 丨 Installation. Order. Line. The paper printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs is again applicable to the Chinese National Standard (CNS) A 4 specifications (210 X 297: 82.3. 40,000