TW202231137A - Co-axial via structure and manufacturing method of the same - Google Patents

Co-axial via structure and manufacturing method of the same Download PDF

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TW202231137A
TW202231137A TW110137649A TW110137649A TW202231137A TW 202231137 A TW202231137 A TW 202231137A TW 110137649 A TW110137649 A TW 110137649A TW 110137649 A TW110137649 A TW 110137649A TW 202231137 A TW202231137 A TW 202231137A
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hole
insulating layer
line
conductive material
coaxial
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TWI781786B (en
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陳慶盛
張啟民
林宜平
黃俊瑞
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欣興電子股份有限公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A co-axial structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate includes a first surface. The first conductive structure includes a first circuit disposed on the first surface and a first via penetrating the substrate. The second conductive structure includes a second circuit disposed on the first surface and a second via penetrating the substrate. The first via and the second via extend along a first direction. The first circuit and the second circuit extend along a second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first via and the second via. The first conductive structure and the second conductive structure are electrically insulated. The first circuit and the second circuit are co-planar.

Description

共軸通孔結構及其製造方法Coaxial through hole structure and manufacturing method thereof

本揭露是有關於一種共軸通孔結構，尤其是一種具有共平面的訊號線與接地線的共軸通孔結構。The present disclosure relates to a coaxial via structure, especially a coaxial via structure with coplanar signal lines and ground lines.

現今的共軸通孔結構大多需透過壓合增層製程設置介電層在不同層的接地線與訊號線之間，而需耗費較多成本。此外，由於通孔中的內層線路與外層線路的高度不同，因此會產生阻抗不匹配的問題。設置在接地線與訊號線之間的介電層也會產生屏蔽缺口，導致電磁屏蔽效果不佳。Most of the current coaxial via structures require a dielectric layer between the ground lines and signal lines of different layers through a lamination build-up process, which requires a lot of cost. In addition, since the heights of the inner and outer layers in the vias are different, impedance mismatch problems arise. The dielectric layer disposed between the ground wire and the signal wire also creates a shielding gap, resulting in poor electromagnetic shielding effect.

有鑑於此，如何提供一種可提升阻抗匹配與電磁屏蔽效果的共軸通孔結構，仍是目前業界亟需研究的目標之一。In view of this, how to provide a coaxial through-hole structure that can improve impedance matching and electromagnetic shielding effects is still one of the goals that the industry needs to study urgently.

本揭露之一技術態樣為一種共軸通孔結構。One technical aspect of the present disclosure is a coaxial via structure.

在本揭露一實施例中，共軸通孔結構包含基板、第一導電結構、第二導電結構以及絕緣層。基板具有第一表面。第一導電結構包含位在第一表面上的第一線路與貫穿基板的第一通孔。第二導電結構包含位在基板的第一表面上的第二線路與貫穿基板的第二通孔。第一通孔與第二通孔延伸於第一方向，第一線路與第二線路延伸於第二方向，且第二方向垂直於第一方向。絕緣層位在第一通孔與第二通孔之間，其中第一導電結構與第二導電結構電性絕緣，且第一線路與第二線路共平面。In an embodiment of the present disclosure, the coaxial via structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate has a first surface. The first conductive structure includes a first circuit on the first surface and a first through hole penetrating the substrate. The second conductive structure includes a second circuit on the first surface of the substrate and a second through hole penetrating the substrate. The first through hole and the second through hole extend in the first direction, the first line and the second line extend in the second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first through hole and the second through hole, wherein the first conductive structure and the second conductive structure are electrically insulated, and the first line and the second line are coplanar.

在本揭露一實施例中，第一導電結構的第一通孔圍繞第二導電結構的第二通孔與絕緣層。In an embodiment of the present disclosure, the first through hole of the first conductive structure surrounds the second through hole of the second conductive structure and the insulating layer.

在本揭露一實施例中，絕緣層、第一通孔與第二通孔共軸。In an embodiment of the present disclosure, the insulating layer, the first through hole and the second through hole are coaxial.

在本揭露一實施例中，絕緣層具有突出部，位在絕緣層靠近第一表面的末端。In an embodiment of the present disclosure, the insulating layer has a protruding portion located at an end of the insulating layer close to the first surface.

在本揭露一實施例中，絕緣層的突出部遠離第二通孔沿著第二方向突出。In an embodiment of the present disclosure, the protruding portion of the insulating layer protrudes away from the second through hole along the second direction.

在本揭露一實施例中，第一導電結構的第一通孔、絕緣層的突出部、以及第二導電結構的第二線路於第一方向上重疊。In an embodiment of the present disclosure, the first through hole of the first conductive structure, the protrusion of the insulating layer, and the second line of the second conductive structure overlap in the first direction.

在本揭露一實施例中，基板還包含相對於第一表面的第二表面，且共軸通孔結構還包含位在第一表面與第二表面之間的介電層，且絕緣層的突出部接觸介電層。In an embodiment of the present disclosure, the substrate further includes a second surface opposite to the first surface, and the coaxial via structure further includes a dielectric layer located between the first surface and the second surface, and the insulating layer protrudes The part contacts the dielectric layer.

本揭露之一技術態樣為一種共軸通孔結構的製造方法。One technical aspect of the present disclosure is a method for manufacturing a coaxial via structure.

在本揭露一實施例中，共軸通孔結構的製造方法包含形成第一貫孔於基板中；形成第一導電材料於基板的第一表面上以及第一貫孔中；形成自第一表面凹陷的凹槽，且使凹槽與第一貫孔連通；形成絕緣層於第一貫孔及凹槽中；形成第二導電材料於基板的第一表面上以及第一貫孔中；以及圖案化第一導電材料與第二導電材料以形成位在第一表面上的第一線路與第二線路，使得剩餘的第一導電材料與剩餘的第二導電材料藉由凹槽中的絕緣層電性絕緣，且第一線路與第二線路共平面。In an embodiment of the present disclosure, a method for manufacturing a coaxial via structure includes forming a first through hole in a substrate; forming a first conductive material on a first surface of the substrate and in the first through hole; forming a first through hole from the first surface a recessed groove, and the groove is communicated with the first through hole; an insulating layer is formed in the first through hole and the groove; a second conductive material is formed on the first surface of the substrate and in the first through hole; and a pattern The first conductive material and the second conductive material are melted to form the first line and the second line on the first surface, so that the remaining first conductive material and the remaining second conductive material are electrically connected through the insulating layer in the groove. and the first line and the second line are coplanar.

在本揭露一實施例中，共軸通孔結構還包含相對於第一表面的第二表面，且形成凹槽還包含自第一表面沿著第一方向鑽孔。In an embodiment of the present disclosure, the coaxial via structure further includes a second surface opposite to the first surface, and forming the groove further includes drilling from the first surface along a first direction.

在本揭露一實施例中，共軸通孔結構還包含位在第一表面與第二表面之間的介電層，且形成凹槽還包含使得介電層自第一導電材料曝露。In an embodiment of the present disclosure, the coaxial via structure further includes a dielectric layer between the first surface and the second surface, and forming the groove further includes exposing the dielectric layer from the first conductive material.

在本揭露一實施例中，形成絕緣層於第一貫孔及凹槽中還包含形成絕緣層材料於第一貫孔及凹槽中，使得絕緣層材料接觸介電層；以及形成第二貫孔於絕緣層材料中，以形成絕緣層，其中絕緣層具有位在凹槽中的突出部。In an embodiment of the present disclosure, forming the insulating layer in the first through hole and the groove further includes forming an insulating layer material in the first through hole and the groove, so that the insulating layer material contacts the dielectric layer; and forming a second through hole Holes are formed in the insulating layer material to form the insulating layer, wherein the insulating layer has protrusions located in the grooves.

在本揭露一實施例中，形成第二導電材料於基板的第一表面上以及第一貫孔中還包含形成第二導電材料於第二貫孔中，且使得第一貫孔中的第一導電材料包圍絕緣層與第二貫孔中的第二導電材料。In an embodiment of the present disclosure, forming the second conductive material on the first surface of the substrate and in the first through hole further includes forming the second conductive material in the second through hole, and making the first The conductive material surrounds the insulating layer and the second conductive material in the second through hole.

在本揭露一實施例中，形成第二導電材料於基板的第一表面上以及第一貫孔中還包含使得絕緣層、第一貫孔中的第一導電材料與第二貫孔中的第二導電材料共軸。In an embodiment of the present disclosure, forming the second conductive material on the first surface of the substrate and in the first through hole further includes making the insulating layer, the first conductive material in the first through hole and the first conductive material in the second through hole The two conductive materials are coaxial.

在本揭露一實施例中，圖案化第一導電材料與第二導電材料以形成第一線路與第二線路還包含 使得第一貫孔中的第一導電材料、絕緣層的突出部、以及第二線路於第一方向上重疊。In an embodiment of the present disclosure, patterning the first conductive material and the second conductive material to form the first circuit and the second circuit further includes making the first conductive material in the first through hole, the protrusion of the insulating layer, and the first circuit. The two lines overlap in the first direction.

在上述實施例中，由於本揭露的共軸通孔結構具有共平面的第一線路與第二線路，且第一導電結構與第二導電結構可透過絕緣層電性絕緣，因此本揭露的共軸通孔結構可具有較佳的電磁雜訊屏蔽以及阻抗匹配效果，以提升高頻訊號完整性。此外，本揭露的共軸通孔結構可減少介電層的數量，以縮減共軸通孔結構的厚度。因此，本揭露的共軸通孔結構還可具有降低成本之技術功效。In the above-mentioned embodiment, since the coaxial via structure of the present disclosure has the coplanar first line and the second line, and the first conductive structure and the second conductive structure can be electrically insulated through the insulating layer, the common The shaft through hole structure can have better electromagnetic noise shielding and impedance matching effect, so as to improve the integrity of high frequency signals. In addition, the coaxial via structure of the present disclosure can reduce the number of dielectric layers to reduce the thickness of the coaxial via structure. Therefore, the coaxial via structure of the present disclosure can also have the technical effect of reducing cost.

以下將以圖式揭露本發明之複數個實施方式，為明確說明起見，許多實務上的細節將在以下敘述中一併說明。然而，應瞭解到，這些實務上的細節不應用以限制本發明。也就是說，在本發明部分實施方式中，這些實務上的細節是非必要的。此外，為簡化圖式起見，一些習知慣用的結構與元件在圖式中將以簡單示意的方式繪示之。且為了清楚起見，圖式中之層和區域的厚度可能被誇大，並且在圖式的描述中相同的元件符號表示相同的元件。Several embodiments of the present invention will be disclosed in the drawings below, and for the sake of clarity, many practical details will be described together in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some embodiments of the invention, these practical details are unnecessary. In addition, for the purpose of simplifying the drawings, some well-known structures and elements will be shown in a simple and schematic manner in the drawings. Also, the thicknesses of layers and regions in the drawings may be exaggerated for clarity, and like reference numerals refer to like elements in the description of the drawings.

第1圖為根據本揭露一實施例之共軸通孔結構100之立體圖 。第2圖為沿著第1圖中線段2-2的剖面圖。同時參照第1圖及第2圖。共軸通孔結構100包含基板110、第一導電結構120、第二導電結構130以絕緣層140。FIG. 1 is a perspective view of a coaxial via structure 100 according to an embodiment of the present disclosure. FIG. 2 is a cross-sectional view along line 2-2 in FIG. 1. FIG. Refer to Figures 1 and 2 simultaneously. The coaxial via structure 100 includes a substrate 110 , a first conductive structure 120 , a second conductive structure 130 and an insulating layer 140 .

基板110具有相對的第一表面112與第二表面114。第一導電結構120包含第一線路122及第一通孔124，第二導電結構130包含第二線路132及第二通孔134。第一線路122與第二線路132位在第一表面112上。第一通孔124與第二通孔134貫穿基板110。第一通孔124與第二通孔134延伸於第一方向D1。第一線路122與第二線路132延伸於垂直第一方向D1的第二方向D2。第一導電結構120的第一線路122與第二導電結構130的第二線路132共平面。換句話說，第一線路122與第二線路132位在同一水平面上。The substrate 110 has a first surface 112 and a second surface 114 opposite to each other. The first conductive structure 120 includes a first line 122 and a first through hole 124 , and the second conductive structure 130 includes a second line 132 and a second through hole 134 . The first traces 122 and the second traces 132 are located on the first surface 112 . The first through hole 124 and the second through hole 134 penetrate through the substrate 110 . The first through hole 124 and the second through hole 134 extend in the first direction D1. The first line 122 and the second line 132 extend in the second direction D2 perpendicular to the first direction D1. The first line 122 of the first conductive structure 120 is coplanar with the second line 132 of the second conductive structure 130 . In other words, the first line 122 and the second line 132 are located on the same level.

在本實施例中，第一方向D1為圖中的垂直方向，亦即第一方向D1為自第一表面112朝向第二表面114的方向。第二方向D2可為任意垂直於第一方向D1的水平方向，合先敘明。在本實施例中，第一線路122與第三線路126可為接地線，第二線路132與第四線路136可為訊號線，但本揭露並不以此為限。In this embodiment, the first direction D1 is the vertical direction in the figure, that is, the first direction D1 is the direction from the first surface 112 to the second surface 114 . The second direction D2 can be any horizontal direction perpendicular to the first direction D1, which will be described together first. In this embodiment, the first line 122 and the third line 126 may be ground lines, and the second line 132 and the fourth line 136 may be signal lines, but the disclosure is not limited thereto.

如第2圖所示，第一導電結構120還包含位在第二表面114上的第三線路126，第二導電結構130還包含位在第二表面114上的第四線路136。第一通孔124的兩端分別連接第一線路122與第三線路126。第二通孔134的兩端分別連接第二線路132與第四線路136。第三線路126與第四線路136延伸於第二方向D2，且第三線路126與第四線路136共平面。換句話說，第三線路126與第四線路136位在同一水平面上。As shown in FIG. 2 , the first conductive structure 120 further includes a third line 126 located on the second surface 114 , and the second conductive structure 130 further includes a fourth line 136 located on the second surface 114 . Two ends of the first through hole 124 are respectively connected to the first line 122 and the third line 126 . Two ends of the second through hole 134 are respectively connected to the second line 132 and the fourth line 136 . The third line 126 and the fourth line 136 extend in the second direction D2, and the third line 126 and the fourth line 136 are coplanar. In other words, the third line 126 and the fourth line 136 are located on the same level.

絕緣層140位在第一通孔124與第二通孔134之間，且絕緣層140延伸於第一方向D1。第一通孔124圍繞第二通孔134與絕緣層140，且絕緣層140圍繞第二通孔134。如第2圖所示，絕緣層140、第一通孔124與第二通孔134相對於軸心A共軸。The insulating layer 140 is located between the first through hole 124 and the second through hole 134, and the insulating layer 140 extends in the first direction D1. The first through hole 124 surrounds the second through hole 134 and the insulating layer 140 , and the insulating layer 140 surrounds the second through hole 134 . As shown in FIG. 2 , the insulating layer 140 , the first through hole 124 and the second through hole 134 are coaxial with respect to the axis A. As shown in FIG.

絕緣層140具有第一突出部142，且第一突出部142位在絕緣層140靠近第一表面112的末端。第一突出部142沿著第二方向D2遠離第二通孔134突出。如第2圖所示，基板110還包含位在第一表面112與第二表面114之間的介電層150。在本實施例中，基板110還包含藉由介電層150分隔的多層內部線路116，但本揭露並不以此為限。絕緣層140的第一突出部142接觸靠近第一表面112的介電層150。換句話說，第一突出部142穿過第一通孔124而延伸至介電層150。The insulating layer 140 has a first protrusion 142 , and the first protrusion 142 is located at the end of the insulating layer 140 close to the first surface 112 . The first protrusion 142 protrudes away from the second through hole 134 along the second direction D2. As shown in FIG. 2 , the substrate 110 further includes a dielectric layer 150 between the first surface 112 and the second surface 114 . In the present embodiment, the substrate 110 further includes the multi-layer internal circuits 116 separated by the dielectric layer 150, but the present disclosure is not limited thereto. The first protrusions 142 of the insulating layer 140 contact the dielectric layer 150 near the first surface 112 . In other words, the first protrusion 142 extends through the first through hole 124 to the dielectric layer 150 .

應理解到，為了清楚表示第二線路132與第一突出部142的結構關係，在第1圖中僅繪示出第一通孔124、第二線路132、以及絕緣層140，而省略的第一線路122。It should be understood that, in order to clearly show the structural relationship between the second line 132 and the first protrusion 142, only the first through hole 124, the second line 132, and the insulating layer 140 are shown in FIG. A line 122.

如第2圖所示，第一導電結構120的第一通孔124、絕緣層140的第一突出部142、以及第二導電結構130的第二線路132於第一方向D1上重疊。第二導電結構130的第二線路132自第二通孔134延伸並跨過第一突出部142。換句話說，第一通孔124與第二線路132藉由第一突出部142電性絕緣，且共平面的第一線路122與第二線路132彼此分隔，藉此使得第一導電結構120與第二導電結構130電性絕緣。As shown in FIG. 2 , the first through hole 124 of the first conductive structure 120 , the first protrusion 142 of the insulating layer 140 , and the second line 132 of the second conductive structure 130 overlap in the first direction D1 . The second line 132 of the second conductive structure 130 extends from the second through hole 134 and crosses the first protrusion 142 . In other words, the first through hole 124 and the second line 132 are electrically insulated by the first protrusion 142 , and the coplanar first line 122 and the second line 132 are separated from each other, so that the first conductive structure 120 and the second line 132 are separated from each other. The second conductive structure 130 is electrically insulated.

根據上述可知，由於共軸通孔結構100的第一線路122與第二線路132共平面，且第一導電結構120與第二導電結構130電性絕緣，可省略以往需增加額外的介電層以使位在不同層的第一線路與第二線路電性絕緣的步驟。如此一來，本案的第一通孔124與第二通孔134大致可具有相同的高度，使得共軸通孔結構100的整體結構較為對稱，進而提升阻抗匹配的效果。此外，由於本案可省略位在不同層的第一線路與第二線路之間的介電層，因此避免了第二通孔134突出於絕緣層外的狀況。如此一來，本案的共軸通孔結構可避免屏蔽結構的缺口導致電磁屏蔽效果不佳的問題。As can be seen from the above, since the first line 122 and the second line 132 of the coaxial via structure 100 are coplanar, and the first conductive structure 120 and the second conductive structure 130 are electrically insulated, the need to add an additional dielectric layer in the past can be omitted. so as to electrically insulate the first line and the second line in different layers. In this way, the first through hole 124 and the second through hole 134 in the present case may have approximately the same height, so that the overall structure of the coaxial through hole structure 100 is relatively symmetrical, thereby improving the effect of impedance matching. In addition, since the dielectric layer between the first line and the second line of different layers can be omitted in this case, the situation in which the second through hole 134 protrudes out of the insulating layer is avoided. In this way, the coaxial through-hole structure of the present application can avoid the problem of poor electromagnetic shielding effect caused by the gap of the shielding structure.

如第2圖所示，絕緣層140還具有第二突出部144，且第二突出部144位在絕緣層140靠近第二表面114的末端。第二突出部144沿著第二方向D2遠離第二通孔134突出。絕緣層140的第二突出部144接觸靠近第二表面114的介電層150。換句話說，第二突出部144穿過第一通孔124而延伸至介電層150。As shown in FIG. 2 , the insulating layer 140 further has a second protrusion 144 , and the second protrusion 144 is located at the end of the insulating layer 140 close to the second surface 114 . The second protrusion 144 protrudes away from the second through hole 134 along the second direction D2. The second protrusions 144 of the insulating layer 140 contact the dielectric layer 150 near the second surface 114 . In other words, the second protrusions 144 extend through the first through holes 124 to the dielectric layer 150 .

如第2圖所示，第一導電結構120的第一通孔124、絕緣層140的第二突出部144、以及第二導電結構130的第四線路136於第一方向D1上重疊。第二導電結構130的第四線路136自第二通孔134延伸並跨過第二突出部144。換句話說，第一通孔124與第四線路136藉由第二突出部144電性絕緣，且第三線路126與第四線路136彼此分隔，藉此使得第一導電結構120與第二導電結構130電性絕緣。如同前述，第四線路136的延伸方向可為任意垂直於第一方向D1的水平方向，第2圖僅為示例，本揭露並不以此為限。As shown in FIG. 2 , the first through hole 124 of the first conductive structure 120 , the second protrusion 144 of the insulating layer 140 , and the fourth line 136 of the second conductive structure 130 overlap in the first direction D1 . The fourth line 136 of the second conductive structure 130 extends from the second through hole 134 and crosses the second protrusion 144 . In other words, the first via 124 and the fourth line 136 are electrically insulated by the second protrusion 144, and the third line 126 and the fourth line 136 are separated from each other, thereby making the first conductive structure 120 and the second conductive Structure 130 is electrically insulating. As mentioned above, the extending direction of the fourth line 136 can be any horizontal direction perpendicular to the first direction D1 , and FIG. 2 is only an example, and the present disclosure is not limited thereto.

應瞭解到，已敘述過的元件連接關係、材料與功效將不再重複贅述，合先敘明。在以下敘述中，將說明共軸通孔結構的製造方法。It should be understood that the connection relationships, materials and functions of the components already described will not be repeated, but will be described first. In the following description, the manufacturing method of the coaxial via structure will be explained.

第3A圖至第10A圖為根據本揭露一實施例之共軸通孔結構的製造方法的中間步驟的俯視圖。第3B圖至第10B圖分別為沿著第3A圖至第10B圖中線段3B-3B至線段10B-10B的剖面圖。如第3A圖及第3B圖所示，共軸通孔結構的製造方法開始於形成第一貫孔OP1於基板110中。第一貫孔OP1貫穿基板110的內部線路116與介電層150。舉例來說，形成第一貫孔OP1的方式可為雷射鑽孔。FIGS. 3A to 10A are top views of intermediate steps of a method for fabricating a coaxial via structure according to an embodiment of the present disclosure. FIGS. 3B to 10B are cross-sectional views taken along line segment 3B-3B to line segment 10B-10B in FIGS. 3A to 10B, respectively. As shown in FIGS. 3A and 3B , the manufacturing method of the coaxial via structure begins by forming the first through hole OP1 in the substrate 110 . The first through hole OP1 penetrates through the inner circuit 116 of the substrate 110 and the dielectric layer 150 . For example, the method of forming the first through hole OP1 may be laser drilling.

如第4A圖及第4B圖所示，在共軸通孔結構的製造方法中，接著將第一導電材料120M形成於第一表面112上、第二表面114上以及第一貫孔OP1的內壁上。形成第一導電材料120M的方式例如為電鍍，第一導電材料120M例如為銅，但本揭露並不以為限，本領域人士當可視情況選擇適當的方法與材料。As shown in FIGS. 4A and 4B , in the method of manufacturing the coaxial via structure, the first conductive material 120M is then formed on the first surface 112 , the second surface 114 and inside the first through hole OP1 on the wall. The method of forming the first conductive material 120M is, for example, electroplating, and the first conductive material 120M is, for example, copper, but the present disclosure is not limited, and those skilled in the art can select appropriate methods and materials as appropriate.

如第5A圖及第5B圖所示，在共軸通孔結構的製造方法中，接著形成第一凹槽TR1。第一凹槽TR1自第一表面112凹陷，且第一凹槽TR1與第一貫孔OP1連通。形成第一凹槽TR1的方式包含自第一表面112沿著第一方向D1鑽孔，並使得靠近第一表面112的介電層150自第一導電材料120M曝露。As shown in FIGS. 5A and 5B , in the method of manufacturing the coaxial via structure, the first groove TR1 is subsequently formed. The first groove TR1 is recessed from the first surface 112, and the first groove TR1 communicates with the first through hole OP1. The manner of forming the first groove TR1 includes drilling from the first surface 112 along the first direction D1 and exposing the dielectric layer 150 close to the first surface 112 from the first conductive material 120M.

參照第5B圖，此步驟還包含形成第二凹槽TR2。第二凹槽TR2自第二表面114凹陷，且第二凹槽TR2與第一貫孔OP1連通。形成第二凹槽TR2的方式包含自第二表面114沿著第一方向D1的反方向鑽孔，並使得靠近第二表面114的介電層150自第一導電材料120M曝露。舉例來說，形成第一凹槽TR1及第二凹槽TR2的方式可為雷射鑽孔。Referring to FIG. 5B, this step further includes forming a second groove TR2. The second groove TR2 is recessed from the second surface 114, and the second groove TR2 communicates with the first through hole OP1. The manner of forming the second groove TR2 includes drilling from the second surface 114 in the opposite direction of the first direction D1 and exposing the dielectric layer 150 near the second surface 114 from the first conductive material 120M. For example, the method of forming the first groove TR1 and the second groove TR2 may be laser drilling.

在第5A圖的俯視視角中，第一凹槽TR1與第一貫孔OP1的距離可根據第二線路132的寬度以及第一線路122與第二線路132之間所需的間距計算而得出。同樣地，在仰視視角中(圖未示)，第二凹槽TR2與第一貫孔OP1的距離可根據第四線路136的寬度以及第三線路126與第四線路136之間所需的間距計算而得出。In the top view of FIG. 5A , the distance between the first groove TR1 and the first through hole OP1 can be calculated according to the width of the second line 132 and the required distance between the first line 122 and the second line 132 . Similarly, in a bottom view (not shown), the distance between the second groove TR2 and the first through hole OP1 can be determined according to the width of the fourth line 136 and the required distance between the third line 126 and the fourth line 136 calculated.

如第6A圖及第6B圖所示，在共軸通孔結構的製造方法中，接著將絕緣層材料140M填充至第一貫孔OP1、第一凹槽TR1及第二凹槽TR2中，並使得絕緣層材料140M接觸自第一導電材料120M曝露的介電層150。在本實施例中，絕緣層材料140M例如可為填孔油墨，但本揭露並不以此為限。在填充絕緣層材料140M後，研磨絕緣層材料140M自第一表面112與第二表面114露出的部份，使得絕緣層140的上表面與下表面分別與第一導電材料120M齊平。As shown in FIGS. 6A and 6B , in the method for manufacturing the coaxial via structure, the insulating layer material 140M is then filled into the first through hole OP1 , the first groove TR1 and the second groove TR2 , and The insulating layer material 140M is brought into contact with the dielectric layer 150 exposed from the first conductive material 120M. In this embodiment, the insulating layer material 140M may be, for example, a hole-filling ink, but the present disclosure is not limited thereto. After the insulating layer material 140M is filled, the exposed portions of the insulating layer material 140M from the first surface 112 and the second surface 114 are ground so that the upper and lower surfaces of the insulating layer 140 are flush with the first conductive material 120M, respectively.

如第7A圖及第7B圖所示，在共軸通孔結構的製造方法中，接著形成第二貫孔OP2於絕緣層材料140M中。在本實施例中，第二貫孔OP2與第一貫孔OP1為同心圓。舉例來說，形成第二貫孔OP2的方式為雷射鑽孔，藉此移除一部分的絕緣層材料140M。在形成第二貫孔OP2後，剩餘的絕緣層材料140M包含位在第一貫孔OP1中的部份(即絕緣層140)以及分別位在基板110兩側的第一突出部142與第二突出部144。As shown in FIGS. 7A and 7B , in the method of manufacturing the coaxial via structure, the second through hole OP2 is then formed in the insulating layer material 140M. In this embodiment, the second through hole OP2 and the first through hole OP1 are concentric circles. For example, the method of forming the second through hole OP2 is laser drilling, thereby removing a part of the insulating layer material 140M. After the second through hole OP2 is formed, the remaining insulating layer material 140M includes the portion located in the first through hole OP1 (ie the insulating layer 140 ) and the first protrusions 142 and the second protrusions 142 located on both sides of the substrate 110 respectively. Protrusions 144 .

如第8A圖及第8B圖所示，在共軸通孔結構的製造方法中，接著將第二導電材料130M形成於第一表面112上、第二表面114上以及第二貫孔OP2中。形成第一導電材料120M的方式例如可為電鍍，第一導電材料120M例如為銅，但本揭露並不以此為限，本領域人士當可視情況選擇適當的方法與材料。As shown in FIGS. 8A and 8B , in the method of fabricating the coaxial via structure, the second conductive material 130M is then formed on the first surface 112 , the second surface 114 and in the second through hole OP2 . The method of forming the first conductive material 120M may be, for example, electroplating, and the first conductive material 120M is copper, for example, but the disclosure is not limited to this, and those skilled in the art can select appropriate methods and materials as appropriate.

第二導電材料130M位在第二貫孔OP2中，且第一貫孔OP1中的第一導電材料120M(即第一通孔124)包圍絕緣層140與第二貫孔OP2中的第二導電材料130M(即第二通孔134)，使得絕緣層140、第一貫孔OP1中的第一導電材料120M與第二貫孔OP2中的第二導電材料130M相對於軸心A共軸。The second conductive material 130M is located in the second through hole OP2, and the first conductive material 120M in the first through hole OP1 (ie, the first through hole 124 ) surrounds the insulating layer 140 and the second conductive material in the second through hole OP2 The material 130M (ie the second through hole 134 ) makes the insulating layer 140 , the first conductive material 120M in the first through hole OP1 and the second conductive material 130M in the second through hole OP2 coaxial with respect to the axis A.

如第9A圖及第9B圖所示，在共軸通孔結構的製造方法中，接著形成光罩160於第一表面112與第二表面114上。光罩160包含用以形成第一線路122與第二線路132的圖案以及用以形成第三線路126與第四線路136的圖案。As shown in FIGS. 9A and 9B , in the manufacturing method of the coaxial via structure, a photomask 160 is then formed on the first surface 112 and the second surface 114 . The mask 160 includes patterns for forming the first lines 122 and the second lines 132 and patterns for forming the third lines 126 and the fourth lines 136 .

如第10A圖及第10B圖所示，在共軸通孔結構的製造方法中，接著藉由光罩160圖案化第一導電材料120M與第二導電材料130M。自光罩160露出的第二導電材料130M及第一導電材料120M接續地被移除直到絕緣層140與介電層150自光罩160露出。As shown in FIG. 10A and FIG. 10B , in the manufacturing method of the coaxial via structure, the first conductive material 120M and the second conductive material 130M are then patterned by the photomask 160 . The second conductive material 130M and the first conductive material 120M exposed from the photomask 160 are successively removed until the insulating layer 140 and the dielectric layer 150 are exposed from the photomask 160 .

同時參照第10A圖、第10B圖、第11A圖及第11B圖。在共軸通孔結構的製造方法中，最後將光罩160移除，並形成絕緣保護層170。絕緣保護層170具有開口以連接導電件，例如金屬凸塊、凸塊或焊球(圖未示)。Also refer to Figures 10A, 10B, 11A, and 11B. In the manufacturing method of the coaxial via structure, the photomask 160 is finally removed, and the insulating protection layer 170 is formed. The insulating protection layer 170 has openings for connecting conductive elements, such as metal bumps, bumps or solder balls (not shown).

如第11B圖所示，在上述的步驟之後，即可形成彼此分隔的第一線路122與第二線路132，且第一線路122與第二線路132共平面。第一通孔124與第二線路132藉由第一凹槽TR1中的第一突出部142電性絕緣。第一線路122可包含任意線路圖案，只要第一線路122與第二線路132電性絕緣即可。As shown in FIG. 11B , after the above steps, the first line 122 and the second line 132 separated from each other can be formed, and the first line 122 and the second line 132 are coplanar. The first through hole 124 and the second circuit 132 are electrically insulated by the first protrusion 142 in the first groove TR1. The first line 122 may include any line pattern, as long as the first line 122 and the second line 132 are electrically insulated.

同樣地，在上述的步驟之後，即可形成彼此分隔的第三線路126與第四線路136，且第三線路126與第四線路136共平面。第一通孔124與第四線路136藉由第二凹槽TR2中的第二突出部144電性絕緣。第三線路126可包含任意線路圖案 (圖未示)，只要第三線路126與第四線路136電性絕緣即可。Likewise, after the above-mentioned steps, the third line 126 and the fourth line 136 separated from each other can be formed, and the third line 126 and the fourth line 136 are coplanar. The first through hole 124 and the fourth circuit 136 are electrically insulated by the second protrusion 144 in the second groove TR2. The third circuit 126 may include any circuit pattern (not shown) as long as the third circuit 126 and the fourth circuit 136 are electrically insulated.

參照第11A圖。在本實例中，第二線路132具有寬度W1，且絕緣層140與第一突出部142連接處具有寬度W2。寬度W2可藉由改變第一凹槽TR1與第一貫孔OP1的距離而對應地調整，寬度W2也可取決於第一凹槽TR1的孔徑。因此，根據所需的寬度W1，可在形成第一凹槽TR1的步驟中計算出第一凹槽TR1與第一貫孔OP1的適當距離。如此一來，可確保寬度W2足夠寬，以藉此降低第二線路132的斷線風險。第二線路132與相鄰的第一線路122之間具有間距I。在特定阻抗的需求限制下，可根據第二線路132的寬度W1與厚度、介電層150之參數決定間距I，藉此提升阻抗匹配效果。Refer to Figure 11A. In this example, the second line 132 has a width W1, and the connection between the insulating layer 140 and the first protrusion 142 has a width W2. The width W2 can be adjusted correspondingly by changing the distance between the first groove TR1 and the first through hole OP1 , and the width W2 can also depend on the diameter of the first groove TR1 . Therefore, according to the required width W1, an appropriate distance between the first groove TR1 and the first through hole OP1 can be calculated in the step of forming the first groove TR1. In this way, the width W2 can be ensured to be wide enough, thereby reducing the risk of disconnection of the second line 132 . There is an interval I between the second line 132 and the adjacent first line 122 . Under the requirement of a specific impedance, the distance I can be determined according to the width W1 and thickness of the second line 132 and the parameters of the dielectric layer 150 , thereby improving the impedance matching effect.

綜上所述，由於本揭露的共軸通孔結構具有共平面的接地線與訊號線(第一線路與第二線路)，且第一導電結構與第二導電結構可透過絕緣層電性絕緣，因此本揭露的共軸通孔結構可具有較佳的電磁雜訊屏蔽以及阻抗匹配效果，以提升高頻訊號完整性。此外，本揭露的共軸通孔結構可減少介電層的數量，以縮減共軸通孔結構的厚度。因此，本揭露的共軸通孔結構還可具有降低成本之技術功效。To sum up, since the coaxial via structure of the present disclosure has coplanar ground lines and signal lines (the first line and the second line), and the first conductive structure and the second conductive structure can be electrically insulated through the insulating layer Therefore, the coaxial via structure of the present disclosure can have better electromagnetic noise shielding and impedance matching effects, so as to improve the integrity of high-frequency signals. In addition, the coaxial via structure of the present disclosure can reduce the number of dielectric layers to reduce the thickness of the coaxial via structure. Therefore, the coaxial via structure of the present disclosure can also have the technical effect of reducing cost.

雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be determined by the scope of the appended patent application.

100:共軸通孔結構 110:基板 112:第一表面 114:第二表面 116:內部線路 120:第一導電結構 120M:第一導電材料 122:第一線路 124:第一通孔 126:第三線路 130:第二導電結構 130M:第二導電材料 132:第二線路 134:第二通孔 136:第四線路 140:絕緣層 140M:絕緣層材料 142:第一突出部 144:第二突出部 150:介電層 160:光罩 170:絕緣保護層 D1:第一方向 D2:第二方向 OP1:第一貫孔 OP2:第二貫孔 TR1:第一凹槽 TR2:第二凹槽 A:軸心 3B-3B,4B-4B,5B-5B,6B-6B,7B-7B,8B-8B,9B-9B,10B-10B,11B-11B:線段 W1,W2:寬度 I:間距 100: Coaxial through hole structure 110: Substrate 112: First Surface 114: Second Surface 116: Internal circuit 120: the first conductive structure 120M: first conductive material 122: The first line 124: first through hole 126: Third line 130: Second Conductive Structure 130M: Second Conductive Material 132: Second line 134: second through hole 136: Fourth line 140: Insulation layer 140M: Insulation layer material 142: First protrusion 144: Second protrusion 150: Dielectric layer 160: Photomask 170: Insulation protective layer D1: first direction D2: Second direction OP1: The first through hole OP2: Second through hole TR1: first groove TR2: Second groove A: Axis 3B-3B, 4B-4B, 5B-5B, 6B-6B, 7B-7B, 8B-8B, 9B-9B, 10B-10B, 11B-11B: Line segment W1,W2: width I: Spacing

第1圖為根據本揭露一實施例之共軸通孔結構之立體圖 。 第2圖為沿著第1圖中線段2-2的剖面圖。 第3A圖至第11A圖為根據本揭露一實施例之共軸通孔結構的製造方法的中間步驟的俯視圖。 第3B圖至第11B圖分別為沿著第3A圖至第11A圖中線段3B-3B至線段11B-11B的剖面圖。 FIG. 1 is a perspective view of a coaxial via structure according to an embodiment of the present disclosure. FIG. 2 is a cross-sectional view along line 2-2 in FIG. 1. FIG. FIGS. 3A to 11A are top views of intermediate steps of a method for fabricating a coaxial via structure according to an embodiment of the present disclosure. FIGS. 3B to 11B are cross-sectional views along line segment 3B-3B to line segment 11B-11B in FIGS. 3A to 11A, respectively.

110:基板 110: Substrate

112:第一表面 112: First Surface

114:第二表面 114: Second Surface

116:內部線路 116: Internal circuit

120:第一導電結構 120: the first conductive structure

122:第一線路 122: The first line

124:第一通孔 124: first through hole

126:第三線路 126: Third line

130:第二導電結構 130: Second Conductive Structure

132:第二線路 132: Second line

134:第二通孔 134: second through hole

136:第四線路 136: Fourth line

140:絕緣層 140: Insulation layer

142:第一突出部 142: First protrusion

144:第二突出部 144: Second protrusion

150:介電層 150: Dielectric layer

A:軸心 A: Axis

D1:第一方向 D1: first direction

D2:第二方向 D2: Second direction

Claims (14)

一種共軸通孔結構，包含： 一基板，具有一第一表面； 一第一導電結構，包含位在該第一表面上的一第一線路與貫穿該基板的一第一通孔； 一第二導電結構，包含位在該基板的第一表面上的一第二線路與貫穿該基板的一第二通孔，該第一通孔與該第二通孔延伸於一第一方向，該第一線路與該第二線路延伸於一第二方向，且該第二方向垂直於該第一方向；以及 一絕緣層，位在該第一通孔與該第二通孔之間，其中該第一導電結構與該第二導電結構電性絕緣，且該第一線路與該第二線路共平面。 A coaxial through-hole structure comprising: a substrate having a first surface; a first conductive structure including a first circuit on the first surface and a first through hole penetrating the substrate; a second conductive structure including a second circuit on the first surface of the substrate and a second through hole penetrating the substrate, the first through hole and the second through hole extending in a first direction, The first line and the second line extend in a second direction, and the second direction is perpendicular to the first direction; and An insulating layer is located between the first through hole and the second through hole, wherein the first conductive structure and the second conductive structure are electrically insulated, and the first line and the second line are coplanar. 如請求項1所述之共軸通孔結構，其中該第一導電結構的該第一通孔圍繞該第二導電結構的該第二通孔與該絕緣層。The coaxial via structure of claim 1, wherein the first via of the first conductive structure surrounds the second via of the second conductive structure and the insulating layer. 如請求項1所述之共軸通孔結構，其中該絕緣層、該第一通孔與該第二通孔共軸。The coaxial through hole structure of claim 1, wherein the insulating layer, the first through hole and the second through hole are coaxial. 如請求項1所述之共軸通孔結構，其中該絕緣層具有一突出部，位在該絕緣層靠近該第一表面的一末端。The coaxial via structure of claim 1, wherein the insulating layer has a protruding portion located at an end of the insulating layer close to the first surface. 如請求項4所述之共軸通孔結構，其中該絕緣層的該突出部遠離該第二通孔沿著該第二方向突出。The coaxial via structure of claim 4, wherein the protruding portion of the insulating layer protrudes away from the second via hole along the second direction. 如請求項4所述之共軸通孔結構，其中該第一導電結構的該第一通孔、該絕緣層的該突出部、以及該第二導電結構的該第二線路於該第一方向上重疊。The coaxial via structure of claim 4, wherein the first via hole of the first conductive structure, the protrusion of the insulating layer, and the second line of the second conductive structure are on the first side Overlap up. 如請求項4所述之共軸通孔結構，其中該基板還包含相對於該第一表面的一第二表面，且共軸通孔結構還包含位在該第一表面與該第二表面之間的一介電層，且該絕緣層的該突出部接觸該介電層。The coaxial via structure of claim 4, wherein the substrate further comprises a second surface opposite to the first surface, and the coaxial via structure further comprises a surface located between the first surface and the second surface a dielectric layer therebetween, and the protrusion of the insulating layer contacts the dielectric layer. 一種共軸通孔結構的製造方法，包含： 形成一第一貫孔於一基板中； 形成一第一導電材料於該基板的一第一表面上以及該第一貫孔中； 形成自該第一表面凹陷的一凹槽，且使該凹槽與該第一貫孔連通； 形成一絕緣層於該第一貫孔及該凹槽中； 形成一第二導電材料於該基板的該第一表面上以及該第一貫孔中；以及 圖案化該第一導電材料與該第二導電材料以形成位在該第一表面上的一第一線路與一第二線路，使得剩餘的該第一導電材料與剩餘的該第二導電材料藉由該凹槽中的該絕緣層電性絕緣，且該第一線路與該第二線路共平面。 A manufacturing method of a coaxial through hole structure, comprising: forming a first through hole in a substrate; forming a first conductive material on a first surface of the substrate and in the first through hole; forming a groove recessed from the first surface, and making the groove communicate with the first through hole; forming an insulating layer in the first through hole and the groove; forming a second conductive material on the first surface of the substrate and in the first through hole; and patterning the first conductive material and the second conductive material to form a first line and a second line on the first surface, so that the remaining first conductive material and the remaining second conductive material It is electrically insulated by the insulating layer in the groove, and the first line and the second line are coplanar. 如請求項8所述之共軸通孔結構的製造方法，其中該共軸通孔結構還包含相對於該第一表面的一第二表面，且形成該凹槽還包含： 自該第一表面沿著一第一方向鑽孔。 The method for manufacturing a coaxial via structure according to claim 8, wherein the coaxial via structure further comprises a second surface opposite to the first surface, and forming the groove further comprises: Drill holes are drilled from the first surface along a first direction. 如請求項8所述之共軸通孔結構的製造方法，其中該共軸通孔結構還包含位在該第一表面與該第二表面之間的一介電層，且形成該凹槽還包含： 使得該介電層自該第一導電材料曝露。 The method for manufacturing a coaxial via structure according to claim 8, wherein the coaxial via structure further comprises a dielectric layer between the first surface and the second surface, and forming the groove further Include: The dielectric layer is exposed from the first conductive material. 如請求項10所述之共軸通孔結構的製造方法，其中形成該絕緣層於該第一貫孔及該凹槽中還包含： 形成一絕緣層材料於該第一貫孔及該凹槽中，使得該絕緣層材料接觸該介電層；以及 形成一第二貫孔於該絕緣層材料中，以形成該絕緣層，其中該絕緣層具有位在該凹槽中的一突出部。 The method for manufacturing a coaxial via structure according to claim 10, wherein forming the insulating layer in the first through hole and the groove further comprises: forming an insulating layer material in the first through hole and the groove, so that the insulating layer material contacts the dielectric layer; and A second through hole is formed in the insulating layer material to form the insulating layer, wherein the insulating layer has a protrusion located in the groove. 如請求項11所述之共軸通孔結構的製造方法，其中形成該第二導電材料於該基板的該第一表面上以及該第一貫孔中還包含： 形成該第二導電材料於該第二貫孔中，且使得該第一貫孔中的該第一導電材料包圍該絕緣層與該第二貫孔中的該第二導電材料。 The method for manufacturing a coaxial via structure according to claim 11, wherein forming the second conductive material on the first surface of the substrate and in the first through hole further comprises: The second conductive material is formed in the second through hole so that the first conductive material in the first through hole surrounds the insulating layer and the second conductive material in the second through hole. 如請求項12所述之共軸通孔結構的製造方法，其中形成該第二導電材料於該基板的該第一表面上以及該第一貫孔中還包含： 使得該絕緣層、該第一貫孔中的該第一導電材料與該第二貫孔中的該第二導電材料共軸。 The method for manufacturing a coaxial via structure according to claim 12, wherein forming the second conductive material on the first surface of the substrate and in the first through hole further comprises: The insulating layer, the first conductive material in the first through hole and the second conductive material in the second through hole are made coaxial. 如請求項8所述之共軸通孔結構的製造方法，其中圖案化該第一導電材料與該第二導電材料以形成該第一線路與該第二線路，還包含： 使得該第一貫孔中的該第一導電材料、該絕緣層的該突出部、以及該第二線路於該第一方向上重疊。 The method for manufacturing a coaxial via structure according to claim 8, wherein patterning the first conductive material and the second conductive material to form the first circuit and the second circuit, further comprising: The first conductive material in the first through hole, the protruding portion of the insulating layer, and the second circuit are made to overlap in the first direction.
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US8273995B2 (en) * 2008-06-27 2012-09-25 Qualcomm Incorporated Concentric vias in electronic substrate
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