TW201716760A - Pressure sensor with composite chamber and method of manufacturing such pressure sensor - Google Patents
Pressure sensor with composite chamber and method of manufacturing such pressure sensor Download PDFInfo
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- TW201716760A TW201716760A TW104135977A TW104135977A TW201716760A TW 201716760 A TW201716760 A TW 201716760A TW 104135977 A TW104135977 A TW 104135977A TW 104135977 A TW104135977 A TW 104135977A TW 201716760 A TW201716760 A TW 201716760A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
- G01L9/12—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in capacitance, i.e. electric circuits therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L19/00—Details of, or accessories for, apparatus for measuring steady or quasi-steady pressure of a fluent medium insofar as such details or accessories are not special to particular types of pressure gauges
- G01L19/06—Means for preventing overload or deleterious influence of the measured medium on the measuring device or vice versa
- G01L19/0681—Protection against excessive heat
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Abstract
Description
本發明是有關於一種壓力感測器及其製造方法,且特別是有關於一種具有複合腔體的壓力感測器及其製造方法。 The present invention relates to a pressure sensor and a method of manufacturing the same, and more particularly to a pressure sensor having a composite cavity and a method of fabricating the same.
壓力感測器可以用來偵測流體壓力的大小,也可以用來偵測氣壓的大小,氣體壓力感測是工業應用最廣且十分重要的技術,目前已有許多不同類型的產品,其中如布爾登(Bourdon)管型氣壓計、簧片變形計(diaphragm-type strain gauge)等。這些傳統的壓力感測器皆是以氣壓差來產生原件上的相對物理變形或位移量,進而計算轉換成流體壓力的大小,也可以用來偵測氣壓的大小,傳統的氣壓感測器體積龐大而且精確度不高,大部分應用於工業界例如氣體管路壓力的監控。 Pressure sensors can be used to detect the pressure of fluids and to detect the pressure. Gas pressure sensing is the most widely used and important technology in the industry. There are many different types of products, such as Bourdon tube type barometer, diaphragm-type strain gauge, etc. These conventional pressure sensors use the difference in air pressure to generate relative physical deformation or displacement on the original, and then calculate the magnitude of the pressure converted into fluid. It can also be used to detect the pressure, the volume of the traditional pneumatic sensor. Large and inaccurate, most of them are used in industrial applications such as gas line pressure monitoring.
為此,一種利用微機電技術(MEMS)製作的壓阻(piezo-resistive)式壓力感測器因應而生,其可以達到微小化及更高的精度,例如達到100Pa~10Pa的精度。但是,利用壓阻效應感測技術,對於溫度是敏感的,量測精度因此受限,可應用於胎壓感測(約100Pa的靈敏度),或血壓偵測(約10Pa的靈敏度),但卻不適合應用在譬如手機的移動裝置上來量測高度(小於1Pa的靈敏度),這應用可以讓使用者 將2D GPS定位擴展至3D定位,透過應用程式完成各種新型的應用,例如室內導航(in-door navigation)。 To this end, a piezo-resistive pressure sensor fabricated using microelectromechanical technology (MEMS) has been developed to achieve miniaturization and higher precision, for example, to achieve an accuracy of 100 Pa to 10 Pa. However, the piezoresistive effect sensing technology is sensitive to temperature, and the measurement accuracy is limited. It can be applied to tire pressure sensing (a sensitivity of about 100 Pa) or blood pressure detection (a sensitivity of about 10 Pa), but Not suitable for use on mobile devices such as mobile phones to measure altitude (less than 1Pa sensitivity), this application allows users Extend 2D GPS positioning to 3D positioning to complete a variety of new applications, such as in-door navigation, through the app.
另外,亦有電容式壓力感測器,但是這種感測器通常會 受到寄生電容的影響。為解決此問題,通常需要將電容式壓力感測器設計成單石體(monolithic)的結構,才能提供優於壓阻式感測器的精度。 In addition, there are capacitive pressure sensors, but such sensors usually Subject to parasitic capacitance. To solve this problem, it is often necessary to design a capacitive pressure sensor into a monolithic structure to provide accuracy superior to a piezoresistive sensor.
再者,將壓力感測器電連接到電路板時,其封裝基板與 焊接電路板之間利用表面安裝技術製程(Surface Mount Technology (SMT)process)所導致的熱應力也會干擾量測的精度,以上問題都是本發明欲解決的問題。 Furthermore, when the pressure sensor is electrically connected to the circuit board, the package substrate and The thermal stress caused by the surface mount technology (SMT) process between the soldered circuit boards also interferes with the accuracy of the measurement, and the above problems are all problems to be solved by the present invention.
因此,本發明之一個目的是提供一種具有複合腔體的壓力感測器及其製造方法,藉由增大壓力感測器內的腔體的容積,並使腔體維持在接近真空的壓力,來提高感測結果,降低溫度變化對於感測結果的影響。 Accordingly, it is an object of the present invention to provide a pressure sensor having a composite cavity and a method of fabricating the same, by increasing the volume of the cavity within the pressure sensor and maintaining the cavity at a pressure close to vacuum, To improve the sensing results and reduce the impact of temperature changes on the sensing results.
本發明之另一目的是提供一種具有複合腔體的壓力感測器及其製造方法,可以有效阻絕電路板焊接的應力傳達至壓力感測單元。 Another object of the present invention is to provide a pressure sensor having a composite cavity and a method of manufacturing the same, which can effectively prevent the stress of soldering of the circuit board from being transmitted to the pressure sensing unit.
本發明之又另一目的是提供一種具有複合腔體的壓力感測器及其製造方法,可以利用晶圓級封裝技術來製作,藉以提高產能,降低製造成本。 Still another object of the present invention is to provide a pressure sensor having a composite cavity and a method of fabricating the same that can be fabricated using wafer level packaging techniques to increase throughput and reduce manufacturing costs.
為達上述目的,本發明提供一種壓力感測器,至少包含:一基底結構,具有一感測電路;一第一電極板,形成於基底結構上或之中;以及一蓋體結構,設置於第一電極板的上方,其中一腔體形成於蓋體結構與第一電極板之間,蓋體結構具有一第二電極板,蓋體結 構受到一流體的壓力而變形,進而改變第二電極板與第一電極板之間的距離,感測電路藉由感測第一電極板與第二電極板之間的電容值變化來感測壓力變化,其中腔體包含:一中間腔,位於第一電極板與第二電極板之間;及至少一外圍腔,位於中間腔周圍,外圍腔的高度大於中間腔的高度。 In order to achieve the above object, the present invention provides a pressure sensor comprising: a base structure having a sensing circuit; a first electrode plate formed on or in the base structure; and a cover structure disposed on Above the first electrode plate, a cavity is formed between the cover structure and the first electrode plate, and the cover structure has a second electrode plate, the cover body The structure is deformed by the pressure of a fluid to change the distance between the second electrode plate and the first electrode plate, and the sensing circuit senses by sensing a change in capacitance between the first electrode plate and the second electrode plate. The pressure changes, wherein the cavity comprises: an intermediate cavity between the first electrode plate and the second electrode plate; and at least one peripheral cavity located around the intermediate cavity, the height of the peripheral cavity being greater than the height of the intermediate cavity.
於上述壓力感測器中,基底結構包含:一基板,感測電 路形成於基板中;以及一連線層,位於基板與第一電極板之間,並將感測電路電連接至第一電極板。基底結構更包含一絕緣層,形成於連線層及第一電極板上,其中第二電極板透過中間腔以及絕緣層來與第一電極板相對。 In the above pressure sensor, the base structure comprises: a substrate, sensing electricity The circuit is formed in the substrate; and a wiring layer is disposed between the substrate and the first electrode plate, and electrically connects the sensing circuit to the first electrode plate. The base structure further includes an insulating layer formed on the wiring layer and the first electrode plate, wherein the second electrode plate passes through the intermediate cavity and the insulating layer to face the first electrode plate.
於上述壓力感測器中,蓋體結構之一截面包含:兩個支 撐結構,設置於基底結構上;以及至少兩個彎折結構,具有兩個分別連接至兩個支撐結構的第一端,以及兩個共同連接至第一電極板之第二端。各支撐結構包含:一第一接合層,位於基底結構上;及一第二接合層,接合至第一接合層上。各支撐結構更包含一多晶矽層,位於第二接合層上,其中第二電極板與多晶矽層具有相同材料,並位於同一平面上。 In the above pressure sensor, a section of the cover structure includes: two branches The support structure is disposed on the base structure; and the at least two bent structures have two first ends respectively connected to the two support structures, and two second ends connected in common to the first electrode plate. Each support structure includes: a first bonding layer on the base structure; and a second bonding layer bonded to the first bonding layer. Each support structure further comprises a polysilicon layer on the second bonding layer, wherein the second electrode plate and the polysilicon layer have the same material and are located on the same plane.
於上述壓力感測器中,第二電極板具有暴露至流體之一上表面及暴露至腔體之一下表面。 In the above pressure sensor, the second electrode plate has an upper surface exposed to one of the fluids and exposed to a lower surface of the cavity.
於上述壓力感測器中,蓋體結構之一截面包含:兩個垂直支撐結構,設置於基底結構上;以及一個水平支撐結構,設置於兩個垂直支撐結構上,第二電極板設置於水平支撐結構之一下表面上。各垂直支撐結構包含:一第一接合層,位於基底結構上;一第二接合層,接合至第一接合層上;及一第一多晶矽層,位於第二接合層上。 各平支撐結構包含:一第二多晶矽層,位於第一多晶矽層上。 In the above pressure sensor, a section of the cover structure comprises: two vertical support structures disposed on the base structure; and a horizontal support structure disposed on the two vertical support structures, the second electrode plate being disposed at a level One of the support structures is on the lower surface. Each of the vertical support structures includes: a first bonding layer on the substrate structure; a second bonding layer bonded to the first bonding layer; and a first polysilicon layer on the second bonding layer. Each flat support structure comprises: a second polysilicon layer on the first polysilicon layer.
於上述壓力感測器中,更包含:一輸入輸出結構,設置 於基底結構上,並位於蓋體結構的周圍。輸入輸出結構具有一應力緩衝結構,垂直連接至基底結構,並可於水平方向變形,以吸收外來的應力。輸入輸出結構包含:一第一接合層,位於基底結構上;一第二接合層,接合至第一接合層上;一個半導體層,半導體層位於第二接合層上方;以及多個焊墊,位於半導體層上。此外,外圍腔的高度與中間腔的高度的比值介於10與30之間,第二電極板的最小厚度介於2至5微米之間。 In the above pressure sensor, the method further comprises: an input and output structure, setting It is on the base structure and is located around the cover structure. The input-output structure has a stress buffer structure that is vertically connected to the base structure and deformable in a horizontal direction to absorb external stress. The input-output structure comprises: a first bonding layer on the substrate structure; a second bonding layer bonded to the first bonding layer; a semiconductor layer, the semiconductor layer is above the second bonding layer; and a plurality of pads located at On the semiconductor layer. Further, the ratio of the height of the peripheral cavity to the height of the intermediate cavity is between 10 and 30, and the minimum thickness of the second electrode plate is between 2 and 5 microns.
為達上述目的,本發明提供一種壓力感測器的製造方法, 包含以下步驟:提供一第一電極結構,具有多個第一接合層、一第一電極板及一感測電路,感測電路電連接至第一電極板;提供一第二電極結構,具有多個第二接合層以及一第二電極板;將此等第一接合層與此等第二接合層接合在一起;移除第二電極結構的一部分,藉以形成一蓋體結構於第一電極板的上方,其中一腔體形成於蓋體結構與第一電極板之間,蓋體結構具有第二電極板,蓋體結構受到一流體的壓力而變形,進而改變第二電極板與第一電極板之間的距離,感測電路藉由感測第一電極板與第二電極板之間的電容值變化來感測壓力變化。腔體包含:一中間腔,位於第一電極板與第二電極板之間;及一外圍腔,位於中間腔周圍,並且不位於第一電極板與第二電極板之間,外圍腔的高度大於中間腔的高度。 In order to achieve the above object, the present invention provides a method of manufacturing a pressure sensor, The method includes the following steps: providing a first electrode structure, having a plurality of first bonding layers, a first electrode plate, and a sensing circuit, wherein the sensing circuit is electrically connected to the first electrode plate; and providing a second electrode structure a second bonding layer and a second electrode plate; bonding the first bonding layers to the second bonding layers; removing a portion of the second electrode structure to form a cap structure on the first electrode plate Above, a cavity is formed between the cover structure and the first electrode plate, and the cover structure has a second electrode plate, and the cover structure is deformed by a fluid pressure, thereby changing the second electrode plate and the first electrode The distance between the plates, the sensing circuit senses the pressure change by sensing a change in capacitance between the first electrode plate and the second electrode plate. The cavity comprises: an intermediate cavity between the first electrode plate and the second electrode plate; and a peripheral cavity located around the intermediate cavity and not located between the first electrode plate and the second electrode plate, the height of the peripheral cavity Greater than the height of the intermediate cavity.
於上述製造方法中,移除第二電極結構的一部分的步驟 包含:於第二電極結構之一第一表面上形成多個焊墊;於第二電極結構之第一表面以及此等焊墊上形成一上絕緣層;移除部分的上絕緣層, 以露出此等焊墊;以上絕緣層作為遮罩來蝕刻第二電極結構的一個半導體層,蝕刻停止於第二電極結構的一下絕緣層上;以及移除露出的下絕緣層,以形成蓋體結構與位於蓋體結構周圍的一輸入輸出結構。 In the above manufacturing method, the step of removing a portion of the second electrode structure The method comprises: forming a plurality of solder pads on a first surface of the second electrode structure; forming an upper insulating layer on the first surface of the second electrode structure and the solder pads; removing the upper insulating layer of the portion, Exposed to the solder pads; the upper insulating layer acts as a mask to etch a semiconductor layer of the second electrode structure, the etching stops on the lower insulating layer of the second electrode structure; and the exposed lower insulating layer is removed to form the cover The structure and an input and output structure located around the cover structure.
於上述製造方法中,移除第二電極結構的一部分的步驟 更包含:移除半導體層的另一部分以及第二電極板上的下絕緣層,以露出第二電極板。 In the above manufacturing method, the step of removing a portion of the second electrode structure Further comprising: removing another portion of the semiconductor layer and a lower insulating layer on the second electrode plate to expose the second electrode plate.
於上述製造方法中,提供第二電極結構的步驟包含:於 一個半導體基板上形成一圖案化的絕緣層;於圖案化的絕緣層上形成一第二多晶矽層;於第二多晶矽層上形成一圖案化的犧牲絕緣層;於圖案化的犧牲絕緣層上形成一第一多晶矽層;於第一多晶矽層上形成此等第二接合層;以及移除部分的半導體基板,以形成一溝槽來露出犧牲絕緣層,溝槽作為腔體的一部分。 In the above manufacturing method, the step of providing the second electrode structure comprises: Forming a patterned insulating layer on a semiconductor substrate; forming a second polysilicon layer on the patterned insulating layer; forming a patterned sacrificial insulating layer on the second polysilicon layer; Forming a first polysilicon layer on the insulating layer; forming the second bonding layer on the first polysilicon layer; and removing a portion of the semiconductor substrate to form a trench to expose the sacrificial insulating layer, the trench Part of the cavity.
藉由本發明的上述實施例,可以藉由增大壓力感測器內的腔體的容積,並使腔體維持在接近真空的壓力,來提高感測結果,降低溫度變化對於感測結果的影響。另外,藉由應力阻絕結構,可以有效阻絕電路板焊接的應力傳達至壓力感測單元。再者,這種壓力感測器可以利用晶圓級封裝技術來製作,藉以提高產能,降低製造成本。 With the above embodiment of the present invention, the sensing result can be improved by increasing the volume of the cavity in the pressure sensor and maintaining the cavity at a pressure close to the vacuum, thereby reducing the influence of the temperature change on the sensing result. . In addition, by the stress-resistance structure, the stress of the board soldering can be effectively prevented from being transmitted to the pressure sensing unit. Furthermore, such pressure sensors can be fabricated using wafer level packaging techniques to increase throughput and reduce manufacturing costs.
為讓本發明之上述內容能更明顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下。 In order to make the above description of the present invention more comprehensible, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings.
D‧‧‧距離 D‧‧‧Distance
G‧‧‧間隙 G‧‧‧ gap
H42‧‧‧高度 H42‧‧‧ Height
H44‧‧‧高度 H44‧‧‧ Height
P‧‧‧壓力 P‧‧‧ pressure
T‧‧‧最小厚度 T‧‧‧minimum thickness
10‧‧‧基底結構 10‧‧‧Base structure
11‧‧‧基板 11‧‧‧Substrate
12‧‧‧感測電路 12‧‧‧Sensor circuit
13‧‧‧連線層 13‧‧‧Connection layer
14‧‧‧絕緣層 14‧‧‧Insulation
20‧‧‧第一電極板 20‧‧‧First electrode plate
30‧‧‧蓋體結構 30‧‧‧ cover structure
31‧‧‧支撐結構 31‧‧‧Support structure
31A‧‧‧第一接合層 31A‧‧‧First joint layer
31B‧‧‧第二接合層 31B‧‧‧Second joint layer
31C‧‧‧多晶矽層 31C‧‧‧Polysilicon layer
31C'‧‧‧第一多晶矽層 31C'‧‧‧First polycrystalline layer
32‧‧‧第二電極板 32‧‧‧Second electrode plate
33‧‧‧彎折結構 33‧‧‧Bending structure
33'‧‧‧水平支撐結構 33'‧‧‧ horizontal support structure
33A‧‧‧第一端 33A‧‧‧ first end
33A'‧‧‧第二多晶矽層 33A'‧‧‧Second polycrystalline layer
33B‧‧‧第二端 33B‧‧‧ second end
33B'‧‧‧絕緣層 33B'‧‧‧Insulation
33C'‧‧‧犧牲絕緣層 33C'‧‧‧ Sacrificial insulation
36‧‧‧絕緣層 36‧‧‧Insulation
40‧‧‧腔體 40‧‧‧ cavity
42‧‧‧中間腔 42‧‧‧Intermediate cavity
44‧‧‧外圍腔 44‧‧‧ peripheral cavity
44A‧‧‧第一部分 44A‧‧‧Part I
44B‧‧‧第二部分 44B‧‧‧Part II
44C‧‧‧第三部分 44C‧‧‧Part III
44D‧‧‧第四部分 44D‧‧‧Part IV
44E‧‧‧第五部分 44E‧‧‧Part V
50‧‧‧輸入輸出結構 50‧‧‧Input and output structure
51‧‧‧支撐結構 51‧‧‧Support structure
51A‧‧‧第一接合層 51A‧‧‧First joint layer
51B‧‧‧第二接合層 51B‧‧‧Second joint layer
51C‧‧‧多晶矽層 51C‧‧‧Polysilicon layer
52‧‧‧下絕緣層 52‧‧‧lower insulation
53‧‧‧半導體層 53‧‧‧Semiconductor layer
54‧‧‧上絕緣層 54‧‧‧Upper insulation
55‧‧‧焊墊 55‧‧‧ solder pads
60‧‧‧電路板 60‧‧‧ boards
65‧‧‧錫球 65‧‧‧ solder balls
100‧‧‧壓力感測器 100‧‧‧pressure sensor
101‧‧‧半導體基板 101‧‧‧Semiconductor substrate
102‧‧‧絕緣層 102‧‧‧Insulation
103‧‧‧第二電極層 103‧‧‧Second electrode layer
105‧‧‧溝槽 105‧‧‧ trench
106‧‧‧腔體 106‧‧‧ cavity
107‧‧‧腔體 107‧‧‧ cavity
110‧‧‧第一電極結構 110‧‧‧First electrode structure
120‧‧‧第二電極結構 120‧‧‧Second electrode structure
121‧‧‧第一表面 121‧‧‧ first surface
130‧‧‧半導體基板 130‧‧‧Semiconductor substrate
131‧‧‧溝槽 131‧‧‧ trench
321‧‧‧上表面 321‧‧‧ upper surface
322‧‧‧下表面 322‧‧‧ lower surface
331'‧‧‧下表面 331'‧‧‧ lower surface
圖1A顯示依據本發明第一實施例的壓力感測器的示意圖。 Fig. 1A shows a schematic view of a pressure sensor in accordance with a first embodiment of the present invention.
圖1B顯示依據本發明第一實施例的壓力感測器與電路板結合的示意圖。 1B is a schematic view showing the combination of a pressure sensor and a circuit board in accordance with a first embodiment of the present invention.
圖1C顯示依據本發明第一實施例的壓力感測器的俯視示意圖。 1C shows a top plan view of a pressure sensor in accordance with a first embodiment of the present invention.
圖1D顯示依據本發明第一實施例的壓力感測器的輸入輸出結構的俯視示意圖。 1D is a top plan view showing an input/output structure of a pressure sensor according to a first embodiment of the present invention.
圖2A至圖2F以及圖3A至圖3F顯示依據本發明第一實施例的壓力感測器的製造方法的各步驟的結構示意圖。 2A to 2F and 3A to 3F are structural diagrams showing the steps of a method of manufacturing a pressure sensor according to a first embodiment of the present invention.
圖4A至圖4F以及圖5A至圖5F顯示依據本發明第二實施例的壓力感測器的製造方法的各步驟的結構示意圖。 4A to 4F and 5A to 5F are structural diagrams showing the steps of a method of manufacturing a pressure sensor according to a second embodiment of the present invention.
圖6A至圖6G顯示適用於本發明各實施例的第一電極結構的多個例子的示意圖。 6A to 6G are schematic views showing a plurality of examples of first electrode structures suitable for use in various embodiments of the present invention.
圖7A至圖7G以及圖8A至圖8D顯示依據本發明第三實施例的壓力感測器的製造方法的各步驟的結構示意圖。 7A to 7G and Figs. 8A to 8D are structural diagrams showing the steps of a method of manufacturing a pressure sensor according to a third embodiment of the present invention.
圖9顯示依據本發明第四實施例的壓力感測器的局部示意剖面圖。 Figure 9 is a partial schematic cross-sectional view showing a pressure sensor in accordance with a fourth embodiment of the present invention.
本發明的實施例提供一種具有複合腔體的壓力感測器及其製造方法,藉由增大壓力感測器內的腔體的容積,並使腔體維持在接近真空的壓力,來提高感測結果,降低溫度變化對於感測結果的影響。另外本發明的感測器,係以電容感測為原理,相較於壓阻式的感測方式,更進一步降低溫度效應,並且為一種單石體(monolithic)電容壓力感測器,有效降低寄生電容,提高感測精度。另外,本發明提供了一種應力阻絕結構,可以有效阻絕包括元件製造時或者與電路板焊接過程中的熱殘留應力傳達至電容壓力感測單元。再者,本發明更提供一種晶圓級封裝技術,來降低感測器的幾何尺寸並且可以降低製造成本。最後,本發明的晶圓級封裝技術更可以提供一種熱應力阻絕結構,當感測器焊接(譬如使用SMT)於一電路板上時,該過程(包括SMT 焊料,例如錫膏/錫球的施加或形成)所產生的熱殘餘應力,可以被有效阻絕。 Embodiments of the present invention provide a pressure sensor having a composite cavity and a method of fabricating the same, which increase the sense by increasing the volume of the cavity in the pressure sensor and maintaining the cavity at a pressure close to vacuum The results are measured to reduce the effect of temperature changes on the sensing results. In addition, the sensor of the present invention is based on the principle of capacitive sensing, and further reduces the temperature effect compared to the piezoresistive sensing mode, and is a monolithic capacitive pressure sensor, which effectively reduces Parasitic capacitance improves sensing accuracy. In addition, the present invention provides a stress relief structure that can effectively block the transfer of thermal residual stress including the component manufacturing or the soldering process to the circuit board to the capacitive pressure sensing unit. Furthermore, the present invention further provides a wafer level packaging technique to reduce the geometry of the sensor and reduce manufacturing costs. Finally, the wafer level packaging technology of the present invention can further provide a thermal stress resistive structure. When the sensor is soldered (for example, using SMT) on a circuit board, the process (including SMT) The thermal residual stress generated by solder, such as the application or formation of solder paste/tin balls, can be effectively blocked.
圖1A顯示依據本發明第一實施例的壓力感測器的示意 圖。如圖1A所示,本實施例之壓力感測器100至少包含一基底結構10、一第一電極板20以及一蓋體結構30。 1A shows a schematic view of a pressure sensor in accordance with a first embodiment of the present invention. Figure. As shown in FIG. 1A, the pressure sensor 100 of the present embodiment includes at least a base structure 10, a first electrode plate 20, and a cover structure 30.
基底結構10具有一感測電路12。第一電極板20形成於 基底結構10上。蓋體結構30設置於第一電極板20的上方。一腔體40形成於蓋體結構30與第一電極板20之間,蓋體結構30具有一第二電極板32,蓋體結構30受到一流體的壓力P而變形,進而改變第二電極板32與第一電極板20之間的距離D,感測電路12藉由感測第一電極板20與第二電極板32之間的電容值變化來感測壓力變化。 The base structure 10 has a sensing circuit 12. The first electrode plate 20 is formed on On the base structure 10. The cover structure 30 is disposed above the first electrode plate 20. A cavity 40 is formed between the cover structure 30 and the first electrode plate 20. The cover structure 30 has a second electrode plate 32. The cover structure 30 is deformed by a pressure P of a fluid, thereby changing the second electrode plate. The distance D between the 32 and the first electrode plate 20, the sensing circuit 12 senses the pressure change by sensing a change in the capacitance value between the first electrode plate 20 and the second electrode plate 32.
腔體40於製造時設計維持於一低壓的狀態,接近高真空 狀態,但是由於製造完成後的放氣(outgassing)效應仍會存在有一些氣體,該殘留氣體會由熱漲冷縮原理,而對量測造成影響。為此,本發明發明有別於傳統的平行板電容壓力感測器設計(其僅有類似圖1A的中間腔42),本發明有複合式腔體40設計,腔體40包含一中間腔42及一外圍腔44。中間腔42位於第一電極板20與第二電極板32之間。 外圍腔44位於中間腔42周圍,並且不位於第一電極板20與第二電極板32之間,外圍腔44的高度H44大於中間腔42的高度H42(其通常為感測電容間隙)。外圍腔44的數量可以是一個或多個(參見圖9的說明)。高度H44與高度H42的比值大約在5與50之間,較佳是在10與30之間。這種複合腔體的設計有兩個優點,說明如下,其一是可以維持低的距離D,以提高電容感測靈敏度,並且不易受放氣(outgassing)效應改變腔體氣壓的影響(如傳統單一平行板腔體,如果降低D,則體 積變小,放氣效應將更明顯),維持壓力感測器100不易受到環境溫度變化(氣體熱漲冷縮)的影響而產生感測值的差異。 The cavity 40 is designed to be maintained in a low pressure state at the time of manufacture, close to a high vacuum State, but there will still be some gas due to the outgassing effect after the completion of the manufacturing, which will affect the measurement by the principle of heat rise and contraction. To this end, the present invention differs from conventional parallel plate capacitive pressure sensor designs (which are similar to the intermediate cavity 42 of FIG. 1A). The present invention has a composite cavity 40 design that includes an intermediate cavity 42. And a peripheral cavity 44. The intermediate chamber 42 is located between the first electrode plate 20 and the second electrode plate 32. The peripheral cavity 44 is located around the intermediate cavity 42 and is not located between the first electrode plate 20 and the second electrode plate 32. The height H44 of the peripheral cavity 44 is greater than the height H42 of the intermediate cavity 42 (which is typically the sensing capacitance gap). The number of peripheral chambers 44 may be one or more (see the description of Figure 9). The ratio of height H44 to height H42 is between about 5 and 50, preferably between 10 and 30. The design of such a composite cavity has two advantages, as explained below. One is that it can maintain a low distance D to improve the capacitance sensing sensitivity, and is not susceptible to the influence of the outgassing effect on the cavity pressure (such as the conventional Single parallel plate cavity, if D is lowered, the body The product becomes smaller and the deflation effect will be more obvious. The pressure sensor 100 is not easily affected by the change in the ambient temperature (gas heat rise and contraction) and the difference in the sensed value is generated.
已知理想氣體方程式為pV=nRT,其中p為理想氣體的 壓力,V為理想氣體的體積,n為氣體物質的量,T為理想氣體的熱力學溫度,R為理想氣體常數。因此,本發明的複合腔體加大了V,相較於傳統單一平行板腔體,可以得到更低的p,所以溫度效應造成的熱漲冷縮對本發明複合腔體感測器的影響較低。 The ideal gas equation is known as pV=nRT, where p is the ideal gas The pressure, V is the volume of the ideal gas, n is the amount of the gaseous substance, T is the thermodynamic temperature of the ideal gas, and R is the ideal gas constant. Therefore, the composite cavity of the present invention has an increased V, and a lower p can be obtained compared to the conventional single parallel plate cavity, so that the thermal expansion and contraction caused by the temperature effect has a greater influence on the composite cavity sensor of the present invention. low.
於本實施例中,基底結構10包含一基板11以及一連線 層13。感測電路12形成於基板11中。連線層13包含導體連接線及層間介電層(Inter-Layer Dielectric,ILD)或金屬層間介電層(Inter-Metal Dielectric,IMD),主要是提供電連接的功能。連線層13位於基板11與第一電極板20之間,並將感測電路12電連接至第一電極板20,熟悉積體電路技術者當知悉此一基底結構可以利用例如習知的CMOS技術,亦或者其他習知的半導體積體電路製造技術來製作。 In the embodiment, the base structure 10 includes a substrate 11 and a connection. Layer 13. The sensing circuit 12 is formed in the substrate 11. The wiring layer 13 includes a conductor connection line and an Inter-Layer Dielectric (ILD) or an Inter-Metal Dielectric (IMD), and mainly provides a function of electrical connection. The wiring layer 13 is located between the substrate 11 and the first electrode plate 20, and electrically connects the sensing circuit 12 to the first electrode plate 20. Those skilled in the art of circuit circuits know that the substrate structure can utilize, for example, a conventional CMOS. Technology, or other conventional semiconductor integrated circuit fabrication techniques.
此外,本實施例的基底結構10更包含一絕緣層14,形 成於連線層13及第一電極板20上,其中第二電極板32透過中間腔42以及絕緣層14來與第一電極板20相對。因此,本實施例的距離D大於高度H42。 In addition, the base structure 10 of the embodiment further includes an insulating layer 14 The wiring layer 13 and the first electrode plate 20 are formed, and the second electrode plate 32 is opposed to the first electrode plate 20 through the intermediate cavity 42 and the insulating layer 14. Therefore, the distance D of the present embodiment is larger than the height H42.
此外,如圖1A所示,蓋體結構30之一示意截面包含兩 個支撐結構31以及至少兩個彎折結構33(以蓋體結構30的立體圖來看,實際為一密封的3D結構,藉由支撐結構31的環狀布局而形成一密閉的真空空間)。彎折結構33在本實施例中為一個倒U形結構。兩個支撐結構31設置於基底結構10上。各彎折結構33的材料為半導體材料,譬如是矽。兩個彎折結構33具有兩個分別連接至兩個支撐結構 31的第一端33A,以及兩個共同連接至第一電極板20之第二端33B。值得注意的是,在實體上,支撐結構31可以是單一結構,譬如是一個矩形環、圓形環、橢圓形環或其他的環狀結構。此外,彎折結構33也可以是單一或多個環狀結構,是因為在截面的呈現上會呈現兩個或多個結構。 In addition, as shown in FIG. 1A, one of the schematic structures of the cover structure 30 includes two The support structure 31 and the at least two bending structures 33 (actually a sealed 3D structure according to the perspective view of the cover structure 30, form a closed vacuum space by the annular layout of the support structure 31). The bent structure 33 is an inverted U-shaped structure in this embodiment. Two support structures 31 are disposed on the base structure 10. The material of each of the bent structures 33 is a semiconductor material such as ruthenium. Two bending structures 33 have two connected to two supporting structures respectively The first end 33A of the 31, and the second end 33B are commonly connected to the first electrode plate 20. It is to be noted that, physically, the support structure 31 may be a single structure, such as a rectangular ring, a circular ring, an elliptical ring or other annular structure. Further, the bent structure 33 may also be a single or a plurality of annular structures because two or more structures may be present in the representation of the cross section.
各支撐結構31包含一第一接合層31A、一第二接合層31B及一多晶矽層31C。第一接合層31A位於基底結構10上。第二接合層31B接合至第一接合層31A上。第一接合層31A與第二接合層31B的材料可以是選自於鋁、銅、鍺、金、錫、銦、矽等等所組成的群組。舉例而言,第一接合層31A的材料為鋁,而第二接合層31B的材料為鍺,其中鋁和鍺可以在約420℃形成共晶接合(eutectic bonding),並且這兩種材料與CMOS製程相容,更適合應用於本實施例具有積體電路整合的設計。多晶矽層31C位於第二接合層31B上。於本實施例中,第二電極板32與多晶矽層31C具有相同材料,譬如是多晶矽,並位於同一平面上,可以於製作時同時完成。另外有種情況,多晶矽層31C不是必要的,多晶矽本身就可以是第二接合層31B的材料,而此時第一接合層31A可以是金(Au)。另外值得注意的是,本發明的多晶矽層及各彎折結構33的材料為半導體材料,以及半導體層53(說明於後)的半導體材料都是具有高導電性及低阻值特性,因此在本發明中,半導體材料本身就可以做為導電連接,這也是本發明的特色之一,藉由高導電的半導體材料取代傳統金屬的電性連接,才能構成本發明所提出的結構設計,也可以藉此節省多餘的製程,降低成本。 Each support structure 31 includes a first bonding layer 31A, a second bonding layer 31B, and a polysilicon layer 31C. The first bonding layer 31A is located on the base structure 10. The second bonding layer 31B is bonded to the first bonding layer 31A. The material of the first bonding layer 31A and the second bonding layer 31B may be selected from the group consisting of aluminum, copper, ruthenium, gold, tin, indium, antimony, and the like. For example, the material of the first bonding layer 31A is aluminum, and the material of the second bonding layer 31B is germanium, wherein aluminum and germanium can form eutectic bonding at about 420 ° C, and the two materials and CMOS The process is compatible, and is more suitable for the design with integrated circuit integration in this embodiment. The polysilicon layer 31C is located on the second bonding layer 31B. In the present embodiment, the second electrode plate 32 and the polysilicon layer 31C have the same material, such as polycrystalline germanium, and are located on the same plane, which can be simultaneously completed at the time of fabrication. In another case, the polysilicon layer 31C is not necessary, and the polysilicon itself may be the material of the second bonding layer 31B, and at this time, the first bonding layer 31A may be gold (Au). It is also worth noting that the polysilicon layer of the present invention and the material of each of the bent structures 33 are semiconductor materials, and the semiconductor materials of the semiconductor layer 53 (described later) have high conductivity and low resistance characteristics, and therefore In the invention, the semiconductor material itself can be used as an electrically conductive connection, which is also one of the features of the present invention. By replacing the electrical connection of the conventional metal with a highly conductive semiconductor material, the structural design proposed by the present invention can be constructed. This saves redundant processes and reduces costs.
另一方面,第二電極板32具有暴露至流體之一上表面321及暴露至腔體40之一下表面322。在本實施力中該倒U型僅顯示單一 彎折的蓋體結構30,但是本發明是可以延伸到更多重的彎折結構。如此,可以形成多重彎折的蓋體結構30,讓蓋體結構30在受微小壓力變化時也會有所改變,提高感測靈敏度,可以參見圖9的說明。 On the other hand, the second electrode plate 32 has an upper surface 321 exposed to one of the fluids and a lower surface 322 exposed to the cavity 40. In this implementation, the inverted U type only shows a single The bent cover structure 30, but the present invention can be extended to more heavy bent structures. In this way, the multiple-folded cover structure 30 can be formed, and the cover structure 30 can be changed when subjected to a slight pressure change, thereby improving the sensing sensitivity. See the description of FIG.
圖1B顯示依據本發明第一實施例的壓力感測器與電路板 結合的示意圖。如圖1A與圖1B所示,壓力感測器100更包含一輸入輸出結構50,設置於基底結構10上,並位於蓋體結構30的周圍。 1B shows a pressure sensor and a circuit board in accordance with a first embodiment of the present invention A schematic diagram of the combination. As shown in FIG. 1A and FIG. 1B , the pressure sensor 100 further includes an input/output structure 50 disposed on the base structure 10 and located around the cover structure 30 .
輸入輸出結構50包含一第一接合層51A、一第二接合層 51B、一多晶矽層51C、一下絕緣層52、一個半導體層53、一上絕緣層54以及多個焊墊55。第一接合層51A位於基底結構10上。第二接合層51B接合至第一接合層51A上。多晶矽層51C位於第二接合層51B上。下絕緣層52局部包圍多晶矽層51C,但是下絕緣層52並非是必要元件,亦可不存在於其他實施例中。半導體層53位於下絕緣層52與多晶矽層51C上。在多晶矽層31C不存在的上述情況下,多晶矽層51C也不存在。此時,多晶矽本身就可以是第二接合層51B的材料,而此時第一接合層51A可以是金(Au),於此情況下,半導體層53位於第二接合層51B上方。上絕緣層54位於半導體層53上,但是上絕緣層54並非是必要元件,亦可不存在於其他實施例中。焊墊55位於半導體層53上,熟悉該技藝的人當熟知包括上絕緣層54及焊墊55並不限定於單一材料,其可以為複合層,例如為了製作錫球65於其上,焊墊可以是鎳(Ni)、銅(Cu)、鈀(Pd)、Au等的組合。於本實施例中,第一接合層51A、第二接合層51B與多晶矽層51C的材料分別與第一接合層31A、第二接合層31B與多晶矽層31C相同。 The input-output structure 50 includes a first bonding layer 51A and a second bonding layer. 51B, a polysilicon layer 51C, a lower insulating layer 52, a semiconductor layer 53, an upper insulating layer 54, and a plurality of pads 55. The first bonding layer 51A is located on the base structure 10. The second bonding layer 51B is bonded to the first bonding layer 51A. The polysilicon layer 51C is located on the second bonding layer 51B. The lower insulating layer 52 partially surrounds the polysilicon layer 51C, but the lower insulating layer 52 is not an essential element and may not be present in other embodiments. The semiconductor layer 53 is located on the lower insulating layer 52 and the polysilicon layer 51C. In the above case where the polysilicon layer 31C does not exist, the polysilicon layer 51C does not exist. At this time, the polysilicon itself may be the material of the second bonding layer 51B, and at this time, the first bonding layer 51A may be gold (Au), and in this case, the semiconductor layer 53 is located above the second bonding layer 51B. The upper insulating layer 54 is on the semiconductor layer 53, but the upper insulating layer 54 is not an essential component and may not be present in other embodiments. The pad 55 is located on the semiconductor layer 53. It is well known to those skilled in the art that the upper insulating layer 54 and the pad 55 are not limited to a single material, and may be a composite layer, for example, for making a solder ball 65 thereon, a pad It may be a combination of nickel (Ni), copper (Cu), palladium (Pd), Au, or the like. In the present embodiment, the materials of the first bonding layer 51A, the second bonding layer 51B, and the polysilicon layer 51C are the same as those of the first bonding layer 31A, the second bonding layer 31B, and the polysilicon layer 31C, respectively.
壓力感測器最終是要電連接至電路板,因此,亦可以將 電路板視為是壓力感測器100的一部分。因此,壓力感測器100更包 含一電路板60,設置於輸入輸出結構50上,並電連接至輸入輸出結構50,電路板60與蓋體結構30之間具有一間隙G。於本實施例中,電路板60透過多個錫球65電連接至輸入輸出結構50。於其他實施例中,亦可以透過打線接合的方式達成電連接。 The pressure sensor is ultimately connected to the board, so it can also be The board is considered to be part of the pressure sensor 100. Therefore, the pressure sensor 100 is further included A circuit board 60 is disposed on the input/output structure 50 and electrically connected to the input/output structure 50. The circuit board 60 and the cover structure 30 have a gap G therebetween. In the present embodiment, the circuit board 60 is electrically connected to the input/output structure 50 through a plurality of solder balls 65. In other embodiments, the electrical connection can also be achieved by wire bonding.
圖1C顯示依據本發明第一實施例的壓力感測器的俯視示 意圖。圖1D顯示依據本發明第一實施例的壓力感測器的輸入輸出結構的俯視示意圖。圖1A的剖面結構相當於是從圖1C的基底結構10的對角線所剖出(尺寸上不作特別限制)。如圖1C與圖1D所示,壓力感測器具有譬如四個輸入輸出結構50,各輸入輸出結構50藉由譬如四個多晶矽層51C、第一接合層51A及第二接合層51B(及相關的電路單元,圖中未示)電性連結於於基底結構10上,同時向上透過高導電性的半導體層53電性連結至輸入輸出結構50,當然也可以透過標準的半導體製程的導線(譬如是多重連續彎折的導線)或導體層來實施,於此不再贅述。多晶矽層51C與半導體層53(或透過設計可以只有半導體層53)可以被等效成彈簧結構或是緩衝結構,亦即多晶矽層51C與半導體層53被垂直蝕刻成具有應力緩衝的結構,而位於該應力緩衝結構的一端為固定於基底結構10上方的支撐結構51,另一端則是懸浮於基底結構10上方的輸入輸出結構50(其間隙約相同於H42(也可以由設計微調之),應力緩衝結構垂直連接至基底結構10,並可於水平方向變形,以吸收外來的應力。如此,在焊墊55被焊接至電路板時,熱應力會被彈簧結構或是緩衝結構隔絕在外,而不會傳遞到基底結構10,至此可以發現,本發明提供了兩種應力削減結構,其一為彎折結構33可以削減製程中及支撐結構31接合過程中的熱殘餘應力對第二電極板32的影響,另外一種結構就是具有應力緩衝結構的輸入輸出結構50,削 減SMT過程中對基底結構10的應力影響,結合兩者可以完成最完美的高靈敏度電容式壓力感測器,並且這樣的結構製程都是藉由晶圓級製造方式完成的,而不是單一元件的製造,這種晶圓級感測元件製造同時完成晶圓級封裝技術(元件51至55),也是本發明重要特色,不僅節省了封裝成本,也讓元件尺寸大幅縮小(因為採用晶圓級晶片封裝(Wafer Level Chip Scale Package,WLCSP)),適合未來輕薄短小應用的需求。 1C shows a top view of a pressure sensor in accordance with a first embodiment of the present invention. intention. 1D is a top plan view showing an input/output structure of a pressure sensor according to a first embodiment of the present invention. The cross-sectional structure of Fig. 1A is equivalent to being cut from the diagonal of the base structure 10 of Fig. 1C (the size is not particularly limited). As shown in FIG. 1C and FIG. 1D, the pressure sensor has, for example, four input/output structures 50, such as four polysilicon layers 51C, a first bonding layer 51A, and a second bonding layer 51B (and related). The circuit unit (not shown) is electrically connected to the base structure 10, and is electrically connected to the high-conductivity semiconductor layer 53 to the input/output structure 50, and of course, can also pass through a standard semiconductor process wire (for example, It is a multiple continuous bending wire or a conductor layer, and will not be described here. The polysilicon layer 51C and the semiconductor layer 53 (or the transmission design may only have the semiconductor layer 53) may be equivalent to a spring structure or a buffer structure, that is, the polysilicon layer 51C and the semiconductor layer 53 are vertically etched into a stress buffer structure. One end of the stress buffer structure is a support structure 51 fixed above the base structure 10, and the other end is an input-output structure 50 suspended above the base structure 10 (the gap is about the same as H42 (can also be fine-tuned by design), the stress The buffer structure is vertically connected to the base structure 10 and can be deformed in a horizontal direction to absorb external stress. Thus, when the pad 55 is soldered to the circuit board, thermal stress is isolated by the spring structure or the buffer structure, without It is transmitted to the base structure 10, and it has been found that the present invention provides two stress reduction structures, one of which is that the bent structure 33 can reduce the thermal residual stress in the process and during the joining process of the support structure 31 to the second electrode plate 32. Influence, another structure is an input-output structure 50 with a stress buffer structure, Reducing the stress on the substrate structure 10 during the SMT process, combined with the two can complete the most perfect high-sensitivity capacitive pressure sensor, and such structural process is completed by wafer level manufacturing, rather than a single component Fabrication, wafer-level sensing device fabrication, and wafer-level packaging technology (components 51 through 55) are also important features of the present invention, which not only saves packaging costs, but also allows component size to be significantly reduced (because wafer level is used) Wafer Level Chip Scale Package (WLCSP), suitable for future thin and light applications.
換言之,輸入輸出結構50透過支撐結構51而在Z方向(垂 直於X方向與Y方向)連結至基底結構10,多晶矽層51C與半導體層53被蝕刻成具有削薄的彈性結構(該彈性結構在圖1D中僅為說明的一種實施例,任何形狀結構都不受限)而連接至基底結構10,使得該削薄的彈性結構有在X方向與Y方向彈性移動的特性,提供應力緩衝的效果,有效阻絕熱殘餘應力對基底結構10的影響。 In other words, the input-output structure 50 is transmitted through the support structure 51 in the Z direction. Directly coupled to the base structure 10 in the X direction and the Y direction), the polysilicon layer 51C and the semiconductor layer 53 are etched to have a thinned elastic structure (this elastic structure is merely an embodiment illustrated in FIG. 1D, and any shape structure is Without being limited, it is connected to the base structure 10 such that the thinned elastic structure has a property of elastically moving in the X direction and the Y direction, providing a stress buffering effect, and effectively blocking the influence of the thermal residual stress on the base structure 10.
圖2A至圖2F以及圖3A至圖3F顯示依據本發明第一實 施例的壓力感測器的製造方法的各步驟的結構示意圖。壓力感測器100的製造方法,包含以下步驟。 2A to 2F and 3A to 3F show the first embodiment according to the present invention A schematic structural view of each step of the method of manufacturing the pressure sensor of the embodiment. The method of manufacturing the pressure sensor 100 includes the following steps.
如圖2A至圖2F所示,提供一第二電極結構120,具有 多個第二接合層51B以及一第二電極板32。詳言之,提供一個半導體基板101,譬如是矽基板,如圖2A所示。然後,在半導體基板101上形成一個圖案化的絕緣層102,譬如是二氧化矽層但不限定於此,如圖2B所示。接著,如圖2C所示,在絕緣層102以及半導體基板101上形成一個第二電極層103,譬如是導電多晶矽層,當然也可以包含一化學機械研磨(Chemical-Mechanical Polishing,CMP)製程以控制該多晶矽層表面的平坦,最後位於該絕緣層102上方的多晶矽層的厚度(相 當於是第二電極板32的最小厚度T(參見圖1A))介於1至10um(微米)間,較佳實施例為2至5um之間,第二電極板32為第二電極層103的一部分。然後,如圖2D所示,在第二電極層103上形成多個第二接合層51B、31B。接著,如圖2E所示,移除一部分的第二電極層103,以露出部分的絕緣層102。然後,如圖2F所示,移除另一部分的第二電極層103,以露出部分的絕緣層102,以形成一溝槽105,該溝槽105的深度介於5至50um間,較佳實施例為20至40um。 As shown in FIG. 2A to FIG. 2F, a second electrode structure 120 is provided, having A plurality of second bonding layers 51B and a second electrode plate 32. In particular, a semiconductor substrate 101, such as a germanium substrate, is provided, as shown in Figure 2A. Then, a patterned insulating layer 102 is formed on the semiconductor substrate 101, such as a ruthenium dioxide layer, but is not limited thereto, as shown in FIG. 2B. Next, as shown in FIG. 2C, a second electrode layer 103, such as a conductive polysilicon layer, is formed on the insulating layer 102 and the semiconductor substrate 101. Of course, a chemical-mechanical polishing (CMP) process may be included to control The surface of the polysilicon layer is flat, and finally the thickness of the polysilicon layer above the insulating layer 102 When the minimum thickness T (see FIG. 1A) of the second electrode plate 32 is between 1 and 10 um (micrometers), the preferred embodiment is between 2 and 5 um, and the second electrode plate 32 is the second electrode layer 103. portion. Then, as shown in FIG. 2D, a plurality of second bonding layers 51B, 31B are formed on the second electrode layer 103. Next, as shown in FIG. 2E, a portion of the second electrode layer 103 is removed to expose a portion of the insulating layer 102. Then, as shown in FIG. 2F, another portion of the second electrode layer 103 is removed to expose a portion of the insulating layer 102 to form a trench 105 having a depth of between 5 and 50 um, preferably implemented. For example, 20 to 40um.
如圖3A與圖1A所示,提供一第一電極結構110,具有 多個第一接合層31A/51A、一第一電極板20及一感測電路12,感測電路12電連接至第一電極板20。在本實施例中,第一電極板20也可以是設置於絕緣層14上方,且其材料可以為一另外的導電材料,例如氮化鈦(TiN)、鈦(Ti)、Au等等。 As shown in FIG. 3A and FIG. 1A, a first electrode structure 110 is provided, having The plurality of first bonding layers 31A/51A, a first electrode plate 20 and a sensing circuit 12 are electrically connected to the first electrode plate 20. In this embodiment, the first electrode plate 20 may also be disposed above the insulating layer 14, and the material thereof may be an additional conductive material such as titanium nitride (TiN), titanium (Ti), Au, or the like.
如圖3B所示,將此等第一接合層51A與此等第二接合 層51B接合在一起,以形成多個腔體106、107及40。值得注意的是,本發明係為一晶圓製造流程,亦即複數個相同的第一電極結構110與多個第二電極結構120一起接合,同時達成晶圓級的元件製造,以及晶圓級的封裝,降低製造成本,這樣的設計及製造是從未出現的,也是本發明的另一特色。 As shown in FIG. 3B, the first bonding layers 51A are bonded to the second bonding layers. Layers 51B are joined together to form a plurality of cavities 106, 107, and 40. It should be noted that the present invention is a wafer fabrication process in which a plurality of identical first electrode structures 110 are bonded together with a plurality of second electrode structures 120 to achieve wafer level component fabrication and wafer level. Such packaging, reducing manufacturing costs, such design and manufacture has never occurred, and is another feature of the present invention.
如圖3C至圖3F與圖1A所示,移除第二電極結構120 的一部分,藉以形成一蓋體結構30於第一電極板20的上方,其中腔體40形成於蓋體結構30與第一電極板20之間,蓋體結構30具有第二電極板32,蓋體結構30受到一流體的壓力P而變形,進而改變第二電極板32與第一電極板20之間的距離D,感測電路12藉由感測第一電極板20與第二電極板32之間的電容值來感測距離D,來感測壓 力變化。 As shown in FIGS. 3C-3F and FIG. 1A, the second electrode structure 120 is removed. A portion of the cover 30 is formed above the first electrode plate 20, wherein the cavity 40 is formed between the cover structure 30 and the first electrode plate 20, and the cover structure 30 has a second electrode plate 32, the cover The body structure 30 is deformed by a pressure P of a fluid, thereby changing the distance D between the second electrode plate 32 and the first electrode plate 20, and the sensing circuit 12 senses the first electrode plate 20 and the second electrode plate 32. Between the capacitance value to sense the distance D, to sense the pressure Force changes.
詳言之,如圖3C所示,將半導體基板101磨薄到一定的 厚度。然後,如圖3D所示,於第二電極結構120之一第一表面121上形成多個焊墊55,然後,於第二電極結構120之第一表面121以及此等焊墊55上形成一上絕緣層54,接著,移除部分的上絕緣層54,以露出此等焊墊55。然後,如圖3E所示,以上絕緣層54作為遮罩來蝕刻第二電極結構120的半導體基板101,蝕刻停止於第二電極結構120的絕緣層102(對應至圖1A的下絕緣層52)上。接著,如圖3F所示,移除露出的絕緣層102,以形成蓋體結構30與位於蓋體結構30周圍的輸入輸出結構50,此時腔體107已經被破壞掉,腔體106也被打通成非密閉空間。圖3F的結構即可作為壓力感測器。於此情況下,兩個彎折結構33結合形成一E形結構,E形結構與第二電極板32之間的空間填滿一絕緣層36。 In detail, as shown in FIG. 3C, the semiconductor substrate 101 is thinned to a certain extent. thickness. Then, as shown in FIG. 3D, a plurality of pads 55 are formed on the first surface 121 of the second electrode structure 120, and then a first surface 121 of the second electrode structure 120 and the pads 55 are formed. The upper insulating layer 54 is followed by removing portions of the upper insulating layer 54 to expose the pads 55. Then, as shown in FIG. 3E, the above insulating layer 54 serves as a mask to etch the semiconductor substrate 101 of the second electrode structure 120, and the etching stops at the insulating layer 102 of the second electrode structure 120 (corresponding to the lower insulating layer 52 of FIG. 1A). on. Next, as shown in FIG. 3F, the exposed insulating layer 102 is removed to form the cover structure 30 and the input-output structure 50 located around the cover structure 30. At this time, the cavity 107 has been destroyed, and the cavity 106 is also Open up into a non-closed space. The structure of Figure 3F serves as a pressure sensor. In this case, the two bent structures 33 are combined to form an E-shaped structure, and the space between the E-shaped structure and the second electrode plate 32 is filled with an insulating layer 36.
但是,移除第二電極結構120的一部分的步驟可以更包 含移除半導體基板101的另一部分,甚至是第二電極板32上的絕緣層102,以露出第二電極板32,如圖1A所示。當然,於另一例子中,第二電極板32上的絕緣層102亦可被保留。 However, the step of removing a portion of the second electrode structure 120 may be further included. The other portion of the semiconductor substrate 101 is removed, even the insulating layer 102 on the second electrode plate 32 to expose the second electrode plate 32, as shown in FIG. 1A. Of course, in another example, the insulating layer 102 on the second electrode plate 32 may also be retained.
圖4A至圖4F以及圖5A至圖5F顯示依據本發明第二實 施例的壓力感測器的製造方法的各步驟的結構示意圖。本實施例係類似於第一實施例,不同之處在於絕緣層102的圖案不同,而造就不同的壓力感測器的結構。 4A to 4F and 5A to 5F show the second embodiment according to the present invention A schematic structural view of each step of the method of manufacturing the pressure sensor of the embodiment. This embodiment is similar to the first embodiment except that the patterns of the insulating layers 102 are different to create a structure of different pressure sensors.
如圖4A至圖4F所示,提供一第二電極結構120,具有 多個第二接合層51B以及一第二電極板32。詳言之,提供一個半導體基板101,譬如是矽基板,如圖4A所示。然後,在半導體基板101上 形成一個圖案化的絕緣層102,譬如是二氧化矽層,如圖4B所示。接著,如圖4C所示,在絕緣層102以及半導體基板101上形成一個第二電極層103,譬如是多晶矽層,第二電極板32為第二電極層103的一部分。然後,如圖4D所示,在第二電極層103上形成多個第二接合層51B。接著,如圖4E所示,移除一部分的第二電極層103,以露出部分的絕緣層102。然後,如圖4F所示,移除另一部分的第二電極層103,以露出部分的絕緣層102,以形成一溝槽105。 As shown in FIG. 4A to FIG. 4F, a second electrode structure 120 is provided, having A plurality of second bonding layers 51B and a second electrode plate 32. In detail, a semiconductor substrate 101 such as a germanium substrate is provided, as shown in FIG. 4A. Then, on the semiconductor substrate 101 A patterned insulating layer 102 is formed, such as a hafnium oxide layer, as shown in Figure 4B. Next, as shown in FIG. 4C, a second electrode layer 103 is formed on the insulating layer 102 and the semiconductor substrate 101, such as a polysilicon layer, and the second electrode plate 32 is a part of the second electrode layer 103. Then, as shown in FIG. 4D, a plurality of second bonding layers 51B are formed on the second electrode layer 103. Next, as shown in FIG. 4E, a portion of the second electrode layer 103 is removed to expose a portion of the insulating layer 102. Then, as shown in FIG. 4F, another portion of the second electrode layer 103 is removed to expose a portion of the insulating layer 102 to form a trench 105.
如圖5A與圖1A所示,提供一第一電極結構110,此類 似於第一實施例,不再贅述。 As shown in FIG. 5A and FIG. 1A, a first electrode structure 110 is provided, such Like the first embodiment, it will not be described again.
如圖5B所示,將此等第一接合層51A與此等第二接合 層51B接合在一起,以形成多個腔體106、107及40。值得注意的是,可以將多個第一電極結構110與多個第二電極結構120一起接合,達成晶圓級的封裝,降低製造成本。 As shown in FIG. 5B, the first bonding layers 51A are bonded to the second bonding layers. Layers 51B are joined together to form a plurality of cavities 106, 107, and 40. It should be noted that the plurality of first electrode structures 110 and the plurality of second electrode structures 120 may be bonded together to achieve wafer level packaging and reduce manufacturing costs.
如圖5C至圖5F所示,移除第二電極結構120的一部分, 藉以形成一蓋體結構30於第一電極板20的上方,其中腔體40形成於蓋體結構30與第一電極板20之間,蓋體結構30具有第二電極板32,蓋體結構30受到一流體的壓力P而變形,進而改變第二電極板32與第一電極板20之間的距離D,感測電路12藉由感測第一電極板20與第二電極板32之間的電容值來感測距離D,來感測壓力變化。 As shown in FIGS. 5C to 5F, a portion of the second electrode structure 120 is removed, Thereby, a cover structure 30 is formed above the first electrode plate 20, wherein the cavity 40 is formed between the cover structure 30 and the first electrode plate 20, and the cover structure 30 has the second electrode plate 32, and the cover structure 30 Deformed by a pressure P of a fluid, thereby changing the distance D between the second electrode plate 32 and the first electrode plate 20, and the sensing circuit 12 senses between the first electrode plate 20 and the second electrode plate 32. The capacitance value senses the distance D to sense the pressure change.
詳言之,如圖5C所示,將半導體基板101磨薄到一定的 厚度。然後,如圖5D所示,蝕刻第二電極結構120的半導體基板101,蝕刻停止於第二電極結構120的絕緣層102上。接著,如圖5E所示,移除露出的絕緣層102,以形成蓋體結構30與位於蓋體結構30周圍的一殘留結構109,此時腔體107與106已經被破壞掉。圖5E的結構即 可作為壓力感測器。但是,可以更移除半導體基板101的另一部分以及絕緣層102,以露出第二電極板32,如圖5F所示。 In detail, as shown in FIG. 5C, the semiconductor substrate 101 is thinned to a certain extent. thickness. Then, as shown in FIG. 5D, the semiconductor substrate 101 of the second electrode structure 120 is etched, and the etching stops on the insulating layer 102 of the second electrode structure 120. Next, as shown in FIG. 5E, the exposed insulating layer 102 is removed to form the lid structure 30 and a residual structure 109 located around the lid structure 30, at which time the chambers 107 and 106 have been destroyed. The structure of Figure 5E is Can be used as a pressure sensor. However, another portion of the semiconductor substrate 101 and the insulating layer 102 may be removed to expose the second electrode plate 32 as shown in FIG. 5F.
圖6A至圖6G顯示適用於本發明各實施例的第一電極結 構110的多個例子的示意圖。如圖3A所示,第一電極結構110的第一接合層51A與第一電極板20是位於不同的平面上,且第一電極板20被絕緣層14所覆蓋。如圖6A所示,第一接合層51A與第一電極板20位於同一平面上,可以是由最頂層的金屬所製成,於此情況下,第一電極板20是形成於基底結構10之中。如圖6B所示,第一電極板20與第一接合層51A都是位於絕緣層14上,在如此所製造出的壓力感測器100中,第一電極板20直接暴露至腔體40中。如圖6C所示,第一電極板20'與第一接合層51A位於同一平面上,但是第一電極板20'的材料(譬如是TiN)不同於第一接合層51A的材料(譬如是鋁(Al))。圖6A至圖6C適用於圖3A至圖3F的製程。圖6D至圖6G適用於圖5A至圖5F的製程。圖6D的結構類似於圖6A,圖6E的結構類似於圖3A,圖6F的結構類似於圖6B,圖6G的結構類似於圖6C,不同之處僅在於兩側的第一接合層51A的初始圖案。 6A to 6G show first electrode junctions suitable for use in various embodiments of the present invention. A schematic diagram of multiple examples of structure 110. As shown in FIG. 3A, the first bonding layer 51A of the first electrode structure 110 and the first electrode plate 20 are located on different planes, and the first electrode plate 20 is covered by the insulating layer 14. As shown in FIG. 6A, the first bonding layer 51A is located on the same plane as the first electrode plate 20, and may be made of the topmost metal. In this case, the first electrode plate 20 is formed on the base structure 10. in. As shown in FIG. 6B, the first electrode plate 20 and the first bonding layer 51A are both located on the insulating layer 14, and in the pressure sensor 100 thus manufactured, the first electrode plate 20 is directly exposed to the cavity 40. . As shown in FIG. 6C, the first electrode plate 20' is located on the same plane as the first bonding layer 51A, but the material of the first electrode plate 20' (such as TiN) is different from the material of the first bonding layer 51A (such as aluminum). (Al)). 6A to 6C are applicable to the processes of Figs. 3A to 3F. 6D to 6G are applicable to the processes of FIGS. 5A to 5F. 6D is similar to FIG. 6A, FIG. 6E is similar to FIG. 3A, and FIG. 6F is similar to FIG. 6B. FIG. 6G is similar to FIG. 6C except that the first bonding layer 51A on both sides is different. Initial pattern.
圖7A至圖7G以及圖8A至圖8D顯示依據本發明第三 實施例的壓力感測器的製造方法的各步驟的結構示意圖。本實施例係類似於第一實施例,不同之處在於提供第二電極結構120的步驟如下。 7A to 7G and 8A to 8D show a third according to the present invention A schematic structural view of each step of the method of manufacturing the pressure sensor of the embodiment. This embodiment is similar to the first embodiment except that the steps of providing the second electrode structure 120 are as follows.
如圖7A與圖7B所示,於一個半導體基板130上形成一 圖案化的絕緣層33B'。如圖7C所示,於圖案化的絕緣層33B'上形成一第二多晶矽層33A',並於第二多晶矽層33A'上形成一圖案化的犧牲絕緣層33C'。如圖7D所示,於圖案化的犧牲絕緣層33C'上形成一第一多晶矽層31C'。如圖7E所示,於第一多晶矽層31C'上形成此等第 二接合層51B、31B。如圖7F所示,移除部分的半導體基板130,以形成一溝槽131來露出犧牲絕緣層33C',溝槽131作為腔體40的一部分。如圖7G所示,移除溝槽131中的部分的犧牲絕緣層33C'。值得注意的是,可以使用乾蝕刻技術來移除半導體基板130及犧牲絕緣層33C',以形成溝槽131。或者,亦可使用濕蝕刻技術來移除半導體基板130及犧牲絕緣層33C',以形成溝槽131,於此情況下,溝槽131中不存在有犧牲絕緣層33C'。 As shown in FIG. 7A and FIG. 7B, a semiconductor substrate 130 is formed on the semiconductor substrate 130. Patterned insulating layer 33B'. As shown in FIG. 7C, a second polysilicon layer 33A' is formed on the patterned insulating layer 33B', and a patterned sacrificial insulating layer 33C' is formed on the second polysilicon layer 33A'. As shown in FIG. 7D, a first polysilicon layer 31C' is formed on the patterned sacrificial insulating layer 33C'. As shown in FIG. 7E, the first polycrystalline germanium layer 31C' is formed on the first polysilicon layer 31C'. Two bonding layers 51B, 31B. As shown in FIG. 7F, a portion of the semiconductor substrate 130 is removed to form a trench 131 to expose the sacrificial insulating layer 33C' as a portion of the cavity 40. As shown in FIG. 7G, a portion of the sacrificial insulating layer 33C' in the trench 131 is removed. It is to be noted that the dry etching technique may be used to remove the semiconductor substrate 130 and the sacrificial insulating layer 33C' to form the trenches 131. Alternatively, the semiconductor substrate 130 and the sacrificial insulating layer 33C' may be removed using a wet etching technique to form the trench 131. In this case, the sacrificial insulating layer 33C' is not present in the trench 131.
然後,如圖8A所示,提供一個第一電極結構110,類似 於圖3A與圖5A。如圖8B所示,將第一電極結構110與第二電極結構120接合在一起,類似於圖3B與圖5B。然後,可將第二電極結構120磨薄後形成上絕緣層54與焊墊55,類似於圖3D。接著,移除第二電極結構120的一部分,類似於圖3E與圖3F,以形成圖8D的結構。 Then, as shown in FIG. 8A, a first electrode structure 110 is provided, similar 3A and 5A. As shown in FIG. 8B, the first electrode structure 110 and the second electrode structure 120 are bonded together, similar to FIGS. 3B and 5B. Then, the second electrode structure 120 may be thinned to form an upper insulating layer 54 and a pad 55, similar to FIG. 3D. Next, a portion of the second electrode structure 120 is removed, similar to FIGS. 3E and 3F, to form the structure of FIG. 8D.
如圖8D所示,蓋體結構30'之一截面包含兩個垂直支撐 結構31'以及一個水平支撐結構33'。兩個垂直支撐結構31'設置於基底結構10上。水平支撐結構33'設置於兩個垂直支撐結構31'上,第二電極板32'設置於水平支撐結構33'之一下表面331'上。 As shown in FIG. 8D, one section of the cover structure 30' includes two vertical supports. Structure 31' and a horizontal support structure 33'. Two vertical support structures 31' are disposed on the base structure 10. The horizontal support structure 33' is disposed on the two vertical support structures 31', and the second electrode plate 32' is disposed on one of the lower surface 331' of the horizontal support structure 33'.
各垂直支撐結構31'包含一第一接合層31A'、一第二接合層31B'及一第一多晶矽層31C'。第一接合層31A'位於基底結構10上。第二接合層31B'接合至第一接合層31A'上。第一多晶矽層31C'位於第二接合層31B'上。 Each vertical support structure 31' includes a first bonding layer 31A', a second bonding layer 31B', and a first polysilicon layer 31C'. The first bonding layer 31A' is located on the base structure 10. The second bonding layer 31B' is bonded to the first bonding layer 31A'. The first polysilicon layer 31C' is located on the second bonding layer 31B'.
水平支撐結構33'包含一第二多晶矽層33A'及一絕緣層33B'。第二多晶矽層33A'位於第一多晶矽層31C'上。絕緣層33B'位於第二多晶矽層33A'上。然而,本發明並未受限於此,絕緣層33B'亦可於最後被去除。輸入輸出結構50'設置於基底結構10上,並位於蓋體 結構30的周圍,類似於圖1A的輸入輸出結構50。 The horizontal support structure 33' includes a second polysilicon layer 33A' and an insulating layer 33B'. The second polysilicon layer 33A' is located on the first polysilicon layer 31C'. The insulating layer 33B' is located on the second polysilicon layer 33A'. However, the present invention is not limited thereto, and the insulating layer 33B' may also be removed at the end. The input-output structure 50' is disposed on the base structure 10 and located in the cover Around the structure 30, similar to the input and output structure 50 of Figure 1A.
圖9顯示依據本發明第四實施例的壓力感測器的局部示 意剖面圖。如圖9所示,彎折結構33為一個連續的多重彎折結構,使得外圍腔44具有不同於圖1的形狀,因此,外圍腔44可以被分為第一部分44A、第二部分44B、第三部分44C、第四部分44D及第五部分44E。因此,可以將外圍腔視為是一個或多個。如此可以得到更加的感測靈敏度及應力阻絕效果。這種結構亦可以被應用至圖8D的結構,於此不再贅述。 Figure 9 shows a partial illustration of a pressure sensor in accordance with a fourth embodiment of the present invention. Intentional profile. As shown in FIG. 9, the bending structure 33 is a continuous multiple bending structure such that the peripheral cavity 44 has a shape different from that of FIG. 1, and therefore, the peripheral cavity 44 can be divided into a first portion 44A, a second portion 44B, and a Three parts 44C, fourth part 44D and fifth part 44E. Therefore, the peripheral cavity can be regarded as one or more. In this way, more sensing sensitivity and stress resistance can be obtained. This structure can also be applied to the structure of FIG. 8D, and details are not described herein again.
藉由本發明的上述實施例,可以藉由增大壓力感測器內的腔體的容積,並使腔體維持在接近真空的壓力,來提高感測結果,降低溫度變化對於感測結果的影響。另外,藉由應力阻絕結構,可以有效阻絕電路板焊接的應力傳達至壓力感測單元。再者,這種壓力感測器可以利用晶圓級封裝技術來製作,藉以提高產能,降低製造成本。 With the above embodiment of the present invention, the sensing result can be improved by increasing the volume of the cavity in the pressure sensor and maintaining the cavity at a pressure close to the vacuum, thereby reducing the influence of the temperature change on the sensing result. . In addition, by the stress-resistance structure, the stress of the board soldering can be effectively prevented from being transmitted to the pressure sensing unit. Furthermore, such pressure sensors can be fabricated using wafer level packaging techniques to increase throughput and reduce manufacturing costs.
在較佳實施例之詳細說明中所提出之具體實施例僅用以方便說明本發明之技術內容,而非將本發明狹義地限制於上述實施例,在不超出本發明之精神及以下申請專利範圍之情況,所做之種種變化實施,皆屬於本發明之範圍。 The specific embodiments of the present invention are intended to be illustrative only and not to limit the invention to the above embodiments, without departing from the spirit of the invention and the following claims. The scope of the invention and the various changes made are within the scope of the invention.
D‧‧‧距離 D‧‧‧Distance
H42‧‧‧高度 H42‧‧‧ Height
H44‧‧‧高度 H44‧‧‧ Height
P‧‧‧壓力 P‧‧‧ pressure
T‧‧‧最小厚度 T‧‧‧minimum thickness
10‧‧‧基底結構 10‧‧‧Base structure
11‧‧‧基板 11‧‧‧Substrate
12‧‧‧感測電路 12‧‧‧Sensor circuit
13‧‧‧連線層 13‧‧‧Connection layer
14‧‧‧絕緣層 14‧‧‧Insulation
20‧‧‧第一電極板 20‧‧‧First electrode plate
30‧‧‧蓋體結構 30‧‧‧ cover structure
31‧‧‧支撐結構 31‧‧‧Support structure
31A‧‧‧第一接合層 31A‧‧‧First joint layer
31B‧‧‧第二接合層 31B‧‧‧Second joint layer
31C‧‧‧多晶矽層 31C‧‧‧Polysilicon layer
32‧‧‧第二電極板 32‧‧‧Second electrode plate
33‧‧‧彎折結構 33‧‧‧Bending structure
33A‧‧‧第一端 33A‧‧‧ first end
33B‧‧‧第二端 33B‧‧‧ second end
40‧‧‧腔體 40‧‧‧ cavity
42‧‧‧中間腔 42‧‧‧Intermediate cavity
44‧‧‧外圍腔 44‧‧‧ peripheral cavity
50‧‧‧輸入輸出結構 50‧‧‧Input and output structure
51‧‧‧支撐結構 51‧‧‧Support structure
51A‧‧‧第一接合層 51A‧‧‧First joint layer
51B‧‧‧第二接合層 51B‧‧‧Second joint layer
51C‧‧‧多晶矽層 51C‧‧‧Polysilicon layer
52‧‧‧下絕緣層 52‧‧‧lower insulation
53‧‧‧半導體層 53‧‧‧Semiconductor layer
54‧‧‧上絕緣層 54‧‧‧Upper insulation
55‧‧‧焊墊 55‧‧‧ solder pads
100‧‧‧壓力感測器 100‧‧‧pressure sensor
Claims (18)
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