TW201601220A - 薄膜電晶體及其製造方法 - Google Patents

薄膜電晶體及其製造方法 Download PDF

Info

Publication number
TW201601220A
TW201601220A TW103121414A TW103121414A TW201601220A TW 201601220 A TW201601220 A TW 201601220A TW 103121414 A TW103121414 A TW 103121414A TW 103121414 A TW103121414 A TW 103121414A TW 201601220 A TW201601220 A TW 201601220A
Authority
TW
Taiwan
Prior art keywords
layer
semiconductor layer
source
forming
oxide
Prior art date
Application number
TW103121414A
Other languages
English (en)
Inventor
高金字
呂雅茹
鍾享顯
陸文正
Original Assignee
中華映管股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中華映管股份有限公司 filed Critical 中華映管股份有限公司
Priority to TW103121414A priority Critical patent/TW201601220A/zh
Priority to US14/472,401 priority patent/US9269827B2/en
Publication of TW201601220A publication Critical patent/TW201601220A/zh
Priority to US14/994,157 priority patent/US9923099B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/42—Bombardment with radiation
    • H01L21/423—Bombardment with radiation with high-energy radiation
    • H01L21/425—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/426—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/465—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/467—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Thin Film Transistor (AREA)

Abstract

一種製造薄膜電晶體的方法，包含下列步驟：形成閘極於基板上；形成閘極絕緣層於閘極上；形成圖案化半導體層於閘極絕緣層上；形成源極於圖案化半導體層上；氧化源極之外圍部份以形成氧化層，其中氧化層覆蓋源極及部分之圖案化半導體層；形成保護層與氫離子，其中保護層覆蓋氧化層與圖案化半導體層；以及以氫離子摻雜未被氧化層覆蓋之圖案化半導體層，以形成汲極。本發明亦提供一種薄膜電晶體。

Description

薄膜電晶體及其製造方法
本發明是有關於一種薄膜電晶體及其製造方法，特別是有關於一種短通道薄膜電晶體及其製造方法。
近年來，由於半導體製造技術的進步，薄膜電晶體(Thin-film transistor,TFT)的製程亦趨於快速及簡單，使得TFT被廣泛應用於電腦晶片、手機晶片、TFT液晶顯示器(Liquid crystal display,LCD)等。若將TFT使用於如LCD時，TFT可作為開關，藉由開關的on/off控制LCD之畫素顯示影像，故TFT之on/off之間的切換須快速。切換的快速與否係與TFT之on電流(Ion)有關，Ion的提升可提升TFT的效率及性能。而Ion又和通道寬度(W)與長度(L)之比值有關，若TFT寬度與長度之比值(W/L)越大，則Ion越大。因此，縮短TFT之通道長度有助於提升TFT的效率及性能。
然而，受限於曝光機設備的極限，目前的最小線寬與線距約為3μm，故TFT之通道長度無法進一歩縮短，而使Ion再提升的裕度有限，進而無法有效地提升TFT的效 率及性能。有鑑於此，如何提升TFT的效率及性能成為一重要課題。
本發明的目的在於提供一種薄膜電晶體(TFT)及其製造方法，其可縮短TFT通道長度，並有效提升TFT的效率及性能。
本發明之一態樣提供一種製造薄膜電晶體的方法，包含下列步驟：形成閘極於基板上；形成閘極絕緣層於閘極上；形成圖案化半導體層於閘極絕緣層上；形成源極於圖案化半導體層上；氧化源極之外圍部份以形成氧化層，其中氧化層覆蓋源極及部分之圖案化半導體層；形成保護層與氫離子，其中保護層覆蓋氧化層與圖案化半導體層；以及以氫離子摻雜未被氧化層覆蓋之圖案化半導體層，以形成汲極。
根據本發明之一實施方式，形成圖案化半導體層之步驟更包含：形成半導體材料於閘極絕緣層上；以半調式光罩形成光阻於半導體材料上；以及以光阻為遮罩對半導體材料進行蝕刻，以形成圖案化半導體層。
根據本發明之一實施方式，其中該源極之材料包含容易氧化之金屬，例如：鋁、鉬、鈦。
根據本發明之一實施方式，其中該氧化源極之外圍部份包含以二氧化氮電漿或氧氣電漿進行氧化。
根據本發明之一實施方式，其中該保護層與氫離子 係以甲矽烷(SiH4)與氨(NH3)形成。
根據本發明之一實施方式，其中該氧化層之厚度小於3μm。
本發明之另一態樣係提供一種薄膜電晶體，包含：基板；閘極，位於基板上；閘極絕緣層，位於閘極上；結構層，位於閘極絕緣層上，結構層包含半導體層以及汲極，且汲極與半導體層相鄰連接；源極，位於部分之半導體層上；氧化層，覆蓋源極與未被源極覆蓋之半導體層；以及保護層，位於汲極與氧化層上，其中，該氧化層之厚度小於3μm。
根據本發明之一實施方式，其中該半導體層之材料包含氧化銦鎵鋅(IGZO)。
根據本發明之一實施方式，其中該氧化層之材料包含金屬氧化物。
根據本發明之一實施方式，其中該保護層之材料包含氮化矽(SiNx)。
本發明的優勢在於，藉由氧化源極之外圍部份以形成氧化層，並利用形成保護層時產生的氫離子摻雜部份之圖案化半導體層，使其形成汲極，故可縮短TFT通道長度，進而使TFT的效率及性能提升。
100、200‧‧‧薄膜電晶體
110、210‧‧‧基板
120、220‧‧‧閘極
130、230‧‧‧閘極絕緣層
140、240b‧‧‧半導體層
150‧‧‧源/汲極
160、300‧‧‧通道
240‧‧‧半導體材料
240a‧‧‧圖案化半導體層
250‧‧‧第一光阻
250a‧‧‧第二光阻
252‧‧‧第三光阻
260‧‧‧源極材料
260a、260b‧‧‧源極
270‧‧‧氧化層
280‧‧‧保護層
290‧‧‧汲極
292‧‧‧結構層
A‧‧‧局部放大圖
為使本發明之特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：
第1A~1C圖係顯示習知之薄膜電晶體於不同製造階段的剖面示意圖。
第2A~2K圖係顯示本發明一實施方式之薄膜電晶體於不同製造階段的剖面示意圖。
第3圖係顯示第2K圖之局部放大圖。
請參照第1A~1C圖，其顯示習知之於不同製造階段之薄膜電晶體100的剖面示意圖。第1A圖顯示閘極120形成於基板110上。接著，如第1B圖所示，閘極絕緣層130形成於閘極120上，且半導體層140形成於閘極絕緣層130上。第1C圖顯示源/汲極150形成於半導體層140之兩側，其中兩個源/汲極150之間的區域即為薄膜電晶體100之通道160。習知之製造薄膜電晶體(TFT)的方法受限於曝光機設備的極限，故目前最小的通道長度約為3μm，而無法進一歩縮短。因此，TFT之on電流提升的裕度有限，進而無法有效提升TFT的效率。
因此，本發明之一態樣提供一種製造薄膜電晶體的方法。請參照第2A~2K圖，其顯示本發明一實施方式之於不同製造階段之薄膜電晶體200的剖面示意圖。第2A圖顯示閘極220形成於基板210上。接著，如第2B圖所示，閘極絕緣層230形成於閘極220上。
請參照第2C~2E圖，其顯示本發明一實施方式之形成圖案化半導體層240a的方法。第2C圖顯示半導體層 材料240形成於閘極絕緣層230上，並以半調式光罩(未繪示)形成第一光阻250於半導體材料240上。接著，如第2D圖所示，以第一光阻250為遮罩對半導體材料240進行蝕刻，將未被第一光阻250覆蓋之半導體材料240除去，以形成圖案化半導體層240a。第2E圖顯示將第一光阻250部分移除並留下第二光阻250a。移除第一光阻250的方法可為灰化(Ashing)。灰化為將光阻材料中大部分之碳氫元素轉變為二氧化碳、水和灰的過程，其可去除不要的光阻。
半調式光罩(Half-tone mask)是透過在光罩底材鍍上一層「半透過」的膜，藉以控制光線通過的比率，而達到半曝光的效果。經曝光後，可呈現出曝光部分、半曝光部分及未曝光部分之三種曝光層次，故在顯影後能夠形成兩種厚度的光阻。本發明採用半調式光罩進行蝕刻的目的在於露出後續欲形成源極的位置。
請參照第2F~2I圖，其顯示本發明一實施方式之形成源極260a的方法。首先，如第2F圖所示，源極材料260形成於閘極絕緣層230、圖案化半導體層240a及第二光阻250a上。接著，如第2G圖所示，第三光阻252形成於欲形成源極的位置上。第2H圖顯示以第三光阻252對源極材料260進行蝕刻以形成源極260a。之後，如第2I圖所示，同時將第二光阻250a及第三光阻252移除以露出源極260a。
請參照第2J圖，其顯示本發明一實施方式之形成氧化層270的方法。如圖所示，源極260a之外圍部份被氧 化以形成氧化層270，其中氧化層270覆蓋未被氧化之源極260b及部分之圖案化半導體層240a。
源極之材料為容易氧化之金屬，例如：鋁、鉬、鈦。氧化源極之外圍部份的方法可以用二氧化氮電漿或氧氣電漿進行氧化。
請參照第2K圖，其顯示本發明一實施方式之形成保護層280與汲極290的方法。形成保護層280與氫離子(未繪示)，其中保護層280覆蓋氧化層270與圖案化半導體層240a。在一實施例中，保護層280係以甲矽烷(SiH4)與氨(NH3)形成，故會形成材料為氮化矽之保護層(SiNx保護層)，並產生氫離子。以氫離子摻雜未被氧化層270覆蓋之圖案化半導體層240a，以形成汲極290。而未被氫離子摻雜之圖案化半導體層240a會形成半導體層240b。值得注意的是，汲極290係由圖案化半導體層240a經氫離子摻雜而得，故其與半導體層240b(未經氫離子摻雜之圖案化半導體層240a)同位於閘極絕緣層230上，並相鄰連接。
圖案化半導體層之材料可為金屬氧化半導體，例如：氧化銦鎵鋅(IGZO)。當材料為IGZO時，部分之IGZO經氫離子摻雜後會帶正電而形成汲極，而未被氫離子摻雜之IGZO會形成半導體層。
值得注意的是，本發明之方法形成氧化層之一目的在於保護部份之圖案化半導體層(即被氧化層覆蓋之圖案化半導體層)，避免該部份之圖案化半導體層於後續形成保護層之步驟被氫離子摻雜而形成汲極。因此，本發明之氧 化層可將源極與汲極隔開，而源極與汲極之間的區域即為TFT之通道，故氧化層之厚度即為TFT之通道長度。若氧化的方法為以電漿進行氧化時，TFT之通道長度可由電漿之射頻功率(RF power)與電漿處理時間控制。
此外，源極與汲極可互相代換為本發明技術領域之習知知識，故本發明之源極260b(或260a)亦可作為汲極，而汲極290亦可作為源極。
本發明之另一態樣提供一種薄膜電晶體。請參照第2K圖，其顯示本發明一實施例之薄膜電晶體200的剖面示意圖。薄膜電晶體200包含基板210；閘極220，位於基板210上；閘極絕緣層230，位於閘極220上；結構層292，位於閘極絕緣層230上，包含半導體層240b以及汲極290，且汲極290與半導體層240b相鄰連接；源極260b，位於部分之半導體層240b上；氧化層270，覆蓋源極260b與未被源極260b覆蓋之半導體層240b；以及保護層280，位於汲極290與氧化層270上，其中氧化層270之厚度小於3μm。請參照第3圖，其顯示第2K圖之局部放大圖A。由第3圖可清楚得知半導體層240b、源極260b、氧化層270及汲極290等之相關位置，其中源極260b與汲極290之間的區域即為薄膜電晶體200之通道300。因此，氧化層270之厚度即為通道300的長度。
氧化層的材料為使用之源極材料的氧化物，在一實施例中，氧化層的材料包含金屬氧化物，例如：氧化鋁、氧化鉬、氧化鈦。
本發明之TFT及其製造方法利用金屬氧化之特性，可藉由氧化源極之外圍部份以形成氧化層，並利用形成保護層時產生的氫離子摻雜部份之圖案化半導體層，使其形成汲極。由於氧化層可保護部份之圖案化半導體層不被氫離子摻雜，故可將源極與汲極隔開。藉此方式可突破TFT通道長度受限於曝光機能力的困境，以現有的設備及製程，即可縮短TFT之通道長度，以製造出具有通道長度小於3μm之短通道TFT，進而使on電流大幅提升，並有效地提升TFT的效率及性能。
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
200‧‧‧薄膜電晶體
210‧‧‧基板
220‧‧‧閘極
230‧‧‧閘極絕緣層
240b‧‧‧半導體層
260b‧‧‧源極
270‧‧‧氧化層
280‧‧‧保護層
290‧‧‧汲極
292‧‧‧結構層
A‧‧‧局部放大圖

Claims (10)

  1. 一種製造薄膜電晶體的方法，包含下列步驟：形成一閘極於一基板上；形成一閘極絕緣層於該閘極上；形成一圖案化半導體層於該閘極絕緣層上；形成一源極於該圖案化半導體層上；氧化該源極之外圍部份以形成一氧化層，其中該氧化層覆蓋該源極及部分之該圖案化半導體層；形成一保護層與氫離子，其中該保護層覆蓋該氧化層與該圖案化半導體層；以及以該氫離子摻雜未被該氧化層覆蓋之該圖案化半導體層，以形成一汲極。
  2. 如請求項1所述之方法，其中形成該圖案化半導體層之步驟包含：形成一半導體材料於該閘極絕緣層上；以一半調式光罩形成一光阻於該半導體材料上；以及以該光阻為遮罩對該半導體材料進行蝕刻，以形成該圖案化半導體層。
  3. 如請求項1所述之方法，其中該源極之材料包含容易氧化之金屬。
  4. 如請求項1所述之方法，其中氧化該源極之外圍 部份包含以二氧化氮電漿或氧氣電漿進行氧化。
  5. 如請求項1所述之方法，其中該保護層與該氫離子係以甲矽烷(SiH4)與氨(NH3)形成。
  6. 如請求項1所述之方法，其中該氧化層之厚度小於3μm。
  7. 一種薄膜電晶體，包含：一基板；一閘極，位於該基板上；一閘極絕緣層，位於該閘極上；一結構層，位於該閘極絕緣層上，包含：一半導體層；以及一汲極，與該半導體層相鄰連接；一源極，位於部分之該半導體層上；一氧化層，覆蓋該源極與未被該源極覆蓋之該半導體層；以及一保護層，位於該汲極與該氧化層上，其中，該氧化層之厚度小於3μm。
  8. 如請求項7所述之薄膜電晶體，其中該半導體層之材料包含氧化銦鎵鋅(IGZO)。
  9. 如請求項7所述之薄膜電晶體，其中該氧化層之材料包含金屬氧化物。
  10. 如請求項7所述之薄膜電晶體，其中該保護層之材料包含氮化矽(SiNx)。
TW103121414A 2014-06-20 2014-06-20 薄膜電晶體及其製造方法 TW201601220A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW103121414A TW201601220A (zh) 2014-06-20 2014-06-20 薄膜電晶體及其製造方法
US14/472,401 US9269827B2 (en) 2014-06-20 2014-08-29 Oxidizing the source and doping the drain of a thin-film transistor
US14/994,157 US9923099B2 (en) 2014-06-20 2016-01-13 TFT with oxide layer on IGZO semiconductor active layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW103121414A TW201601220A (zh) 2014-06-20 2014-06-20 薄膜電晶體及其製造方法

Publications (1)

Publication Number Publication Date
TW201601220A true TW201601220A (zh) 2016-01-01

Family

ID=54870436

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103121414A TW201601220A (zh) 2014-06-20 2014-06-20 薄膜電晶體及其製造方法

Country Status (2)

Country Link
US (2) US9269827B2 (zh)
TW (1) TW201601220A (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105206570B (zh) * 2015-10-27 2018-11-23 深圳市华星光电技术有限公司 一种显示面板及其制造方法
WO2022133640A1 (zh) * 2020-12-21 2022-06-30 京东方科技集团股份有限公司 显示基板及其制作方法、显示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0663697A4 (en) 1993-07-26 1997-11-26 Seiko Epson Corp THIN FILM SEMICONDUCTOR DEVICE, ITS MANUFACTURE AND ITS DISPLAY SYSTEM.
US20040086807A1 (en) * 2002-11-06 2004-05-06 Chih-Yu Peng Method of fabricating thin film transistor
US6995053B2 (en) 2004-04-23 2006-02-07 Sharp Laboratories Of America, Inc. Vertical thin film transistor
KR100603349B1 (ko) * 2004-06-17 2006-07-20 삼성에스디아이 주식회사 박막 트랜지스터, 이를 제조한 방법 및 이를 구비하는평판 디스플레이 장치
US20080012014A1 (en) * 2006-07-14 2008-01-17 Jin-Seong Park Thin film transistor, method of preparing the same, and flat panel display device including the thin film transistor
TWI487104B (zh) * 2008-11-07 2015-06-01 Semiconductor Energy Lab 半導體裝置和其製造方法
US8344387B2 (en) * 2008-11-28 2013-01-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US8247276B2 (en) * 2009-02-20 2012-08-21 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor, method for manufacturing the same, and semiconductor device
TWI476931B (zh) 2010-10-21 2015-03-11 Au Optronics Corp 薄膜電晶體與具有此薄膜電晶體的畫素結構
GB2487917B (en) * 2011-02-08 2015-03-18 Seren Photonics Ltd Semiconductor devices and fabrication methods
JP4982619B1 (ja) * 2011-07-29 2012-07-25 富士フイルム株式会社 半導体素子の製造方法及び電界効果型トランジスタの製造方法

Also Published As

Publication number Publication date
US20160126358A1 (en) 2016-05-05
US9269827B2 (en) 2016-02-23
US9923099B2 (en) 2018-03-20
US20150372150A1 (en) 2015-12-24

Similar Documents

Publication Publication Date Title
US9355838B2 (en) Oxide TFT and manufacturing method thereof
US9520422B2 (en) Oxide thin film transistor and manufacturing method thereof, array substrate and display device
US20190027511A1 (en) Array substrate, fabricating method therefor and display device
CN107658345B (zh) 氧化物薄膜晶体管及其制备方法、阵列基板和显示装置
US10910498B2 (en) Array substrate, method for fabricating the same and display device
WO2017117974A1 (zh) 一种阵列基板的制作方法、阵列基板和显示面板
WO2017008347A1 (zh) 阵列基板、阵列基板的制造方法及显示装置
US9653578B2 (en) Thin film transistor, its manufacturing method and display device
WO2018219084A1 (zh) 薄膜晶体管及其制作方法、阵列基板
WO2017016152A1 (zh) 阵列基板及其制造方法、显示装置
WO2016029551A1 (zh) 制作薄膜晶体管的方法及薄膜晶体管
KR20130062726A (ko) 박막 트랜지스터 및 이의 제조 방법
US20210091124A1 (en) Manufacturing method for cmos ltps tft substrate
TW201601220A (zh) 薄膜電晶體及其製造方法
WO2018058522A1 (zh) 薄膜晶体管制造方法及阵列基板
WO2017124818A1 (zh) 薄膜晶体管及其制作方法、阵列基板和显示装置
US20170012065A1 (en) Array substrate, a method for manufacturing the same, and display device
TW201351659A (zh) 薄膜電晶體及其製造方法
JP2012004425A (ja) 薄膜トランジスタ基板の製造方法
TW201624714A (zh) 薄膜電晶體及其製作方法
EP3267473B1 (en) Pixel structure manufacturing method
US10204942B1 (en) Method for manufacturing top-gated thin film transistors
US20180108688A1 (en) Thin film transistor, method for fabricating the same, and display device
WO2020093475A1 (zh) 显示面板的制造方法
CN104134613B (zh) 一种薄膜晶体管及其制造方法