TW201540143A - Surface-treated copper foil, copper foil with carrier, printed wiring board, copper-clad laminate, laminate and method for producing printed wiring board - Google Patents

Surface-treated copper foil, copper foil with carrier, printed wiring board, copper-clad laminate, laminate and method for producing printed wiring board Download PDF

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TW201540143A
TW201540143A TW104101642A TW104101642A TW201540143A TW 201540143 A TW201540143 A TW 201540143A TW 104101642 A TW104101642 A TW 104101642A TW 104101642 A TW104101642 A TW 104101642A TW 201540143 A TW201540143 A TW 201540143A
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layer
copper foil
carrier
copper
treated
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TW104101642A
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TWI627882B (en
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Nobuaki Miyamoto
Shinichi Sasaki
Masafumi Ishii
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Jx Nippon Mining & Metals Corp
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • C25D1/04Wires; Strips; Foils
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/10Etching compositions
    • C23F1/14Aqueous compositions
    • C23F1/16Acidic compositions
    • C23F1/18Acidic compositions for etching copper or alloys thereof
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • C25D7/0614Strips or foils
    • C25D7/0635In radial cells
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H05K3/383Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/04Electroplating: Baths therefor from solutions of chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/12Electroplating: Baths therefor from solutions of nickel or cobalt
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C25D5/14Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium two or more layers being of nickel or chromium, e.g. duplex or triplex layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

Provided is a surface-treated copper foil having excellent fine wiring formability. This surface-treated copper foil is obtained by forming a surface treatment layer on a copper foil. In cases where this surface-treated copper foil is spray etched from a surface that is on the reverse side of the surface on which the surface treatment layer is formed using a hydrogen peroxide/sulfuric acid-based copper dissolving etchant, if the etching rate in the thickness direction of the copper foil is taken as 1, the etching rate in the thickness direction of the surface treatment layer is 0.5 or more.

Description

表面處理銅箔、附載體銅箔、印刷配線板、覆銅積層板、積層體及印刷配線板之製造方法 Surface-treated copper foil, copper foil with carrier, printed wiring board, copper-clad laminate, laminated body, and printed wiring board manufacturing method

本發明係關於一種表面處理銅箔、附載體銅箔、印刷配線板、覆銅積層板、積層體及印刷配線板之製造方法。 The present invention relates to a method for producing a surface-treated copper foil, a copper foil with a carrier, a printed wiring board, a copper-clad laminate, a laminate, and a printed wiring board.

半導體封裝基板及印刷配線基板之電路形成法,係以減成法(subtractive process)為主流。然而,近年來,隨著半導體之高積集化,使用於半導體之半導體封裝基板、印刷配線基板之電路微細化亦不斷發展,以減成法形成微細電路越趨困難。 The circuit formation method of the semiconductor package substrate and the printed wiring board is mainly based on a subtractive process. However, in recent years, with the high integration of semiconductors, the miniaturization of circuits for semiconductor package substrates and printed wiring boards for semiconductors has been progressing, and it has become increasingly difficult to form fine circuits by subtractive methods.

作為因應進一步之微細配線化,已知有MSAP(改良半加成法(modified semi-additive process)(例如,專利文獻1)。 As a further fine wiring, MSAP (modified semi-additive process) is known (for example, Patent Document 1).

專利文獻1:日本專利第4683769號公報 Patent Document 1: Japanese Patent No. 4683769

MSAP法如上述適用於形成微細配線。具體而言,如圖1A所示,在樹脂層(絕緣材)上形成極薄銅箔作為供電層,接著於極薄銅箔上實施圖案銅鍍敷。接著,如圖1B所示,藉由快速蝕刻(flash etching)將極薄銅箔去除,藉此形成想要之配線。另,於圖1中,將配線寬度表示成L(Line),配線間隔表示成S(Space)。 The MSAP method is as described above for forming fine wiring. Specifically, as shown in FIG. 1A, an ultra-thin copper foil is formed on the resin layer (insulating material) as a power supply layer, and then pattern copper plating is performed on the ultra-thin copper foil. Next, as shown in FIG. 1B, the ultra-thin copper foil is removed by flash etching, thereby forming a desired wiring. In addition, in FIG. 1, the wiring width is shown as L (Line), and the wiring interval is shown as S (Space).

然而,通常於極薄銅箔為了確保與樹脂層之密合性,而於樹 脂層側表面形成有粗化處理層等之表面處理層。當為了形成配線而對此表面處理銅箔即極薄銅箔進行快速蝕刻時,若花費時間去除表面處理層,則極薄銅箔之銅箔部分(配線部)的寬度亦會相應地因蝕刻而被過度去除,而發生變成較所欲寬度細之配線的問題。 However, it is usually used in extremely thin copper foils to ensure adhesion to the resin layer. A surface treatment layer such as a roughened layer is formed on the side surface of the lipid layer. When the surface-treated copper foil, that is, the ultra-thin copper foil, is quickly etched in order to form wiring, if it takes time to remove the surface treatment layer, the width of the copper foil portion (wiring portion) of the ultra-thin copper foil is correspondingly etched. However, it is excessively removed, and a problem occurs in which wiring becomes thinner than desired.

因此,本發明之課題在於提供一種微細配線形成性優異之表面處理銅箔、附載體銅箔、印刷配線板,覆銅積層板、積層體及印刷配線板之製造方法。 Therefore, an object of the present invention is to provide a surface-treated copper foil, a carrier-attached copper foil, a printed wiring board, a copper-clad laminate, a laminate, and a printed wiring board which are excellent in fine wiring formation properties.

為了達成上述目的,本發明人等經反覆潛心研究後,發現:藉由控制成使表面處理銅箔之表面處理層的蝕刻速率相對於該表面處理銅箔之銅箔的蝕刻速率在既定之值以上,可提供微細配線形成性優異之表面處理銅箔。 In order to achieve the above object, the inventors of the present invention have found that the etching rate of the surface-treated layer of the surface-treated copper foil is controlled to a predetermined value with respect to the etching rate of the copper foil of the surface-treated copper foil. As described above, it is possible to provide a surface-treated copper foil excellent in fine wiring formation property.

本發明係以上述見解為基礎而完成者,於一態樣中,係一種表面處理銅箔,於銅箔上形成有表面處理層,當從與形成有該表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻(spray etching)時,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在0.5以上。 The present invention is based on the above findings, and in one aspect, is a surface-treated copper foil having a surface-treated layer formed on the opposite side of the surface on which the surface-treated layer is formed. When the surface is spray-etched with a hydrogen peroxide/sulfuric acid copper-dissolving etching solution, when the etching rate in the thickness direction of the copper foil is 1, the etching rate in the thickness direction of the surface-treated layer is 0.5 or more.

本發明之表面處理銅箔於一實施形態中,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在0.75以上。 In the embodiment, the surface-treated copper foil of the present invention has an etching rate in the thickness direction of the surface-treated layer of 0.75 or more when the etching rate in the thickness direction of the copper foil is 1.

本發明之表面處理銅箔於另一實施形態中,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在1.0以上。 In another embodiment, the surface-treated copper foil of the present invention has an etching rate in the thickness direction of the surface-treated layer of 1.0 or more when the etching rate in the thickness direction of the copper foil is 1.

本發明於另一態樣中,係一種表面處理銅箔,於銅箔上形成有表面處理層,當從與形成有該表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻時,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.7以下。 In another aspect, the present invention provides a surface-treated copper foil having a surface-treated layer formed on a copper foil, and a hydrogen peroxide/sulfuric acid-based layer on a surface opposite to a surface on which the surface-treated layer is formed. When the copper-dissolved etching liquid is subjected to spray etching, the ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm in thickness of the copper foil is 0.7 or less.

本發明之表面處理銅箔於另一實施形態中,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.4以下。 In another embodiment of the surface-treated copper foil of the present invention, the ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm of the thickness of the copper foil is 0.4 or less.

本發明之表面處理銅箔於另一實施形態中,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.2以下。 In another embodiment of the surface-treated copper foil of the present invention, the ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm of the thickness of the copper foil is 0.2 or less.

本發明之表面處理銅箔於再另一實施形態中,該過氧化氫/硫酸系之銅溶解蝕刻液具有18g/L之H2O2、92g/L之H2SO4及8g/L之Cu的液體組成。 In still another embodiment of the present invention, the hydrogen peroxide/sulfuric acid copper-dissolving etching solution has 18 g/L of H 2 O 2 , 92 g/L of H 2 SO 4 and 8 g/L. The liquid composition of Cu.

本發明之表面處理銅箔於再另一實施形態中,該銅箔係由電解銅箔或壓延銅箔形成。 In still another embodiment of the surface-treated copper foil of the present invention, the copper foil is formed of an electrolytic copper foil or a rolled copper foil.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有粗化處理層。 In still another embodiment of the surface treated copper foil of the present invention, the surface treated layer has a roughened layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有粗化處理層與設置於該粗化處理層表面之選自由耐熱層、防鏽層、鉻酸處理(chromate treatment)層及矽烷偶合處理層組成之群中之1種以上的層。 In still another embodiment, the surface-treated layer has a roughened layer and a surface selected from the surface of the roughened layer selected from a heat-resistant layer, a rust-proof layer, and a chroma treatment. One or more layers of the group consisting of a layer and a decane coupling treatment layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層 具有該防鏽層及該耐熱層中至少一者,該防鏽層及該耐熱層中至少一者含有選自鎳、鈷、銅、鋅中之1種以上的元素。 In another embodiment of the surface treated copper foil of the present invention, the surface treatment layer At least one of the rustproof layer and the heat-resistant layer contains at least one element selected from the group consisting of nickel, cobalt, copper, and zinc.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有該粗化處理層及該耐熱層,於該粗化處理層上具有該耐熱層。 In still another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer has the roughened layer and the heat-resistant layer, and the heat-resistant layer is provided on the roughened layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有該粗化處理層或該耐熱層,與該防鏽層,於該粗化處理層或該耐熱層上具有該防鏽層。 In still another embodiment, the surface-treated copper layer has the roughened layer or the heat-resistant layer, and the rust-proof layer has the prevention on the roughened layer or the heat-resistant layer Rust layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有該防鏽層與該鉻酸處理層,於該防鏽層上具有該鉻酸處理層。 In still another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer has the rust-preventing layer and the chromic acid-treated layer, and the chromic acid-treated layer is provided on the rust-preventing layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層具有該鉻酸處理層與該矽烷偶合處理層,於該鉻酸處理層上具有該矽烷偶合處理層。 In still another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer has the chromic acid-treated layer and the decane coupling treatment layer, and the decane coupling treatment layer is provided on the chromic acid-treated layer.

本發明之表面處理銅箔於再另一實施形態中,該表面處理層為選自由耐熱層、防鏽層、鉻酸處理層及矽烷偶合處理層組成之群中之1種以上的層。 In still another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer is one or more layers selected from the group consisting of a heat-resistant layer, a rust-preventive layer, a chromic acid-treated layer, and a decane coupling treatment layer.

本發明之表面處理銅箔於再另一實施形態中,於該表面處理層上具備樹脂層。 In still another embodiment of the surface-treated copper foil of the present invention, a resin layer is provided on the surface-treated layer.

本發明之表面處理銅箔於再另一實施形態中,該樹脂層含有介電體。 In still another embodiment of the surface-treated copper foil of the present invention, the resin layer contains a dielectric.

本發明於另一態樣中,係一種附載體銅箔,於載體之一面或兩面依序積層有中間層、極薄銅層所構成,該極薄銅層為本發明之表面處理銅箔。 In another aspect of the invention, a copper foil with a carrier is formed by sequentially laminating an intermediate layer or an ultra-thin copper layer on one or both sides of the carrier, and the ultra-thin copper layer is the surface-treated copper foil of the present invention.

本發明之附載體銅箔於一實施形態中,於該載體之一面依序具有該中間層、該極薄銅層,而於該載體之另一面具有粗化處理層。 In one embodiment, the copper foil with a carrier of the present invention has the intermediate layer and the ultra-thin copper layer on one side of the carrier, and has a roughened layer on the other side of the carrier.

本發明於再另一態樣中,係一種使用本發明之表面處理銅箔製造之印刷配線板。 In still another aspect, the present invention is a printed wiring board manufactured using the surface-treated copper foil of the present invention.

本發明於再另一態樣中,係一種使用本發明之附載體銅箔製造之印刷配線板。 In still another aspect, the present invention is a printed wiring board manufactured using the copper foil with a carrier of the present invention.

本發明於再另一態樣中,係一種使用本發明之表面處理銅箔製造之覆銅積層板。 In still another aspect, the present invention is a copper clad laminate produced using the surface treated copper foil of the present invention.

本發明於再另一態樣中,係一種使用本發明之附載體銅箔製造之覆銅積層板。 In still another aspect, the present invention is a copper clad laminate produced using the copper foil with a carrier of the present invention.

本發明於再另一態樣中,係一種積層體,含有本發明之附載體銅箔與樹脂,該附載體銅箔之端面的一部份或全部被該樹脂覆蓋。 In still another aspect of the invention, there is provided a laminate comprising the copper foil with a carrier of the invention and a resin, a part or all of the end face of the copper foil with the carrier being covered by the resin.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包含下述步驟:準備本發明之表面處理銅箔與絕緣基板的步驟;將該表面處理銅箔自表面處理層側積層在絕緣基板,形成覆銅積層板,然後藉由減成法、部分加成法(partly additive process)或改良半加成法中之任一方法形成電路的步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board, comprising the steps of: preparing a surface-treated copper foil of the present invention and an insulating substrate; and laminating the surface-treated copper foil from the surface treatment layer side In the insulating substrate, a copper clad laminate is formed, and then the circuit is formed by any one of a subtractive method, a partial additive process, or a modified semi-additive method.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔自極薄銅層側積層在絕緣基板的步驟; 將該附載體銅箔與絕緣基板積層後,經過將該附載體銅箔之載體剝除的步驟而形成覆銅積層板,然後藉由部分加成法或改良半加成法中之任一方法形成電路的步驟。 In still another aspect of the present invention, a method of manufacturing a printed wiring board, comprising the steps of: preparing a copper foil with an insulating substrate of the present invention and an insulating substrate; and the copper foil with the carrier is from the side of the ultra-thin copper layer a step of laminating on an insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the copper-clad laminate is formed by the step of stripping the carrier with the carrier copper foil, and then either the partial addition method or the modified semi-addition method The step of forming a circuit.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包含下述步驟:將電路形成在本發明之附載體銅箔的該極薄銅層側表面或該載體側表面的步驟;以覆蓋該電路之方式將樹脂層形成在該附載體銅箔的該極薄銅層側表面或該載體側表面的步驟;將電路形成在該樹脂層上的步驟;將電路形成在該樹脂層上後,將該載體或該極薄銅層剝離的步驟;及將該載體或該極薄銅層剝離後,去除該極薄銅層或該載體,藉此使形成在該極薄銅層側表面或該載體側表面被該樹脂層覆蓋之電路露出的步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board, comprising the steps of: forming a circuit on a side surface of the ultra-thin copper layer or a side surface of the carrier of the copper foil with carrier of the present invention; a step of forming a resin layer on the extremely thin copper layer side surface of the carrier copper foil or the carrier side surface in such a manner as to cover the circuit; forming a circuit on the resin layer; forming a circuit on the resin After the layer is peeled off, the carrier or the ultra-thin copper layer is peeled off; and after the carrier or the ultra-thin copper layer is peeled off, the ultra-thin copper layer or the carrier is removed, thereby forming the ultra-thin copper layer The step of exposing the side surface or the side surface of the carrier to the circuit covered by the resin layer.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包含下述步驟:積層本發明之附載體銅箔的該極薄銅層側表面及該載體側表面與樹脂基板的步驟;於該附載體銅箔之與樹脂基板積層之側的相反側之極薄銅層側表面及該載體側表面,設置至少1次樹脂層與電路之2層的步驟;及形成該樹脂層及電路之2層後,自該附載體銅箔剝離該載體或該極薄銅層的步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board, comprising the steps of: laminating the side surface of the ultra-thin copper layer of the copper foil with a carrier of the present invention and the side surface of the carrier and the resin substrate a step of providing at least one resin layer and two layers of the circuit on the side surface of the ultra-thin copper layer on the side opposite to the side on which the resin substrate is laminated with the carrier copper foil and the side surface of the carrier; and forming the resin layer and After the second layer of the circuit, the carrier or the ultra-thin copper layer is stripped from the carrier copper foil.

根據本發明,可提供一種微細配線形成性優異之表面處理銅箔。 According to the present invention, it is possible to provide a surface-treated copper foil excellent in fine wiring formation property.

圖1:(A)及(B)顯示MSAP法之概略圖。 Figure 1: (A) and (B) show an overview of the MSAP method.

圖2:A~C係使用本發明之附載體銅箔的印刷配線板製造方法的具體例至電路鍍敷、去除阻劑之步驟的配線板剖面示意圖。 Fig. 2 is a cross-sectional view showing a wiring board of a specific example of a method of manufacturing a printed wiring board using the copper foil with a carrier of the present invention to a step of circuit plating and removing a resist.

圖3:D~F係使用本發明之附載體銅箔的印刷配線板製造方法的具體例自積層樹脂及第2層附載體銅箔至雷射開孔之步驟的配線板剖面示意圖。 Fig. 3 is a cross-sectional view showing the wiring board of the step of manufacturing the printed wiring board using the copper foil with a carrier of the present invention, from the step of laminating the resin and the second layer of the carrier-attached copper foil to the laser opening.

圖4:G~I係使用本發明之附載體銅箔的印刷配線板製造方法的具體例自形成填孔(via fill)至剝離第1層載體之步驟的配線板剖面示意圖。 Fig. 4 is a cross-sectional view showing a specific example of a method for producing a printed wiring board using the copper foil with a carrier of the present invention, from a form of a via fill to a step of peeling off the first layer carrier.

圖5:J~K係使用本發明之附載體銅箔的印刷配線板製造方法的具體例自快速蝕刻至形成凸塊、銅柱(pillar)之步驟的配線板剖面示意圖。 Fig. 5 is a cross-sectional view showing a wiring board of a step of forming a printed wiring board using the copper foil with a carrier of the present invention from a rapid etching to a step of forming a bump or a pillar.

圖6:係顯示實施例1~3及比較例1之蝕刻處理時間與蝕刻量的關係之圖。 Fig. 6 is a graph showing the relationship between the etching treatment time and the etching amount in Examples 1 to 3 and Comparative Example 1.

圖7:係實施例1~3及比較例1之配線的快速蝕刻後,配線間的殘渣外觀(L/S=15μm/15μm間距部)之觀察照片。 Fig. 7 is a photograph of the appearance of the residue (L/S = 15 μm / 15 μm pitch) between the wirings after the rapid etching of the wirings of Examples 1 to 3 and Comparative Example 1.

圖8:係銅層及表面處理層之剖面觀察照片之例。 Fig. 8 is an example of a cross-sectional observation photograph of a copper layer and a surface treatment layer.

〔表面處理銅箔〕 [surface-treated copper foil]

本發明之表面處理銅箔所使用之銅箔,可為電解銅箔或壓延銅箔任一者。於本發明中使用之銅箔的厚度並無特別限定之必要,例如在1μm以 上、2μm以上、3μm以上、5μm以上,例如在3000μm以下、1500μm以下、800μm以下、300μm以下、150μm以下、100μm以下、70μm以下、50μm以下、40μm以下。 The copper foil used for the surface-treated copper foil of the present invention may be either an electrolytic copper foil or a rolled copper foil. The thickness of the copper foil used in the present invention is not particularly limited, for example, at 1 μm. Up, 2 μm or more, 3 μm or more, and 5 μm or more, for example, 3000 μm or less, 1500 μm or less, 800 μm or less, 300 μm or less, 150 μm or less, 100 μm or less, 70 μm or less, 50 μm or less, and 40 μm or less.

於本發明所使用之壓延銅箔,亦包含含有Ag、Sn、In、Ti、Zn、Zr、Fe、P、Ni、Si、Te、Cr、Nb、V、B、Co等元素一種以上之銅合金箔。若上述元素之濃度變高(例如合計在10質量%以上),則會有導電率降低之情形。壓延銅箔之導電率較佳在50%IACS以上,更佳在60%IACS以上,再更佳在80%IACS以上。又,壓延銅箔亦包含使用精銅(JIS H3100 C1100)或無氧銅(JIS H3100 C1020)製造之銅箔。另,於本說明書中,單獨使用「銅箔」此用語時,亦包含銅合金箔。 The rolled copper foil used in the present invention also contains one or more kinds of copper containing elements such as Ag, Sn, In, Ti, Zn, Zr, Fe, P, Ni, Si, Te, Cr, Nb, V, B, and Co. Alloy foil. When the concentration of the above elements is high (for example, 10% by mass or more in total), the electrical conductivity may be lowered. The electrical conductivity of the rolled copper foil is preferably 50% IACS or more, more preferably 60% IACS or more, still more preferably 80% IACS or more. Further, the rolled copper foil also includes a copper foil manufactured using fine copper (JIS H3100 C1100) or oxygen-free copper (JIS H3100 C1020). In addition, in the present specification, when the term "copper foil" is used alone, a copper alloy foil is also included.

又,可使用於本發明之電解銅箔,可用下述製造條件來製作。另,只要未特別載明,於本說明書記載之電解、蝕刻、表面處理或鍍敷等所使用之處理液(蝕刻液、電解液)的剩餘部分為水。 Further, the electrodeposited copper foil used in the present invention can be produced under the following production conditions. In addition, unless otherwise specified, the remainder of the treatment liquid (etching liquid, electrolyte solution) used for electrolysis, etching, surface treatment, plating, etc. described in this specification is water.

‧一般電解原箔: ‧General electrolytic raw foil:

<電解液組成> <electrolyte composition>

銅:80~120g/L Copper: 80~120g/L

硫酸:80~120g/L Sulfuric acid: 80~120g/L

氯:30~100ppm Chlorine: 30~100ppm

調平劑(leveling agent)(膠):0.1~10ppm Leveling agent (glue): 0.1~10ppm

‧兩面平坦電解原箔,附載體極薄銅箔之載體銅箔: ‧ Two-sided flat electrolytic original foil, carrier copper foil with carrier ultra-thin copper foil:

<電解液組成> <electrolyte composition>

銅:80~120g/L Copper: 80~120g/L

硫酸:80~120g/L Sulfuric acid: 80~120g/L

氯:30~100ppm Chlorine: 30~100ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用下述化學式之胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之一群中者。) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~65℃ Electrolyte temperature: 50~65°C

電解液線速度:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

於本發明中,形成在銅箔上之表面處理層亦可為粗化處理層。粗化處理,通常係指對銅箔其與樹脂基板接合之面亦即表面處理側之表面,為了提升積層後銅箔之剝離強度,而在脫脂後之銅箔的表面形成瘤 狀之電沈積的處理。電解銅箔雖於製造時已具有凹凸,但藉由粗化處理可增強電解銅箔之凸部,更加增大凹凸。粗化處理,例如可藉由以銅或銅合金形成粗化粒子來進行。粗化處理亦可為微細者。粗化處理層亦可為由選自由銅、鎳、鈷、磷、鎢、砷、鉬、鉻及鋅組成之群中任一單質或含有此等單質任1種以上之合金構成之層等。又,亦可進行下述之粗化處理:於以銅或銅合金形成粗化粒子後,進一步以鎳、鈷、銅、鋅之單質或合金等設置二次粒子或三次粒子。以此方式,若表面處理層為粗化處理層,則可良好地抑制如上述之MSAP法等中藉由蝕刻極薄銅層所形成之銅電路自樹脂層脫離。 In the present invention, the surface treatment layer formed on the copper foil may also be a roughened treatment layer. The roughening treatment generally refers to the surface of the copper foil which is bonded to the resin substrate, that is, the surface of the surface treatment side, and the surface of the copper foil after degreasing is formed to enhance the peeling strength of the copper foil after lamination. Treatment of electrodeposition. Although the electrolytic copper foil has irregularities at the time of manufacture, the convex portion of the electrolytic copper foil can be reinforced by the roughening treatment, and the unevenness is further increased. The roughening treatment can be carried out, for example, by forming roughened particles with copper or a copper alloy. The roughening treatment can also be fine. The roughening treatment layer may be a layer composed of any one selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium, and zinc, or an alloy containing one or more of these simple substances. Further, the roughening treatment may be carried out by forming the secondary particles or the tertiary particles with a single substance or an alloy of nickel, cobalt, copper or zinc after forming the roughened particles with copper or a copper alloy. In this manner, when the surface treatment layer is a roughened layer, the copper circuit formed by etching the extremely thin copper layer in the MSAP method or the like described above can be favorably prevented from being detached from the resin layer.

可使用銅-鈷-鎳合金鍍敷、銅-鎳-磷合金鍍敷、銅-鎳-鎢合金鍍敷、銅-鈷-鎢合金鍍敷等合金鍍敷,更佳為銅合金鍍敷,來作為粗化處理。作為粗化處理之銅-鈷-鎳合金鍍敷,可以下述方式來實施:藉由電鍍,形成附著量為15~40mg/dm2之銅-100~3000μg/dm2之鈷-100~1500μg/dm2之鎳的3元系合金層。若Co附著量未達100μg/dm2,則有時耐熱性會惡化,蝕刻性會變差。若Co附著量超過3000μg/dm2,則於必須考慮磁性之影響的情形時,並不佳,會有產生蝕刻污漬且耐酸性及耐化學品性惡化之情況。若Ni附著量未達100μg/dm2,則有時耐熱性會變差。另一方面,若Ni附著量超過1500μg/dm2,則有時蝕刻殘留會變多。較佳之Co附著量為1000~2500μg/dm2,較佳之鎳附著量為500~1200μg/dm2。此處,所謂蝕刻污漬,係指於利用氯化銅進行蝕刻之情形時,Co未溶解而殘留,並且,所謂蝕刻殘留,係指於利用氯化銨進行鹼蝕刻之情形時,Ni未溶解而殘留。 Alloy plating such as copper-cobalt-nickel alloy plating, copper-nickel-phosphorus alloy plating, copper-nickel-tungsten alloy plating, copper-cobalt-tungsten alloy plating, or copper alloy plating may be used. Come as a roughing process. The copper-cobalt-nickel alloy plating as the roughening treatment can be carried out by forming a cobalt-100-3000 μg-cobalt-100-1500 μg of copper-100-3000 μg/dm 2 with an adhesion amount of 15 to 40 mg/dm 2 . /dm 2 nickel ternary alloy layer. When the Co adhesion amount is less than 100 μg/dm 2 , the heat resistance may be deteriorated, and the etching property may be deteriorated. When the Co adhesion amount exceeds 3000 μg/dm 2 , it is not preferable in the case where the influence of magnetic properties is necessary, and etching stains may occur, and acid resistance and chemical resistance may deteriorate. When the Ni adhesion amount is less than 100 μg/dm 2 , the heat resistance may be deteriorated. On the other hand, when the Ni adhesion amount exceeds 1500 μg/dm 2 , the etching residue may increase. Preferably, the deposited mass of Co is 1000 ~ 2500μg / dm 2, preferably of the deposited mass of nickel is 500 ~ 1200μg / dm 2. Here, the term "etching stain" means that Co is not dissolved and remains in the case of etching with copper chloride, and the term "etching residue" means that when alkali etching is performed by ammonium chloride, Ni is not dissolved. Residual.

用於形成此種3元系銅-鈷-鎳合金鍍敷之鍍浴及鍍敷條件如下: The plating bath and plating conditions for forming such a ternary copper-cobalt-nickel alloy plating are as follows:

鍍浴組成:Cu 10~20g/L,Co 1~10g/L,Ni 1~10g/L Composition of plating bath: Cu 10~20g/L, Co 1~10g/L, Ni 1~10g/L

pH:1~4 pH: 1~4

溫度:30~50℃ Temperature: 30~50°C

電流密度Dk:20~30A/dm2 Current density D k : 20~30A/dm 2

鍍敷時間:1~5秒 Plating time: 1~5 seconds

鍍敷結束後之該鍍液浸漬時間:20秒以下(係由於若浸漬多於20秒,則粒子形狀會凌亂),較佳在10秒以下,更佳在5秒以下。 The bath immersion time after the completion of the plating is 20 seconds or less (because the immersion is more than 20 seconds, the particle shape is disordered), preferably 10 seconds or less, more preferably 5 seconds or less.

前述鍍敷結束後,通常並不會特別急地自鍍液取出,但於本發明,該鍍敷結束後,必須要在既定之時間內自鍍液取出。因此,如上述,使前述鍍敷結束後之該鍍液浸漬時間在20秒以下。若該浸漬時間超過20秒進行浸漬,則可能會因鍍液而使粗化粒子之一部分溶解。該粗化粒子之一部分溶解,被認為是粒子形狀凌亂的原因之一。。 After the plating is completed, it is usually not particularly urgent to take out from the plating solution. However, in the present invention, after the plating is completed, it must be taken out from the plating solution for a predetermined period of time. Therefore, as described above, the plating bath immersion time after the completion of the plating is 20 seconds or shorter. If the immersion time is more than 20 seconds for immersion, one of the roughened particles may be partially dissolved by the plating solution. One of the coarse particles is partially dissolved, which is considered to be one of the causes of the disordered particle shape. .

藉由將前述鍍敷結束後之該鍍液浸漬時間縮短至10秒以下,或5秒以下,由於可使粒子形狀更加不易凌亂,故是有效的。 It is effective to shorten the immersion time of the plating solution after the completion of the plating to 10 seconds or less, or 5 seconds or less, since the particle shape can be made more difficult to be messy.

另,與銅-鈷-鎳合金鍍敷同樣地,將銅-鈷-鎳合金鍍敷以外之合金鍍敷其鍍敷結束後之該鍍液浸漬時間控制在20秒以下(係由於若浸漬多於20秒,則粒子形狀會凌亂),較佳在10秒以下,更佳在5秒以下,是重要的。若該浸漬時間超過20秒進行浸漬,則可能會因鍍液而使粗化粒子之一部分溶解。該粗化粒子之一部分溶解,被認為是粒子形狀凌亂的原因之一。銅-鈷-鎳合金鍍敷以外之合金鍍敷的pH、溫度、電流密度、 鍍敷時間可使用公知條件。 In the same manner as the copper-cobalt-nickel alloy plating, the plating time of the plating solution after the plating of the alloy other than the copper-cobalt-nickel alloy plating is controlled to 20 seconds or less (due to the fact that if the impregnation is large In 20 seconds, the shape of the particles will be messy, preferably less than 10 seconds, more preferably less than 5 seconds, which is important. If the immersion time is more than 20 seconds for immersion, one of the roughened particles may be partially dissolved by the plating solution. One of the coarse particles is partially dissolved, which is considered to be one of the causes of the disordered particle shape. pH, temperature, current density, plating of alloys other than copper-cobalt-nickel alloy plating Known conditions can be used for the plating time.

藉由將前述鍍敷結束後之該鍍液浸漬時間縮短至10秒以下,或5秒以下,由於可使粒子形狀更加不易凌亂,故是有效的。 It is effective to shorten the immersion time of the plating solution after the completion of the plating to 10 seconds or less, or 5 seconds or less, since the particle shape can be made more difficult to be messy.

又,亦可進行下述作為粗化處理之銅鍍敷,來作為表面處理。由下述作為粗化處理之銅鍍敷形成的表面處理層,會成為銅濃度高,大部分皆由銅構成的粗化處理層(鍍敷層)。銅濃度高之粗化處理層(鍍敷層),具有不易溶解於鍍液之特徴。下述作為粗化處理之銅鍍敷,係以銅鍍敷1、銅鍍敷2之順序進行。 Further, copper plating as the roughening treatment described below may be carried out as a surface treatment. The surface treatment layer formed by the following copper plating as the roughening treatment has a roughened layer (plating layer) having a high copper concentration and mostly composed of copper. The roughened layer (plating layer) having a high copper concentration has characteristics that are not easily dissolved in the plating solution. The following copper plating as a roughening treatment is performed in the order of copper plating 1 and copper plating 2 .

‧銅鍍敷1 ‧ copper plating 1

(液組成1) (liquid composition 1)

Cu濃度:10~30g/L Cu concentration: 10~30g/L

H2SO4濃度:50~150g/L H 2 SO 4 concentration: 50~150g/L

鎢濃度:0.5~50mg/L Tungsten concentration: 0.5~50mg/L

十二基硫酸鈉:0.5~50mg/L Sodium dodecyl sulfate: 0.5~50mg/L

(電鍍條件1) (plating condition 1)

溫度:30~70℃ Temperature: 30~70°C

(第一段電流條件) (first stage current condition)

電流密度:18~70A/dm2 Current density: 18~70A/dm 2

粗化庫侖量:1.8~1000A/dm2,較佳為1.8~500A/dm2 Coarced coulomb amount: 1.8~1000A/dm 2 , preferably 1.8~500A/dm 2

鍍敷時間:0.1~20秒 Plating time: 0.1~20 seconds

(第二段電流條件) (second stage current condition)

電流密度:0.5~13A/dm2 Current density: 0.5~13A/dm 2

粗化庫侖量:0.05~1000A/dm2,較佳為0.05~500A/dm2 Coarced coulomb amount: 0.05~1000A/dm 2 , preferably 0.05~500A/dm 2

鍍敷時間:0.1~20秒 Plating time: 0.1~20 seconds

另,亦可重複進行第一段與第二段。又,亦可在進行1次或複數次第 一段之後,再進行1次或複數次第二段。又,亦可重複進行「在進行1次 或複數次第一段之後,再進行1次或複數次第二段」。 Alternatively, the first segment and the second segment may be repeated. Also, it can be done once or in multiple times After a period of time, the second paragraph is repeated one or more times. Also, you can repeat "One time in progress" After the first paragraph, the second paragraph is repeated one or more times.

‧銅鍍敷2 ‧ copper plating 2

(液組成2) (liquid composition 2)

Cu濃度:20~80g/L Cu concentration: 20~80g/L

H2SO4濃度:50~200g/L H 2 SO 4 concentration: 50~200g/L

(電鍍條件2) (plating condition 2)

溫度:30~70℃ Temperature: 30~70°C

(電流條件) (current condition)

電流密度:5~50A/dm2 Current density: 5~50A/dm 2

粗化庫侖量:50~300A/dm2 Coarse coulomb amount: 50~300A/dm 2

鍍敷時間:1~60秒 Plating time: 1~60 seconds

又,亦可於銅箔上,組合進行前述銅-鈷-鎳合金鍍敷等之合金鍍敷與前述銅鍍敷。較佳在銅箔上進行前述銅鍍敷後,再進行前述合金鍍敷。 Further, alloy plating such as copper-cobalt-nickel alloy plating or the like may be performed on the copper foil in combination with the copper plating. Preferably, the copper plating is performed on the copper foil, and then the alloy plating is performed.

又,在粗化處理層之表面,亦可形成選自由耐熱層、防鏽層、鉻酸處理層及矽烷偶合處理層組成之群中之1種以上的層。又,於粗化處理層上亦可形成耐熱層,於粗化處理層或耐熱層上亦可形成防鏽層,於防鏽層上亦可形成鉻酸處理層,於鉻酸處理層上亦可形成矽烷偶合處理層。 Further, one or more layers selected from the group consisting of a heat-resistant layer, a rust-preventive layer, a chromic acid-treated layer, and a decane coupling treatment layer may be formed on the surface of the roughened layer. Further, a heat-resistant layer may be formed on the roughened layer, and a rust-preventing layer may be formed on the roughened layer or the heat-resistant layer, and a chromic acid-treated layer may be formed on the rust-preventing layer, and the chromic acid-treated layer may also be formed on the chromic acid-treated layer. A decane coupling treatment layer can be formed.

又,於本發明中,形成在銅箔上之表面處理層,亦可為選自 由耐熱層、防鏽層、鉻酸處理層及矽烷偶合處理層組成之群中之1種以上的層。又,於銅箔上亦可形成耐熱層,於耐熱層上亦可形成防鏽層,於防鏽層上亦可形成鉻酸處理層,於鉻酸處理層上亦可形成矽烷偶合處理層。 Further, in the present invention, the surface treatment layer formed on the copper foil may be selected from the group consisting of One or more layers selected from the group consisting of a heat resistant layer, a rust preventive layer, a chromic acid treated layer, and a decane coupling treatment layer. Further, a heat-resistant layer may be formed on the copper foil, a rust-preventing layer may be formed on the heat-resistant layer, a chromic acid-treated layer may be formed on the rust-preventing layer, and a decane coupling treatment layer may be formed on the chromic acid-treated layer.

耐熱層、防鏽層可使用公知的耐熱層、防鏽層。例如,耐熱層及/或防鏽層亦可為含有選自鎳、鋅、錫、鈷、鉬、銅、鎢、磷、砷、鉻、釩、鈦、鋁、金、銀、鉑族元素、鐵、鉭之群中之1種以上元素的層,亦可為由選自鎳、鋅、錫、鈷、鉬、銅、鎢、磷、砷、鉻、釩、鈦、鋁、金、銀、鉑族元素、鐵、鉭之群中之1種以上元素構成的金屬層或合金層。又,耐熱層及/或防鏽層亦可含有含選自鎳、鋅、錫、鈷、鉬、銅、鎢、磷、砷、鉻、釩、鈦、鋁、金、銀、鉑族元素、鐵、鉭之群中之1種以上元素的氧化物、氮化物、矽化物。又,耐熱層及/或防鏽層亦可為含有鎳-鋅合金之層。又,耐熱層及/或防鏽層亦可為鎳-鋅合金層。前述鎳-鋅合金層亦可不包括不可避免之雜質,含有鎳50wt%~99wt%、鋅50wt%~1wt%。前述鎳-鋅合金層之鋅及鎳的合計附著量亦可為5~1000mg/m2,較佳為10~500mg/m2,更佳為20~100mg/m2。又,前述含有鎳-鋅合金之層或前述鎳-鋅合金層的鎳附著量與鋅附著量之比(=鎳附著量/鋅附著量)較佳為1.5~10。又,前述含有鎳-鋅合金之層或前述鎳-鋅合金層的鎳附著量較佳為0.5mg/m2~500mg/m2,更佳為1mg/m2~50mg/m2。於耐熱層及/或防鏽層為含有鎳-鋅合金之層的情形,銅箔與樹脂基板之密合性會獲得提升。 A well-known heat-resistant layer and a rust-proof layer can be used for a heat-resistant layer and a rustproof layer. For example, the heat-resistant layer and/or the rust-preventing layer may also contain a component selected from the group consisting of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, and platinum. The layer of one or more elements in the group of iron and antimony may also be selected from the group consisting of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, A metal layer or an alloy layer composed of one or more elements of a group of platinum group elements, iron, and lanthanum. Moreover, the heat-resistant layer and/or the rust-preventing layer may further contain a component selected from the group consisting of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, and platinum. Oxides, nitrides, and tellurides of one or more elements in the group of iron and antimony. Further, the heat-resistant layer and/or the rust-preventive layer may be a layer containing a nickel-zinc alloy. Further, the heat-resistant layer and/or the rust-preventive layer may be a nickel-zinc alloy layer. The nickel-zinc alloy layer may not include unavoidable impurities, and contains 50% by weight to 99% by weight of nickel and 50% by weight to 1% by weight of zinc. The total adhesion amount of zinc and nickel in the nickel-zinc alloy layer may be 5 to 1000 mg/m 2 , preferably 10 to 500 mg/m 2 , and more preferably 20 to 100 mg/m 2 . Further, the ratio of the nickel adhesion amount to the zinc adhesion amount (= nickel adhesion amount/zinc adhesion amount) of the nickel-zinc alloy-containing layer or the nickel-zinc alloy layer is preferably 1.5 to 10. Further, the nickel adhesion amount of the nickel-zinc alloy-containing layer or the nickel-zinc alloy layer is preferably 0.5 mg/m 2 to 500 mg/m 2 , more preferably 1 mg/m 2 to 50 mg/m 2 . In the case where the heat-resistant layer and/or the rust-preventive layer is a layer containing a nickel-zinc alloy, the adhesion between the copper foil and the resin substrate is improved.

例如耐熱層及/或防鏽層亦可為依序積層有附著量為1mg/m2~100mg/m2(較佳為5mg/m2~50mg/m2)之鎳或鎳合金層與附著量 為1mg/m2~80mg/m2(較佳為5mg/m2~40mg/m2)之錫層者,前述鎳合金層亦可由鎳-鉬、鎳-鋅、鎳-鉬-鈷之任一種構成。又,耐熱層及/或防鏽層較佳為鎳或鎳合金與錫之合計附著量為2mg/m2~150mg/m2,更佳為10mg/m2~70mg/m2。又,耐熱層及/或防鏽層較佳為[鎳或鎳合金中之鎳附著量]/[錫附著量]=0.25~10,更佳為0.33~3。若使用該耐熱層及/或防鏽層,則將附載體銅箔加工成印刷配線板後之電路的剝離強度、該剝離強度之耐化學品性劣化率等會變良好。 For example, the heat-resistant layer and/or the rust-preventing layer may be a layer of nickel or nickel alloy with a deposition amount of 1 mg/m 2 to 100 mg/m 2 (preferably 5 mg/m 2 to 50 mg/m 2 ) and attached. In the case of a tin layer having a quantity of 1 mg/m 2 to 80 mg/m 2 (preferably 5 mg/m 2 to 40 mg/m 2 ), the nickel alloy layer may also be composed of nickel-molybdenum, nickel-zinc, nickel-molybdenum-cobalt. Any one of the components. Further, the heat-resistant layer and/or the rust-preventive layer preferably have a total adhesion amount of nickel or a nickel alloy to tin of 2 mg/m 2 to 150 mg/m 2 , more preferably 10 mg/m 2 to 70 mg/m 2 . Further, the heat-resistant layer and/or the rust-preventive layer are preferably [the amount of nickel deposited in the nickel or nickel alloy] / [the amount of tin adhesion] = 0.25 to 10, more preferably 0.33 to 3. When the heat-resistant layer and/or the rust-preventing layer are used, the peeling strength of the circuit after processing the copper foil with a carrier to a printed wiring board, the chemical-resistant deterioration rate of the peeling strength, and the like are improved.

鉻酸處理層係指經含有鉻酸酐、鉻酸、重鉻酸、鉻酸鹽或重鉻酸鹽之液體處理過的層。鉻酸處理層亦可含有鈷、鐵、鎳、鉬、鋅、鉭、銅、鋁、磷,鎢、錫、砷及鈦等之元素(金屬、合金、氧化物、氮化物、硫化物等可為任何形態)。作為鉻酸處理層之具體例,可列舉純鉻酸處理層或鋅鉻酸處理層等。於本發明中,將經鉻酸酐或重鉻酸鉀水溶液處理過之鉻酸處理層稱為純鉻酸處理層。又,於本發明中,將經含有鉻酸酐或重鉻酸鉀及鋅之處理液處理過之鉻酸處理層稱為鋅鉻酸處理層。 The chromic acid treated layer refers to a layer treated with a liquid containing chromic anhydride, chromic acid, dichromic acid, chromate or dichromate. The chromic acid treatment layer may also contain elements such as cobalt, iron, nickel, molybdenum, zinc, bismuth, copper, aluminum, phosphorus, tungsten, tin, arsenic, and titanium (metals, alloys, oxides, nitrides, sulfides, etc.) For any form). Specific examples of the chromic acid treatment layer include a pure chromic acid treatment layer, a zinc chromic acid treatment layer, and the like. In the present invention, the chromic acid treated layer treated with an aqueous solution of chromic anhydride or potassium dichromate is referred to as a pure chromic acid treated layer. Further, in the present invention, the chromic acid-treated layer treated with the treatment liquid containing chromic anhydride or potassium dichromate and zinc is referred to as a zinc chromate treatment layer.

另,用以設置矽烷偶合處理層之矽烷偶合劑可使用公知的矽烷偶合劑,例如可使用胺基系矽烷偶合劑或環氧基系矽烷偶合劑、巰基系矽烷偶合劑。又,矽烷偶合劑亦可使用乙烯基三甲氧基矽烷、乙烯基苯基三甲氧基矽烷、γ-甲基丙烯醯氧基(methacryloxy)丙基三甲氧基矽烷,γ-環氧丙氧基丙基三甲氧基矽烷、4-環氧丙基丁基三甲氧基矽烷、γ-胺基丙基三乙氧基矽烷、N-β(胺基乙基)γ-胺基丙基三甲氧基矽烷、N-3-(4-(3-胺基丙氧基)丁氧基)丙基-3-胺基丙基三甲氧基矽烷、咪唑矽烷、三矽烷、γ-巰基丙基三甲氧基矽烷等。 Further, a known decane coupling agent may be used as the decane coupling agent for providing the decane coupling treatment layer. For example, an amine decane coupling agent, an epoxy decane coupling agent or a decyl decane coupling agent may be used. Further, as the decane coupling agent, vinyl trimethoxy decane, vinyl phenyl trimethoxy decane, γ-methacryloxypropyltrimethoxy decane, γ-glycidoxypropane can also be used. Trimethoxy decane, 4-epoxypropyl butyl trimethoxy decane, γ-aminopropyl triethoxy decane, N-β (aminoethyl) γ-aminopropyl trimethoxy decane , N-3-(4-(3-Aminopropyloxy)butoxy)propyl-3-aminopropyltrimethoxydecane, imidazolium, three Decane, γ-mercaptopropyltrimethoxydecane, and the like.

前述矽烷偶合處理層,亦可使用環氧基系矽烷、胺基系矽烷、甲基丙烯醯氧基系矽烷、巰基系矽烷等之矽烷偶合劑等而形成。另,此種矽烷偶合劑亦可混合2種以上使用。其中,較佳為使用胺基系矽烷偶合劑或環氧基系矽烷偶合劑所形成者。 The decane coupling treatment layer may be formed by using a decane coupling agent such as an epoxy group decane, an amine decane, a methacryloxy decane or a decyl decane. Further, such a decane coupling agent may be used in combination of two or more kinds. Among them, those formed by using an amine-based decane coupling agent or an epoxy-based decane coupling agent are preferred.

此處所稱之胺基系矽烷偶合劑,亦可為選自由N-(2-胺基乙基)-3-胺基丙基三甲氧基矽烷、3-(N-苯乙烯基甲基-2-胺基乙基胺基)丙基三甲氧基矽烷、3-胺基丙基三乙氧基矽烷、雙(2-羥基乙基)-3-胺基丙基三乙氧基矽烷、胺基丙基三甲氧基矽烷、N-甲基胺基丙基三甲氧基矽烷、N-苯基胺基丙基三甲氧基矽烷、N-(3-丙烯醯氧基-2-羥基丙基)-3-胺基丙基三乙氧基矽烷、4-胺基丁基三乙氧基矽烷、(胺基乙基胺基甲基)苯乙基三甲氧基矽烷、N-(2-胺基乙基-3-胺基丙基)三甲氧基矽烷、N-(2-胺基乙基-3-胺基丙基)三(2-乙基己氧基)矽烷、6-(胺基己基胺基丙基)三甲氧基矽烷、胺基苯基三甲氧基矽烷、3-(1-胺基丙氧基)-3,3-二甲基-1-丙烯基三甲氧基矽烷、3-胺基丙基三(甲氧基乙氧基乙氧基)矽烷、3-胺基丙基三乙氧基矽烷、3-胺基丙基三甲氧基矽烷、ω-胺基十一基三甲氧基矽烷、3-(2-N-苄基胺基乙基胺基丙基)三甲氧基矽烷、雙(2-羥基乙基)-3-胺基丙基三乙氧基矽烷、(N,N-二乙基-3-胺基丙基)三甲氧基矽烷、(N,N-二甲基-3-胺基丙基)三甲氧基矽烷、N-甲基胺基丙基三甲氧基矽烷、N-苯基胺基丙基三甲氧基矽烷、3-(N-苯乙烯基甲基-2-胺基乙基胺基)丙基三甲氧基矽烷、γ-胺基丙基三乙氧基矽烷、N-β-(胺基乙基)γ-胺基丙基三甲氧基矽烷、N-3-(4-(3-胺基丙氧基)丁氧基)丙基 -3-胺基丙基三甲氧基矽烷組成之群中者。 The amino decane coupling agent referred to herein may also be selected from the group consisting of N-(2-aminoethyl)-3-aminopropyltrimethoxydecane, 3-(N-styrylmethyl-2). -aminoethylamino)propyltrimethoxydecane, 3-aminopropyltriethoxydecane, bis(2-hydroxyethyl)-3-aminopropyltriethoxydecane, amine group Propyltrimethoxydecane, N-methylaminopropyltrimethoxydecane, N-phenylaminopropyltrimethoxydecane, N-(3-propenyloxy-2-hydroxypropyl)- 3-Aminopropyltriethoxydecane, 4-aminobutyltriethoxydecane, (Aminoethylaminomethyl)phenethyltrimethoxydecane, N-(2-Amino B 3-aminopropyl)trimethoxydecane, N-(2-aminoethyl-3-aminopropyl)tris(2-ethylhexyloxy)decane, 6-(aminohexylamine) Propyl)trimethoxydecane, aminophenyltrimethoxydecane, 3-(1-aminopropoxy)-3,3-dimethyl-1-propenyltrimethoxynonane, 3-amine Propyltris(methoxyethoxyethoxy)decane, 3-aminopropyltriethoxydecane, 3-aminopropyltrimethoxydecane, ω-aminoundecyltrimethoxy Decane, 3-(2-N-benzyl Ethylethylaminopropyl)trimethoxydecane, bis(2-hydroxyethyl)-3-aminopropyltriethoxydecane, (N,N-diethyl-3-aminopropyl) Trimethoxydecane, (N,N-dimethyl-3-aminopropyl)trimethoxynonane, N-methylaminopropyltrimethoxydecane, N-phenylaminopropyltrimethoxy Decane, 3-(N-styrylmethyl-2-aminoethylamino)propyltrimethoxydecane, γ-aminopropyltriethoxydecane, N-β-(aminoethyl) γ-Aminopropyltrimethoxydecane, N-3-(4-(3-aminopropoxy)butoxy)propyl A group consisting of 3-aminopropyltrimethoxydecane.

矽烷偶合處理層較理想為以矽原子換算計,於0.05mg/m2~200mg/m2,較佳為0.15mg/m2~20mg/m2,更佳為0.3mg/m2~2.0mg/m2之範圍設置。於前述範圍之情形時,可更加提升基材與表面處理銅箔之密合性。 The decane coupling treatment layer is preferably 0.05 mg/m 2 to 200 mg/m 2 , preferably 0.15 mg/m 2 to 20 mg/m 2 , more preferably 0.3 mg/m 2 to 2.0 mg, in terms of ruthenium atom. /m 2 range setting. In the case of the foregoing range, the adhesion between the substrate and the surface-treated copper foil can be further improved.

〔蝕刻速率〕 [etching rate]

以MSAP(改良半加成法)等製造印刷配線板時,有時會於將表面處理銅箔自表面處理層側積層在樹脂基板後,藉由對該表面處理銅箔進行快速蝕刻而形成配線。於此快速蝕刻時,若花費時間去除表面處理層,則銅箔之配線寬度亦會相應地因蝕刻而被過度去除,變成較所欲寬度細之配線。又,如後述,當以嵌入樹脂基板之方式形成電路即所謂嵌入法製作印刷配線板時,如圖5-J所示,藉由快速蝕刻將樹脂基板表面之銅層去除,使樹脂基板內之電路鍍敷的表面露出。此時,若花費時間去除表面處理層,則樹脂基板表面與銅層(電路鍍敷)表面之階差會變大。亦即,於快速蝕刻時,若花費時間去除表面處理層,則由於銅面會自樹脂基板表面後退許多,因此需要事先確保相應之銅鍍敷厚度,不僅是快速蝕刻步驟,銅鍍敷步驟之生產性亦會大幅降低,亦導致成本上升。相對於此,本發明之表面處理銅箔藉由如上述之構成,當從與形成有表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻時,於使銅箔之厚度方向的蝕刻速率為1之情形時,表面處理層之厚度方向的蝕刻速率被控制在0.5以上。藉由在使銅箔之厚度方向的蝕刻速率為1之情形時,表面處理層之厚度方向的蝕刻速率在0.5以上,與以往相比,以快速蝕刻去除之時間變 短,可抑制銅箔部分被過度蝕刻,可將銅箔之配線形成為所欲寬度。且,可抑制嵌入法等容易產生之樹脂基板表面與銅層(電路鍍敷)表面之階差的發生。本發明之表面處理銅箔,於使銅箔之厚度方向的蝕刻速率為1之情形時,表面處理層之厚度方向的蝕刻速率較佳在0.6以上,更佳在0.7以上,再更佳在0.75以上,再更佳在0.8以上,再更佳在0.9以上,再更佳在1.0以上,典型為0.6~1.0,更典型為0.7~1.0。另,當表面處理銅箔經表面處理之側之表面的面粗糙度Sz為大之情形時,會有表面處理層之蝕刻速率低的傾向。又,當該面粗糙度Sz為小之情形時,則會有表面處理層之蝕刻速率高的傾向。因此,表面處理銅箔經表面處理之側之表面的面粗糙度Sz較佳為0.8~3.2μm,更佳為0.9~3.0μm,再更佳為1.0~3.0μm,再更佳為1.4~3.0μm,再更佳為1.6~2.8μm。 When a printed wiring board is manufactured by MSAP (modified semi-additive method) or the like, the surface-treated copper foil is laminated on the resin substrate from the surface treatment layer side, and then the surface-treated copper foil is quickly etched to form a wiring. . In the case of rapid etching, if it takes time to remove the surface treatment layer, the wiring width of the copper foil is excessively removed by etching, and becomes a wiring having a desired width. Further, as will be described later, when a printed wiring board is formed by a so-called embedding method in which a circuit is formed by embedding a resin substrate, as shown in FIG. 5-J, the copper layer on the surface of the resin substrate is removed by rapid etching, so that the resin substrate is removed. The surface of the circuit is exposed. At this time, if it takes time to remove the surface treatment layer, the step difference between the surface of the resin substrate and the surface of the copper layer (circuit plating) becomes large. That is, in the case of rapid etching, if it takes time to remove the surface treatment layer, since the copper surface retreats a lot from the surface of the resin substrate, it is necessary to ensure the corresponding copper plating thickness in advance, not only the rapid etching step, but also the copper plating step. Productivity will also be significantly reduced, which will also lead to increased costs. On the other hand, the surface-treated copper foil of the present invention is configured as described above, and when spray-etching is performed by dissolving an etching liquid of hydrogen peroxide/sulfuric acid from a surface on the opposite side to the surface on which the surface-treated layer is formed, When the etching rate in the thickness direction of the copper foil is set to 1, the etching rate in the thickness direction of the surface treatment layer is controlled to be 0.5 or more. When the etching rate in the thickness direction of the copper foil is set to 1, the etching rate in the thickness direction of the surface treatment layer is 0.5 or more, and the time of rapid etching removal is changed as compared with the prior art. Short, the copper foil portion can be suppressed from being excessively etched, and the wiring of the copper foil can be formed to have a desired width. Further, it is possible to suppress the occurrence of a step difference between the surface of the resin substrate which is easily generated by the embedding method or the surface of the copper layer (circuit plating). In the surface-treated copper foil of the present invention, when the etching rate in the thickness direction of the copper foil is 1, the etching rate in the thickness direction of the surface treatment layer is preferably 0.6 or more, more preferably 0.7 or more, still more preferably 0.75. The above is more preferably 0.8 or more, still more preferably 0.9 or more, still more preferably 1.0 or more, typically 0.6 to 1.0, and more typically 0.7 to 1.0. On the other hand, when the surface roughness Sz of the surface on the surface side of the surface-treated copper foil is large, the etching rate of the surface treatment layer tends to be low. Further, when the surface roughness Sz is small, the etching rate of the surface treatment layer tends to be high. Therefore, the surface roughness Sz of the surface of the surface-treated copper foil on the surface to be surface-treated is preferably 0.8 to 3.2 μm, more preferably 0.9 to 3.0 μm, still more preferably 1.0 to 3.0 μm, still more preferably 1.4 to 3.0. Μm, more preferably 1.6 to 2.8 μm.

又,當銅箔之結晶粒徑為大的情形時,會有銅箔之蝕刻速率低的傾向。又,當銅箔之結晶粒徑為小的情形時,則會有銅箔之蝕刻速率高的傾向。壓延銅箔或以含有氯、雙(3-磺丙基)二硫化物及胺化合物之電解液所製造的電解銅箔,會有銅箔之結晶粒徑大的傾向。又,以膠濃度高之電解液所製造的電解銅箔,會有銅箔之結晶粒徑小的傾向。又,當表面處理層含有難以被蝕刻之元素(例如鎳、鉻、鎢、釩等)的情形時,會有表面處理層之蝕刻速率低的傾向。又,當表面處理層含有容易被蝕刻之元素(例如鋅、鈷、鐵等)的情形時,會有表面處理層之蝕刻速率高的傾向。 Further, when the crystal grain size of the copper foil is large, the etching rate of the copper foil tends to be low. Further, when the crystal grain size of the copper foil is small, the etching rate of the copper foil tends to be high. The rolled copper foil or the electrolytic copper foil produced by the electrolytic solution containing chlorine, bis(3-sulfopropyl)disulfide, and an amine compound tends to have a large crystal grain size of the copper foil. Further, in the electrolytic copper foil produced by the electrolytic solution having a high gel concentration, the crystal grain size of the copper foil tends to be small. Further, when the surface treatment layer contains an element (for example, nickel, chromium, tungsten, vanadium, or the like) which is difficult to be etched, the etching rate of the surface treatment layer tends to be low. Further, when the surface treatment layer contains an element which is easily etched (for example, zinc, cobalt, iron, or the like), the etching rate of the surface treatment layer tends to be high.

〔蝕刻處理時間〕 [etching time]

又,如上述,於快速蝕刻中,若花費時間去除表面處理層,則銅箔之 配線寬度亦會相應地因蝕刻而被過度去除,變成較所欲寬度細之配線。又,當以嵌入法製作印刷配線板時,如圖5-J所示,藉由快速蝕刻將樹脂基板表面之銅層去除,使樹脂基板內之電路鍍敷的表面露出。此時,若花費時間去除表面處理層,則樹脂基板表面與銅層(電路鍍敷)表面之階差會變大,而會變成電路被覆蓋於樹脂基板內之較不佳的形狀。相對於此,本發明之表面處理銅箔,係於銅箔上形成有表面處理層之表面處理銅箔,當從與形成有表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻時,表面處理層之厚度方向的蝕刻處理時間相對於銅箔之厚度1μm的蝕刻處理時間之比被控制在0.7以下。藉由表面處理層之厚度方向的蝕刻處理時間相對於銅箔之厚度1μm的蝕刻處理時間之比在0.7以下,與以往相比,以快速蝕刻去除之時間變短,可抑制銅箔部分被過度蝕刻,可將銅箔之配線形成為所欲寬度。且,可良好地抑制嵌入法等容易產生之樹脂基板表面與銅層(電路鍍敷)表面之階差的發生。本發明之表面處理銅箔,該表面處理層之厚度方向的蝕刻處理時間相對於銅箔之厚度1μm的蝕刻處理時間之比,較佳在0.4以下,更佳在0.3以下,再更佳在0.2以下,再更佳在0.1以下,典型為0.2~0.7,更典型為0.2~0.4。另,當表面處理銅箔經表面處理之側之表面的面粗糙度Sz為大之情形時,會有去除表面處理層所需要之蝕刻處理時間長的傾向。又,當該面粗糙度Sz為小之情形時,則會有去除表面處理層所需要之蝕刻處理時間短的傾向。因此,表面處理銅箔經表面處理之側之表面的面粗糙度Sz較佳為0.8~3.2μm,更佳為0.9~3.0μm,再更佳為1.0~3.0μm,再更佳為1.4~3.0μm,再更佳為1.6~2.8μm。 Moreover, as described above, in the rapid etching, if it takes time to remove the surface treatment layer, the copper foil The wiring width is also excessively removed by etching, and becomes a wiring having a thinner width than desired. Further, when the printed wiring board is formed by the embedding method, as shown in FIG. 5-J, the copper layer on the surface of the resin substrate is removed by rapid etching, and the surface on which the circuit is plated in the resin substrate is exposed. At this time, if it takes time to remove the surface treatment layer, the step difference between the surface of the resin substrate and the surface of the copper layer (circuit plating) becomes large, and the circuit is covered with a less favorable shape in the resin substrate. On the other hand, the surface-treated copper foil of the present invention is a surface-treated copper foil having a surface-treated layer formed on a copper foil, and a hydrogen peroxide/sulfuric acid system is used on the surface opposite to the surface on which the surface-treated layer is formed. When the copper-dissolving etching liquid is subjected to spray etching, the ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm in thickness of the copper foil is controlled to be 0.7 or less. The ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm of the thickness of the copper foil is 0.7 or less, and the time for rapid etching removal is shorter than in the related art, and the copper foil portion can be suppressed from being excessively excessive. Etching, the wiring of the copper foil can be formed to a desired width. Further, it is possible to satisfactorily suppress the occurrence of a step difference between the surface of the resin substrate which is easily generated by the embedding method or the surface of the copper layer (circuit plating). In the surface-treated copper foil of the present invention, the ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of the thickness of the copper foil of 1 μm is preferably 0.4 or less, more preferably 0.3 or less, still more preferably 0.2. Hereinafter, it is more preferably 0.1 or less, and typically 0.2 to 0.7, more typically 0.2 to 0.4. Further, when the surface roughness Sz of the surface on the surface side of the surface-treated copper foil is large, there is a tendency that the etching treatment time required for removing the surface treatment layer is long. Further, when the surface roughness Sz is small, the etching treatment time required to remove the surface treatment layer tends to be short. Therefore, the surface roughness Sz of the surface of the surface-treated copper foil on the surface to be surface-treated is preferably 0.8 to 3.2 μm, more preferably 0.9 to 3.0 μm, still more preferably 1.0 to 3.0 μm, still more preferably 1.4 to 3.0. Μm, more preferably 1.6 to 2.8 μm.

又,當銅箔之結晶粒徑為大的情形時,會有去除銅箔所需要之蝕刻處理時間長的傾向。又,當銅箔之結晶粒徑為小的情形時,則會有去除銅箔所需要之蝕刻處理時間短的傾向。壓延銅箔或以含有氯、雙(3-磺丙基)二硫化物及胺化合物之電解液所製造的電解銅箔,會有銅箔之結晶粒徑大的傾向。又,以膠濃度高之電解液所製造的電解銅箔,會有銅箔之結晶粒徑小的傾向。又,當表面處理層含有難以被蝕刻之元素(例如鎳、鉻、鎢、釩等)的情形時,會有去除表面處理層所需要之蝕刻處理時間長的傾向。又,當表面處理層含有容易被蝕刻之元素(例如鋅、鈷、鐵等)的情形時,則會有去除表面處理層所需要之蝕刻處理時間短的傾向。 Further, when the crystal grain size of the copper foil is large, there is a tendency that the etching treatment time required for removing the copper foil is long. Moreover, when the crystal grain size of the copper foil is small, the etching treatment time required for removing the copper foil tends to be short. The rolled copper foil or the electrolytic copper foil produced by the electrolytic solution containing chlorine, bis(3-sulfopropyl)disulfide, and an amine compound tends to have a large crystal grain size of the copper foil. Further, in the electrolytic copper foil produced by the electrolytic solution having a high gel concentration, the crystal grain size of the copper foil tends to be small. Further, when the surface treatment layer contains an element (for example, nickel, chromium, tungsten, vanadium, or the like) which is difficult to be etched, there is a tendency that the etching treatment time required to remove the surface treatment layer is long. Further, when the surface treatment layer contains an element which is easily etched (for example, zinc, cobalt, iron, or the like), the etching treatment time required to remove the surface treatment layer tends to be short.

作為上述快速蝕刻之蝕刻條件,可規定成如下: As the etching condition of the above rapid etching, it can be specified as follows:

‧蝕刻形式:噴霧蝕刻 ‧ etching form: spray etching

‧噴霧噴嘴:全圓錐(full cone)型 ‧ spray nozzle: full cone type

‧噴霧壓力:0.10MPa ‧ Spray pressure: 0.10MPa

‧蝕刻液溫:30℃ ‧ etching liquid temperature: 30 ° C

‧蝕刻液組成: ‧ etching solution composition:

H2O2 18g/L H 2 O 2 18g/L

H2SO4 92g/L H 2 SO 4 92g/L

Cu 8g/L Cu 8g/L

添加劑(添加市售之添加劑作為過氧化氫的安定化劑) 適量 Additives (adding a commercially available additive as a stabilizer for hydrogen peroxide)

剩餘部分 水 The remaining part of the water

〔附載體銅箔〕 [with carrier copper foil]

本發明之附載體銅箔,於載體之一面或兩面依序具有中間層、極薄銅 層。並且,該極薄銅層為前述本發明之一實施形態的表面處理銅箔。 The copper foil with carrier of the present invention has an intermediate layer on one or both sides of the carrier, and is extremely thin copper. Floor. Further, the ultra-thin copper layer is the surface-treated copper foil according to an embodiment of the present invention.

<載體> <carrier>

可使用於本發明之載體典型為金屬箔或樹脂膜,例如以銅箔、銅合金箔、鎳箔、鎳合金箔、鐵箔、鐵合金箔、不鏽鋼箔、鋁箔、鋁合金箔、絕緣樹脂膜(例如聚醯亞胺膜、液晶聚合物(LCP)膜、聚對酞酸乙二酯(PET)膜、聚醯胺膜、聚酯膜、氟樹脂膜等)之形態提供。 The carrier which can be used in the present invention is typically a metal foil or a resin film such as a copper foil, a copper alloy foil, a nickel foil, a nickel alloy foil, an iron foil, a ferroalloy foil, a stainless steel foil, an aluminum foil, an aluminum alloy foil, or an insulating resin film ( For example, a form of a polyimide film, a liquid crystal polymer (LCP) film, a polyethylene terephthalate (PET) film, a polyamide film, a polyester film, a fluororesin film, or the like is provided.

作為可使用於本發明之載體,較佳使用銅箔。其原因在於:銅箔由於電傳導度高,容易形成其後之中間層、極薄銅層。載體典型上以壓延銅箔或電解銅箔之形態提供。一般而言,電解銅箔係利用硫酸銅鍍浴將銅電解析出在鈦或不鏽鋼之滾筒上來加以製造,壓延銅箔則是重複進行利用壓延輥之塑性加工與熱處理來製造。銅箔之材料,除了精銅及無氧銅等之高純度銅外,例如亦可使用摻Sn銅;摻Ag銅;添加有Cr、Zr或Mg等之銅合金;添加有Ni及Si等之卡遜(corson)系銅合金此類的銅合金。 As the carrier which can be used in the present invention, a copper foil is preferably used. The reason for this is that the copper foil is easy to form an intermediate layer and an extremely thin copper layer because of its high electrical conductivity. The carrier is typically provided in the form of a rolled copper foil or an electrolytic copper foil. In general, an electrolytic copper foil is produced by electrolyzing copper electricity onto a titanium or stainless steel drum by a copper sulfate plating bath, and the rolled copper foil is repeatedly produced by plastic working and heat treatment using a calender roll. As the material of the copper foil, in addition to high-purity copper such as refined copper and oxygen-free copper, for example, Sn-doped copper; Ag-doped copper; copper alloy to which Cr, Zr or Mg is added; and Ni and Si added thereto may be added. Corson is a copper alloy such as a copper alloy.

可使用於本發明之載體的厚度,並無特別限制,只要適當調節成可作為載體之適合厚度即可,例如可設為12μm以上。但是,若過厚則生產成本會提高,故通常較佳設為35μm以下。因此,載體之厚度典型為12~70μm,更典型為18~35μm。 The thickness of the carrier to be used in the present invention is not particularly limited, and may be appropriately adjusted to a suitable thickness as a carrier, and may be, for example, 12 μm or more. However, if the production cost is increased if it is too thick, it is usually preferably 35 μm or less. Therefore, the thickness of the carrier is typically 12 to 70 μm, more typically 18 to 35 μm.

另,亦可在與載體設置極薄銅層之側的表面相反側之表面設置粗化處理層。亦可使用公知方法設置該粗化處理層,亦可藉由上述之粗化處理來設置。在與載體設置極薄銅層之側的表面相反側之表面設置粗化處理層,具有下述優點:當自具有該粗化處理層之表面側將載體積層在樹脂基板等支持體時,載體與樹脂基板不易剝離。 Further, a roughened layer may be provided on the surface opposite to the surface on the side where the carrier is provided with the ultra-thin copper layer. The roughening treatment layer may be provided by a known method, or may be set by the above-described roughening treatment. Providing a roughened layer on the surface opposite to the surface on the side where the carrier is provided with the ultra-thin copper layer has the advantage that when the carrier layer is on a support such as a resin substrate from the surface side having the roughened layer, the carrier It is not easily peeled off from the resin substrate.

<中間層> <intermediate layer>

於載體之單面或兩面上設置中間層。亦可在載體與中間層之間設置其他層。本發明中所使用之中間層只要為下述構成,則無特別限定:於將附載體銅箔積層於絕緣基板之步驟前,極薄銅層不易自載體剝離,另一方面,於積層於絕緣基板之步驟後,極薄銅層可自載體剝離。例如,本發明之附載體銅箔的中間層亦可含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn、此等之合金、此等之水合物、此等之氧化物、有機物組成之群中的一種或二種以上。又,中間層亦可為複數層。 An intermediate layer is provided on one or both sides of the carrier. Other layers may also be provided between the carrier and the intermediate layer. The intermediate layer used in the present invention is not particularly limited as long as it is a structure in which the ultra-thin copper layer is not easily peeled off from the carrier before the step of laminating the copper foil with the carrier on the insulating substrate, and on the other hand, the layer is insulated. After the step of the substrate, the very thin copper layer can be peeled off from the carrier. For example, the intermediate layer of the copper foil with a carrier of the present invention may further contain an hydrate selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, and the like, One or more of these oxides and organic compounds. Also, the intermediate layer may be a plurality of layers.

又,例如,中間層可藉由下述方式構成:自載體側形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種元素構成的單一金屬層,或形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種或二種以上之元素構成的合金層,於其上形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種或二種以上之元素的水合物或氧化物或有機物構成之層。 Further, for example, the intermediate layer may be formed by forming an element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer formed or an alloy layer formed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. Forming thereon a hydrate or oxide or organic substance composed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn Layer.

又,例如,中間層可藉由下述方式構成:自載體側形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種元素構成的單一金屬層,或形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種或二種以上之元素構成的合金層,於其上形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種之元素構成的單一金屬層,或形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn組成之元素群中一種或二種以上之元素構成的合金層。 Further, for example, the intermediate layer may be formed by forming an element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer formed or an alloy layer formed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. Forming thereon a single metal layer composed of an element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, or formed from Cr selected from An alloy layer composed of one or more elements of an element group consisting of Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn.

於僅在單面設置中間層之情形時,較佳在載體之相反面設置鍍 Ni層等防鏽層。另,當以鉻酸處理或鋅鉻酸處理或鍍敷處理設置中間層之情形時,有時鉻或鋅等附著之金屬的一部份會成為水合物或氧化物。 In the case where the intermediate layer is provided only on one side, it is preferable to provide plating on the opposite side of the carrier. A rustproof layer such as a Ni layer. Further, when an intermediate layer is provided by chromic acid treatment or zinc chromic acid treatment or plating treatment, sometimes a part of the metal to which chromium or zinc adheres may become a hydrate or an oxide.

又,例如,中間層可在載體上依序積層鎳、鎳-磷合金或鎳-鈷合金、及鉻而構成。由於鎳與銅之接合力高於鉻與銅之接合力,因此當剝離極薄銅層時,會在極薄銅層與鉻之界面發生剝離。又,對中間層之鎳期待防止銅成分自載體向極薄銅層擴散的阻隔效果。中間層之鎳的附著量較佳為100μg/dm2以上且40000μg/dm2以下,更佳為100μg/dm2以上且4000μg/dm2以下,更佳為100μg/dm2以上且2500μg/dm2以下,更佳為100μg/dm2以上且未達1000μg/dm2,中間層之鉻的附著量較佳為5μg/dm2以上且100μg/dm2以下。於僅在單面設置中間層之情形時,較佳在載體之相反面設置鍍Ni層等防鏽層。 Further, for example, the intermediate layer may be formed by sequentially laminating nickel, a nickel-phosphorus alloy, a nickel-cobalt alloy, and chromium on a carrier. Since the bonding force between nickel and copper is higher than the bonding force between chromium and copper, when the extremely thin copper layer is peeled off, peeling occurs at the interface between the extremely thin copper layer and chromium. Further, the nickel of the intermediate layer is expected to have a barrier effect of preventing the copper component from diffusing from the carrier to the ultra-thin copper layer. Adhesion amount of nickel intermediate layer is preferably 100μg / dm 2 or more and 40000μg / dm 2 or less, more preferably 100μg / dm 2 or more and 4000μg / dm 2 or less, more preferably 100μg / dm 2 or more and 2500μg / dm 2 Hereinafter, it is more preferably 100 μg/dm 2 or more and less than 1000 μg/dm 2 , and the amount of chromium deposited in the intermediate layer is preferably 5 μg/dm 2 or more and 100 μg/dm 2 or less. In the case where the intermediate layer is provided only on one side, it is preferable to provide a rust-proof layer such as a Ni plating layer on the opposite side of the carrier.

<極薄銅層> <very thin copper layer>

於中間層之上設置極薄銅層。亦可在中間層與極薄銅層之間設置其他層。該極薄銅層為本發明之表面處理銅箔。極薄銅層之厚度並無特別限制,但通常較載體薄,例如為12μm以下。典型上為0.5~12μm,更典型地為1.5~5μm。又,於在中間層上設置極薄銅層前,為了減少極薄銅層之針孔(pinhole),亦可進行利用銅-磷合金之打底鍍敷(strike plating)。打底鍍敷可舉焦磷酸銅鍍敷液等。另,極薄銅層亦可設置在載體之兩側。 An extremely thin copper layer is placed on top of the intermediate layer. Other layers may be provided between the intermediate layer and the ultra-thin copper layer. The ultra-thin copper layer is the surface treated copper foil of the present invention. The thickness of the ultra-thin copper layer is not particularly limited, but is usually thinner than the carrier, and is, for example, 12 μm or less. Typically it is from 0.5 to 12 μm, more typically from 1.5 to 5 μm. Further, before the ultra-thin copper layer is provided on the intermediate layer, in order to reduce the pinhole of the ultra-thin copper layer, strike plating using a copper-phosphorus alloy may be performed. The base plating may be a copper pyrophosphate plating solution or the like. Alternatively, an extremely thin copper layer may be provided on both sides of the carrier.

可使用本發明之附載體銅箔來製作覆銅積層板。作為該覆銅積層板,例如可為依序積層有「極薄銅層/中間層/載體/樹脂或預浸體」之構成,或亦可為依序積層有「極薄銅層/中間層/載體/樹脂或預浸體/載體/中間層/極薄銅層」之構成。另,附載體銅箔亦可小於樹脂。又, 為了防止化學液向中間層滲透,亦可用樹脂覆蓋附載體銅箔之端部。 A copper clad laminate can be produced using the copper foil with a carrier of the present invention. As the copper clad laminate, for example, a structure of "extremely thin copper layer/intermediate layer/carrier/resin or prepreg" may be sequentially laminated, or "very thin copper layer/intermediate layer may be sequentially laminated. / Carrier / Resin or prepreg / carrier / intermediate layer / very thin copper layer. In addition, the carrier copper foil may also be smaller than the resin. also, In order to prevent penetration of the chemical liquid into the intermediate layer, the end portion of the copper foil with the carrier may be covered with a resin.

〔表面處理層上之樹脂層〕 [Resin layer on the surface treated layer]

在本發明之表面處理銅箔的表面處理層上亦可具備有樹脂層。前述樹脂層亦可為絕緣樹脂層。 A resin layer may be provided on the surface treatment layer of the surface-treated copper foil of the present invention. The resin layer may also be an insulating resin layer.

前述樹脂層可為接合劑,或亦可為接合用之半硬化狀態(B階段狀態)的絕緣樹脂層。所謂半硬化狀態(B階段狀態),包括即使以手指接觸其表面亦無黏著感,可使該絕緣樹脂層重疊加以保管,並且若受到加熱處理,則會產生硬化反應之狀態。 The resin layer may be a bonding agent or may be an insulating resin layer in a semi-hardened state (B-stage state) for bonding. The semi-hardened state (B-stage state) includes that the insulating resin layer can be stacked and stored even if it is in contact with the surface of the finger, and the insulating resin layer can be stored in a state of hardening reaction.

前述樹脂層可為接合用樹脂,亦即接合劑,或亦可為接合用之半硬化狀態(B階段狀態)的絕緣樹脂層。所謂半硬化狀態(B階段狀態),包括即使以手指接觸其表面亦無黏著感,可使該絕緣樹脂層重疊加以保管,並且若受到加熱處理,則會產生硬化反應之狀態。 The resin layer may be a bonding resin, that is, a bonding agent, or may be an insulating resin layer in a semi-hardened state (B-stage state) for bonding. The semi-hardened state (B-stage state) includes that the insulating resin layer can be stacked and stored even if it is in contact with the surface of the finger, and the insulating resin layer can be stored in a state of hardening reaction.

又,前述樹脂層可含有熱固性樹脂,亦可為熱塑性樹脂。又,前述樹脂層亦可含有熱塑性樹脂。前述樹脂層可含有公知之樹脂、樹脂硬化劑、化合物、硬化促進劑、介電體,反應觸媒、交聯劑、聚合物、預浸體、骨架材料等。又,前述樹脂層例如亦可使用國際公開號WO2008/004399號、國際公開號WO2008/053878、國際公開號WO2009/084533、日本特開平11-5828號、日本特開平11-140281號、日本專利第3184485號、國際公開號WO97/02728、日本專利第3676375號、日本特開2000-43188號、日本專利第3612594號、日本特開2002-179772號、日本特開2002-359444號、日本特開2003-304068號、日本專利第3992225號、日本特開2003-249739號、日本專利第4136509號、日本特開2004-82687號、日本專利第 4025177號、日本特開2004-349654號、日本專利第4286060號、日本特開2005-262506號、日本專利第4570070號、日本特開2005-53218號、日本專利第3949676號、日本專利第4178415號、國際公開號WO2004/005588、日本特開2006-257153號、日本特開2007-326923號、日本特開2008-111169號、日本專利第5024930號、國際公開號WO2006/028207、日本專利第4828427號、日本特開2009-67029號、國際公開號WO2006/134868、日本專利第5046927號、日本特開2009-173017號、國際公開號WO2007/105635、日本專利第5180815號、國際公開號WO2008/114858、國際公開號WO2009/008471、日本特開2011-14727號、國際公開號WO2009/001850、國際公開號WO2009/145179、國際公開號WO2011/068157、日本特開2013-19056號記載之物質(樹脂、樹脂硬化劑、化合物、硬化促進劑、介電體、反應觸媒、交聯劑、聚合物、預浸體、骨架材料等)及/或樹脂層之形成方法、形成裝置來形成。 Further, the resin layer may contain a thermosetting resin or a thermoplastic resin. Further, the resin layer may contain a thermoplastic resin. The resin layer may contain a known resin, a resin curing agent, a compound, a curing accelerator, a dielectric, a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton material, and the like. In addition, the resin layer may be, for example, International Publication No. WO 2008/004399, International Publication No. WO 2008/053878, International Publication No. WO 2009/084533, Japanese Patent Laid-Open No. Hei No. Hei No. Hei No. Hei No. Hei No. Japanese Patent No. 3,184,485, International Publication No. WO97/02728, Japanese Patent No. 3676375, Japanese Patent Laid-Open No. 2000-43188, Japanese Patent No. 3612594, Japanese Patent Laid-Open No. 2002-179772, Japanese Patent Laid-Open No. 2002-359444, Japanese Patent Laid-Open No. 2003 -304068, Japanese Patent No. 3992225, Japanese Patent Laid-Open No. 2003-249739, Japanese Patent No. 4136509, Japanese Patent Laid-Open No. 2004-82687, Japanese Patent No. 4025177, Japanese Patent Laid-Open No. 2004-349654, Japanese Patent No. 4286060, Japanese Patent Laid-Open No. 2005-262506, Japanese Patent No. 4570070, Japanese Patent Laid-Open No. 2005-53218, Japanese Patent No. 3949676, Japanese Patent No. 4187815 , International Publication No. WO2004/005588, Japanese Patent Laid-Open No. 2006-257153, Japanese Patent Laid-Open No. 2007-326923, Japanese Patent Laid-Open No. 2008-111169, Japanese Patent No. 5024930, International Publication No. WO2006/028207, Japanese Patent No. 4828427 Japanese Patent Publication No. 2009-67029, International Publication No. WO2006/134868, Japanese Patent No. 5046927, Japanese Patent Laid-Open No. 2009-173017, International Publication No. WO2007/105635, Japanese Patent No. 5180815, International Publication No. WO2008/114858, Substances (resin, resin) described in International Publication No. WO2009/008471, Japanese Patent Laid-Open No. 2011-14727, International Publication No. WO2009/001850, International Publication No. WO2009/145179, International Publication No. WO2011/068157, Japanese Patent Laid-Open No. 2013-19056 Hardener, compound, hardening accelerator, dielectric, reaction catalyst, crosslinking agent, polymer, prepreg, skeleton material, etc.) and/or resin layer forming method, forming device form.

又,前述樹脂層,其種類並無特別限定,例如作為較佳者,可列舉包含選自環氧樹脂、聚醯亞胺樹脂、多官能性氰酸酯化合物、順丁烯二醯亞胺(maleimide)化合物、聚順丁烯二醯亞胺化合物、順丁烯二醯亞胺系樹脂、芳香族順丁烯二醯亞胺樹脂、聚乙烯縮醛(polyvinyl acetal)樹脂、胺酯樹脂(urethane resin)、丙烯酸樹脂、聚醚碸(polyether sulfone)、聚醚碸樹脂、芳香族聚醯胺樹脂、芳香族聚醯胺樹脂聚合物、橡膠性樹脂、多胺、芳香族多胺、聚醯胺亞醯胺(polyamide imide)樹脂、橡膠改質環氧樹脂、苯氧基樹脂(phenoxy resin)、羧基改質丙烯腈-丁二烯樹脂、聚伸苯醚(polyphenylene oxide)、雙順丁烯二醯亞胺三樹脂、熱固性聚伸苯醚樹 脂、氰酸酯系樹脂、羧酸之酸酐、多元羧酸之酸酐、具有可交聯之官能基的線狀聚合物、聚苯醚(polyphenylene ether)樹脂、2,2-雙(4-氰氧基苯基)丙烷、含磷酚化合物、環烷酸錳、2,2-雙(4-環氧丙基苯基)丙烷、聚苯醚-氰酸酯系樹脂、矽氧烷改質聚醯胺亞醯胺(polyamide imide)樹脂、氰基酯樹脂、膦氮烯(phosphazene)系樹脂、橡膠改質聚醯胺亞醯胺樹脂、異戊二烯、氫化型聚丁二烯、聚乙烯丁醛、苯氧基、高分子環氧樹脂、芳香族聚醯胺、氟樹脂、雙酚、嵌段共聚聚醯亞胺樹脂及氰基酯樹脂之群中一種以上的樹脂。 Further, the type of the resin layer is not particularly limited. For example, it is preferably selected from the group consisting of an epoxy resin, a polyimide resin, a polyfunctional cyanate compound, and maleimide ( Maleimide) compound, poly-maleimide compound, maleimide resin, aromatic maleimide resin, polyvinyl acetal resin, urethane resin Resin, acrylic resin, polyether sulfone, polyether oxime resin, aromatic polyamide resin, aromatic polyamide resin polymer, rubber resin, polyamine, aromatic polyamine, polyamine Polyamide imide resin, rubber modified epoxy resin, phenoxy resin, carboxyl modified acrylonitrile-butadiene resin, polyphenylene oxide, polybutylene Yttrium imine a resin, a thermosetting polyphenylene ether resin, a cyanate resin, an acid anhydride of an carboxylic acid, an acid anhydride of a polyvalent carboxylic acid, a linear polymer having a crosslinkable functional group, a polyphenylene ether resin, 2, 2-bis(4-cyanooxyphenyl)propane, phosphorus-containing phenol compound, manganese naphthenate, 2,2-bis(4-epoxypropylphenyl)propane, polyphenylene ether-cyanate resin , alkoxysilane modified polyimide imide resin, cyanoester resin, phosphazene resin, rubber modified polyamidamine resin, isoprene, hydrogenated One or more of polybutadiene, polyvinyl butyral, phenoxy, polymer epoxy resin, aromatic polyamine, fluororesin, bisphenol, block copolymer polyimide resin, and cyanoester resin Resin.

又,前述環氧樹脂係分子內具有2個以上之環氧基者,若為可用於電氣、電子材料用途者,則可無特別問題地使用。又,前述環氧樹脂較佳為經使用分子內具有2個以上環氧丙基之化合物進行過環氧化的環氧樹脂。又,可將選自雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、雙酚AD型環氧樹脂、酚醛清漆型環氧樹脂、甲酚酚醛清漆(cresol novolac)型環氧樹脂、脂環式環氧樹脂、溴化(bromination)環氧樹脂、苯酚酚醛清漆(phenol novolac)型環氧樹脂、萘型環氧樹脂、溴化雙酚A型環氧樹脂、鄰甲酚酚醛清漆型環氧樹脂、橡膠改質雙酚A型環氧樹脂、環氧丙胺型環氧樹脂、三聚異氰酸三環氧丙酯(triglycidylisocyanurate)、N,N-二環氧丙基苯胺等之環氧丙胺化合物、四氫鄰苯二甲酸二環氧丙酯等環氧丙酯化合物、含磷環氧樹脂、聯苯型環氧樹脂、聯苯酚醛清漆型環氧樹脂、三羥基苯基甲烷型環氧樹脂、四苯基乙烷型環氧樹脂之群中的1種或2種以上混合來使用,或可使用前述環氧樹脂之氫化體或鹵化體。 Further, the epoxy resin may have two or more epoxy groups in the molecule, and if it is used for electrical or electronic materials, it can be used without any problem. Further, the epoxy resin is preferably an epoxy resin which is subjected to epoxidation using a compound having two or more epoxy propyl groups in the molecule. Further, it may be selected from the group consisting of bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, bisphenol AD type epoxy resin, novolak type epoxy resin, cresol novolac ( Cresol novolac) epoxy resin, alicyclic epoxy resin, bromination epoxy resin, phenol novolac epoxy resin, naphthalene epoxy resin, brominated bisphenol A epoxy Resin, o-cresol novolak type epoxy resin, rubber modified bisphenol A type epoxy resin, epoxy propylamine type epoxy resin, triglycidylisocyanurate, N, N-II A glycidylamine compound such as a glycidyl aniline or a glycidyl ester compound such as diglycidyl tetrahydrophthalate, a phosphorus-containing epoxy resin, a biphenyl type epoxy resin, or a biphenyl novolac epoxy One or a mixture of two or more of a resin, a trishydroxyphenylmethane type epoxy resin, and a tetraphenylethane type epoxy resin may be used in combination, or a hydrogenated body or a halogenated body of the above epoxy resin may be used.

可使用公知之含有磷的環氧樹脂作為前述含磷環氧樹脂。又,前述含 磷環氧樹脂較佳為例如以源自分子內具備2個以上之環氧基的9,10-二氫-9-氧雜-10-磷雜菲-10-氧化物之衍生物的形式獲得之環氧樹脂。 A well-known phosphorus-containing epoxy resin can be used as the phosphorus-containing epoxy resin. Also, the foregoing The phosphorus epoxy resin is preferably obtained, for example, in the form of a derivative derived from 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide having two or more epoxy groups in the molecule. Epoxy resin.

(當樹脂層含有介電體(介電體填料)之情形時) (When the resin layer contains a dielectric (dielectric filler))

前述樹脂層亦可含有介電體(介電體填料)。 The resin layer may also contain a dielectric (dielectric filler).

當使上述任一樹脂層或樹脂組成物含有介電體(介電體填料)之情形時,可用於形成電容器層之用途,而增大電容器電路之電容。該介電體(介電體填料)使用BaTiO3、SrTiO3、Pb(Zr-Ti)O3(通稱PZT)、PbLaTiO3.PbLaZrO(通稱PLZT)、SrBi2Ta2O9(通稱SBT)等具有鈣鈦礦(perovskite)結構之複合氧化物的介電體粉。 When any of the above resin layers or resin compositions contains a dielectric (dielectric filler), it can be used for the purpose of forming a capacitor layer, and the capacitance of the capacitor circuit is increased. The dielectric (dielectric filler) used was BaTiO 3 , SrTiO 3 , Pb(Zr-Ti)O 3 (commonly known as PZT), and PbLaTiO 3 . A dielectric powder of a composite oxide having a perovskite structure such as PbLaZrO (commonly known as PLZT) or SrBi 2 Ta 2 O 9 (commonly known as SBT).

介電體(介電體填料)亦可為粉狀。於介電體(介電體填料)為粉狀之情形時,該介電體(介電體填料)之粉體特性,較佳為粒徑為0.01μm~3.0μm(較佳為0.02μm~2.0μm)之範圍者。再者,於利用掃描型電子顯微鏡(SEM)對介電體拍攝照片,於該照片上之介電體的粒子之上劃出直線的情形時,將橫穿介電體粒子之直線之長度最長部分的介電體粒子之長度設為該介電體粒子之直徑。並且,將測量視野中之介電體粒子直徑的平均值設為介電體之粒徑。 The dielectric (dielectric filler) may also be in powder form. When the dielectric (dielectric filler) is in the form of a powder, the powder property of the dielectric (dielectric filler) is preferably from 0.01 μm to 3.0 μm (preferably 0.02 μm). The range of 2.0 μm). Further, when a photo is taken by a scanning electron microscope (SEM) on a dielectric body, and a straight line is drawn on the particles of the dielectric body on the photo, the length of the straight line crossing the dielectric particles is longest. The length of part of the dielectric particles is set to the diameter of the dielectric particles. Further, the average value of the dielectric particle diameters in the measurement field of view is defined as the particle diameter of the dielectric.

將前述樹脂層所含之樹脂及/或樹脂組成物及/或化合物溶解於例如甲基乙基酮(MEK)、環戊酮、二甲基甲醯胺、二甲基乙醯胺、N-甲基吡咯啶酮(N-methylpyrrolidone)、甲苯、甲醇、乙醇、丙二醇單甲醚、二甲基甲醯胺、二甲基乙醯胺、環己酮、乙基賽珞蘇、N-甲基-2-吡咯啶酮、N,N-二甲基乙醯胺、N,N-二甲基甲醯胺等溶劑而製成樹脂液(樹脂清漆),例如藉由輥式塗佈法等將其塗佈於前述表面處理銅箔的粗化 處理表面上,繼而,視需要進行加熱乾燥將溶劑去除,形成為B階段狀態。乾燥例如使用熱風乾燥爐即可,乾燥溫度可為100~250℃,較佳為130~200℃。亦可使用溶劑將前述樹脂層之組成物溶解,而製成樹脂固形物成分3wt%~70wt%(較佳為3wt%~60wt%,較佳為10wt%~40wt%,更佳為25wt%~40wt%)之樹脂液。再者,就環境之觀點而言,於現階段最佳為使用甲基乙基酮與環戊酮之混合溶劑來進行溶解。再者,溶劑較佳使用沸點為50℃~200℃之範圍的溶劑。 The resin and/or resin composition and/or compound contained in the resin layer is dissolved in, for example, methyl ethyl ketone (MEK), cyclopentanone, dimethylformamide, dimethylacetamide, N- N-methylpyrrolidone, toluene, methanol, ethanol, propylene glycol monomethyl ether, dimethylformamide, dimethylacetamide, cyclohexanone, ethyl cyproterone, N-methyl A solvent (resin varnish) is prepared by a solvent such as -2-pyrrolidone, N,N-dimethylacetamide or N,N-dimethylformamide, for example, by a roll coating method or the like. It is applied to the roughening of the aforementioned surface-treated copper foil On the treated surface, the solvent is removed by heat drying as needed to form a B-stage state. Drying may be carried out, for example, using a hot air drying oven, and the drying temperature may be 100 to 250 ° C, preferably 130 to 200 ° C. The composition of the resin layer may be dissolved by using a solvent to form a resin solid content of 3 wt% to 70 wt% (preferably 3 wt% to 60 wt%, preferably 10 wt% to 40 wt%, more preferably 25 wt%). 40 wt%) of the resin liquid. Further, from the viewpoint of the environment, it is most preferable to use a mixed solvent of methyl ethyl ketone and cyclopentanone to dissolve at this stage. Further, as the solvent, a solvent having a boiling point of from 50 ° C to 200 ° C is preferably used.

又,前述樹脂層較佳為依據MIL標準中之MIL-P-13949G進行測量時之樹脂溢流量位於5%~35%的範圍之半硬化樹脂膜。 Further, the resin layer is preferably a semi-hardened resin film having a resin overflow flow rate in the range of 5% to 35% when measured in accordance with MIL-P-13949G in the MIL standard.

於本案說明書中,所謂樹脂溢流量,係依據MIL標準中之MIL-P-13949G,自附有將樹脂厚度設為55μm之樹脂的表面處理銅箔取樣4片10cm見方之試樣,於使該4片試樣重疊之狀態(積層體)下,於加壓溫度171℃、加壓壓力14kgf/cm2、加壓時間10分鐘之條件下進行貼合,根據測量此時之樹脂流出重量的結果依照數1而算出之值。 In the present specification, the resin overflow is based on MIL-P-13949G in the MIL standard, and a sample of 4 pieces of 10 cm square is sampled from a surface-treated copper foil to which a resin having a resin thickness of 55 μm is attached. The state in which the four samples were overlapped (layered body) was bonded at a pressurization temperature of 171 ° C, a pressurization pressure of 14 kgf/cm 2 , and a pressurization time of 10 minutes, and the result of measuring the resin outflow weight at this time was measured. The value calculated according to the number 1.

具備有前述樹脂層之表面處理銅箔(附有樹脂之表面處理銅箔)係以下述態樣使用,即,於使其樹脂層與基材重疊後將整體熱壓合而使該樹脂層熱硬化,繼而於表面處理銅箔為附載體銅箔之極薄銅層的情形時,將載體剝離而使極薄銅層露出(當然露出部分為該極薄銅層之中間層側之表面),自與表面處理銅箔經粗化處理之側為相反側的表面形成既定之 配線圖案。 The surface-treated copper foil (resin-treated copper foil with resin) having the resin layer is used in such a manner that the resin layer and the substrate are superposed, and then the entire resin is thermally pressed to heat the resin layer. Hardening, and then in the case where the surface-treated copper foil is an extremely thin copper layer with a carrier copper foil, the carrier is peeled off to expose an extremely thin copper layer (of course, the exposed portion is the surface of the intermediate layer side of the extremely thin copper layer), Formed from the opposite side of the surface treated with the surface treated copper foil by roughening Wiring pattern.

若使用該附有樹脂之表面處理銅箔,則可減少製造多層印刷配線基板時預浸材料之使用片數。而且,即便將樹脂層之厚度設為可確保層間絕緣之厚度,或完全未使用預浸材料,亦可製造覆銅積層板。又,此時,亦可將絕緣樹脂底塗(undercoat)於基材之表面而進一步改善表面之平滑性。 When the surface-treated copper foil with a resin is used, the number of sheets of the prepreg used when manufacturing the multilayer printed wiring board can be reduced. Further, the copper clad laminate can be produced even if the thickness of the resin layer is such that the thickness of the interlayer insulation can be ensured or the prepreg material is not used at all. Further, at this time, the insulating resin may be undercoated on the surface of the substrate to further improve the smoothness of the surface.

另,於不使用預浸材料之情形時,可節約預浸材料之材料成本,且亦簡化積層步驟,因此於經濟方面有利,而且,具有下述優點:由於沒有預浸材料之厚度,故所製造之多層印刷配線基板之厚度會變薄,可製造1層之厚度在100μm以下之極薄的多層印刷配線基板。 In addition, when the prepreg material is not used, the material cost of the prepreg material can be saved, and the lamination step is also simplified, which is economically advantageous, and has the following advantages: since there is no thickness of the prepreg material, The thickness of the multilayer printed wiring board to be manufactured is reduced, and it is possible to manufacture a very thin multilayer printed wiring board having a thickness of 100 μm or less.

此樹脂層之厚度較佳為0.1~120μm。 The thickness of the resin layer is preferably from 0.1 to 120 μm.

若樹脂層之厚度薄於0.1μm,則接合力會下降,於不隔著預浸材料而將該附有樹脂之表面處理銅箔積層於具備有內層材料的基材時,有時會難以確保內層材料與電路之間的層間絕緣。另一方面,若使樹脂層之厚度厚於120μm,則有時會難以藉由1次塗佈步驟形成目標厚度之樹脂層,而花費額外之材料費與工時,因此於經濟方面變得不利。 When the thickness of the resin layer is less than 0.1 μm, the bonding strength is lowered, and it may be difficult to laminate the resin-coated surface-treated copper foil to the substrate having the inner layer material without interposing the prepreg. Ensure interlayer insulation between the inner layer material and the circuit. On the other hand, when the thickness of the resin layer is made thicker than 120 μm, it may be difficult to form a resin layer of a desired thickness by one application step, and additional material cost and man-hours are required, which is disadvantageous in terms of economy. .

另,於將具有樹脂層之表面處理銅箔用於製造極薄之多層印刷配線板之情形時,為了減小多層印刷配線板之厚度,較佳使前述樹脂層之厚度為0.1μm~5μm,更佳為0.5μm~5μm,更佳為1μm~5μm。 Further, in the case where a surface-treated copper foil having a resin layer is used for producing an extremely thin multilayer printed wiring board, in order to reduce the thickness of the multilayer printed wiring board, it is preferable that the thickness of the resin layer is 0.1 μm to 5 μm. More preferably, it is 0.5 μm to 5 μm, more preferably 1 μm to 5 μm.

<印刷配線板> <Printed wiring board>

本發明之印刷配線板,可使用本發明之表面處理銅箔、附載體銅箔來製作。關於附載體銅箔,其本身之使用方法為該行業者所熟知,例如可將 極薄銅層之表面貼合在紙基材酚樹脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、玻璃布-紙複合基材環氧樹脂、玻璃布-玻璃不織布複合基材環氧樹脂及玻璃布基材環氧樹脂、聚酯膜、聚醯亞胺膜等之絕緣基板,於熱壓合後,將銅箔載體剝除,將接合於絕緣基板之極薄銅層蝕刻成想要的導體圖案,最後製造印刷配線板。又,亦可製造覆銅積層板。又,準備屏蔽膜用之絕緣層,將附載體銅箔自極薄銅層側貼合在其表面後,自極薄銅層將銅箔載體剝除,並且於銅箔載體剝離後之極薄銅層的表面設置異向導電性接合劑,藉此可製造屏蔽膜。印刷配線板,例如可安裝在要求安裝零件高密度構裝之各種電子零件。 The printed wiring board of the present invention can be produced by using the surface-treated copper foil of the present invention or a copper foil with a carrier. Regarding the copper foil with a carrier, the method of use itself is well known to the industry, for example, The surface of the ultra-thin copper layer is bonded to the paper substrate phenol resin, paper substrate epoxy resin, synthetic fiber cloth substrate epoxy resin, glass cloth-paper composite substrate epoxy resin, glass cloth-glass non-woven composite substrate An insulating substrate such as an epoxy resin or a glass cloth substrate epoxy resin, a polyester film, or a polyimide film, after hot pressing, the copper foil carrier is peeled off, and an extremely thin copper layer bonded to the insulating substrate is etched. The desired conductor pattern is formed, and finally the printed wiring board is manufactured. Further, a copper clad laminate can also be produced. Further, an insulating layer for a shielding film is prepared, and the copper foil with a carrier is bonded to the surface of the ultra-thin copper layer from the side of the ultra-thin copper layer, and the copper foil carrier is peeled off from the ultra-thin copper layer, and is extremely thin after the copper foil carrier is peeled off. An anisotropic conductive bonding agent is provided on the surface of the copper layer, whereby a shielding film can be manufactured. Printed wiring boards, for example, can be mounted on various electronic parts requiring high-density mounting of parts.

另,於本發明中,「印刷配線板」亦包含安裝有零件之印刷配線板及印刷電路板及印刷基板。又,可將2個以上本發明之印刷配線板連接而製造連接有2個以上之印刷配線板的印刷配線板,又,可將至少1個本發明之印刷配線板與另一個本發明之印刷配線板或不相當於本發明之印刷配線板的印刷配線板連接,亦可使用此種印刷配線板製造電子機器。另,於本發明中,「銅電路」亦包含銅配線。 Further, in the present invention, the "printed wiring board" also includes a printed wiring board on which components are mounted, a printed circuit board, and a printed circuit board. Further, two or more printed wiring boards of the present invention can be connected to each other to manufacture a printed wiring board to which two or more printed wiring boards are connected, and at least one printed wiring board of the present invention can be printed with another of the present invention. It is also possible to manufacture an electronic device using such a printed wiring board by connecting a wiring board or a printed wiring board which does not correspond to the printed wiring board of this invention. Further, in the present invention, the "copper circuit" also includes copper wiring.

以下,揭示幾個使用本發明之表面處理銅箔或附載體銅箔的印刷配線板製造步驟之例。 Hereinafter, examples of manufacturing steps of several printed wiring boards using the surface-treated copper foil of the present invention or a copper foil with a carrier will be disclosed.

於使用半加成法之本發明之印刷配線板製造方法的一實施形態中,包含下述步驟:準備本發明之表面處理銅箔與絕緣基板的步驟;將前述表面處理銅箔自表面處理層側積層在絕緣基板的步驟;去除前述絕緣基板上之表面處理銅箔的步驟;將電路形成在經去除前述表面處理銅箔之絕緣基板之表面的步驟。 An embodiment of the method for producing a printed wiring board of the present invention using a semi-additive method includes the steps of: preparing a surface-treated copper foil of the present invention and an insulating substrate; and applying the surface-treated copper foil to the surface-treated layer a step of laminating the substrate on the insulating substrate; a step of removing the surface-treated copper foil on the insulating substrate; and forming a circuit on the surface of the insulating substrate from which the surface-treated copper foil is removed.

於半加成法中,使用銅箔之表面輪廓(profile)。具體而言,首先,將本發明之銅箔積層在樹脂基材,製作覆銅積層體。接著,對覆銅積層體之銅箔進行整面蝕刻。接著,對轉印有銅箔表面輪廓之樹脂基材(整面蝕刻基材)的表面實施無電鍍銅。然後,以乾膜等被覆樹脂基材(整面蝕刻基材)不形成電路之部分,對未被乾膜被覆之無電鍍銅層的表面實施電鍍(電解)銅。然後,於將乾膜去除後,將形成在不形成電路之部分的無電鍍銅層去除,藉此,形成微細之電路。本發明中所形成之微細電路,由於與本發明轉印有銅箔表面輪廓之樹脂基材(整面蝕刻基材)的蝕刻面密合,故其密合力(剝離強度)良好。 In the semi-additive method, the surface profile of the copper foil is used. Specifically, first, the copper foil of the present invention is laminated on a resin substrate to produce a copper clad laminate. Next, the copper foil of the copper clad laminate is subjected to full surface etching. Next, electroless copper is applied to the surface of the resin substrate (whole-surface etching substrate) to which the surface profile of the copper foil is transferred. Then, the resin substrate (the entire surface of the substrate) is coated with a dry film or the like without forming a circuit, and the surface of the electroless copper layer not coated with the dry film is plated (electrolyzed). Then, after the dry film is removed, the electroless copper plating layer formed in the portion where the circuit is not formed is removed, whereby a fine circuit is formed. Since the fine circuit formed in the present invention is in close contact with the etched surface of the resin substrate (whole-surface etching substrate) on which the surface profile of the copper foil is transferred in the present invention, the adhesion (peeling strength) is good.

亦可使絕緣基板為具有內層電路者。又,於本發明中,半加成法係指下述方法:在絕緣基板或銅箔種晶層(seed layer)上進行薄的無電電鍍,於形成圖案後,利用電鍍及蝕刻形成導體圖案。 The insulating substrate can also be made to have an inner layer circuit. Further, in the present invention, the semi-additive method refers to a method of performing thin electroless plating on an insulating substrate or a copper foil seed layer, and after forming a pattern, forming a conductor pattern by plating and etching.

於使用半加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將前述附載體銅箔自極薄銅層側積層在絕緣基板的步驟;於將前述附載體銅箔與絕緣基板積層後,剝除前述附載體銅箔之載體的步驟;將經剝除前述載體後之絕緣基板上的極薄銅層去除的步驟;將電路形成在經去除前述極薄銅層之絕緣基板之表面的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and the copper foil with the carrier from the side of the ultra-thin copper layer a step of laminating the insulating substrate; after laminating the copper foil with the insulating substrate and removing the carrier of the copper foil with the carrier; removing the ultra-thin copper layer on the insulating substrate after stripping the carrier a step of forming a circuit on a surface of the insulating substrate from which the extremely thin copper layer is removed.

於本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之表面處理銅箔與絕緣基板的步驟;將前述表面處理銅箔自表面處理層側積層在絕緣基板,而形成覆銅積層板,然後,藉由減成法、部分加成法或改良半加成法中之任一方法形成電路的步驟。 An embodiment of the method for producing a printed wiring board according to the present invention includes the steps of: preparing a surface-treated copper foil of the present invention and an insulating substrate; and forming the surface-treated copper foil on the insulating substrate from the surface treatment layer side. A copper clad laminate, and then a step of forming a circuit by any one of a subtractive method, a partial addition method, or a modified semi-additive method.

於本發明中,減成法係指下述方法:藉由蝕刻等,選擇性地去除覆銅積層板上銅箔不需要之部分,而形成導體圖案。 In the present invention, the subtractive method refers to a method of selectively removing a portion of a copper foil on a copper clad laminate by etching or the like to form a conductor pattern.

於本發明中,部分加成法係指下述方法:在設置導體層而成的基板、視需要開出通孔或導通孔用之孔而成的基板上賦予觸媒核,進行蝕刻,形成導體電路,並視需要設置阻焊劑或鍍敷阻劑後,在該導體電路上,藉由無電電鍍處理對通孔或導通孔等進行增厚,藉此製造印刷配線板。 In the present invention, the partial addition method refers to a method in which a catalyst core is provided on a substrate on which a conductor layer is provided, and a via hole or a via hole is formed as needed, and etching is performed to form a catalyst core. After the conductor circuit is provided with a solder resist or a plating resist as needed, the via hole, the via hole, and the like are thickened by the electroless plating treatment on the conductor circuit, thereby manufacturing a printed wiring board.

於本發明中,改良半加成法係指下述方法:將金屬箔積層在絕緣層上,以鍍敷阻劑保護非電路形成部,藉由電鍍增加電路形成部之銅厚後,將阻劑去除,藉由(快速)蝕刻將該電路形成部以外之金屬箔去除,藉此將電路形成在絕緣層上。 In the present invention, the modified semi-additive method refers to a method of laminating a metal foil on an insulating layer, protecting a non-circuit forming portion with a plating resist, and increasing the copper thickness of the circuit forming portion by electroplating, thereby blocking The agent is removed, and the metal foil other than the circuit forming portion is removed by (rapid) etching, whereby the circuit is formed on the insulating layer.

於本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將前述附載體銅箔自極薄銅層側積層在絕緣基板的步驟;將前述附載體銅箔與絕緣基板積層後,經過將前述附載體銅箔之載體剝除的步驟而形成覆銅積層板,然後,藉由部分加成法或改良半加成法中之任一方法形成電路的步驟。 An embodiment of the method for producing a printed wiring board according to the present invention includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and stacking the copper foil with a carrier on the insulating substrate from the side of the ultra-thin copper layer After laminating the copper foil with the carrier and the insulating substrate, the copper-clad laminate is formed by the step of stripping the carrier of the copper foil with the carrier, and then, by partial addition or modified semi-addition A method of forming a circuit.

於使用半加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備形成有電路之金屬箔的步驟;以覆蓋該電路之方式將樹脂層形成在該金屬箔表面的步驟;將本發明之表面處理銅箔自表面處理層側積層在該樹脂層的步驟;去除該樹脂層上之表面處理銅箔的步驟;將電路形成在經去除該表面處理銅箔之樹脂層之表面的步驟;及藉由去除該金屬箔,而使形成在該金屬箔表面被該樹脂層覆蓋之電路露出的步驟。 An embodiment of a method of manufacturing a printed wiring board according to the present invention using a semi-additive method includes the steps of: preparing a metal foil on which a circuit is formed; and forming a resin layer on a surface of the metal foil so as to cover the circuit a step of laminating the surface-treated copper foil of the present invention from the surface treatment layer to the resin layer; removing the surface-treated copper foil on the resin layer; and forming a circuit on the resin layer from which the surface-treated copper foil is removed a step of forming a surface; and removing the metal foil to expose a circuit formed on the surface of the metal foil by the resin layer.

於使用半加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:以本發明之附載體銅箔作為第1附載體銅箔,將電路形成在該第1附載體銅箔之極薄銅層側表面的步驟;以覆蓋該電路之方式將樹脂層形成在該第1附載體銅箔之該極薄銅層側表面的步驟;準備第2附載體銅箔,自該第2附載體銅箔之極薄銅層側積層在該樹脂層的步驟;將該第2附載體銅箔積層在該樹脂層後,將該第2附載體銅箔之載體剝除的步驟;將經剝除該第2附載體銅箔之載體後之樹脂層上之極薄銅層去除的步驟;將電路形成在經去除該極薄銅層之樹脂層之表面的步驟;將電路形成在該樹脂層上之後,將該第1附載體銅箔之載體剝離的步驟;及將該第1附載體銅箔之載體剝離後,去除該第1附載體銅箔之極薄銅層,藉此使形成在該第1附載體銅箔之極薄銅層側表面被該樹脂層覆蓋之電路露出的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method includes the step of forming a circuit on the first carrier copper by using the copper foil with a carrier of the present invention as a first carrier copper foil. a step of forming a very thin copper layer side surface of the foil; a step of forming a resin layer on the surface of the extremely thin copper layer of the first carrier copper foil so as to cover the circuit; preparing the second carrier copper foil, a step of laminating the ultra-thin copper layer side of the second carrier copper foil on the resin layer; and laminating the second carrier copper foil on the resin layer, and then removing the carrier of the second carrier copper foil; a step of removing an extremely thin copper layer on the resin layer after stripping the carrier of the second carrier copper foil; forming a circuit on the surface of the resin layer from which the ultra-thin copper layer is removed; forming a circuit After the resin layer is removed, the carrier of the first carrier-attached copper foil is peeled off; and after the carrier of the first carrier-attached copper foil is peeled off, the ultra-thin copper layer of the first carrier-attached copper foil is removed. The surface of the extremely thin copper layer formed on the copper foil of the first carrier is covered with the resin layer Step road exposed.

於本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備形成有電路之金屬箔的步驟;以覆蓋該電路之方式將樹脂層形成在該金屬箔表面的步驟;將本發明之表面處理銅箔自表面處理層側積層在樹脂層,藉由減成法、部分加成法或改良半加成法中之任一方法將電路形成在該樹脂層上的步驟;及藉由去除該金屬箔,而使形成在該金屬箔表面被該樹脂層覆蓋之電路露出的步驟。 An embodiment of a method of manufacturing a printed wiring board according to the present invention includes the steps of: preparing a metal foil on which a circuit is formed; and forming a resin layer on a surface of the metal foil so as to cover the circuit; Surface-treated copper foil is laminated on the resin layer from the surface of the surface treatment layer, and the circuit is formed on the resin layer by any one of a subtractive method, a partial addition method or a modified semi-additive method; and by removing The metal foil is formed by exposing a circuit formed on the surface of the metal foil to be covered by the resin layer.

於本發明的印刷配線板之製造方法一實施形態,包含下述步驟:以本發明之附載體銅箔作為第1附載體銅箔,將電路形成在該第1附載體銅箔之極薄銅層側表面的步驟;以覆蓋該電路之方式將樹脂層形成在該第1附載體銅箔之該極薄銅層側表面的步驟;準備第2附載體銅箔,自 該第2附載體銅箔之極薄銅層側積層在該樹脂層,將該第2附載體銅箔之載體剝除,藉由減成法、部分加成法或改良半加成法中之任一方法將電路形成在該樹脂層上的步驟;將電路形成在該樹脂層上之後,將該第1附載體銅箔之載體剝離的步驟;及將該第1附載體銅箔之載體剝離後,去除該第1附載體銅箔之極薄銅層,藉此使形成在該第1附載體銅箔之極薄銅層側表面被該樹脂層覆蓋之電路露出的步驟。 An embodiment of the method for producing a printed wiring board according to the present invention includes the step of forming a circuit into a very thin copper of the first carrier copper foil by using the copper foil with a carrier of the present invention as the first carrier copper foil. a step of forming a layer side surface; a step of forming a resin layer on the side surface of the extremely thin copper layer of the first carrier copper foil so as to cover the circuit; preparing the second carrier copper foil, The ultra-thin copper layer side layer of the second carrier copper foil is laminated on the resin layer, and the carrier of the second carrier copper foil is peeled off by a subtractive method, a partial addition method or a modified semi-additive method. a step of forming a circuit on the resin layer by any method; a step of peeling off the carrier of the first carrier copper foil after the circuit is formed on the resin layer; and peeling off the carrier of the first carrier copper foil Thereafter, the ultra-thin copper layer of the first carrier-attached copper foil is removed, whereby the circuit formed on the surface of the ultra-thin copper layer of the first carrier-attached copper foil is exposed by the resin layer.

於使用半加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法將經剝除該載體而露出之極薄銅層全部去除的步驟;將通孔或/及盲孔(blind via)設置在藉由蝕刻去除該極薄銅層而露出之該樹脂的步驟;對含有該通孔或/及盲孔之區域進行去膠渣處理(desmear treatment)的步驟;對含有該樹脂及該通孔或/及盲孔之區域設置無電電鍍層的步驟;將鍍敷阻劑設置在該無電電鍍層上的步驟;對該鍍敷阻劑進行曝光,然後,將形成電路之區域的鍍敷阻劑去除的步驟;將電鍍層設置在經去除該鍍敷阻劑之形成該電路之區域的步驟;去除該鍍敷阻劑的步驟;藉由快速蝕刻等將位於形成該電路之區域以外之區域的無電電鍍層去除的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate After laminating the copper foil with the carrier and the insulating substrate, the carrier of the carrier copper foil is peeled off; the carrier is stripped by etching or plasma etching using an acid or the like a step of removing all of the thin copper layer; providing a through hole or/and a blind via in the step of removing the resin by removing the ultra-thin copper layer by etching; and including the via hole or/and the blind via hole a step of performing a desmear treatment; a step of providing an electroless plating layer on the region containing the resin and the through hole or/and the blind hole; and a step of disposing the plating resist on the electroless plating layer; Exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; and disposing the plating layer in a region where the plating resist is removed to form the circuit; removing the plating Step of resisting Flash etching step or the like located in the electroless plating layer region other than the region of the removal of the circuit is formed.

於使用半加成法之本發明的印刷配線板製造方法另一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;藉由使用酸等腐蝕溶液之蝕刻或電 漿等方法將經剝除該載體而露出之極薄銅層全部去除的步驟;對藉由蝕刻去除該極薄銅層而露出之該樹脂表面設置無電電鍍層的步驟;將鍍敷阻劑設置在該無電電鍍層上的步驟;對該鍍敷阻劑進行曝光,然後,將形成電路之區域的鍍敷阻劑去除的步驟;將電鍍層設置在經去除該鍍敷阻劑之形成該電路之區域的步驟;去除該鍍敷阻劑的步驟;藉由快速蝕刻等將位於形成該電路之區域以外之區域的無電電鍍層及極薄銅層去除的步驟。 Another embodiment of the method for producing a printed wiring board according to the present invention using a semi-additive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate a step of removing the carrier of the carrier copper foil after laminating the copper foil with the carrier and the insulating substrate; etching or electricity by etching the solution using an acid or the like a method of removing all of the extremely thin copper layer exposed by stripping the carrier; a step of providing an electroless plating layer on the surface of the resin exposed by etching to remove the ultra-thin copper layer; setting the plating resist a step of electrolessly plating the layer; exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; and forming the plating layer to form the circuit by removing the plating resist a step of removing the plating resist; a step of removing the electroless plating layer and the ultra-thin copper layer in a region other than the region where the circuit is formed by rapid etching or the like.

於使用改良半加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;將通孔或/及盲孔設置在經剝除該載體而露出之極薄銅層與絕緣基板的步驟;對含有該通孔或/及盲孔之區域進行去膠渣處理的步驟;對含有該通孔或/及盲孔之區域設置無電電鍍層的步驟;將鍍敷阻劑設置在經剝除該載體而露出之極薄銅層表面的步驟;於設置該鍍敷阻劑後,藉由電鍍形成電路的步驟;去除該鍍敷阻劑的步驟;藉由快速蝕刻將經去除該鍍敷阻劑而露出之極薄銅層去除的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a modified semi-additive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate a step of removing the carrier of the carrier copper foil after laminating the copper foil with the carrier substrate; and providing a through hole or/and a blind hole in the ultra-thin copper layer exposed by stripping the carrier a step of insulating the substrate; a step of performing desmear treatment on the region containing the through hole or/and the blind hole; a step of providing an electroless plating layer on the region including the through hole or/and the blind hole; setting the plating resist a step of stripping the surface of the extremely thin copper layer exposed by the carrier; a step of forming a circuit by electroplating after the plating resist is disposed; a step of removing the plating resist; and removing by rapid etching The step of removing the extremely thin copper layer exposed by the plating resist.

於使用改良半加成法之本發明的印刷配線板製造方法另一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;將鍍敷阻劑設置在經剝除該載體而露出之極薄銅層上的步驟;對該鍍敷阻劑進行曝光,然後,將形成電路之區域的鍍敷阻劑去除的步驟;將電鍍層設置在經去除該鍍敷阻劑之形成該電路之區域的步驟;去除該鍍敷阻劑的步驟;藉由快速蝕刻等將位於形 成該電路之區域以外之區域的無電電鍍層及極薄銅層去除的步驟。 Another embodiment of the method for producing a printed wiring board of the present invention using the modified semi-additive method comprises the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate a step of stripping the carrier-attached copper foil with the insulating substrate, and then removing the carrier of the carrier-attached copper foil; and disposing the plating resist on the extremely thin copper layer exposed by stripping the carrier And exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; and disposing the plating layer in a region where the plating resist is removed to form the circuit; removing the plating a step of applying a resist; it will be located by rapid etching or the like The step of removing the electroless plating layer and the ultra-thin copper layer in a region other than the region of the circuit.

於使用部分加成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;將通孔或/及盲孔設置在經剝除該載體而露出之極薄銅層與絕緣基板的步驟;對含有該通孔或/及盲孔之區域進行去膠渣處理的步驟;對該含有通孔或/及盲孔之區域賦予觸媒核的步驟;將阻蝕劑設置在經剝除該載體而露出之極薄銅層表面的步驟;對該阻蝕劑進行曝光,形成電路圖案的步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法將該極薄銅層及該觸媒核去除,形成電路的步驟;將該阻蝕劑去除的步驟;將阻焊劑或鍍敷阻劑設置在經藉由使用酸等腐蝕溶液之蝕刻或電漿等方法去除該極薄銅層及該觸媒核而露出之該絕緣基板表面的步驟;將無電電鍍層設置在未設置有該阻焊劑或鍍敷阻劑之區域的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a partial addition method comprises the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate After the carrier copper foil and the insulating substrate are laminated, the carrier of the carrier copper foil is stripped; the through hole or/and the blind hole are disposed on the extremely thin copper layer and the insulation exposed by stripping the carrier; a step of performing a desmear treatment on a region containing the via hole or/and a blind via; a step of imparting a catalyst core to the region containing the via hole or/and the blind via hole; and setting the corrosion inhibitor in the via a step of stripping the surface of the extremely thin copper layer exposed by the carrier; exposing the resist to a circuit pattern; and etching the ultra-thin copper layer by etching or plasma etching using an acid or the like The catalyst core is removed, the step of forming a circuit; the step of removing the corrosion inhibitor; and the solder resist or the plating resist is disposed on the ultrathin copper by etching or plasma using an etching solution such as an acid The layer and the catalyst core are exposed A step edge of the substrate surface; the electroless plating step is not disposed at the region of the solder resist or plating of plating resist is provided.

於使用減成法之本發明的印刷配線板製造方法一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;將通孔或/及盲孔設置在經剝除該載體而露出之極薄銅層與絕緣基板的步驟;對含有該通孔或/及盲孔之區域進行去膠渣處理的步驟;對含有該通孔或/及盲孔之區域設置無電電鍍層的步驟;將電鍍層設置在該無電電鍍層之表面的步驟;將阻蝕劑設置在該電鍍層或/及該極薄銅層之表面的步驟;對該阻蝕劑進行曝光,形成電路圖案的步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法將該極薄銅層及該 無電電鍍層及該電鍍層去除,形成電路的步驟;將該阻蝕劑去除的步驟。 An embodiment of a method for producing a printed wiring board according to the present invention using a subtractive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and stacking the copper foil with the insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the carrier of the carrier copper foil is stripped; the through hole or/and the blind via are provided on the ultra-thin copper layer and the insulating substrate exposed by stripping the carrier a step of desmear treatment of the region containing the via or/and the blind via; a step of providing an electroless plating layer to the region containing the via or/and the blind via; and placing the plating layer on the electroless a step of plating a surface; a step of disposing a corrosion inhibitor on the surface of the electroplated layer or/and the ultra-thin copper layer; exposing the resist to a circuit pattern; and etching the solution by using an acid or the like Etching or plasma, etc., the ultra-thin copper layer and the An electroless plating layer and the step of removing the plating layer to form a circuit; and the step of removing the corrosion inhibitor.

於使用減成法之本發明的印刷配線板製造方法另一實施形態,包含下述步驟:準備本發明之附載體銅箔與絕緣基板的步驟;將該附載體銅箔與絕緣基板積層的步驟;於將該附載體銅箔與絕緣基板積層後,剝除該附載體銅箔之載體的步驟;將通孔或/及盲孔設置在經剝除該載體而露出之極薄銅層與絕緣基板的步驟;對含有該通孔或/及盲孔之區域進行去膠渣處理的步驟;對含有該通孔或/及盲孔之區域設置無電電鍍層的步驟;將遮罩形成在該無電電鍍層之表面的步驟;將電鍍層設置在未形成遮罩之該無電電鍍層之表面的步驟;將阻蝕劑設置在該電鍍層或/及該極薄銅層之表面的步驟;對該阻蝕劑進行曝光,形成電路圖案的步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法將該極薄銅層及該無電電鍍層去除,形成電路的步驟;將該阻蝕劑去除的步驟。 Another embodiment of the method for producing a printed wiring board according to the present invention using the subtractive method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate After the carrier copper foil and the insulating substrate are laminated, the carrier of the carrier copper foil is stripped; the through hole or/and the blind hole are disposed on the extremely thin copper layer and the insulation exposed by stripping the carrier; a step of performing a desmear treatment on a region containing the via hole or/and a blind via; a step of providing an electroless plating layer on a region including the via hole or/and the blind via hole; forming the mask in the absence a step of electroplating a surface of the electroplated layer; a step of disposing a plating layer on a surface of the electroless plating layer not having a mask; and a step of disposing a corrosion inhibitor on a surface of the electroplated layer or/and the ultra-thin copper layer; a step of exposing the resist to form a circuit pattern; removing the ultra-thin copper layer and the electroless plating layer by etching or plasma etching using an acid or the like to form a circuit; removing the corrosion inhibitor A step of.

設置通孔或/及盲孔的步驟及其後之去膠渣步驟亦可不進行。 The step of providing a through hole or/and a blind hole and the subsequent desmear step may not be performed.

此處,使用圖式詳細地說明使用有本發明之附載體銅箔之印刷配線板之製造方法的具體例。另,此處,以具有形成有粗化處理層之極薄銅層的附載體銅箔為例進行說明,但並不限定於此,即便使用具有未形成粗化處理層之極薄銅層的附載體銅箔,亦可同樣地進行下述印刷配線板之製造方法。 Here, a specific example of a method of manufacturing a printed wiring board using the copper foil with a carrier of the present invention will be described in detail using the drawings. Here, the copper foil with a carrier having the ultra-thin copper layer in which the roughening layer is formed is described as an example, but it is not limited to this, even if it uses the ultra-thin copper layer which does not form a rough-processing layer. A method of producing a printed wiring board described below can also be carried out in the same manner as the carrier copper foil.

首先,如圖2-A所示,準備具有於表面形成有粗化處理層之極薄銅層的附載體銅箔(第1層)。 First, as shown in FIG. 2-A, a copper foil with a carrier (first layer) having an extremely thin copper layer having a roughened layer formed on its surface is prepared.

接著,如圖2-B所示,於極薄銅層之粗化處理層上塗佈阻劑,進行曝光、 顯影,將阻劑蝕刻為既定之形狀。 Next, as shown in FIG. 2-B, a resist is applied on the roughened layer of the ultra-thin copper layer to perform exposure, Development, etching the resist into a predetermined shape.

接著,如圖2-C所示,於形成電路用之鍍層後,去除阻劑,藉此形成既定形狀之電路鍍層。 Next, as shown in FIG. 2-C, after the plating for the circuit is formed, the resist is removed, thereby forming a circuit plating of a predetermined shape.

接著,如圖3-D所示,以覆蓋電路鍍層之方式(以埋沒電路鍍層之方式)於極薄銅層上設置嵌入樹脂而將樹脂層積層,接著自極薄銅層側接合其他附載體銅箔(第2層)。 Next, as shown in FIG. 3-D, a resin layer is laminated on the ultra-thin copper layer by covering the circuit plating layer (by burying the circuit plating layer), and then the other carrier is bonded from the ultra-thin copper layer side. Copper foil (layer 2).

接著,如圖3-E所示,自第2層之附載體銅箔剝離載體。 Next, as shown in Fig. 3-E, the carrier is peeled off from the copper foil with a carrier of the second layer.

接著,如圖3-F所示,於樹脂層之既定位置進行雷射開孔,使電路鍍層露出而形成盲孔。 Next, as shown in FIG. 3-F, a laser opening is performed at a predetermined position of the resin layer to expose the circuit plating layer to form a blind hole.

接著,如圖4-G所示,於盲孔中嵌入銅而形成通孔填充物(via fill)。 Next, as shown in FIG. 4-G, copper is embedded in the blind via to form a via fill.

接著,如圖4-H所示,於通孔填充物上,如上述圖2-B及圖2-C般形成電路鍍層。 Next, as shown in FIG. 4-H, a circuit plating layer is formed on the via fill material as in the above-described FIG. 2-B and FIG.

接著,如圖4-I所示,自第1層之附載體銅箔剝離載體。 Next, as shown in Fig. 4-I, the carrier was peeled off from the carrier-attached copper foil of the first layer.

接著,如圖5-J所示,藉由快速蝕刻去除兩表面之極薄銅層,而露出樹脂層內之電路鍍層之表面。 Next, as shown in FIG. 5-J, the extremely thin copper layer on both surfaces is removed by rapid etching to expose the surface of the circuit plating layer in the resin layer.

接著,如圖5-K所示,在樹脂層內之電路鍍層上形成凸塊,於該焊料上形成銅柱。以上述方式製作使用有本發明之附載體銅箔的印刷配線板。 Next, as shown in FIG. 5-K, bumps are formed on the circuit plating layer in the resin layer, and copper pillars are formed on the solder. A printed wiring board using the copper foil with a carrier of the present invention was produced in the above manner.

上述其他附載體銅箔(第2層)可使用本發明之附載體銅箔,可使用以往之附載體銅箔,進而亦可使用通常之銅箔。又,於圖4-H所示之第2層的電路上,可進一步形成1層或複數層電路,亦可藉由半加成法、減成法、部分加成法或改良半加成法任一方法進行該等電路形成。 As the other copper foil (second layer) with a carrier, the copper foil with a carrier of the present invention can be used, and a conventional copper foil with a carrier can be used, and a usual copper foil can also be used. Further, in the circuit of the second layer shown in FIG. 4-H, a one-layer or a plurality of layers may be further formed, or may be formed by a semi-additive method, a subtractive method, a partial addition method or a modified semi-additive method. Either method performs such circuit formation.

又,前述被用於第1層之附載體銅箔,在該附載體銅箔之載 體側表面亦可具有基板。被用於第1層之附載體銅箔因具有該基板或樹脂層而會獲得支持,不易產生皺摺,因此具有提升生產性之優點。另,前述基板若為具有支持被用於前述第1層之附載體銅箔的效果者,則可使用所有的基板。例如可使用本案說明書記載之載體、預浸體、樹脂層或公知的載體、預浸體、樹脂層、金屬板、金屬箔、無機化合物之板、無機化合物之箔、有機化合物之板、有機化合物之箔作為前述基板。 Further, the above-mentioned copper foil with a carrier used for the first layer is carried on the copper foil with the carrier The body side surface may also have a substrate. The copper foil with a carrier used for the first layer is supported by the substrate or the resin layer, and wrinkles are less likely to occur, so that productivity is improved. Further, if the substrate has an effect of supporting a copper foil with a carrier to be used for the first layer, all of the substrates can be used. For example, a carrier, a prepreg, a resin layer, or a known carrier, a prepreg, a resin layer, a metal plate, a metal foil, a plate of an inorganic compound, a foil of an inorganic compound, an organic compound plate, or an organic compound described in the present specification can be used. The foil is used as the aforementioned substrate.

將基板形成在載體側表面之時機並無特別限制,但必須於剝離載體之前形成。尤佳於將樹脂層形成在該附載體銅箔之該極薄銅層側表面的步驟之前形成,更佳於將電路形成在附載體銅箔之該極薄銅層側表面的步驟之前形成。 The timing at which the substrate is formed on the side surface of the carrier is not particularly limited, but must be formed before the carrier is peeled off. It is particularly preferable to form the resin layer before the step of forming the side surface of the ultra-thin copper layer of the carrier copper foil, more preferably before the step of forming the circuit on the side surface of the ultra-thin copper layer of the carrier copper foil.

另,嵌入樹脂(resin)可使用公知之樹脂、預浸體。例如,可使用BT(雙順丁烯二醯亞胺三)樹脂或為含浸有BT樹脂之玻璃布的預浸體、Ajinomoto Fine-Techno股份有限公司製ABF膜或ABF。又,前述嵌入樹脂(resin)可使用本說明書記載之樹脂層及/或樹脂及/或預浸體。 Further, a well-known resin or prepreg can be used as the resin. For example, BT (bis-s-butylene diimide III) can be used. The resin is a prepreg of a glass cloth impregnated with a BT resin, an ABF film manufactured by Ajinomoto Fine-Techno Co., Ltd., or ABF. Further, the resin layer and/or the resin and/or the prepreg described in the present specification can be used as the resin.

又,本發明之印刷配線板製造方法,亦可為包含下述步驟之印刷配線板製造方法(無核心法(coreless method)):將本發明之附載體銅箔之前述極薄銅層側表面或前述載體側表面與樹脂基板積層的步驟;在和與前述樹脂基板積層之極薄銅層側表面或前述載體側表面相反之側的附載體銅箔之表面,設置至少1次樹脂層與電路之2層的步驟;及於形成前述樹脂層及電路之2層後,自前述附載體銅箔剝離前述載體或前述極薄銅層的步驟。關於該無核心法,作為具體例,首先,將本發明之附載體銅箔的極薄銅層側表面或載體側表面與樹脂基板積層。然後,在和與樹脂基板積 層之極薄銅層側表面或前述載體側表面相反之側的附載體銅箔之表面,形成樹脂層。亦可於形成在載體側表面之樹脂層,進一步自載體側積層另外之附載體銅箔。於此情形時,係成為下述構成:以樹脂基板為中心,在該樹脂基板之兩表面側,以載體/中間層/極薄銅層之順序或極薄銅層/中間層/載體之順序積層有附載體銅箔。亦可在兩端極薄銅層或載體露出之表面,設置另外之樹脂層,並進一步設置銅層後,對該銅層進行加工,藉此形成電路。並且,亦可在該電路上,以將該電路嵌入之方式設置另外之樹脂層。又,亦可設置1次以上此種電路及樹脂層之形成(增層(buildup)法)。然後,可對以上述方式形成之積層體,將各附載體銅箔之極薄銅層或載體自載體或極薄銅層剝離而製作無核心基板。另,在樹脂基板之兩面設置附載體銅箔由於生產性優異,故較佳。 Moreover, the method for producing a printed wiring board according to the present invention may be a method of manufacturing a printed wiring board (coreless method) including the following steps: the surface of the ultra-thin copper layer of the copper foil with a carrier of the present invention Or the step of laminating the side surface of the carrier with the resin substrate; and providing the resin layer and the circuit at least once on the surface of the copper foil with the carrier opposite to the side of the ultra-thin copper layer side of the resin substrate or the side surface of the carrier And the step of forming the two layers of the resin layer and the circuit, and then peeling off the carrier or the ultra-thin copper layer from the copper foil with a carrier. In the coreless method, as a specific example, first, the ultra-thin copper layer side surface or the carrier side surface of the copper foil with a carrier of the present invention is laminated with a resin substrate. Then, in and with the resin substrate The surface of the carrier-attached copper foil on the side of the extremely thin copper layer of the layer or the side opposite to the side of the carrier side described above forms a resin layer. Further, a resin layer formed on the side surface of the carrier may be further laminated with a further carrier copper foil from the side of the carrier. In this case, the resin substrate is centered on the both surface sides of the resin substrate in the order of the carrier/intermediate layer/very thin copper layer or the order of the ultra-thin copper layer/intermediate layer/carrier. The laminate has a carrier copper foil. Alternatively, an additional resin layer may be provided on the surface of the extremely thin copper layer or the carrier exposed at both ends, and after further providing a copper layer, the copper layer may be processed to form an electric circuit. Further, another resin layer may be provided on the circuit in such a manner that the circuit is embedded. Further, the formation of such a circuit and the resin layer (buildup method) may be provided one or more times. Then, the ultra-thin copper layer or the carrier of each of the carrier-attached copper foils can be peeled off from the carrier or the ultra-thin copper layer to form a coreless substrate. Further, it is preferable to provide a copper foil with a carrier on both surfaces of the resin substrate because of its excellent productivity.

另,於上述無核心基板之製造方法,當藉由以樹脂將附載體銅箔之端面的一部份或全部覆蓋,而以增層法製造印刷配線板時,可防止化學液向中間層滲透,可防止因化學液滲透導致極薄銅層與載體分離,而可提升產率。此處所使用之「將附載體銅箔之端面的一部份或全部覆蓋之樹脂」,可使用能夠用於樹脂層之樹脂。另,當將載體與極薄銅層分離時,附載體銅箔之端面被樹脂覆蓋的部分,必須要藉由切割等去除。又,於上述無核心基板之製造方法,於俯視附載體銅箔時,附載體銅箔之積層部分的外緣至少一部份亦可被樹脂或預浸體覆蓋。又,以上述無核心基板之製造方法形成的積層體,亦可使一對附載體銅箔以可相互分離之方式接觸而構成。又,於該附載體銅箔俯視時,亦可為附載體銅箔之積層部分的外緣整體被樹脂或預浸體覆蓋而成者。藉由形成為此種構成,而於俯視附載體 銅箔時,附載體銅箔之積層部分被樹脂或預浸體覆蓋,而可防止其他構件自此部分之側方向亦即相對於積層方向為横方向的撞擊,結果可減少處理中之附載體銅箔彼此的剝離。又,藉由以樹脂或預浸體覆蓋成不使附載體銅箔之積層部分的外緣露出,而可防止如前述之化學液處理步驟中化學液滲入此界面,可防止附載體銅箔之腐蝕或侵蝕。另,當自一對之附載體銅箔分離一片附載體銅箔時,或當分離附載體銅箔之載體與銅箔(極薄銅層)時,必須藉由切割等去除被樹脂或預浸體覆蓋之附載體銅箔的積層部分。 Further, in the above method for manufacturing a coreless substrate, when a printed wiring board is produced by a build-up method by covering a part or all of the end faces of the copper foil with a carrier with a resin, the chemical liquid can be prevented from penetrating into the intermediate layer. It can prevent the separation of the extremely thin copper layer from the carrier due to the penetration of the chemical liquid, and can improve the yield. As the resin used to cover a part or all of the end face of the carrier copper foil, a resin which can be used for the resin layer can be used. Further, when the carrier is separated from the ultra-thin copper layer, the portion of the surface of the copper foil with the carrier which is covered with the resin must be removed by cutting or the like. Further, in the method for producing a coreless substrate, at least a portion of the outer edge of the laminated portion of the carrier-attached copper foil may be covered with a resin or a prepreg when the carrier copper foil is placed in a plan view. Moreover, the laminated body formed by the above-described method for producing a coreless substrate may be configured such that a pair of copper foils with a carrier can be brought into contact with each other. Further, in the plan view of the copper foil with a carrier, the entire outer edge of the laminated portion of the copper foil with a carrier may be covered with a resin or a prepreg. By forming such a configuration, the carrier is provided in a plan view. In the case of copper foil, the laminated portion of the copper foil with the carrier is covered with the resin or the prepreg, and the other members can be prevented from colliding in the lateral direction from the side of the portion, that is, in the lateral direction with respect to the lamination direction, and as a result, the carrier in the process can be reduced. Peeling of the copper foils from each other. Further, by covering with a resin or a prepreg so as not to expose the outer edge of the laminated portion of the copper foil with a carrier, it is possible to prevent the chemical liquid from penetrating into the interface in the chemical liquid treatment step as described above, thereby preventing the copper foil of the carrier from being attached. Corrosion or erosion. In addition, when a carrier copper foil is separated from a pair of carrier copper foils, or when a carrier with a carrier copper foil and a copper foil (very thin copper layer) are separated, it is necessary to remove the resin or prepreg by cutting or the like. The laminated portion of the carrier-attached copper foil covered by the body.

[實施例] [Examples]

以下揭示本發明之實施例,惟此等實施例係提供用以更加清楚理解本發明及其優點者,並無限定發明之意圖。 The embodiments of the present invention are disclosed below, but the embodiments are provided to provide a clearer understanding of the present invention and its advantages.

準備以下之銅箔主體層(bulk layer)(原箔)),作為實施例1~11及比較例1~4。 The following copper foil bulk layer (raw foil) was prepared as Examples 1 to 11 and Comparative Examples 1 to 4.

‧一般電解原箔 ‧General electrolytic original foil

以銅濃度80~120g/L、硫酸濃度80~120g/L、氯化物離子濃度30~100ppm、膠濃度1~5ppm、電解液溫度57~62℃之硫酸銅電解液作為電解銅鍍浴,使流經陽極與陰極(銅箔用電沈積用金屬製滾筒)間之電解液的線速度為1.5~2.5m/秒,以電流密度70A/dm2製作厚度12μm(重量厚度95g/m2)之一般電解原箔。 Copper sulphate electrolyte with copper concentration of 80~120g/L, sulfuric acid concentration of 80~120g/L, chloride ion concentration of 30~100ppm, glue concentration of 1-5ppm and electrolyte temperature of 57~62°C is used as electrolytic copper plating bath. The linear velocity of the electrolyte flowing between the anode and the cathode (metal drum for electrodeposition for copper foil) was 1.5 to 2.5 m/sec, and the thickness was 12 μm (weight: 95 g/m 2 ) at a current density of 70 A/dm 2 . Generally electrolytic raw foil.

‧兩面平坦電解原箔 ‧ two sides flat electrolytic original foil

以銅濃度80~120g/L、硫酸濃度80~120g/L、氯化物離子濃度30~ 100ppm、調平劑1(雙(3-磺丙基)二硫化物):10~30ppm、調平劑2(胺化合物):10~30ppm、電解液溫度57~62℃之硫酸銅電解液作為電解銅鍍浴,使流經陽極與陰極(銅箔用電沈積用金屬製滾筒)間之電解液的線速度為1.5~2.5m/秒,以電流密度70A/dm2製作厚度12μm(重量厚度95g/m2)之兩面平坦電解原箔。上述之胺化合物係可使用下述化學式之胺化合物。 Copper concentration 80~120g/L, sulfuric acid concentration 80~120g/L, chloride ion concentration 30~100ppm, leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm, leveling agent 2 (amine compound): a copper sulfate electrolyte solution having an electrolyte temperature of 57 to 62 ° C as an electrolytic copper plating bath, and flowing an electrolyte between the anode and the cathode (a metal roller for electrodeposition for copper foil) The linear velocity was 1.5 to 2.5 m/sec, and a flat electrolytic original foil having a thickness of 12 μm (weight: 95 g/m 2 ) was produced at a current density of 70 A/dm 2 . As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之一群中者。) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)

‧附載體極薄原銅箔(raw copper foil) ‧With carrier very thin raw copper foil

以前述之兩面平坦電解原箔製造條件,製作厚度18μm之兩面平坦電解原箔。以該原箔作為銅箔載體,藉由下述方法,形成剝離層、表1所記載之厚度的極薄銅層,得到附載體極薄銅箔。 A two-face flat electrolytic raw foil having a thickness of 18 μm was produced under the above-described conditions for the production of the flat electrolytic original foil on both sides. Using the original foil as a copper foil carrier, an ultrathin copper layer having a thickness of the peeling layer and the thickness described in Table 1 was formed by the following method to obtain an ultra-thin copper foil with a carrier.

(1)Ni層(剝離層:基底鍍敷1) (1) Ni layer (peeling layer: base plating 1)

對銅箔載體之S面,以下述條件,於捲對捲(roll-to-roll)型連續鍍敷 生產線進行電鍍,藉此形成1000μg/dm2附著量之Ni層。具體之鍍敷條件如下。 The S-face of the copper foil carrier was subjected to electroplating on a roll-to-roll type continuous plating line under the following conditions, thereby forming a Ni layer having a deposition amount of 1000 μg/dm 2 . The specific plating conditions are as follows.

硫酸鎳:270~280g/L Nickel sulfate: 270~280g/L

氯化鎳:35~45g/L Nickel chloride: 35~45g/L

乙酸鎳:10~20g/L Nickel acetate: 10~20g/L

硼酸:30~40g/L Boric acid: 30~40g/L

光澤劑:糖精、丁炔二醇(butynediol)等 Gloss: saccharin, butynediol, etc.

十二基硫酸鈉:55~75ppm Sodium dodecyl sulfate: 55~75ppm

pH:4~6 pH: 4~6

浴溫:55~65℃ Bath temperature: 55~65°C

電流密度:10A/dm2 Current density: 10A/dm 2

(2)Cr層(剝離層:基底鍍敷2) (2) Cr layer (peeling layer: base plating 2)

接著,對(1)所形成之Ni層表面進行水洗及酸洗後,繼而於捲對捲型連續鍍敷生產線上,以下述條件進行電解鉻酸處理,使11μg/dm2附著量之Cr層附著在Ni層上。 Next, the surface of the Ni layer formed in (1) was washed with water and pickled, and then subjected to electrolytic chromic acid treatment on a roll-to-roll continuous plating line under the following conditions to form a Cr layer of 11 μg/dm 2 . Attached to the Ni layer.

重鉻酸鉀:1~10g/L,鋅:0g/L Potassium dichromate: 1~10g/L, zinc: 0g/L

pH:7~10 pH: 7~10

液溫:40~60℃ Liquid temperature: 40~60°C

電流密度:2A/dm2 Current density: 2A/dm 2

(3)極薄銅層 (3) Very thin copper layer

接著,對(2)所形成之Cr層表面進行水洗及酸洗後,繼而於捲對捲型連續鍍敷生產線上,以下述條件進行電鍍,藉此將厚度1.5μm、2μm、3μm、或5μm之極薄銅層形成在Cr層上,製得附載體極薄銅箔。 Next, after the surface of the Cr layer formed in (2) is washed with water and pickled, and then subjected to electroplating on a roll-to-roll continuous plating line under the following conditions, the thickness is 1.5 μm, 2 μm, 3 μm, or 5 μm. An extremely thin copper layer is formed on the Cr layer to obtain an extremely thin copper foil with a carrier.

銅濃度:80~120g/L Copper concentration: 80~120g/L

硫酸濃度:80~120g/L Sulfuric acid concentration: 80~120g/L

氯化物離子濃度:30~100ppm Chloride ion concentration: 30~100ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

另,使用下述之胺化合物作為調平劑2。 Further, the following amine compound was used as the leveling agent 2.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之一群中者。) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)

電解液溫度:50~80℃ Electrolyte temperature: 50~80°C

電流密度:100A/dm2 Current density: 100A/dm 2

接著,對上述原箔與樹脂基材接合之側的表面即M面(霧面(matte surface))或S面(亮面),依序實施粗化處理、阻隔處理、防鏽 處理、塗佈矽烷偶合材之各表面處理。各處理條件如下。 Next, the surface of the side where the original foil and the resin substrate are joined, that is, the M surface (matte surface) or the S surface (light surface), is subjected to roughening treatment, barrier treatment, and rust prevention in this order. Each surface treatment of the decane coupling material is treated and coated. The processing conditions are as follows.

〔粗化處理〕 [Roughening treatment]

‧球狀粗化(通常): ‧Spherical roughening (usually):

對前述之各種原箔的M面或S面,以下述條件進行粗化處理。 The M surface or the S surface of each of the above-mentioned original foils was subjected to a roughening treatment under the following conditions.

(電解液組成) (electrolyte composition)

Cu:20~30g/L(以硫酸銅5水合物添加,以下相同) Cu: 20~30g/L (added with copper sulfate 5 hydrate, the same below)

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

砷:1.0~2.0g/L Arsenic: 1.0~2.0g/L

(電解液溫) (electrolyte temperature)

35~40℃ 35~40°C

(電流條件) (current condition)

電流密度:70A/dm2 Current density: 70A/dm 2

為了防止粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件實施粗化處理之各種銅箔的M面、附載體極薄銅箔的表面進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the coarsening particles from falling off and to improve the peeling strength, the surface of the ultra-thin copper foil of the various copper foils subjected to the roughening treatment under the above conditions is subjected to a copper electrolytic bath composed of sulfuric acid-copper sulfate. Cover plating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:29A/dm2 Current density: 29A/dm 2

‧微細粗化(1): ‧Micron roughening (1):

對前述之各種原箔的M面、附載體極薄原銅箔的表面,以下述條件進行粗化處理。 The surface of the M-surface of the various original foils described above and the surface of the ultra-thin copper foil with the carrier were subjected to a roughening treatment under the following conditions.

(電解液組成) (electrolyte composition)

Cu濃度:10~20g/L Cu concentration: 10~20g/L

H2SO4濃度:80~120g/L H 2 SO 4 concentration: 80~120g/L

鎢濃度:1~10mg/L(以鎢酸鈉2水合物添加) Tungsten concentration: 1~10mg/L (added with sodium tungstate 2 hydrate)

十二基硫酸鈉濃度:1~10mg/L Sodium dodecyl sulfate concentration: 1~10mg/L

(電解液溫) (electrolyte temperature)

35~45℃ 35~45°C

(電流條件) (current condition)

為了得到既定之面粗糙度Sz,而以四段式賦予電流。 In order to obtain a predetermined surface roughness Sz, a current is given in a four-stage manner.

電流密度如下。 The current density is as follows.

第一段:30A/dm2 First paragraph: 30A/dm 2

第二段:10A/dm2 Second paragraph: 10A/dm 2

第三段:30A/dm2 Third paragraph: 30A/dm 2

第四段:10A/dm2 Fourth paragraph: 10A/dm 2

為了防止粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件實施粗化處理之各種銅箔的M面、附 載體極薄銅箔的表面進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the coarsening particles from falling off and to improve the peeling strength, a copper electrolytic bath composed of sulfuric acid-copper sulfate is used for the M surface of the various copper foils subjected to the roughening treatment under the above conditions. The surface of the carrier ultra-thin copper foil is covered and plated. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:41A/dm2 Current density: 41A/dm 2

‧微細粗化(2): ‧Micron roughening (2):

對前述之附載體極薄原銅箔的表面,以下述條件進行粗化處理。 The surface of the above-mentioned carrier-attached ultra-thin copper foil was subjected to a roughening treatment under the following conditions.

(電解液組成) (electrolyte composition)

Cu濃度:10~20g/L Cu concentration: 10~20g/L

H2SO4濃度:80~120g/L H 2 SO 4 concentration: 80~120g/L

鎢濃度:1~10mg/L(以鎢酸鈉2水合物添加) Tungsten concentration: 1~10mg/L (added with sodium tungstate 2 hydrate)

十二基硫酸鈉濃度:1~10mg/L Sodium dodecyl sulfate concentration: 1~10mg/L

(電解液溫) (electrolyte temperature)

35~45℃ 35~45°C

(電流條件) (current condition)

為了得到既定之面粗糙度Sz,而應用二段式。 In order to obtain a predetermined surface roughness Sz, a two-stage equation is applied.

電流密度如下。 The current density is as follows.

第一段:50A/dm2 First paragraph: 50A/dm 2

第二段:10A/dm2 Second paragraph: 10A/dm 2

為了防止粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件實施粗化處理之各種銅箔的M面、附載體極薄銅箔的表面進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the coarsening particles from falling off and to improve the peeling strength, the surface of the ultra-thin copper foil of the various copper foils subjected to the roughening treatment under the above conditions is subjected to a copper electrolytic bath composed of sulfuric acid-copper sulfate. Cover plating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:41A/dm2 Current density: 41A/dm 2

‧微細粗化(3): ‧Micron roughening (3):

對前述之兩面平坦電解原箔的M面及附載體極薄原銅箔的表面,以下述條件進行粗化處理。 The surface of the M surface of the flat electrodeposited original foil and the surface of the carrier-attached ultra-thin copper foil were subjected to roughening treatment under the following conditions.

(電解液組成) (electrolyte composition)

Cu:10~20g/L Cu: 10~20g/L

Co:1~10g/L Co: 1~10g/L

Ni:1~10g/L Ni: 1~10g/L

pH:1~4 pH: 1~4

(電解液溫度) (electrolyte temperature)

40~50℃ 40~50°C

(電流條件) (current condition)

電流密度:25A/dm2 Current density: 25A/dm 2

(鍍敷結束後於鍍液中的浸漬時間) (immersion time in the plating solution after plating)

為了得到既定之面粗糙度Sz,使之在5秒以內。 In order to obtain the predetermined surface roughness Sz, it is within 5 seconds.

對經以上述條件實施粗化處理之兩面平坦銅箔的M面,及附載體極薄銅箔的表面,進行Co-Ni的覆蓋鍍敷。覆蓋鍍敷條件如下。 Co-Ni coating plating was performed on the M surface of the flat copper foil on both sides subjected to the roughening treatment under the above conditions, and the surface of the ultra-thin copper foil with the carrier. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Co:1~30g/L Co: 1~30g/L

Ni:1~30g/L Ni: 1~30g/L

pH:1.0~3.5 pH: 1.0~3.5

(電解液溫) (electrolyte temperature)

30~80℃ 30~80°C

(電流條件) (current condition)

電流密度:5.0A/dm2 Current density: 5.0A/dm 2

‧微細粗化(4): ‧Micron roughening (4):

對前述之附載體極薄原銅箔的表面,以下述條件進行形成第一次粒子與第二次粒子之粗化處理。 The surface of the above-mentioned carrier-attached ultra-thin copper foil was subjected to roughening treatment of the first-order particles and the second-order particles under the following conditions.

形成第一次粒子: Form the first particle:

(電解液組成) (electrolyte composition)

Cu濃度:10~20g/L Cu concentration: 10~20g/L

H2SO4濃度:80~120g/L H 2 SO 4 concentration: 80~120g/L

鎢濃度:1~10mg/L(以鎢酸鈉2水合物添加) Tungsten concentration: 1~10mg/L (added with sodium tungstate 2 hydrate)

十二基硫酸鈉濃度:1~10mg/L Sodium dodecyl sulfate concentration: 1~10mg/L

(電解液溫) (electrolyte temperature)

35~45℃ 35~45°C

(電流條件) (current condition)

為了得到既定之面粗糙度Sz,而應用二段式。 In order to obtain a predetermined surface roughness Sz, a two-stage equation is applied.

電流密度如下。 The current density is as follows.

第一段:50A/dm2 First paragraph: 50A/dm 2

第二段:10A/dm2 Second paragraph: 10A/dm 2

為了防止第一次粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件形成第一次粗化粒子之附載體極薄銅箔的表面,進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the first roughening of the particles from falling off and the peeling strength, the copper electrolytic bath composed of sulfuric acid-copper sulfate is applied to the surface of the ultra-thin copper foil with the carrier which forms the first roughened particles under the above conditions. Cover plating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:41A/dm2 Current density: 41A/dm 2

形成第一次粒子: Form the first particle:

接著,進行用以在附載體極薄銅箔之第一次粗化粒子上形成第二次粗 化粒子的粗化處理。 Next, a second thickening is performed on the first roughened particles of the ultra-thin copper foil with the carrier. The roughening treatment of the particles.

(電解液組成) (electrolyte composition)

Cu:10~20g/L Cu: 10~20g/L

Co:1~10g/L Co: 1~10g/L

Ni:1~10g/L Ni: 1~10g/L

pH:1~4 pH: 1~4

(電解液溫度) (electrolyte temperature)

40~50℃ 40~50°C

(電流條件) (current condition)

電流密度:25A/dm2 Current density: 25A/dm 2

(鍍敷結束後於鍍液中之浸漬時間) (immersion time in the plating solution after plating)

為了得到既定之面粗糙度Sz,使之在5秒以內。 In order to obtain the predetermined surface roughness Sz, it is within 5 seconds.

對經以上述條件實施第二次粒子粗化處理之附載體極薄銅箔的表面,進行Co-Ni之覆蓋鍍敷。覆蓋鍍敷條件如下。 The surface of the ultra-thin copper foil with a carrier subjected to the second particle roughening treatment under the above conditions was subjected to Co-Ni coating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Co:1~30g/L Co: 1~30g/L

Ni:1~30g/L Ni: 1~30g/L

pH:1.0~3.5 pH: 1.0~3.5

(電解液溫) (electrolyte temperature)

30~80℃ 30~80°C

(電流條件) (current condition)

電流密度:5.0A/dm2 Current density: 5.0A/dm 2

‧微細粗化(5): ‧Micron roughening (5):

對前述之附載體極薄原銅箔的表面,以下述條件進行形成第一次粒子與第二次粒子之粗化處理。 The surface of the above-mentioned carrier-attached ultra-thin copper foil was subjected to roughening treatment of the first-order particles and the second-order particles under the following conditions.

形成第一次粒子: Form the first particle:

(電解液組成) (electrolyte composition)

Cu濃度:10~20g/L Cu concentration: 10~20g/L

H2SO4濃度:80~120g/L H 2 SO 4 concentration: 80~120g/L

鎢濃度:1~10mg/L(以鎢酸鈉2水合物添加) Tungsten concentration: 1~10mg/L (added with sodium tungstate 2 hydrate)

十二基硫酸鈉濃度:1~10mg/L Sodium dodecyl sulfate concentration: 1~10mg/L

(電解液溫) (electrolyte temperature)

35~45℃ 35~45°C

(電流條件) (current condition)

為了得到既定之面粗糙度Sz,而應用二段式。電流密度如下。 In order to obtain a predetermined surface roughness Sz, a two-stage equation is applied. The current density is as follows.

第一段:20A/dm2 First paragraph: 20A/dm 2

第二段:10A/dm2 Second paragraph: 10A/dm 2

為了防止第一次粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件形成第一次粗化粒子之附載體極薄銅箔的表面,進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the first roughening of the particles from falling off and the peeling strength, the copper electrolytic bath composed of sulfuric acid-copper sulfate is applied to the surface of the ultra-thin copper foil with the carrier which forms the first roughened particles under the above conditions. Cover plating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:41A/dm2 Current density: 41A/dm 2

形成第二次粒子: Form the second particle:

接著,進行用以在附載體極薄銅箔之第一次粗化粒子上形成第二次粗化粒子的粗化處理。 Next, a roughening treatment for forming the second roughened particles on the first roughened particles of the ultra-thin copper foil with the carrier is performed.

(電解液組成) (electrolyte composition)

Cu:10~20g/L Cu: 10~20g/L

Co:1~10g/L Co: 1~10g/L

Ni:1~10g/L Ni: 1~10g/L

pH:1~4 pH: 1~4

(電解液溫度) (electrolyte temperature)

40~50℃ 40~50°C

(電流條件) (current condition)

電流密度:25A/dm2 Current density: 25A/dm 2

(鍍敷結束後於鍍液中之浸漬時間) (immersion time in the plating solution after plating)

為了得到既定之面粗糙度Sz,使之為15~20秒。 In order to obtain a predetermined surface roughness Sz, it is 15 to 20 seconds.

對經以上述條件實施第二次粒子粗化處理之附載體極薄銅箔的表面,進行Co-Ni之覆蓋鍍敷。覆蓋鍍敷條件如下。 The surface of the ultra-thin copper foil with a carrier subjected to the second particle roughening treatment under the above conditions was subjected to Co-Ni coating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Co:1~30g/L Co: 1~30g/L

Ni:1~30g/L Ni: 1~30g/L

pH:1.0~3.5 pH: 1.0~3.5

(電解液溫) (electrolyte temperature)

30~80℃ 30~80°C

(電流條件) (current condition)

電流密度:5.0A/dm2 Current density: 5.0A/dm 2

‧微細粗化(6): ‧Micron roughening (6):

對前述之附載體極薄原銅箔的表面,以下述條件進行形成第一次粒子與第二次粒子之粗化處理。 The surface of the above-mentioned carrier-attached ultra-thin copper foil was subjected to roughening treatment of the first-order particles and the second-order particles under the following conditions.

形成第一次粒子: Form the first particle:

(電解液組成) (electrolyte composition)

Cu濃度:10~20g/L Cu concentration: 10~20g/L

H2SO4濃度:80~120g/L H 2 SO 4 concentration: 80~120g/L

鎢濃度:1~10mg/L(以鎢酸鈉2水合物添加) Tungsten concentration: 1~10mg/L (added with sodium tungstate 2 hydrate)

十二基硫酸鈉濃度:1~10mg/L Sodium dodecyl sulfate concentration: 1~10mg/L

(電解液溫) (electrolyte temperature)

35~45℃ 35~45°C

(電流條件) (current condition)

為了得到既定之面粗糙度Sz,而應用三段式。電流密度如下。 In order to obtain a predetermined surface roughness Sz, a three-stage equation is applied. The current density is as follows.

第一段:25A/dm2 First paragraph: 25A/dm 2

第二段:10A/dm2 Second paragraph: 10A/dm 2

第三段:5A/dm2 Third paragraph: 5A/dm 2

為了防止第一次粗化粒子脫落與提升剝離強度,係於由硫酸-硫酸銅構成之銅電解浴,對經以上述條件形成第一次粗化粒子之附載體極薄銅箔的表面,進行覆蓋鍍敷。覆蓋鍍敷條件如下。 In order to prevent the first roughening of the particles from falling off and the peeling strength, the copper electrolytic bath composed of sulfuric acid-copper sulfate is applied to the surface of the ultra-thin copper foil with the carrier which forms the first roughened particles under the above conditions. Cover plating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Cu:40~50g/L Cu: 40~50g/L

H2SO4:80~120g/L H 2 SO 4 : 80~120g/L

(電解液溫) (electrolyte temperature)

43~47℃ 43~47°C

(電流條件) (current condition)

電流密度:41A/dm2 Current density: 41A/dm 2

形成第二次粒子: Form the second particle:

接著,進行用以在附載體極薄銅箔之第一次粗化粒子上形成第二次粗化粒子的粗化處理。 Next, a roughening treatment for forming the second roughened particles on the first roughened particles of the ultra-thin copper foil with the carrier is performed.

(電解液組成) (electrolyte composition)

Cu:10~20g/L Cu: 10~20g/L

Co:1~10g/L Co: 1~10g/L

Ni:1~10g/L Ni: 1~10g/L

pH:1~4 pH: 1~4

(電解液溫度) (electrolyte temperature)

40~50℃ 40~50°C

(電流條件) (current condition)

電流密度:25A/dm2 Current density: 25A/dm 2

(鍍敷結束後於鍍液中之浸漬時間) (immersion time in the plating solution after plating)

為了得到既定之面粗糙度Sz,使之為5~10秒。 In order to obtain the predetermined surface roughness Sz, it is 5 to 10 seconds.

對經以上述條件實施第二次粒子粗化處理之附載體極薄銅箔的表面,進行Co-Ni之覆蓋鍍敷。覆蓋鍍敷條件如下。 The surface of the ultra-thin copper foil with a carrier subjected to the second particle roughening treatment under the above conditions was subjected to Co-Ni coating. The plating conditions are as follows.

(電解液組成) (electrolyte composition)

Co:1~30g/L Co: 1~30g/L

Ni:1~30g/L Ni: 1~30g/L

pH:1.0~3.5 pH: 1.0~3.5

(電解液溫) (electrolyte temperature)

30~80℃ 30~80°C

(電流條件) (current condition)

電流密度:5.0A/dm2 Current density: 5.0A/dm 2

〔阻隔(耐熱)處理〕 [blocking (heat resistant) treatment]

以下述條件進行阻隔(耐熱)處理,形成黃銅鍍敷層或鋅-鎳合金鍍敷層。 The barrier (heat-resistant) treatment was carried out under the following conditions to form a brass plating layer or a zinc-nickel alloy plating layer.

實施例2、6;比較例2之阻隔層(鋅-鎳鍍敷)形成條件: Examples 2, 6; Comparative Example 2 barrier layer (zinc-nickel plating) formation conditions:

使用添加有Ni:10g/L~30g/L、Zn:1g/L~15g/L、硫酸(H2SO4):1g/L~12g/L、氯化物離子:0g/L~5g/L之鍍浴,以電流密度1.3A/dm2 對形成有粗化處理層之M面賦予鍍敷電量5.5As/dm2Ni: 10g/L~30g/L, Zn: 1g/L~15g/L, sulfuric acid (H 2 SO 4 ): 1g/L~12g/L, chloride ion: 0g/L~5g/L the plating bath at a current density of 1.3A / dm 2 M formed with a roughened surface layer of imparting charge plating 5.5As / dm 2.

實施例8;比較例3、4之阻隔層(黃銅鍍敷)形成條件: Example 8; Comparative Example 3, 4 barrier layer (brass plating) formation conditions:

使用銅濃度50~80g/L、鋅濃度2~10g/L、氫氧化鈉濃度50~80g/L、氰化鈉濃度5~30g/L、溫度60~90℃之黃銅鍍浴,以電流密度5~10A/dm2(多段處理)對形成有粗化處理層之M面賦予鍍敷電量30As/dm2Use a brass plating bath with a copper concentration of 50-80 g/L, a zinc concentration of 2-10 g/L, a sodium hydroxide concentration of 50-80 g/L, a sodium cyanide concentration of 5-30 g/L, and a temperature of 60-90 °C. The density of 5 to 10 A/dm 2 (multi-stage treatment) imparts a plating amount of 30 As/dm 2 to the M surface on which the roughened layer is formed.

〔防鏽處理〕 [Anti-rust treatment]

以下述條件進行防鏽處理(鉻酸處理),形成防鏽處理層。 The rust-preventing treatment (chromic acid treatment) was carried out under the following conditions to form a rust-preventing treatment layer.

(鉻酸鹽條件)於CrO3:2.5g/L、Zn:0.7g/L、Na2SO4:10g/L、pH4.8、54℃之鉻酸鹽浴,施予0.7As/dm2之電量。並且,於結束在鉻酸鹽浴之防鏽處理後,隨即以液體噴淋配管,使用相同之鉻酸鹽浴對粗化處理面整面進行噴淋。 (Chromate conditions) in a chromate bath of CrO 3 : 2.5 g / L, Zn: 0.7 g / L, Na 2 SO 4 : 10 g / L, pH 4.8, 54 ° C, 0.7 As / dm 2 The amount of electricity. Then, after the rust-preventing treatment of the chromate bath was completed, the entire surface of the roughened surface was sprayed with the same chromate bath as a liquid spray pipe.

〔矽烷偶合材塗佈〕 [decane coupling material coating]

對銅箔之粗化處理面,噴灑含有0.2~2%之烷氧基矽烷(alkoxysilane)之pH7~8的溶液,藉此進行矽烷偶合材塗佈處理。 The roughened surface of the copper foil was sprayed with a solution of pH 7-8 containing 0.2 to 2% of alkoxysilane to carry out a coating treatment of the decane coupling material.

對於實施例9,於防鏽處理、矽烷偶合材塗佈之後,更進一步以下述條件形成樹脂層。 In Example 9, after the rust-preventing treatment and the coating of the decane coupling material, the resin layer was further formed under the following conditions.

(樹脂合成例) (Resin Synthesis Example)

將3,4,3',4'-聯苯四羧酸二酐117.68g(400mmol)、1,3-雙(3-胺基苯氧基)苯87.7g(300mmol)、γ-戊內酯4.0g(40mmol)、吡啶4.8g(60mmol)、N-甲基-2-吡咯啶酮(以下記載為NMP)300g、甲苯20g加入在附有不鏽鋼製錨型攪拌棒、氮導入管及管閂之分離器上安裝有具備球管冷凝管之回流冷凝器的2公升三口燒瓶,以180℃加熱1小時後,冷卻至室溫附近, 然後加入3,4,3',4'-聯苯四羧酸二酐29.42g(100mmol)、2,2-雙{4-(4-胺基苯氧基)苯基}丙烷82.12g(200mmol)、NMP200g、甲苯40g,以室溫混合1小時後,以180℃加熱3小時,而得到固形物成分38%之嵌段共聚聚醯亞胺。此嵌段共聚聚醯亞胺,係下述之一般式(1):一般式(2)=3:2,數量平均分子量:70000,重量平均分子量:150000。 117.68 g (400 mmol) of 3,4,3',4'-biphenyltetracarboxylic dianhydride, 87.7 g (300 mmol) of 1,3-bis(3-aminophenoxy)benzene, γ-valerolactone 4.0 g (40 mmol), pyridine 4.8 g (60 mmol), N-methyl-2-pyrrolidone (hereinafter referred to as NMP) 300 g, and toluene 20 g were added to a stainless steel anchor stir bar, a nitrogen introduction tube, and a tube latch. A 2-liter three-necked flask equipped with a reflux condenser of a bulb condenser was attached to the separator, and heated at 180 ° C for 1 hour, and then cooled to room temperature. Then, 3,4,3',4'-biphenyltetracarboxylic dianhydride 29.42 g (100 mmol), 2,2-bis{4-(4-aminophenoxy)phenyl}propane 82.12 g (200 mmol) 200 g of NMP and 40 g of toluene were mixed at room temperature for 1 hour, and then heated at 180 ° C for 3 hours to obtain a block copolymerized polyimine having a solid content of 38%. The block copolymerized polyimine is of the following general formula (1): general formula (2) = 3:2, number average molecular weight: 70,000, weight average molecular weight: 150,000.

進一步以NMP將合成例所得之嵌段共聚聚醯亞胺溶液加以稀釋,製成固形物成分10%之嵌段共聚聚醯亞胺溶液。使雙(4-順丁烯二醯亞胺苯基)甲烷(BMI-H,KI Chemical Industry公司)之固形物成分重量比率為35,嵌段共聚聚醯亞胺之固形物成分重量比率為65(亦即,樹脂溶液所含之雙(4-順丁烯二醯亞胺苯基)甲烷固形物成分重量:樹脂溶液所含之嵌段共聚聚醯亞胺固形物成分重量=35:65),以60℃、20分鐘將雙(4-順丁烯二醯亞胺苯基)甲烷溶解混合於該嵌段共聚聚醯亞胺溶液,製 成樹脂溶液。然後,使用反輥塗佈機將前述樹脂溶液塗佈在極薄銅層表面,於氮環境下,以120℃進行3分鐘乾燥處理,並以160℃進行3分鐘乾燥處理後,最後以300℃進行2分鐘加熱處理,製得具備有樹脂層之銅箔。另,使樹脂層之厚度為2μm。 Further, the block copolymerized polyimine solution obtained in the synthesis example was diluted with NMP to prepare a block copolymerized polyimine solution having a solid content of 10%. The weight ratio of the solid content of bis(4-methyleneimine phenyl)methane (BMI-H, KI Chemical Industry) was 35, and the weight ratio of the solid content of the block copolymerized polyimide was 65. (ie, the weight of the bis(4-methyleneimine phenyl)methane solid content contained in the resin solution: the block copolymer polyimine solid content component contained in the resin solution = 35:65) Dissolving bis(4-maleimidoiminophenyl)methane in the block copolymerized polyimine solution at 60 ° C for 20 minutes Form a resin solution. Then, the resin solution was applied onto the surface of the ultra-thin copper layer using a reverse roll coater, dried in a nitrogen atmosphere at 120 ° C for 3 minutes, and dried at 160 ° C for 3 minutes, and finally at 300 ° C. The heat treatment was performed for 2 minutes to obtain a copper foil having a resin layer. Further, the thickness of the resin layer was set to 2 μm.

(表面處理銅箔及附載體銅箔之各種評價) (Various evaluation of surface treated copper foil and copper foil with carrier)

對以上述方式製得之表面處理銅箔及附載體銅箔,以下述方法實施評價。 The surface-treated copper foil obtained in the above manner and the copper foil with a carrier were evaluated by the following methods.

<蝕刻速率> <etching rate>

準備6.25cm見方、厚度100μm之下述樹脂基材,以將銅箔具有表面處理層之面接合在樹脂基材的方式,將樹脂基材與銅箔積層加壓。積層加壓係以加壓:3MPa,加熱溫度及時間:220℃×2小時之條件來進行。 The following resin substrate having a thickness of 100 μm and a thickness of 100 μm was prepared, and the surface of the copper foil having the surface treated layer was bonded to the resin substrate, and the resin substrate and the copper foil were laminated. The build-up pressure was carried out under the conditions of pressurization: 3 MPa, heating temperature and time: 220 ° C × 2 hours.

使用樹脂:三菱氣體化學公司製造GHPL-830MBT Resin: GHPL-830MBT manufactured by Mitsubishi Gas Chemical Co., Ltd.

接著,於表面處理銅箔之情形時,對樹脂基材上積層有銅箔之啟動材的銅箔,以下述條件進行蝕刻。又,於附載體銅箔之情形時,則藉由自樹脂基材上之附載體銅箔將載體剝除來製作,對樹脂基材上積層有極薄銅層之啟動材的極薄銅層,以下述條件進行蝕刻。 Next, in the case where the copper foil is surface-treated, the copper foil on which the copper foil starting material is laminated on the resin substrate is etched under the following conditions. Further, in the case of a carrier copper foil, it is produced by stripping a carrier from a copper foil with a carrier on a resin substrate, and an extremely thin copper layer of a promoter having an extremely thin copper layer laminated on the resin substrate. Etching was performed under the following conditions.

(蝕刻條件) (etching conditions)

‧蝕刻形式:噴霧蝕刻 ‧ etching form: spray etching

‧噴霧噴嘴:全圓錐型 ‧Spray nozzle: full cone type

‧噴霧壓:0.10MPa ‧ Spray pressure: 0.10MPa

‧蝕刻液溫:30℃ ‧ etching liquid temperature: 30 ° C

‧蝕刻液組成: ‧ etching solution composition:

H2O2 18g/L H 2 O 2 18g/L

H2SO4 92g/L H 2 SO 4 92g/L

Cu 8g/L Cu 8g/L

添加劑 傑希優股份有限公司製FE-830IIW3C適量 Additives FE-830IIW3C made by Jiexiyou Co., Ltd.

剩餘部分 水 The remaining part of the water

蝕刻處理時間:10~300秒 Etching processing time: 10~300 seconds

自上述蝕刻處理前後之重量差(蝕刻處理前重量-蝕刻處理後重量),以下式算出蝕刻量及蝕刻速率。 The amount of etching and the etching rate were calculated by the following formula from the difference in weight (weight before etching treatment - weight after etching treatment) before and after the above etching treatment.

‧蝕刻量(μm)=重量差(g)÷〔銅密度(8.93g/cm2)÷面積(6.25×2cm2)〕×10000 ‧ Etching amount (μm) = weight difference (g) ÷ [copper density (8.93 g/cm 2 ) ÷ area (6.25 × 2 cm 2 )] × 10000

‧蝕刻速率(μm/s)=上述蝕刻量(μm)÷蝕刻處理時間(s) ‧ Etch rate (μm / s) = the above etching amount (μm) ÷ etching processing time (s)

又,圖6係顯示實施例1~3及比較例1之蝕刻處理時間與蝕刻量之關係的圖形。若根據圖6,則可知極薄銅層部分(於表面處理銅箔之情形時顯示銅箔部分,於附載體銅箔之情形時則顯示極薄銅層部分)之蝕刻處理之間,處理時間與蝕刻量之圖形描繪有直線,將極薄銅層部分之厚度(於3μm厚之極薄銅層,為3μm)蝕刻後,於到達表面處理層時圖形出現拐點,蝕刻量變少(蝕刻速率下降),一邊描繪曲線一邊接近水平。從此點來看,於本發明中,將極薄銅層部分之蝕刻速率的算出式,及表面處理層部分之蝕刻速率的算出式、表面處理層之厚度方向之蝕刻處理時間的算出式及銅箔之厚度1μm之蝕刻處理時間的算出式規定成如下。 6 is a graph showing the relationship between the etching treatment time and the etching amount in Examples 1 to 3 and Comparative Example 1. According to FIG. 6, it can be seen that between the etching process of the extremely thin copper layer portion (the copper foil portion in the case of the surface-treated copper foil and the extremely thin copper layer portion in the case of the carrier copper foil), the processing time is A straight line is drawn on the pattern of the etching amount, and the thickness of the extremely thin copper layer portion (3 μm in a very thin copper layer of 3 μm thick) is etched, and the inflection point appears in the pattern when the surface treatment layer is reached, and the etching amount is small (the etching rate is decreased). ), while drawing the curve while approaching the level. From this point of view, in the present invention, the calculation formula of the etching rate of the ultra-thin copper layer portion, the calculation formula of the etching rate of the surface treatment layer portion, the calculation formula of the etching treatment time in the thickness direction of the surface treatment layer, and copper are used. The calculation formula of the etching treatment time of the thickness of the foil of 1 μm is defined as follows.

(a)極薄銅層部分之蝕刻速率的算出式: (a) Calculation formula of the etching rate of the extremely thin copper layer portion:

‧「極薄銅層之厚度(μm)」÷「以蝕刻去除極薄銅層部分之厚度量所 需的時間(s)」 ‧ "Thickness of ultra-thin copper layer (μm)" ÷ "The thickness of the extremely thin copper layer is removed by etching" Time required (s)

(b)表面處理層部分之蝕刻速率的算出式: (b) Calculation formula of the etching rate of the surface treatment layer portion:

‧「以蝕刻完全去除極薄銅層及表面處理層之厚度(μm)-極薄銅層之厚度(μm)」÷「以蝕刻完全去除極薄銅層及表面處理層所需的時間(s)-以蝕刻去除極薄銅層部分之厚度量所需的時間(s)」 ‧ "Extremely remove the thickness of the ultra-thin copper layer and the surface treatment layer by etching (μm) - the thickness of the ultra-thin copper layer (μm)" ÷ "The time required to completely remove the extremely thin copper layer and the surface treatment layer by etching (s ) - time (s) required to remove the thickness of the extremely thin copper layer portion by etching"

另,使用於測量重量之精密天秤,可測量至小數點以下4位,測量值係將第4位四捨五入。 In addition, the precision balance used for measuring weight can be measured to 4 digits below the decimal point, and the measured value is rounded off to the 4th digit.

(c)表面處理層之厚度方向之蝕刻處理時間的算出式: (c) Calculation formula of the etching treatment time in the thickness direction of the surface treatment layer:

‧以蝕刻完全去除極薄銅層及表面處理層所需的時間(s)-以蝕刻去除極薄銅層部分之厚度量所需的時間(s) ‧ Time required to completely remove the ultra-thin copper layer and surface treatment layer by etching (s) - Time required to etch away the thickness of the extremely thin copper layer portion (s)

(d)銅箔之厚度1μm之蝕刻處理時間的算出式: (d) Calculation formula of etching treatment time in which the thickness of the copper foil is 1 μm:

‧極薄銅層之厚度1μm/極薄銅層部分之蝕刻速率(μm/s) ‧Thick copper layer thickness 1μm / very thin copper layer part of the etching rate (μm / s)

另,為了畫出圖6顯示蝕刻處理時間與蝕刻量之關係的圖形,測量係以下述蝕刻時間間隔來進行。 Further, in order to draw a graph showing the relationship between the etching treatment time and the etching amount in Fig. 6, the measurement was performed at the following etching time intervals.

‧極薄銅層部分:10秒間隔 ‧ very thin copper layer part: 10 second interval

‧拐點附近:1~3秒間隔 ‧ Near the turning point: 1~3 seconds interval

‧表面處理層:1~2秒間隔 ‧Surface treatment layer: 1~2 seconds interval

上述測量間隔為一例,可適當訂定能夠正確地測量蝕刻處理時間與蝕刻量之關係的測量時間間隔。作為其他之測量例,極薄銅層、拐點附近、表面處理層皆亦可以0.1~2秒間隔進行測量。 The above measurement interval is an example, and the measurement time interval capable of accurately measuring the relationship between the etching treatment time and the etching amount can be appropriately determined. As another measurement example, the ultra-thin copper layer, the vicinity of the inflection point, and the surface treatment layer can also be measured at intervals of 0.1 to 2 seconds.

此處,極薄銅層部分之厚度(μm),於圖6中具有拐點之情形時,以產生拐點之厚度(蝕刻量(μm))作為極薄銅層之厚度。又, 於拐點不明顯之情形時,或拐點與極薄銅層之厚度不一致之可能性高的情形時,被認為是拐點之附近的蝕刻處理時間之間,對樣品進行了蝕刻。並且,以FIB(聚焦離子束)-SIM(掃瞄離子顯微鏡)進行經蝕刻之樣品的剖面觀察,自銅之結晶組織(金屬組織)判別極薄銅層與表面處理層的界面。此處,圖8係顯示銅層(此處係對應於極薄銅層)與表面處理層之剖面觀察照片之例。於圖8中,於極薄銅層表面確認有來自樹脂基材之樹脂及粒子狀之表面處理層。該界面顯示極薄銅層與表面處理層之境界面。並且,以藉由蝕刻使前述極薄銅層與表面處理層之界面的一部份或全部露出(於極薄銅層之厚度變動大之情形時,則是露出一部份)之蝕刻處理時間作為藉由蝕刻去除極薄銅層完畢之蝕刻處理時間。並且,以該極薄銅層之蝕刻完畢之蝕刻處理時間的蝕刻量作為極薄銅層部分之厚度(μm)。 Here, the thickness (μm) of the extremely thin copper layer portion is such that the thickness of the inflection point (etching amount (μm)) is used as the thickness of the extremely thin copper layer in the case of having an inflection point in FIG. also, When the inflection point is not obvious, or when the possibility that the inflection point does not coincide with the thickness of the ultra-thin copper layer is high, the sample is etched between the etching treatment times in the vicinity of the inflection point. Further, the cross-sectional observation of the etched sample was carried out by FIB (focusing ion beam)-SIM (scanning ion microscope), and the interface between the ultra-thin copper layer and the surface treatment layer was discriminated from the crystal structure (metal structure) of copper. Here, FIG. 8 is an example showing a cross-sectional observation photograph of a copper layer (here, corresponding to an extremely thin copper layer) and a surface treatment layer. In Fig. 8, a resin and a particulate surface treatment layer derived from a resin substrate were confirmed on the surface of the ultra-thin copper layer. The interface shows the interface between the very thin copper layer and the surface treatment layer. Further, an etching treatment time is performed by exposing a part or all of the interface between the ultra-thin copper layer and the surface treatment layer by etching (in the case where the thickness of the ultra-thin copper layer fluctuates greatly, a portion is exposed) The etching treatment time is completed by etching away the ultra-thin copper layer. Further, the etching amount of the etching treatment time in which the extremely thin copper layer was etched was used as the thickness (μm) of the extremely thin copper layer portion.

又,以「以蝕刻去除極薄銅層部分之厚度量所需的時間(s)」作為去除上述極薄銅層部分之厚度(μm)所需的時間(極薄銅層之蝕刻完畢之蝕刻處理時間)。 Further, the time (s) required for removing the thickness of the extremely thin copper layer portion by etching is taken as the time required to remove the thickness (μm) of the extremely thin copper layer portion (etching of the etching of the extremely thin copper layer) Processing time).

又,「以蝕刻完全去除極薄銅層及表面處理層之厚度(μm)」,係以表2中之區間的蝕刻重量變化為蝕刻時間每2秒在0.001g以下之點的前一個區間作為終點,從蝕刻開始至該終點的蝕刻量。另,當各區間之蝕刻時間未達2秒之情形時,對每個區間之蝕刻時間的合計為2秒之經合計的區間,合計樣品之重量變化量,藉此測量蝕刻時間每2秒之樣品的重量變化量。 In addition, "the thickness (μm) of the ultra-thin copper layer and the surface-treated layer is completely removed by etching", the change in the etching weight in the interval in Table 2 is the previous interval in which the etching time is 0.001 g or less every 2 seconds. End point, the amount of etching from the start of etching to the end point. In addition, when the etching time of each section is less than 2 seconds, the total of the etching time for each section is the total interval of 2 seconds, and the weight change amount of the sample is totaled, thereby measuring the etching time every 2 seconds. The amount of weight change of the sample.

又,使「以蝕刻完全去除極薄銅層及表面處理層所需的時間(s)」為自蝕刻開始至上述終點所需的時間。 Moreover, the time (s) required for completely removing the ultra-thin copper layer and the surface treatment layer by etching is the time required from the start of etching to the above end point.

<面粗糙度Sz> <surface roughness Sz>

使用奧林巴斯公司製雷射顯微鏡(試驗機:OLYMPUS LEXT OLS 4000,解析度:XY-0.12μm、Z-0.0μm,截取(cut-off):無),依ISO25178測量表面處理銅箔及附載體銅箔之表面處理層側表面的面粗糙度Sz。 Using a laser microscope manufactured by Olympus (test machine: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 μm, Z-0.0 μm, cut-off: none), surface-treated copper foil and ISO 25178 were measured. The surface roughness Sz of the surface of the surface treatment layer of the carrier copper foil.

<配線形成性> <Wiring formation property>

準備6.25cm見方、厚度100μm之下述樹脂基材,以將銅箔具有表面處理層之面接合在樹脂基材的方式,將樹脂基材與表面處理銅箔及附載體銅箔積層加壓。積層加壓係以加壓:3MPa,加熱溫度及時間:220℃×2小時之條件來進行。 The following resin substrate having a thickness of 100 μm and a thickness of 100 μm was prepared, and the surface of the copper foil having the surface treated layer was bonded to the resin substrate, and the resin substrate and the surface-treated copper foil and the copper foil with the carrier were laminated. The build-up pressure was carried out under the conditions of pressurization: 3 MPa, heating temperature and time: 220 ° C × 2 hours.

使用樹脂:三菱氣體化學公司製造GHPL-830MBT Resin: GHPL-830MBT manufactured by Mitsubishi Gas Chemical Co., Ltd.

接著,以下述之蝕刻條件對樹脂基材上之表面處理銅箔進行微蝕刻,將表面處理銅箔之厚度調整成1.4μm。又,關於樹脂基材上之附載體銅箔,係於剝除載體後,以下述之蝕刻條件對極薄銅層進行微蝕刻,將表面處理極薄銅層之厚度調整成1.4μm。藉由該微蝕刻,後述之DF圖案化處理時的DF密合性良好。 Next, the surface-treated copper foil on the resin substrate was micro-etched under the following etching conditions, and the thickness of the surface-treated copper foil was adjusted to 1.4 μm. Further, regarding the carrier-attached copper foil on the resin substrate, after the carrier was peeled off, the ultra-thin copper layer was micro-etched under the following etching conditions, and the thickness of the surface-treated ultra-thin copper layer was adjusted to 1.4 μm. By this microetching, the DF adhesion at the time of the DF patterning treatment described later is good.

(微蝕刻條件) (microetching conditions)

‧蝕刻形式:噴霧蝕刻 ‧ etching form: spray etching

‧噴霧噴嘴:全圓錐型 ‧Spray nozzle: full cone type

‧噴霧壓:0.10MPa ‧ Spray pressure: 0.10MPa

‧蝕刻液溫:30℃ ‧ etching liquid temperature: 30 ° C

‧蝕刻液組成: ‧ etching solution composition:

H2O2 18g/L H 2 O 2 18g/L

H2SO4 92g/L H 2 SO 4 92g/L

Cu 8g/L Cu 8g/L

添加劑 傑希優股份有限公司製FE-830IIW3C適量 Additives FE-830IIW3C made by Jiexiyou Co., Ltd.

剩餘部分 水 The remaining part of the water

接著,藉由下述之處理步驟及處理條件進行DF(乾膜)圖案化處理。 Next, DF (dry film) patterning treatment is performed by the following processing steps and processing conditions.

‧DF層疊步驟:使用日立化成公司製造之RY-5325作為DF,使該DF貼合在上述微蝕刻面。用於貼合之層疊輥的溫度為110℃,壓力為0.4MPa,旋轉速度為1.0m/分。 DF DF lamination step: RY-5325 manufactured by Hitachi Chemical Co., Ltd. was used as DF, and the DF was bonded to the microetched surface. The laminating rolls for lamination had a temperature of 110 ° C, a pressure of 0.4 MPa, and a rotational speed of 1.0 m / min.

‧DF曝光步驟:使用L(Line)/S(Space)=21μm/9μm之曝光遮罩,隔著該曝光遮罩將光照射在DF。使用之DF為負型,照到光之部份發生光硬化。曝光量為100mJ/cm2‧ DF exposure step: an exposure mask of L (Line) / S (Space) = 21 μm / 9 μm is used, and light is irradiated to the DF through the exposure mask. The DF used is a negative type, and photohardening occurs in the portion of the light. The exposure amount was 100 mJ/cm 2 .

‧DF顯影步驟:藉由利用碳酸鈉水溶液(顯影液)之噴霧蝕刻進行顯影,在上述曝光步驟以顯影液將未照到光之部位溶解去除。碳酸鈉濃度為1wt/vol%,噴霧壓為0.16MPa,噴霧時間為36秒。 DF developing step: development is carried out by spray etching using an aqueous solution of sodium carbonate (developing solution), and in the above-mentioned exposure step, the portion where the light is not irradiated is dissolved and removed by the developing solution. The sodium carbonate concentration was 1 wt/vol%, the spray pressure was 0.16 MPa, and the spray time was 36 seconds.

‧水洗步驟:藉由噴霧進行水之噴霧,水洗顯影處理面。噴霧壓為0.16MPa,噴霧時間為36秒。 ‧Washing step: Spraying with water by spraying, washing and developing the surface. The spray pressure was 0.16 MPa and the spray time was 36 seconds.

接著,於銅箔及極薄銅層表面,使用下述鍍敷液組成之處理液進行圖案銅鍍敷。 Next, pattern copper plating was performed on the surface of the copper foil and the ultra-thin copper layer using the treatment liquid having the following plating liquid composition.

圖案銅鍍敷液組成: Pattern copper plating solution composition:

‧硫酸銅五水合物:100g/L ‧ Copper sulfate pentahydrate: 100g / L

‧硫酸:180g/L ‧ sulfuric acid: 180g / L

‧氯離子:50ppm ‧ chloride ion: 50ppm

‧添加劑:傑希優股份有限公司製CU-BRITE-RF適量 ‧Additives: CU-BRITE-RF Sigma

剩餘部分 水 The remaining part of the water

添加劑是為了提升鍍敷表面之光澤或平滑性而使用。 The additive is used to improve the gloss or smoothness of the plating surface.

接著,於氫氧化鈉溶液進行DF剝離。氫氧化鈉濃度為3wt/vol%,液溫為55℃,處理時間為5分。 Next, DF peeling was performed on the sodium hydroxide solution. The sodium hydroxide concentration was 3 wt/vol%, the liquid temperature was 55 ° C, and the treatment time was 5 minutes.

接著,於銅箔及極薄銅層表面,以下述條件進行快速蝕刻。 Next, on the surface of the copper foil and the ultra-thin copper layer, rapid etching was performed under the following conditions.

(蝕刻條件) (etching conditions)

‧蝕刻形式:噴霧蝕刻 ‧ etching form: spray etching

‧噴霧噴嘴:全圓錐型 ‧Spray nozzle: full cone type

‧噴霧壓:0.10MPa ‧ Spray pressure: 0.10MPa

‧蝕刻液溫:30℃ ‧ etching liquid temperature: 30 ° C

‧蝕刻液組成: ‧ etching solution composition:

H2O2 18g/L H 2 O 2 18g/L

H2SO4 92g/L H 2 SO 4 92g/L

Cu 8g/L Cu 8g/L

添加劑 傑希優股份有限公司製FE-830IIW3C適量 Additives FE-830IIW3C made by Jiexiyou Co., Ltd.

剩餘部分 水 The remaining part of the water

‧處理時間〔10~200秒〕 ‧ Processing time [10~200 seconds]

關於實施例1~3、比較例1,於評價上述配線形成性時,拍攝上面外觀之光學顯微鏡照片。光學顯微鏡照片(倍率:500倍),係分別對聚焦在配線之頂面者及聚焦在配線之底面者進行拍攝。將實施例1~3及比較例1之配線快速蝕刻後之配線間的殘渣外觀(L/S=15μm/15μm間 距部)之觀察照片示於圖7。 In Examples 1 to 3 and Comparative Example 1, when the wiring formation property was evaluated, an optical microscope photograph of the above appearance was taken. The optical micrograph (magnification: 500 times) was taken for those who focused on the top of the wiring and on the underside of the wiring. The appearance of residue between wirings after rapid etching of the wirings of Examples 1 to 3 and Comparative Example 1 (L/S = 15 μm / 15 μm) The observation photograph of the distance portion is shown in Fig. 7.

(配線形成性評價1) (Wiring formation evaluation 1)

於聚焦在配線之底面時的觀察照片,於去除配線間之樹脂面上的銅殘渣完畢之時點,測量形成之配線的寬度,以下述基準進行評價。 The observation photograph at the time of focusing on the bottom surface of the wiring was measured at the time when the copper residue on the resin surface of the wiring compartment was removed, and the width of the formed wiring was measured and evaluated based on the following criteria.

(評價基準)◎:配線寬度超過15μm,○:配線寬度為10~15μm,×:配線寬度未達10μm (Evaluation criteria) ◎: Wiring width exceeds 15 μm, ○: Wiring width is 10 to 15 μm, ×: Wiring width is less than 10 μm

(配線形成性評價2) (Wiring formation evaluation 2)

於聚焦在配線之底面時的觀察照片,於配線寬度成為13.5μm之時點,根據配線間之樹脂面上的銅殘渣剩餘程度,以下述基準,相對地進行評價。 When the wiring width was 13.5 μm, the observation photograph at the time of the wiring width was 13.5 μm, and the copper residue on the resin surface of the wiring was relatively evaluated based on the following criteria.

(評價基準)○:無殘渣,×:確認殘渣,××:確認大量之殘渣 (Evaluation criteria) ○: No residue, ×: Confirmation of residue, ××: Confirmation of a large amount of residue

(配線形成性評價3) (Wiring formation evaluation 3)

於去除配線間之樹脂面上的銅殘渣完畢之時點,測量形成之配線的表面與樹脂表面之階差,以下述基準,相對地進行評價。 When the copper residue on the resin surface of the wiring compartment was removed, the step difference between the surface of the formed wiring and the surface of the resin was measured, and the evaluation was performed relatively on the basis of the following criteria.

(評價基準)◎:階差未達1.5μm,○:階差為1.5~4μm,×:階差超過4μm (Evaluation criteria) ◎: The step is less than 1.5 μm, ○: The step is 1.5 to 4 μm, and ×: The step is more than 4 μm.

將試驗條件及結果示於表1~4。 The test conditions and results are shown in Tables 1 to 4.

(評價結果) (Evaluation results)

於實施例1~11皆使銅箔之厚度方向的蝕刻速率為1之情形時,由於表面處理層之厚度方向的蝕刻速率在0.5以上,故微細配線形成性良好。 In the case where the etching rate in the thickness direction of the copper foil is 1 in all of Examples 1 to 11, since the etching rate in the thickness direction of the surface treatment layer is 0.5 or more, the fine wiring formation property is good.

於比較例1~4皆使厚度方向之蝕刻速率為1之情形時,由於表面處理層之厚度方向的蝕刻速率未達0.5,故微細配線形成性不良。 In the case where the etching rate in the thickness direction was 1 in Comparative Examples 1 to 4, since the etching rate in the thickness direction of the surface treatment layer was less than 0.5, the fine wiring formation property was poor.

Claims (32)

一種表面處理銅箔,於銅箔上形成有表面處理層,當從與形成有該表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻(spray etching)時,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在0.5以上。 A surface-treated copper foil having a surface-treated layer formed on a copper foil, and spray-etched with a hydrogen peroxide/sulfuric acid-dissolved etching solution on a surface opposite to the surface on which the surface-treated layer is formed (spray etching) When the etching rate in the thickness direction of the copper foil is set to 1, the etching rate in the thickness direction of the surface treatment layer is 0.5 or more. 如申請專利範圍第1項之表面處理銅箔,其中,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在0.75以上。 The surface-treated copper foil according to the first aspect of the invention, wherein, in the case where the etching rate in the thickness direction of the copper foil is 1, the etching rate in the thickness direction of the surface-treated layer is 0.75 or more. 如申請專利範圍第2項之表面處理銅箔,其中,於使該銅箔之厚度方向的蝕刻速率為1之情形時,該表面處理層之厚度方向的蝕刻速率在1.0以上。 The surface-treated copper foil according to the second aspect of the invention, wherein, in the case where the etching rate in the thickness direction of the copper foil is 1, the etching rate in the thickness direction of the surface-treated layer is 1.0 or more. 一種表面處理銅箔,於銅箔上形成有表面處理層,當從與形成有該表面處理層之表面為相反側的表面以過氧化氫/硫酸系之銅溶解蝕刻液進行噴霧蝕刻時,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.7以下。 A surface-treated copper foil having a surface-treated layer formed on a copper foil, and spray-etched with a hydrogen peroxide/sulfuric acid copper-dissolving etching solution on a surface opposite to a surface on which the surface-treated layer is formed, The ratio of the etching treatment time in the thickness direction of the surface treatment layer to the etching treatment time of 1 μm of the thickness of the copper foil is 0.7 or less. 如申請專利範圍第4項之表面處理銅箔,其中,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.4以下。 The surface-treated copper foil according to claim 4, wherein a ratio of an etching treatment time in a thickness direction of the surface treatment layer to an etching treatment time of 1 μm in thickness of the copper foil is 0.4 or less. 如申請專利範圍第5項之表面處理銅箔,其中,該表面處理層之厚度方向的蝕刻處理時間相對於該銅箔之厚度1μm的蝕刻處理時間之比在0.2以下。 The surface-treated copper foil according to claim 5, wherein a ratio of an etching treatment time in a thickness direction of the surface treatment layer to an etching treatment time of 1 μm in thickness of the copper foil is 0.2 or less. 如申請專利範圍第1項之表面處理銅箔,其中,該過氧化氫/硫酸系 之銅溶解蝕刻液具有18g/L之H2O2、92g/L之H2SO4及8g/L之Cu的液體組成。 The surface-treated copper foil according to the first aspect of the invention, wherein the hydrogen peroxide/sulfuric acid copper-dissolving etching solution has 18 g/L of H 2 O 2 , 92 g/L of H 2 SO 4 and 8 g/L. The liquid composition of Cu. 如申請專利範圍第4項之表面處理銅箔,其中,該過氧化氫/硫酸系之銅溶解蝕刻液具有18g/L之H2O2、92g/L之H2SO4及8g/L之Cu的液體組成。 The surface-treated copper foil according to claim 4, wherein the hydrogen peroxide/sulfuric acid copper-dissolving etching solution has 18 g/L of H 2 O 2 , 92 g/L of H 2 SO 4 and 8 g/L. The liquid composition of Cu. 如申請專利範圍第1項之表面處理銅箔,其中,該銅箔係由電解銅箔或壓延銅箔形成。 The surface-treated copper foil according to claim 1, wherein the copper foil is formed of an electrolytic copper foil or a rolled copper foil. 如申請專利範圍第4項之表面處理銅箔,其中,該銅箔係由電解銅箔或壓延銅箔形成。 The surface-treated copper foil of claim 4, wherein the copper foil is formed of an electrolytic copper foil or a rolled copper foil. 如申請專利範圍第1項之表面處理銅箔,其中,該表面處理層具有粗化處理層。 The surface-treated copper foil according to claim 1, wherein the surface treatment layer has a roughened layer. 如申請專利範圍第4項之表面處理銅箔,其中,該表面處理層具有粗化處理層。 The surface treated copper foil of claim 4, wherein the surface treated layer has a roughened layer. 如申請專利範圍第11項之表面處理銅箔,其中,該表面處理層具有粗化處理層與設置於該粗化處理層表面之選自由耐熱層、防鏽層、鉻酸處理(chromate treatment)層及矽烷偶合處理層組成之群中之1種以上的層。 The surface-treated copper foil according to claim 11, wherein the surface treatment layer has a roughening treatment layer and a surface of the roughening treatment layer selected from the group consisting of a heat-resistant layer, a rust-proof layer, and a chroma treatment. One or more layers of the group consisting of a layer and a decane coupling treatment layer. 如申請專利範圍第13項之表面處理銅箔,其中,該表面處理層具有該防鏽層及該耐熱層中至少一者,該防鏽層及該耐熱層中至少一者含有選自鎳、鈷、銅、鋅中之1種以上的元素。 The surface-treated copper foil of claim 13, wherein the surface treatment layer has at least one of the rustproof layer and the heat-resistant layer, and at least one of the rustproof layer and the heat-resistant layer is selected from the group consisting of nickel, One or more elements of cobalt, copper, and zinc. 如申請專利範圍第13項之表面處理銅箔,其中,該表面處理層具有該粗化處理層及該耐熱層,於該粗化處理層上具有該耐熱層。 The surface-treated copper foil according to claim 13, wherein the surface-treated layer has the roughened layer and the heat-resistant layer, and the heat-resistant layer is provided on the roughened layer. 如申請專利範圍第13項之表面處理銅箔,其中,該表面處理層具有 該粗化處理層或該耐熱層,與該防鏽層,於該粗化處理層或該耐熱層上具有該防鏽層。 The surface treated copper foil of claim 13, wherein the surface treatment layer has The roughened layer or the heat-resistant layer and the rustproof layer have the rustproof layer on the roughened layer or the heat-resistant layer. 如申請專利範圍第13項之表面處理銅箔,其中,該表面處理層具有該防鏽層與該鉻酸處理層,於該防鏽層上具有該鉻酸處理層。 The surface-treated copper foil according to claim 13, wherein the surface treatment layer has the rust-preventing layer and the chromic acid-treated layer, and the chromic acid-treated layer is provided on the rust-preventing layer. 如申請專利範圍第13項之表面處理銅箔,其中,該表面處理層具有該鉻酸處理層與該矽烷偶合處理層,於該鉻酸處理層上具有該矽烷偶合處理層。 The surface-treated copper foil according to claim 13, wherein the surface treatment layer has the chromic acid treatment layer and the decane coupling treatment layer, and the decane coupling treatment layer is provided on the chromic acid treatment layer. 如申請專利範圍第1或4項之表面處理銅箔,其中,該表面處理層為選自由耐熱層、防鏽層、鉻酸處理層及矽烷偶合處理層組成之群中之1種以上的層。 The surface-treated copper foil according to claim 1 or 4, wherein the surface treatment layer is one or more layers selected from the group consisting of a heat-resistant layer, a rust-preventing layer, a chromic acid-treated layer, and a decane coupling treatment layer. . 如申請專利範圍第1或4項之表面處理銅箔,其中,於該表面處理層上具備樹脂層。 The surface-treated copper foil according to claim 1 or 4, wherein the surface treatment layer is provided with a resin layer. 如申請專利範圍第20項之表面處理銅箔,其中,該樹脂層含有介電體。 The surface-treated copper foil of claim 20, wherein the resin layer contains a dielectric. 一種附載體銅箔,於載體之一面或兩面依序積層有中間層、極薄銅層所構成,該極薄銅層為申請專利範圍第1至21項中任一項之表面處理銅箔。 A copper foil with a carrier, which is formed by laminating an intermediate layer or an ultra-thin copper layer on one or both sides of the carrier. The ultra-thin copper layer is a surface-treated copper foil according to any one of claims 1 to 21. 如申請專利範圍第22項之附載體銅箔,其中,於該載體之一面依序具有該中間層、該極薄銅層,而於該載體之另一面具有粗化處理層。 The carrier-attached copper foil according to claim 22, wherein the intermediate layer and the ultra-thin copper layer are sequentially provided on one side of the carrier, and the roughened layer is provided on the other side of the carrier. 一種印刷配線板,係使用申請專利範圍第1至21項中任一項之表面處理銅箔製造。 A printed wiring board manufactured by using the surface-treated copper foil according to any one of claims 1 to 21. 一種印刷配線板,係使用申請專利範圍第22或23項之附載體銅箔 製造。 A printed wiring board using the carrier copper foil of claim 22 or 23 Manufacturing. 一種覆銅積層板,係使用申請專利範圍第1至21項中任一項之表面處理銅箔製造。 A copper-clad laminate produced by using the surface-treated copper foil according to any one of claims 1 to 21. 一種覆銅積層板,係使用申請專利範圍第22或23項之附載體銅箔製造。 A copper clad laminate is produced by using a copper foil with a carrier of claim 22 or 23. 一種積層體,含有申請專利範圍第22或23項之附載體銅箔與樹脂,該附載體銅箔之端面的一部份或全部被該樹脂覆蓋。 A laminate comprising a carrier copper foil and a resin according to claim 22 or 23, wherein a part or all of an end surface of the copper foil with the carrier is covered with the resin. 一種印刷配線板之製造方法,包含下述步驟:準備申請專利範圍第1至21項中任一項之表面處理銅箔與絕緣基板的步驟;將該表面處理銅箔自表面處理層側積層在絕緣基板,形成覆銅積層板,然後藉由減成法(subtractive process)、部分加成法(partly additive process)或改良半加成法(modified semi-additive process)中之任一方法形成電路的步驟。 A method of manufacturing a printed wiring board comprising the steps of: preparing a surface-treated copper foil and an insulating substrate according to any one of claims 1 to 21; and laminating the surface-treated copper foil from the surface treatment layer side Insulating the substrate to form a copper clad laminate, and then forming the circuit by any one of a subtractive process, a partial additive process, or a modified semi-additive process step. 一種印刷配線板之製造方法,包含下述步驟:準備申請專利範圍第22或23項之附載體銅箔與絕緣基板的步驟;將該附載體銅箔自極薄銅層側積層在絕緣基板的步驟;將該附載體銅箔與絕緣基板積層後,經過將該附載體銅箔之載體剝除的步驟而形成覆銅積層板,然後藉由部分加成法或改良半加成法中之任一方法形成電路的步驟。 A method for manufacturing a printed wiring board, comprising the steps of: preparing a copper foil with a carrier and an insulating substrate of claim 22 or 23; laminating the copper foil with a carrier on the side of the ultra-thin copper layer on the insulating substrate a step of laminating the copper foil with the carrier and then laminating the carrier with the carrier copper foil to form a copper clad laminate, and then by partial addition or modified semi-addition A method of forming a circuit. 一種印刷配線板之製造方法,包含下述步驟:將電路形成在申請專利範圍第22或23項之附載體銅箔的該極薄銅層側 表面或該載體側表面的步驟;以覆蓋該電路之方式將樹脂層形成在該附載體銅箔的該極薄銅層側表面或該載體側表面的步驟;將電路形成在該樹脂層上的步驟;將電路形成在該樹脂層上後,將該載體或該極薄銅層剝離的步驟;及將該載體或該極薄銅層剝離後,去除該極薄銅層或該載體,藉此使形成在該極薄銅層側表面或該載體側表面被該樹脂層覆蓋之電路露出的步驟。 A method of manufacturing a printed wiring board comprising the steps of: forming a circuit on the side of the ultra-thin copper layer of the carrier copper foil of claim 22 or 23 a surface or a side surface of the carrier; a step of forming a resin layer on the side surface of the ultra-thin copper layer of the carrier copper foil or the side surface of the carrier in such a manner as to cover the circuit; forming a circuit on the resin layer a step of peeling the carrier or the ultra-thin copper layer after forming the circuit on the resin layer; and removing the ultra-thin copper layer or the carrier after peeling off the carrier or the ultra-thin copper layer The step of exposing the circuit formed on the side surface of the ultra-thin copper layer or the side surface of the carrier by the resin layer is exposed. 一種印刷配線板之製造方法,包含下述步驟:積層申請專利範圍第22或23項之附載體銅箔的該極薄銅層側表面或該載體側表面與樹脂基板的步驟;於該附載體銅箔之與樹脂基板積層之側的相反側之極薄銅層側表面或該載體側表面,設置至少1次樹脂層與電路之2層的步驟;及形成該樹脂層及電路之2層後,自該附載體銅箔剝離該載體或該極薄銅層的步驟。 A method of manufacturing a printed wiring board, comprising the steps of: laminating the ultra-thin copper layer side surface of the carrier-attached copper foil of claim 22 or 23 or the carrier side surface and a resin substrate; a step of providing at least one layer of the resin layer and the circuit with at least one layer of the resin layer and the circuit on the side of the copper foil side opposite to the side on which the resin substrate is laminated, or the carrier side surface; and forming the resin layer and the second layer of the circuit The step of stripping the carrier or the ultra-thin copper layer from the carrier copper foil.
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Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6782561B2 (en) 2015-07-16 2020-11-11 Jx金属株式会社 Copper foil with carrier, laminate, manufacturing method of laminate, manufacturing method of printed wiring board and manufacturing method of electronic equipment
JP6006445B1 (en) * 2015-07-27 2016-10-12 Jx金属株式会社 Copper foil with carrier, laminate, printed wiring board manufacturing method and electronic device manufacturing method
JP6058182B1 (en) * 2015-07-27 2017-01-11 Jx金属株式会社 Copper foil with carrier, laminate, printed wiring board manufacturing method and electronic device manufacturing method
WO2017018232A1 (en) * 2015-07-29 2017-02-02 三井金属鉱業株式会社 Roughened copper foil, copper-clad laminate, and printed wiring board
JP6190500B2 (en) 2015-08-06 2017-08-30 Jx金属株式会社 Copper foil with carrier, laminate, printed wiring board manufacturing method and electronic device manufacturing method
JP6339636B2 (en) * 2015-08-06 2018-06-06 Jx金属株式会社 Copper foil with carrier, laminate, printed wiring board manufacturing method and electronic device manufacturing method
JP6200042B2 (en) 2015-08-06 2017-09-20 Jx金属株式会社 Copper foil with carrier, laminate, printed wiring board manufacturing method and electronic device manufacturing method
JP2017088943A (en) * 2015-11-06 2017-05-25 Jx金属株式会社 Copper foil with carrier, laminate, manufacturing method of laminate, manufacturing method of printed wiring board and manufacturing method of electronic device
JP6346244B2 (en) * 2015-11-10 2018-06-20 Jx金属株式会社 Electrolytic copper foil, electrolytic copper foil manufacturing method, copper-clad laminate, printed wiring board, printed wiring board manufacturing method, and electronic device manufacturing method
JP2017088961A (en) * 2015-11-10 2017-05-25 Jx金属株式会社 Copper foil with carrier, printed wiring board, laminate, electronic device, manufacturing method of copper foil with carrier and manufacturing method of printed wiring board
WO2017149810A1 (en) * 2016-02-29 2017-09-08 三井金属鉱業株式会社 Copper foil with carrier, production method for same, production method for coreless support with wiring layer, and production method for printed circuit board
KR101733408B1 (en) * 2016-11-11 2017-05-10 일진머티리얼즈 주식회사 Electrolytic Copper Foil for secondary battery and manufacturing method thereof
TWI619852B (en) * 2017-02-24 2018-04-01 南亞塑膠工業股份有限公司 Manufacturing methods of electrolytic copper foil having football-shaped copper particles and circuit board assembly
TWI619851B (en) * 2017-02-24 2018-04-01 南亞塑膠工業股份有限公司 Manufacturing methods of electrolytic copper foil having needle-shaped copper particles and circuit board assembly
KR102568740B1 (en) * 2017-03-31 2023-08-21 미쯔비시 가스 케미칼 컴파니, 인코포레이티드 Surface treatment liquid and surface treatment method of rolled copper foil and manufacturing method of rolled copper foil
EP3786317A4 (en) * 2018-04-27 2022-04-20 JX Nippon Mining & Metals Corporation Surface-treated copper foil, copper clad laminate, and printed wiring board

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0940933A (en) * 1995-07-26 1997-02-10 Toshiba Chem Corp Adhesive for copper foil
JP3155920B2 (en) * 1996-01-16 2001-04-16 三井金属鉱業株式会社 Electrolytic copper foil for printed wiring board and method for producing the same
US5989727A (en) * 1998-03-04 1999-11-23 Circuit Foil U.S.A., Inc. Electrolytic copper foil having a modified shiny side
JP2002069691A (en) * 2000-08-31 2002-03-08 Nippon Denkai Kk Method for manufacturing copper foil for printed circuit board
JP3429290B2 (en) * 2000-09-18 2003-07-22 日本電解株式会社 Manufacturing method of copper foil for fine wiring
TW511408B (en) * 2000-09-18 2002-11-21 Nippon Denkai Kk Method of producing copper foil for fine wiring
JP4683769B2 (en) 2001-05-31 2011-05-18 三井金属鉱業株式会社 Copper-clad laminate with copper-plated circuit layer and method for producing printed wiring board using copper-clad laminate with copper-plated circuit layer
JP3770537B2 (en) * 2001-07-30 2006-04-26 三井金属鉱業株式会社 Capacitor and method for producing double-sided copper-clad laminate for forming the same
JP4217786B2 (en) * 2004-03-12 2009-02-04 古河電気工業株式会社 Ultra-thin copper foil with carrier and wiring board using ultra-thin copper foil with carrier
EP1531656A3 (en) * 2003-11-11 2007-10-03 Furukawa Circuit Foil Co., Ltd. Ultra-thin copper foil with carrier and printed wiring board using ultra-thin copper foil with carrier
JP2006210689A (en) * 2005-01-28 2006-08-10 Fukuda Metal Foil & Powder Co Ltd Copper foil for high frequency printed wiring board and its production method
JP2008140902A (en) * 2006-11-30 2008-06-19 Murata Mfg Co Ltd Multilayer printed circuit board and manufacturing method thereof
KR20100006575A (en) * 2007-06-08 2010-01-19 미쓰이 긴조꾸 고교 가부시키가이샤 Laminated film for electronic component mounting, film carrier tape for electronic component mounting, and semiconductor device
JP5474316B2 (en) * 2008-05-30 2014-04-16 三井金属鉱業株式会社 Copper-clad laminate, surface-treated copper foil used for manufacturing the copper-clad laminate, and printed wiring board obtained using the copper-clad laminate
JP5634103B2 (en) * 2010-04-06 2014-12-03 福田金属箔粉工業株式会社 A treated copper foil for a copper clad laminate, a copper clad laminate obtained by bonding the treated copper foil to an insulating resin substrate, and a printed wiring board using the copper clad laminate.
WO2012132577A1 (en) * 2011-03-30 2012-10-04 Jx日鉱日石金属株式会社 Copper foil for printed circuit
JP5666384B2 (en) * 2011-05-31 2015-02-12 日本電解株式会社 Ultrathin copper foil with support and method for producing the same
JP5654416B2 (en) * 2011-06-07 2015-01-14 Jx日鉱日石金属株式会社 Liquid crystal polymer copper clad laminate and copper foil used for the laminate
JP2013030603A (en) * 2011-07-28 2013-02-07 Hitachi Chem Co Ltd Method of manufacturing wiring board
JP5413693B2 (en) * 2012-02-06 2014-02-12 日立化成株式会社 Circuit forming support substrate and method of manufacturing semiconductor device mounting package substrate

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