TW201421873A - An enhanced light-load circuit for high-speed DC-DC buck converter - Google Patents
An enhanced light-load circuit for high-speed DC-DC buck converter Download PDFInfo
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本發明與直流對直流高速轉換器有關，特別是關於一種用於直流對直流高速轉換器的輕載效率改善電路結構。 The present invention relates to a DC-to-DC high-speed converter, and more particularly to a light-load efficiency improving circuit structure for a DC-to-DC high-speed converter.
近年來能源問題一直是各界關注的焦點。除了研究各種能源的替代方案以外，如何解省能源的消耗也是重要的課題之一，加上現在可攜式電子產品是所有電子產品銷售的主力，直流對直流轉換器所扮演的腳色也越來越重要。直流對直流轉換器的轉換效率會直接影響到電池以及電子產品的使用時間，故如何提升效率一直都是研究直流轉換器的最大目標。 In recent years, energy issues have been the focus of attention from all walks of life. In addition to studying alternatives to various energy sources, how to solve energy consumption is also an important issue. Nowadays, portable electronic products are the mainstay of all electronic products sales, and the role of DC-to-DC converters is also increasing. The more important it is. The conversion efficiency of DC-to-DC converters directly affects the battery and electronic product usage time, so how to improve efficiency has always been the biggest goal of DC converters.
傳統切換式直流對直流轉換器雖然擁有很好的轉換效率，但是也付出了一定程度上的代價：需要大量外部被動元件以及暫態反應較慢的缺點。因為傳統直流對直流轉換器需要外接大量的被動元件(電桿、電阻與電容)，到只整體體積過大，較難配合現今攜帶型電子產品輕巧化的趨勢，而暫態反應較慢的這個缺點也限制了產品的操作速度，無法達到快速反應的要求。 Although the traditional switched DC-to-DC converter has good conversion efficiency, it also comes at a certain price: it requires a large number of external passive components and the shortcomings of slow transient response. Because the traditional DC-to-DC converter needs to connect a large number of passive components (poles, resistors and capacitors), the overall volume is too large, it is difficult to match the trend of light weight of today's portable electronic products, and the shortcoming of transient response is slow. It also limits the speed of operation of the product and does not meet the requirements for rapid response.
除了可攜式電子產品外，另一個逐漸抬頭的研究方向是smart sensor(智慧感應器)。smart sensor可運用的範圍非常廣，從森林火災監控、軍事戰場監控到人體生理狀態監控等，都會需要使用smart sensor這種系統。而這種系統對sensor端的要求不是強大的運算處理能力，而是輕巧的體積與續航能力，而這也是傳統直流對直流轉換器 不好發揮的地方。 In addition to portable electronic products, another research direction that is gradually rising is the smart sensor. The smart sensor can be used in a wide range of applications, from forest fire monitoring, military battlefield monitoring to human physiological monitoring. The requirement of the sensor on the sensor side is not a powerful computing processing capability, but a lightweight volume and endurance, and this is also a conventional DC-to-DC converter. A place that is not easy to play.
請參考中華民國公告發明專利第I362817號，係揭露一種直流轉換控制系統，用以接收一輸入電壓以產生一輸出電壓，包括一脈衝寬度調變器、一脈衝頻率調變器、一第一開關裝置、以及一直流轉換電路。上述脈衝寬度調變器與上述脈衝頻率調變器，分別根據上述輸入電壓以及上述輸出電壓產生一脈衝寬度調變訊號和一脈衝頻率調變訊號。上述第一開關裝置根據上述脈衝寬度調變訊號以及上述脈衝頻率調變訊號其中之一者產生一驅動訊號。上述直流轉換電路用以接收上述驅動訊號以產生上述輸出電壓。 Please refer to the Republic of China Announcement Patent No. I362817, which discloses a DC conversion control system for receiving an input voltage to generate an output voltage, including a pulse width modulator, a pulse frequency modulator, and a first switch. Device, and DC conversion circuit. The pulse width modulator and the pulse frequency modulator respectively generate a pulse width modulation signal and a pulse frequency modulation signal according to the input voltage and the output voltage. The first switching device generates a driving signal according to one of the pulse width modulation signal and the pulse frequency modulation signal. The DC conversion circuit is configured to receive the driving signal to generate the output voltage.
請參考中華民國公告新型專利第M269648號，係揭露一種具有自動切換脈衝寬度調變模式及脈衝頻率調變模式之轉換器，係透過功率開關驅動單元將直流電力升壓轉換，提供給一負載使用，包括有：一啟動控制單元，係輸出一啟動致能訊號；一PWM/PFM自動切換控制電路，連接於該啟動控制單元係接收該啟動致能訊號，用以輸出一選擇訊號；一PWM控制單元與一PFM控制單元，係同時連接於該PWM/PFM自動切換控制電路、該功率開關驅動單元及該負載，並分別輸出一PWM控制訊號與一PFM控制訊號給該功率開關驅動單元，藉以控制該功率開關驅動單元之切換動作。 Please refer to the Republic of China Announcement No. M269648, which discloses a converter with an automatic switching pulse width modulation mode and a pulse frequency modulation mode. The DC power is boosted and converted to a load through a power switch driving unit. The method includes: a start control unit, which outputs a start enable signal; a PWM/PFM automatic switching control circuit connected to the start control unit to receive the start enable signal for outputting a selection signal; a PWM control The unit and a PFM control unit are simultaneously connected to the PWM/PFM automatic switching control circuit, the power switch driving unit and the load, and respectively output a PWM control signal and a PFM control signal to the power switch driving unit, thereby controlling The switching action of the power switch drive unit.
請參考中華民國公開發明專利第201112593號，係揭露一種切換式電源供應器(SMPS)，其藉由取決於負載電流而在脈衝頻率調變(PFM)與脈衝寬度調變(PWM)之間轉換以控制該SMPS而在自無負載至滿負載之一整個操作範圍中具有經最佳化之效率。PFM操作模式與PWM操作模式之間的準確、平順且無縫轉換發生在一(若干) 預定負載電流處。PFM操作在輕負載條件期間改良效率，且PWM在較高負載電流處具有較佳效率。此在電池供電的應用中係有利，且藉此產生在需要電池替換或重新充電之前的一較長使用時間。 Please refer to the Republic of China Public Invention Patent No. 201112593, which discloses a switched power supply (SMPS) which converts between pulse frequency modulation (PFM) and pulse width modulation (PWM) depending on load current. To control the SMPS, there is an optimized efficiency over the entire operating range from no load to full load. Accurate, smooth and seamless transition between PFM mode of operation and PWM mode of operation occurs in one (several) The load current is predetermined. PFM operation improves efficiency during light load conditions and PWM has better efficiency at higher load currents. This is advantageous in battery powered applications and thereby creates a longer use time before battery replacement or recharging is required.
請參考中華民國公開發明專利第200622546號，係揭露一種電壓調節技術，其涉及以負載情況為基礎而於輕負載模式及脈衝寬度調變模式之間切換。所具有的優點是，可改善輕負載之效率。一實施例中，因為電壓為負載情況良好指標，所以使用電壓輸出來決定負載是否很輕。當偵測到輕負載時，擴充時脈非導通時間直到輸出電壓達到負載門檻為止。 Please refer to the Republic of China Public Invention Patent No. 200622546, which discloses a voltage regulation technique which involves switching between a light load mode and a pulse width modulation mode based on a load condition. This has the advantage of improving the efficiency of light loads. In one embodiment, because the voltage is a good indicator of load conditions, the voltage output is used to determine if the load is very light. When a light load is detected, the clock is not turned on until the output voltage reaches the load threshold.
上述所提到的習知技術係利用PFM+PWM控制來達到所需要的效果。傳統的直流轉換器有著很多難以配合現今趨勢的缺點，故此專利使用高速切換的直流對直流轉換器架構為出發點，加入所提出特別設計的改善電路來解決傳統直流轉換器與一般高速直流對直流轉換器在新興領域不足的地方。 The above-mentioned conventional techniques utilize PFM+PWM control to achieve the desired effect. Traditional DC converters have many shortcomings that are difficult to match with today's trends. Therefore, the patent uses a high-speed switching DC-to-DC converter architecture as a starting point. The specially designed improved circuit is added to solve the traditional DC converter and general high-speed DC-to-DC conversion. The device is not enough in the emerging field.
現有改善直流對直流高速轉換器的技術可分為兩大類，其中，第一類為使用PWM與PFM兩種控制方法的控制技術，此類技術雖可以達到改善輕載效率之功效，但由於需要使用兩個不同的控制器，導致耗電量高，故改善的空間有限；而第二類係為使用DCM控制方法，此類改善電路並未採用PWM控制而採用自行提出的DCM做控制，不管輕載、重載都是使用自己的DCM控制器，在輕載改善上有不錯的提升，但在重載之下的效率仍是不如PWM控制來的高。 The existing technologies for improving DC-DC high-speed converters can be divided into two categories. Among them, the first type is the control technology using two control methods of PWM and PFM. Although such technology can achieve the effect of improving light load efficiency, due to the need The use of two different controllers results in high power consumption, so the space for improvement is limited. The second type is the use of DCM control methods. Such improved circuits do not use PWM control and use their own proposed DCM for control, regardless of Light load and heavy load are all using their own DCM controller, which has a good improvement in light load improvement, but the efficiency under heavy load is still not as high as that of PWM control.
基於上述問題，發明人提出了一種高速轉換器的輕載效率改善電路結構，以克服現有技術的缺陷。 Based on the above problems, the inventors have proposed a light load efficiency improving circuit structure of a high speed converter to overcome the drawbacks of the prior art.
依據目前既有改善技術所得知，高速轉換器在重載時使用PWM控制能得到最高的效率，而在輕載時使用DCM控制則會有最好的改善效果；故為了使高速轉換器在所有負載下都有很好的效率，本發明係提供一種高速轉換器的輕載效率改善電路結構，其係可配掛在脈波寬度調變(PWM)控制下之新型非連續電流模式(DCM，Discontinuous Current Mode)控制器；此控制器在輕載下才會作動，其係可達到超低耗電、在輕載下減少切換頻率、控制輕載時其電感內的能量與防止逆向電感電流的發生的功效，經由此技術之控制，可大大提升輕載效率，進而使高速轉換器更適用於任何電子產品中。 According to the current improvement technology, high-speed converters can achieve the highest efficiency by using PWM control during heavy load, and DCM control at light load will have the best improvement; therefore, in order to make high-speed converters at all The invention has a good efficiency under load. The present invention provides a light-load efficiency improving circuit structure of a high-speed converter, which can be matched with a novel discontinuous current mode (DCM) under pulse width modulation (PWM) control. Discontinuous Current Mode controller; this controller can be operated under light load, which can achieve ultra-low power consumption, reduce switching frequency under light load, control the energy inside the inductor and prevent reverse inductor current at light load. The effect of this technology, through the control of this technology, can greatly improve the light load efficiency, which makes the high-speed converter more suitable for any electronic products.
為達上述目的，本發明係提供一直流對直流高速轉換器的輕載效率改善電路結構，該直流對直流高速轉換器係至少包括相互電性連接的一誤差信號放大電路、一比較器、一鋸齒波產生器、以及一電流感測器，而該輕載效率改善電路結構係包括：一輕載效率改善電路，係透過一多工器而與該直流對直流高速轉換器電性連接；以及一暫態偵測電路，係透過該多工器以與該直流對直流高速轉換器電性連接。 To achieve the above object, the present invention provides a light load efficiency improving circuit structure for a DC-to-DC high-speed converter, the DC-DC high-speed converter comprising at least an error signal amplifying circuit electrically connected to each other, a comparator, and a a sawtooth generator, and a current sensor, wherein the light load efficiency improving circuit structure comprises: a light load efficiency improving circuit electrically connected to the DC to DC high speed converter through a multiplexer; A transient detection circuit is electrically connected to the DC-to-DC high-speed converter through the multiplexer.
在某些實施例中，該高速轉換器更包括一緩衝器，係與該多工器電性連接。 In some embodiments, the high speed converter further includes a buffer electrically coupled to the multiplexer.
在某些實施例中，該誤差信號放大電路係為一基本的二級放大器，該誤差信號放大電路係更與一補償電路電性連接。 In some embodiments, the error signal amplifying circuit is a basic two-stage amplifier, and the error signal amplifying circuit is further electrically connected to a compensation circuit.
在某些實施例中，該電流感測器以及該輕載效率改善電路係為寬頻。 In some embodiments, the current sensor and the light load efficiency improving circuit are broadband.
在某些實施例中，該鋸齒波產生器係主要輸出一鋸齒波訊號以及一脈衝訊號，鋸齒波訊號係當作補償使用，而脈衝訊號係每個周期的起始訊號。 In some embodiments, the sawtooth generator mainly outputs a sawtooth wave signal and a pulse signal, the sawtooth wave signal is used as compensation, and the pulse signal is the start signal of each cycle.
在某些實施例中，該直流對直流高速轉換器係為一電流式結構。 In some embodiments, the DC to DC high speed converter is a current mode configuration.
其中，該輕載效率改善電路係包括相互電性連接的一SR閂鎖器、若干反向(NOT)邏輯閘、一多工器，其係更包括一控制端、一輸入端、一p輸入端以及一n輸入端。 The light load efficiency improving circuit includes an SR latch, a plurality of reverse logic gates, and a multiplexer electrically connected to each other, and further includes a control end, an input end, and a p input. End and an n input.
其中，當該輕載效率改善電路進入一DCM操作時，該控制端係偵測為”low”，使該n輸入端的輸出訊號為”high”，該電感開始放電至”0”時，該控制端會再次改為”high”，此時該SR閂鎖器的一S訊號為”low”(放電時該輸入端的訊號為”high”)，該SR閂鎖器輸出保持”low”，該n輸入端為”low”，關閉一power NMOS，此時該輸入端訊號為”high”，該power NMOS也是關閉的，一直維持這個狀態直到輸出低於一設定值，該輸入端之訊號再次變為”low”，使該SR閂鎖器輸出變為”high”，打開該n輸入端開始充電。 Wherein, when the light load efficiency improving circuit enters a DCM operation, the control terminal detects "low", and the output signal of the n input terminal is "high", and the control starts to discharge to "0", the control The end will be changed to "high" again. At this time, the S signal of the SR latch is "low" (the signal of the input is "high" when discharging), and the SR latch output remains "low", the n The input terminal is "low", and a power NMOS is turned off. At this time, the input signal is "high", and the power NMOS is also turned off. This state is maintained until the output is lower than a set value, and the signal of the input is changed again. "low" causes the SR latch output to go "high", turning on the n input to begin charging.
其中，該暫態偵測電路係包括一多工器以及一比較器，該比較器的(+)輸入端係為電壓Vref2，(-)輸入端係為電壓Vout，而該比較器的輸出端係電性連接到該多工器的一sel輸入端，該多工器的一d1輸入端係電性連接到該SR閂鎖器，該多工器的一d0輸入端係電性 連接到該輕載效率改善電路，而該多工器71的一out輸出端係電性連接到該緩衝器。 The transient detection circuit includes a multiplexer and a comparator. The (+) input of the comparator is a voltage V ref2 , and the (-) input is a voltage V out , and the comparator is The output end is electrically connected to a sel input end of the multiplexer, and a d1 input end of the multiplexer is electrically connected to the SR latch, and a d0 input end of the multiplexer is electrically connected To the light load efficiency improving circuit, an out output of the multiplexer 71 is electrically connected to the buffer.
本發明係先解決傳統直流轉換器需要外接大量被動元件與暫態反應不夠快的問題。在直流對直流轉換器中，有分切換式與非切換式兩種，切換式的直流轉換器效率高但面積大，且需要外接被動元件，非切換式則是效率較低但面積小，可以不用使用外部的被動元件，而此本發明係利用高速切換式的直流轉換器達到上述兩者共有之優點，而高速直流轉換器的好處是可以利用較高的切換頻率來縮小所需要的被動元件的尺寸大小，使元件可以製作至晶片內部，以取代外接方式，再加上高速的切換頻率，使暫態反應的時間會比傳統直流轉換器暫態反應時間的更快。 The invention solves the problem that the conventional DC converter needs to externally connect a large number of passive components and the transient reaction is not fast enough. In the DC-to-DC converter, there are two types of switching type and non-switching type. The switching type DC converter has high efficiency but large area, and requires external passive components. The non-switching type is low in efficiency but small in area. There is no need to use external passive components, and the present invention utilizes a high-speed switching DC converter to achieve the advantages of both, and the high-speed DC converter has the advantage of using a higher switching frequency to reduce the required passive components. The size of the component allows the component to be fabricated inside the wafer instead of the external connection, plus the high-speed switching frequency, which makes the transient response time faster than the traditional DC converter transient response time.
而所解決的第二個問題是轉換效率。高速切換頻率帶來的缺點則是轉換效率會因切換損耗的提高而變低，尤其是在輕載(輕負載)的狀態下。故在本發明係外加一輕載效率改善電路來改善這個缺點，達到比非切換式直流轉換器更高的轉換效率，又可以不使用外部被動元件，所想整體體積，使本發明的高速直流轉換器能比傳統直流轉換器更適合新一代產品使用，其係更包括使用於smart sensor系統。 The second problem solved is conversion efficiency. The disadvantage of high-speed switching frequency is that the conversion efficiency is reduced due to the increase of switching loss, especially in the light load (light load) state. Therefore, in the present invention, a light load efficiency improving circuit is added to improve the shortcoming, achieving higher conversion efficiency than the non-switching DC converter, and the high-speed direct current of the present invention can be achieved without using external passive components. The converter is more suitable for next-generation products than traditional DC converters, and it is also used in smart sensor systems.
本發明更是加入一個暫態改善電路transient detector來改善整體電路的暫態表現。高速切換式直流轉換器本身就比傳統直流轉換器具有更快速的反應時間，但因為所設計的輕載效率改善電路本身會影響到電路的暫態時間，故暫態改善電路是專門來改善這個問題。當電路在由重載(重負載)瞬間轉回輕附載的時候，暫態反應會出現一個極大的突波，而此暫態改善電路係可限制此突波的大小而使突波不會影響 到整體電路之表現。 The invention further adds a transient detector to improve the transient performance of the overall circuit. The high-speed switching DC converter itself has a faster response time than the conventional DC converter, but the transient improvement circuit is specially designed to improve this because the designed light load efficiency improvement circuit itself affects the transient time of the circuit. problem. When the circuit is switched back to the light load by the heavy load (heavy load), the transient reaction will have a huge surge, and the transient improvement circuit can limit the magnitude of the surge so that the surge does not affect. To the performance of the overall circuit.
雖然本發明使用了幾個較佳實施例進行解釋，但是下列圖式及具體實施方式僅僅是本發明的較佳實施例；應說明的是，下面所揭示的具體實施方式僅僅是本發明的例子，並不表示本發明限於下列圖式及具體實施方式。 While the invention has been described in terms of several preferred embodiments, the preferred embodiments of the present invention It is not intended that the invention be limited to the following drawings and embodiments.
請參考圖1，係表示本發明直流對直流高速轉換器的輕載效率改善電路結構的電路架構圖；本發明之直流對直流高速轉換器的輕載效率改善電路結構1係與傳統切換式直流轉換器大致相似，本發明所使用的是電流式的架構，電流式的好處是可以用較簡單的補償電路就達到穩定性，這對節省晶片面積是一項很大的優點。 Please refer to FIG. 1 , which is a circuit diagram showing a light load efficiency improving circuit structure of a DC-DC high-speed converter according to the present invention; the light-load efficiency improving circuit structure 1 of the DC-DC high-speed converter of the present invention is connected with a conventional switching DC The converters are generally similar. The present invention uses an amperage architecture. The current mode has the advantage that stability can be achieved with a simpler compensation circuit, which is a great advantage for saving wafer area.
本發明的直流對直流高速轉換器1係包括一誤差信號放大電路2、一比較器3、一鋸齒波產生器4、以及一電流感測器5，而一輕載效率改善電路6以及一暫態偵測電路7係透過一多工器MUX以與直流對直流高速轉換器1電性連接；而高速轉換器1中更包括一緩衝器BUF、一電感器L、電阻(R1、R2、Resr1)、電晶體(MP1、MN1)、一電容器Cout1、電壓(VDD、Vout1、Vref1)、RS正反器(RS F/F)、負載Load。本發明中的電流感測器5以及輕載效率改善電路6係為寬頻，所有的電路架構將會在下面分別作介紹。 The DC-DC high-speed converter 1 of the present invention comprises an error signal amplifying circuit 2, a comparator 3, a sawtooth generator 4, and a current sensor 5, and a light load efficiency improving circuit 6 and a temporary The state detecting circuit 7 is electrically connected to the DC-DC high-speed converter 1 through a multiplexer MUX, and the high-speed converter 1 further includes a buffer BUF, an inductor L, and a resistor (R 1 , R 2 ). , R esr1 ), transistor (M P1 , M N1 ), a capacitor C out1 , voltage (V DD , V out1 , V ref1 ), RS flip-flop (RS F/F), load Load. The current sensor 5 and the light load efficiency improving circuit 6 in the present invention are broadband, and all circuit configurations will be separately described below.
誤差信號放大器2：(Error Amplifier) Error Amplifier 2: (Error Amplifier)
請同時參考圖2，係表示本發明誤差信號放大器中基本二級放大器的電路結構示意圖。誤差信號放大電路2係為一基本的二級放大器 21，更與一補償電路22(如圖3所示)電性連接，其中，放大器21是用來放大輸出回授電壓與參考電壓的誤差值，做為控制電路的參考；而補償電路22係用於提升整體電路之穩定性，因為本發明的切換頻率較高且是使用電流式的架構，故採用最簡單的type I補償即可達到電路穩定與快速暫態反應的要求。 Please refer to FIG. 2 at the same time, which is a schematic diagram showing the circuit structure of the basic secondary amplifier in the error signal amplifier of the present invention. The error signal amplifying circuit 2 is a basic two-stage amplifier 21, further connected to a compensation circuit 22 (shown in FIG. 3), wherein the amplifier 21 is used to amplify the error value of the output feedback voltage and the reference voltage as a reference of the control circuit; and the compensation circuit 22 It is used to improve the stability of the whole circuit. Because the switching frequency of the present invention is high and the current type is used, the simplest type I compensation can be used to achieve the requirements of circuit stability and fast transient response.
比較器3：(Comparator) Comparator 3: (Comparator)
請參考圖4，係表示本發明之比較器的電路示意圖；本發明之比較器3相較於傳統比較器有著低功率消耗與速度快的優點，而其係因採用latch的架構設計，故其輸入電壓的範圍較小，會比較接近VDD或GND的電壓訊號；由於本發明係在高速切換下盡量要求達到最高的效率，故採用此種架構較佳。 Please refer to FIG. 4, which is a circuit diagram of the comparator of the present invention. The comparator 3 of the present invention has the advantages of low power consumption and high speed compared with the conventional comparator, and the design of the latch is based on the architecture of the latch. The range of the input voltage is small, and the voltage signal close to V DD or GND is relatively small; since the present invention is required to achieve the highest efficiency under high-speed switching, it is preferable to adopt such a structure.
鋸齒波產生器4：(Ramp Generator) Sawtooth Generator 4: (Ramp Generator)
請參考圖5，係表示本發明之鋸齒波產生器的電路示意圖。鋸齒波產生器4的主要輸出有兩個訊號：Vsaw與Vclk，其中Vsaw為鋸齒波訊號，Vclk為脈衝訊號，而鋸齒波訊號(Vsaw)係在電流式轉換器中是當作補償使用，而脈衝訊號(Vclk)則是電流式轉換器每個周期的起始訊號，故整個直流轉換器1的操作頻率是由鋸齒波產生器4決定，本發明所設定的頻率係可為50MHz。 Please refer to FIG. 5, which is a circuit diagram showing the sawtooth wave generator of the present invention. The main output of the sawtooth generator 4 has two signals: Vsaw and Vclk, where Vsaw is a sawtooth wave signal, Vclk is a pulse signal, and the sawtooth wave signal (Vsaw) is used as a compensation in the current converter. The pulse signal (Vclk) is the start signal of each cycle of the current converter, so the operating frequency of the entire DC converter 1 is determined by the sawtooth generator 4, and the frequency set by the present invention can be 50 MHz.
寬頻電流感測器5：(Wide-Band Current Sensor) Broadband Current Sensor 5: (Wide-Band Current Sensor)
請參考圖6，係表示本發明之電流感測器的電路示意圖；本發明之電流感測器與傳統之電流感測器不同的地方，在於本發明之電流感測器係使用單級放大器(single stage amplifier)以取代傳統之電流感測器中的運算放大器(operational amplifier)，其係可獲得較大的頻寬以配 合高速切換的直流轉換器。 Please refer to FIG. 6 , which is a circuit diagram of the current sensor of the present invention. The current sensor of the present invention is different from the conventional current sensor in that the current sensor of the present invention uses a single-stage amplifier ( Single stage amplifier) to replace the operational amplifier in the traditional current sensor, which can obtain a larger bandwidth to match A high-speed switching DC converter.
輕載效率改善電路6：(Efficiency Improvement Circuit) Light load efficiency improvement circuit 6: (Efficiency Improvement Circuit)
請參考圖7B，係表示本發明之輕載效率改善電路的電路架構示意圖。在輕載(輕負載)的狀態下能減去逆電感電流所產生的消耗以及降低切換速度來改善切換消耗，因此，在加入輕載效率改善電路6時，於重載(重負載)下並不會有任何改變，但在輕載狀態下則會依照負載的大小自動改變切換速度且不會有逆電感電流的情況發生。由於輕載效率改善電路6係使用數位電路來實現，故此電路所需要的功耗小，不會對直流轉換器的效率產生太大影響。 Please refer to FIG. 7B, which is a schematic diagram showing the circuit architecture of the light load efficiency improving circuit of the present invention. In the light load (light load) state, the consumption caused by the reverse inductor current can be reduced and the switching speed can be reduced to improve the switching consumption. Therefore, when the light load efficiency improving circuit 6 is added, under heavy load (heavy load) There will be no change, but in the light load state, the switching speed will be automatically changed according to the size of the load and there will be no reverse inductor current. Since the light load efficiency improvement circuit 6 is implemented using a digital circuit, the power consumption required by the circuit is small and does not have a large influence on the efficiency of the DC converter.
請再參考圖7A，係表示本發明之輕載效率改善電路的流程圖。圖7A係表示用於本發明的DCM控制電路。其流程係包括以下步驟：步驟S1：控制感測；步驟S2：確認是否為DCM狀態；步驟S3：若否，則進行正常CCM控制；步驟S4：若是，則暫時閒置；步驟S5：確認輸出是否缺少能量；若否，則回到步驟S4；步驟S6：若是，則電感進行充電；步驟S7：確認是否達到充電階段；若否，則回到步驟S6；步驟S8：若是，則進行充電。 Referring again to FIG. 7A, there is shown a flow chart of the light load efficiency improving circuit of the present invention. Fig. 7A shows a DCM control circuit used in the present invention. The process includes the following steps: step S1: controlling sensing; step S2: confirming whether it is a DCM state; step S3: if not, performing normal CCM control; step S4: if yes, temporarily idle; step S5: confirming whether the output is If there is no energy, if it is not, then return to step S4; if it is, then the inductor is charged; step S7: confirm whether the charging phase is reached; if not, return to step S6; and if so, then perform charging.
在圖7B中，輕載效率改善電路6係包括相互電性連接的一SR閂鎖器(SR latch)61、若干反向(NOT)邏輯閘(本發明以四個為例進行說明，但並不以此為限)62、一多工器63，其係更包括一控制端(control)、一輸入端(in)、一p輸入端(p_in)以及一n輸入端(n_in)。 In FIG. 7B, the light load efficiency improvement circuit 6 includes an SR latch 61 and a plurality of reverse logic gates electrically connected to each other (the invention is described by taking four examples as an example, but Not limited to this) 62, a multiplexer 63, which further includes a control, an input (in), a p input (p_in) and an n input (n_in).
請參考圖7C，係表示圖7A之電路波形圖。當輕載效率改善電路6進入DCM操作時，控制端(control)會偵測為”low”，使n輸入端(n_in)的輸出訊號為”high”，電感開始放電至”0”時，控制端(control)會再次改為”high”，此時SR閂鎖器61的S訊號為”low”(放電時輸入端(in)的訊號為”high”)，SR閂鎖器61輸出保持”low”，n輸入端(n_in)為”low”，關閉power NMOS(圖未示)，此時輸入端(in)訊號為”high”，power NMOS(圖未示)也是關閉的；電路會一直維持這個狀態直到輸出低於設定值，輸入端(in)訊號會再次變為”low”，使SR閂鎖器61輸出變為”high”，打開n輸入端(n_in)開始充電。 Please refer to FIG. 7C, which is a circuit waveform diagram of FIG. 7A. When the light load efficiency improving circuit 6 enters the DCM operation, the control terminal detects "low", so that the output signal of the n input terminal (n_in) is "high", and when the inductor starts to discharge to "0", the control is performed. The control will be changed to "high" again. At this time, the S signal of the SR latch 61 is "low" (the signal of the input (in) is "high" when discharging), and the output of the SR latch 61 is maintained." Low", n input (n_in) is "low", turn off the power NMOS (not shown), the input (in) signal is "high", the power NMOS (not shown) is also off; the circuit will always Maintain this state until the output is lower than the set value, the input (in) signal will become "low" again, the SR latch 61 output will be "high", and the n input (n_in) will be turned on to start charging.
暫態偵測電路7：(Transient detector) Transient detector circuit 7: (Transient detector)
請參考圖8A，係表示本發明之暫態偵測電路之電路示意圖。暫態偵測電路7係包括一多工器71以及一比較器72；比較器72的(+)輸入端係為電壓Vref2，(-)輸入端係為電壓Vout、而比較器72的輸出端係電性連接到多工器72的sel輸入端，多工器71的d1輸入端係電性連接到SR閂鎖器61，多工器71的d0輸入端係電性連接到輕載效率改善電路6，而多工器71的out輸出端係電性連接到緩衝器BUF。 Please refer to FIG. 8A, which is a circuit diagram of the transient detecting circuit of the present invention. The transient detecting circuit 7 includes a multiplexer 71 and a comparator 72; the (+) input terminal of the comparator 72 is a voltage V ref2 , and the (-) input terminal is a voltage V out , and the comparator 72 is The output end is electrically connected to the sel input end of the multiplexer 72. The d1 input end of the multiplexer 71 is electrically connected to the SR latch 61, and the d0 input end of the multiplexer 71 is electrically connected to the light load. The efficiency improvement circuit 6 is electrically connected to the buffer BUF of the out output of the multiplexer 71.
暫態改善電路圖7的操作原理說明如下。其係先設定一個電壓準位Vref2，將此電壓準位Vref2與輸出電壓做比較，當輸出電壓因為暫態變化所產生的突波超出這個電壓準位Vref2時，會改變多功器(MUX)71的狀態，使原本控制訊號由輕載效率改善電路6的訊號轉換成一般PWM控制訊號，即直接由SR閂鎖器61輸出到緩衝器BUF。 Transient Improvement Circuit The operation principle of Figure 7 is explained below. The system first sets a voltage level V ref2 , and compares the voltage level V ref2 with the output voltage. When the output voltage exceeds the voltage level V ref2 due to the transient change, the multiplexer is changed. The state of (MUX) 71 causes the original control signal to be converted by the light load efficiency improving circuit 6 into a general PWM control signal, that is, directly outputted to the buffer BUF by the SR latch 61.
請參考圖8B，係表示本發明之高速直流轉換器電性連接輕載效率改善電路(Efficiency Improvement Circuit)後所會發生暫態問題的曲 線圖。在從重載切換到輕載的瞬間，輸出端會產生很大的突波，導致影響電路反應的速度。因此電性連接暫態偵測電路7(如圖1所示)來偵測電路突波的發生。 Please refer to FIG. 8B, which is a diagram showing a transient problem that occurs after the high-speed DC converter of the present invention is electrically connected to an efficiency improvement circuit (Efficiency Improvement Circuit). line graph. At the moment of switching from heavy load to light load, the output will generate a large glitch, which will affect the speed of the circuit reaction. Therefore, the transient detection circuit 7 (shown in FIG. 1) is electrically connected to detect the occurrence of circuit surges.
請再同時參考圖9，係表示本發明暫態偵測電路工作原理的波形圖；其係利用所設定的參考(Reference)電壓作為臨界(threshold)電壓；當電路係因為暫態反應而使輸出電壓超過臨界電壓值時，電路會強制關閉輕載效率改善電路6的作動，使電路回復到原本PWM控制，因為高速直流轉換器本身就擁有快速的反應，在暫態反應時切換回原本PWM控制可讓因為輕載效率改善電路6作動而產生的問題消失，使電路擁有原本的快速反應時間。 Please refer to FIG. 9 at the same time, which is a waveform diagram showing the working principle of the transient detecting circuit of the present invention; it uses the set reference voltage as a threshold voltage; when the circuit is output due to transient reaction When the voltage exceeds the threshold voltage, the circuit will forcibly turn off the light load efficiency improvement circuit 6 to make the circuit return to the original PWM control, because the high-speed DC converter itself has a fast response, and switches back to the original PWM control during the transient reaction. The problem caused by the light load efficiency improvement circuit 6 can be eliminated, so that the circuit has the original fast response time.
由於高速轉換器在重載時使用PWM控制能得到最佳的效率，在輕載時使用DCM控制則會有最佳的改善效果，請再參考圖10，係表示本發明在高速直流轉換器在電性連接輕載效率改善電路前後的效果比較圖；在重載下整個電路是用PWM做控制，在輕載下則是由DCM控制器在做運作，使直流高速轉換器在不同負載都可以達到高效率的輸出。 Since the high-speed converter can achieve the best efficiency by using PWM control during heavy load, the DCM control will have the best improvement effect at light load. Please refer to FIG. 10 again to show that the present invention is in the high-speed DC converter. Electrical connection light load efficiency improvement circuit before and after the effect comparison diagram; under heavy load, the whole circuit is controlled by PWM, under light load, it is operated by DCM controller, so that DC high speed converter can be used in different loads. Achieve high efficiency output.
請參考圖11，係表示本發明高速轉換器電性連接輕載效率改善電路前後的效率圖以及與線性轉換器(LDO)效率的比較圖。由圖中可以看出，在未加入輕載效率改善電路6之前的高速轉換器於輕載下的轉換效率是甚低於線性轉換器的轉換效率，但在電性連接輕載效率改善電路6後係大大提升輕載下的轉換效率，使整個高速轉換器更適用於各種應用。請再參考圖12，係表示本發明使用DCM控制技術與習知CCM控制技術之比較圖，其係可看出本發明使用DCM控制技術 的轉換效率係比習知連續電流模式(CCM，Continuous Current Mode)控制技術更佳，並提供更佳的效率表現。 Please refer to FIG. 11 , which is a graph showing the efficiency of the high-speed converter of the present invention before and after the light connection efficiency improvement circuit and the comparison with the efficiency of the linear converter (LDO). As can be seen from the figure, the conversion efficiency of the high-speed converter before the light load efficiency improvement circuit 6 under light load is lower than that of the linear converter, but the light connection efficiency improvement circuit 6 is electrically connected. The rear system greatly enhances the conversion efficiency under light load, making the entire high-speed converter more suitable for various applications. Please refer to FIG. 12 again, which is a comparison diagram of the present invention using DCM control technology and conventional CCM control technology, which can be seen that the present invention uses DCM control technology. The conversion efficiency is better than the CCM (Continuous Current Mode) control technology and provides better efficiency performance.
雖然本發明以相關的較佳實施例進行解釋，但是這並不構成對本發明的限制。應說明的是，本領域的技術人員根據本發明的思想能夠構造出很多其他類似實施例，這些均在本發明的保護範圍之中。 Although the present invention has been explained in connection with the preferred embodiments, it is not intended to limit the invention. It should be noted that many other similar embodiments can be constructed in accordance with the teachings of the present invention, which are within the scope of the present invention.
1‧‧‧直流對直流高速轉換器 1‧‧‧DC to DC High Speed Converter
2‧‧‧誤差信號放大電路 2‧‧‧Error signal amplifier circuit
21‧‧‧二級放大器 21‧‧‧secondary amplifier
22‧‧‧補償電路 22‧‧‧Compensation circuit
3‧‧‧比較器 3‧‧‧ comparator
4‧‧‧鋸齒波產生器 4‧‧‧Sawtooth generator
5‧‧‧電流感測器 5‧‧‧ Current sensor
6‧‧‧輕載效率改善電路 6‧‧‧Light load efficiency improvement circuit
61‧‧‧SR閂鎖器 61‧‧‧SR latch
62‧‧‧反向(NOT)邏輯閘 62‧‧‧Reverse (NOT) logic gate
63‧‧‧多工器 63‧‧‧Multiplexer
7‧‧‧暫態偵測電路 7‧‧‧Transient detection circuit
71‧‧‧多工器 71‧‧‧Multiplexer
72‧‧‧比較器 72‧‧‧ comparator
BUF‧‧‧緩衝器 BUF‧‧‧ buffer
Cout1‧‧‧電容器 C out1 ‧‧‧ capacitor
control‧‧‧控制端 Control‧‧‧control terminal
in‧‧‧輸入端 In‧‧‧ input
L‧‧‧電感器 L‧‧‧Inductors
Load‧‧‧負載 Load‧‧‧load
MP1、MN1‧‧‧電晶體 M P1 , M N1 ‧‧‧O crystal
n_in‧‧‧n輸入端 N_in‧‧‧n input
p_in‧‧‧p輸入端 P_in‧‧‧p input
R1、R2、Resr1‧‧‧電阻 R 1 , R 2 , R esr1 ‧‧‧ resistance
RS F/F‧‧‧RS正反器 RS F/F‧‧‧RS forward and reverse
sel‧‧‧輸入端 Sel‧‧‧ input
d0‧‧‧輸入端 D0‧‧‧ input
d1‧‧‧輸入端 D1‧‧‧ input
VDD、Vout1‧‧‧電壓 V DD , V out1 ‧‧‧ voltage
Vref1‧‧‧電壓 V ref1 ‧‧‧ voltage
Vref2‧‧‧電壓 V ref2 ‧‧‧ voltage
Vout‧‧‧電壓 V out ‧‧‧ voltage
Vsaw‧‧‧鋸齒波訊號 Vsaw‧‧‧Sawtooth Signal
Vclk‧‧‧脈衝訊號 Vclk‧‧‧pulse signal
圖1 係表示本發明直流對直流高速轉換器的輕載效率改善電路結構的電路架構圖。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram showing the structure of a light load efficiency improving circuit of a DC-DC high speed converter of the present invention.
圖2 係表示本發明誤差信號放大器中基本二級放大器的電路結構示意圖。 Fig. 2 is a circuit diagram showing the structure of a basic secondary amplifier in the error signal amplifier of the present invention.
圖3 係表示本發明誤差信號放大器中補償電路的電路結構示意圖。 Fig. 3 is a circuit diagram showing the structure of a compensation circuit in the error signal amplifier of the present invention.
圖4 係表示本發明之比較器的電路示意圖。 Figure 4 is a circuit diagram showing the comparator of the present invention.
圖5 係表示本發明之鋸齒波產生器的電路示意圖。 Fig. 5 is a circuit diagram showing the sawtooth wave generator of the present invention.
圖6 係表示本發明之電流感測器的電路示意圖。 Figure 6 is a circuit diagram showing the current sensor of the present invention.
圖7A 係表示本發明之輕載效率改善電路的流程圖。 Fig. 7A is a flow chart showing the light load efficiency improving circuit of the present invention.
圖7B 係表示本發明之輕載效率改善電路的電路架構示意圖。 Fig. 7B is a circuit diagram showing the light load efficiency improving circuit of the present invention.
圖7C 係表示圖7A之電路波形圖。 Fig. 7C is a circuit diagram showing the circuit of Fig. 7A.
圖8A 係表示本發明之暫態偵測電路之電路示意圖。 Fig. 8A is a circuit diagram showing the transient detecting circuit of the present invention.
圖8B 係表示本發明之高速直流轉換器電性連接輕載效率改善電路後所會發生暫態問題的曲線圖。 Fig. 8B is a graph showing a transient problem occurring after the high-speed DC converter of the present invention is electrically connected to the light load efficiency improving circuit.
圖9 係表示本發明暫態偵測電路工作原理的波形圖。 Figure 9 is a waveform diagram showing the operation of the transient detecting circuit of the present invention.
圖10 係表示本發明在高速直流轉換器在電性連接輕載效率改善電路前後的效果比較圖。 Fig. 10 is a view showing the comparison of effects of the present invention before and after the high-speed DC converter is electrically connected to the light load efficiency improving circuit.
圖11 係表示本發明高速轉換器電性連接輕載效率改善電路前後的效率圖以及與線性轉換器效率的比較圖。 Figure 11 is a graph showing the efficiency before and after the high-speed converter of the present invention is electrically connected to the light-load efficiency improving circuit, and a comparison with the efficiency of the linear converter.
圖12 係表示本發明使用DCM控制技術與習知CCM控制技術之比較圖。 Figure 12 is a graph showing a comparison of the present invention using DCM control techniques and conventional CCM control techniques.
1‧‧‧直流對直流高速轉換器 1‧‧‧DC to DC High Speed Converter
2‧‧‧誤差信號放大電路 2‧‧‧Error signal amplifier circuit
21‧‧‧二級放大器 21‧‧‧secondary amplifier
22‧‧‧補償電路 22‧‧‧Compensation circuit
3‧‧‧比較器 3‧‧‧ comparator
4‧‧‧鋸齒波產生器 4‧‧‧Sawtooth generator
5‧‧‧電流感測器 5‧‧‧ Current sensor
6‧‧‧輕載效率改善電路 6‧‧‧Light load efficiency improvement circuit
7‧‧‧暫態偵測電路 7‧‧‧Transient detection circuit
BUF‧‧‧緩衝器 BUF‧‧‧ buffer
Cout1‧‧‧電容器 C out1 ‧‧‧ capacitor
L‧‧‧電感器 L‧‧‧Inductors
Load‧‧‧負載 Load‧‧‧load
MP1、MN1‧‧‧電晶體 M P1 , M N1 ‧‧‧O crystal
R1、R2、Resr1‧‧‧電阻 R 1 , R 2 , R esr1 ‧‧‧ resistance
RS F/F‧‧‧RS正反器 RS F/F‧‧‧RS forward and reverse
VDD、Vout1‧‧‧電壓 V DD , V out1 ‧‧‧ voltage
Vref1‧‧‧電壓 V ref1 ‧‧‧ voltage
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101143338A TWI474588B (en) | 2012-11-20 | 2012-11-20 | An enhanced light-load circuit for high-speed dc-dc buck converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101143338A TWI474588B (en) | 2012-11-20 | 2012-11-20 | An enhanced light-load circuit for high-speed dc-dc buck converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201421873A true TW201421873A (en) | 2014-06-01 |
| TWI474588B TWI474588B (en) | 2015-02-21 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101143338A TWI474588B (en) | 2012-11-20 | 2012-11-20 | An enhanced light-load circuit for high-speed dc-dc buck converter |
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| Country | Link |
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| TW (1) | TWI474588B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI672898B (en) * | 2018-07-17 | 2019-09-21 | 邱煌仁 | Bidirectional DC-DC converter |
| TWI777531B (en) * | 2021-04-28 | 2022-09-11 | 力林科技股份有限公司 | Llc converter circuit |
| TWI837701B (en) * | 2022-06-13 | 2024-04-01 | 宏碁股份有限公司 | Boost converter for increasing output stability |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW588489B (en) * | 2002-11-14 | 2004-05-21 | Richtek Technology Corp | Over-current protection apparatus and method of switching type regulator |
| US7868600B2 (en) * | 2005-11-16 | 2011-01-11 | Intersil Americas Inc. | Adaptive PWM pulse positioning for fast transient response |
| TW200901610A (en) * | 2007-06-29 | 2009-01-01 | Richtek Technology Corp | Device and method for improving a transient response of a voltage converter |
| TWI360940B (en) * | 2008-09-12 | 2012-03-21 | Realtek Semiconductor Corp | Voltage converting apparatus |
| TWI420796B (en) * | 2009-02-27 | 2013-12-21 | Asus Technology Pte Ltd | Dc to dc conventor and method to reduce overshoot |
| US8085005B2 (en) * | 2009-06-18 | 2011-12-27 | Micrel, Inc. | Buck-boost converter with sample and hold circuit in current loop |
-
2012
- 2012-11-20 TW TW101143338A patent/TWI474588B/en active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI672898B (en) * | 2018-07-17 | 2019-09-21 | 邱煌仁 | Bidirectional DC-DC converter |
| TWI777531B (en) * | 2021-04-28 | 2022-09-11 | 力林科技股份有限公司 | Llc converter circuit |
| TWI837701B (en) * | 2022-06-13 | 2024-04-01 | 宏碁股份有限公司 | Boost converter for increasing output stability |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI474588B (en) | 2015-02-21 |
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