TW201301412A - 晶片結合方法 - Google Patents
晶片結合方法 Download PDFInfo
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Abstract
一種晶片結合方法,其包括下列步驟。移轉至少一晶片至一載板上並再提供一負壓環境。加熱至少一晶片及/或載板並施加一正向壓力於至少一晶片上。
Description
本發明是有關於一種晶片結合方法,且特別是有關於一種用以進行晶片對位、加壓及加熱之晶片結合方法。
黏晶(die bonding)是半導體製程中十分重要的步驟之一,其係將晶圓切割後的晶片(die)取出並黏著固定在載板上,以供後續打線接合及封裝等步驟。又,晶片黏合程序完成後必須進行烘烤以固化黏膠,故必須將黏有晶片之載板送進烤箱中烘烤。另外一種共晶黏晶(eutectic die bonding)方法,係於載板端加熱及/或晶片端加熱的方式,使兩金屬層加熱至共晶溫度而黏合,藉以克服金屬鍵合的能量障礙,促使晶片黏合於載板上。惟若載板的加熱區域大,易使未銲接區域因持續受熱而累積過多熱量,致使產生不良熱效應。但若加熱區域小,或稱局部區域加熱,晶片需進入銲接區域(bonding area)後,方才受熱,需費時等候加熱的時間,導致產能降低。
此外,溫度掌控亦為一個大課題。由於現今的共晶黏晶機為單顆晶片逐一黏合於載板上,除了生產效率低落之外,壓銲頭的力量與分佈若控制不當,容易造成晶片損傷,影響晶片效能。除此之外,當單一晶片黏合時若需同時將銲接區的溫度升高至特定溫度以上,則需精確地掌控溫度,且已銲接晶片的區域與未銲接晶片的區域因持續受熱而會累積過多熱量,造成不良熱效應而影響後續的製程。
本發明係有關於一種晶片結合方法,將晶片吸取、置放、對位用之晶片移轉裝置、通氣裝置以及加熱裝置結合,並以機械正向力或以氣體施予正向壓力於至少一晶片上,不僅可對整批次晶片及載板同時加熱,以減少熱累積效應,同時更兼具保護晶片效果,提升生產效率。
根據本發明之一方面,提出一種晶片結合方法,其包括下列步驟。提供一負壓環境並移轉至少一晶片至一載板上。加熱至少一晶片及/或載板並施加一正向壓力於至少一晶片上。
為了對本發明之上述及其他方面有更佳的瞭解,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下:
本實施例之晶片結合設備及方法,係涵蓋晶片吸取及置放系統(例如吸取器)、晶片與載板接合之對位系統(例如對位器)、腔體抽氣及進氣系統(以下稱為通氣裝置)、對於晶片施加機械壓力或氣體壓力之調整系統(例如幫浦或晶片壓頭)、以及腔體加熱及溫控系統(以下稱為加熱裝置)。本實施例之晶片結合設備可透過多個吸取器同時吸附多個晶片,並移轉至載板上,之後再透過對位器之定位以放置各個晶片於或板相對應的位置上,以完成整批次晶片與載板之接合。加熱裝置(例如加熱爐)可單獨或同時置放於腔體內,並對整批次晶片及載板同時加熱,故不同銲接區域亦無熱累積之顧慮。再者,晶片壓頭或通氣裝置於加熱至少一晶片及/或載板時,於晶片上方施加機械壓力、氣體壓力或是上述兩者的組合,且使氣體均勻分佈於各個晶片上,避免造成晶片損傷,兼具保護晶片效果。上述之晶片結合設備及方法可應用在發光二極體晶片與載板之接合上,載板可為導線架、玻璃基板、印刷電路板或金屬基板等,本實施例對載板不加以限制。
以下係提出各種實施例進行詳細說明,實施例僅用以作為範例說明,並非用以限縮本發明欲保護之範圍。
請參照第1A及1B圖,其分別繪示依照本發明一實施例之晶片結合設備的示意圖及腔室內部的示意圖。晶片結合設備100包括一腔室110、一晶片移轉裝置120、一加熱裝置130以及一通氣裝置140。晶片移轉裝置120用以移轉至少一晶片102於腔室110內之一載板104上。加熱裝置130用以加熱腔室110內之至少一晶片102及/或載板104。通氣裝置140使氣體連通腔室110,以提供一負壓環境於腔室110內或提供一正向壓力於至少一晶片102上。
詳細而言,晶片移轉裝置120包括多個吸取器122可同時吸取晶圓101切割後的多個晶片102,並移轉至載板104上,以進行後續的對位。此外,晶片移轉裝置120更包括一對位器124,用以對位並移轉此些晶片102於載板104上,以完成整批次晶片102與載板104之接合。值得注意的是,本實施例於對位時不特別加溫、亦不施加壓力於晶片102上,在做法上與傳統的共晶黏晶機採單顆晶片逐一黏合,必須等待介面金屬之溫度達到金屬液態或共晶溫度以上的做法不同。
由於本實施例係於對位之前,先於載板104上塗佈介面金屬105(例如焊錫或金錫合金),去除氧化並幫助晶片102黏合,隨後以對位器124同時將多個晶片102放置於載板104上相對應的銲墊106(bonding pad),此時不施加壓力與加溫(例如於室溫及一大氣壓力下),因此能加快生產效率。
另外,當晶片移轉裝置120移轉至少一晶片102於腔室110內之載板104上時,通氣裝置140提供一負壓環境於腔室110內。負壓環境例如是小於一大氣壓之環境,更可為壓力很小(例如0.1torr)或接近真空狀態之環境。在本實施例中,通氣裝置140包括一幫浦142,使氣體連通腔室110,用以抽離腔室110內的氣體以形成負壓環境。
接著,當晶片102與載板104在負壓環境下完成對位之後,介面金屬105不管是金錫合金或分別鍍在銲墊106上的金層與錫層,可藉由對載板104單獨加熱,或對載板104及晶片102同時加熱,以使介面金屬105之溫度達到金屬液態或共晶溫度。在本實施例中,加熱裝置130可包括一加熱爐,用以加熱至少一晶片102及/或載板104至150℃以上。舉例來說,當介面金屬105為錫鉛合金時,其共晶溫度需達到180℃以上;當介面金屬105為金錫合金時,其共晶溫度均達到200℃以上。
由於加熱裝置130係對整批次晶片102及載板104同時加熱,故不同銲接區域無熱累積之顧慮。另外,當進行加熱製程時,晶片結合設備100更包括一晶片壓頭126,用以產生一機械力於至少一晶片102上,以使至少一晶片102以熱壓合的方式與載板104接合。
此外,當加熱至少一晶片102及/或載板104時,通氣裝置140可施加一正向壓力於至少一晶片102上。舉例來說,當幫浦142在對位時提供所需的負壓環境後,若不需再抽離腔室110內的氣體時,幫浦142更可經由進氣口提供一惰性氣體,惰性氣體例如是氮氣、氬氣。惰性氣體形成正向壓力於至少一晶片102上,避免造成晶片102損傷,兼具保護晶片102效果。
接著,請參考第2圖,其繪示依照本發明一實施例之晶片結合方法的流程圖。步驟S10係提供一負壓環境。步驟S20係移轉至少一晶片至一載板上。步驟S20更包括對位至少一晶片於載板上。步驟S30係停止抽氣。步驟S40係加熱至少一晶片及/或載板。步驟S50係施加一正向壓力於至少一晶片上。雖然在第2圖中,晶片之移轉係於提供負壓環境之後,但在另一實施例中,亦可先進行晶片之移轉,再提供負壓環境,之後,於負壓環境下進行晶片之對位。
以下係以第1A及1B圖之晶片結合設備100來說明第2圖之各個步驟S10~S60。請參照第1A、1B及2圖,當晶片移轉裝置120移轉至少一晶片102於腔室110內之載板104上時,通氣裝置140提供一負壓環境於腔室110內,以進行步驟S10及S20。晶片移轉裝置120包括多個吸取器122以及一對位器124,吸取器122可同時吸取多個晶片102,並移轉至載板104上,之後再以對位器124進行對位。載板104上更包括至少一銲墊106,以提供對位器124之對位,如此吸取器122可將多個晶片102放置在相對應之銲墊106上。上述移轉多個晶片102之步驟係於室溫下進行。
此外,通氣裝置140包括一幫浦142,使氣體連通腔室110,用以抽離腔室110內的氣體以形成負壓環境。在步驟S30中,當通氣裝置140停止抽氣時,幫浦142更可提供一惰性氣體以形成正向壓力於至少一晶片102上,以進行步驟S50。
在步驟S50中,除了提供氣壓正向力之外,晶片結合設備100更包括一晶片壓頭126,用以產生一機械正向力於至少一晶片102上,以使至少一晶片102以熱壓合的方式與載板104接合。
另外,在步驟S40中,加熱裝置130用以加熱腔室110內之至少一晶片102及/或載板104。在一實施例中,此步驟S40包括加熱至少一晶片102及/或載板104至150℃以上,以使介面金屬105達到共晶溫度以上。
本發明上述實施例所揭露之晶片結合設備及方法,係將晶片吸取、置放、對位用之晶片移轉裝置、通氣裝置以及加熱裝置結合,以機械正向力或以氣體施予晶片壓力,不僅可對整批次晶片及載板同時加熱,以減少熱累積效應,同時更兼具保護晶片效果,提升生產效率。
綜上所述,雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100...晶片結合設備
101...晶圓
102...晶片
104...載板
105...介面金屬
106...銲墊
110...腔室
120...晶片移轉裝置
122...吸取器
124...對位器
126...晶片壓頭
130...加熱裝置
140...通氣裝置
142...幫浦
S10~S50...步驟
第1A及1B圖分別繪示依照本發明一實施例之晶片結合設備的示意圖及腔室內部的示意圖。
第2圖繪示依照本發明一實施例之晶片結合方法的流程圖。
100...晶片結合設備
101...晶圓
102...晶片
104...載板
110...腔室
120...晶片移轉裝置
122...吸取器
124...對位器
126...晶片壓頭
130...加熱裝置
140...通氣裝置
Claims (11)
- 一種晶片結合方法,包括:移轉至少一晶片至一或板上並再提供一負壓環境;以及加熱該至少一晶片及/或該載板並施加一正向壓力於該至少一晶片上。
- 如申請專利範圍第1項所述之晶片結合方法,其中提供該負壓環境之步驟更包括提供小於一大氣壓之環境。
- 如申請專利範圍第1項所述之晶片結合方法,其中移轉該至少一晶片至該載板上之步驟更包括對位該至少一晶片於該載板上之一步驟。
- 如申請專利範圍第1項所述之晶片結合方法,其中該加熱之步驟包括加熱該至少一晶片及/或該載板至150℃以上。
- 如申請專利範圍第1項所述之晶片結合方法,其中施加該正向壓力之步驟包括提供一機械正向力或一氣壓正向力。
- 如申請專利範圍第5項所述之晶片結合方法,其中提供該氣壓正向力之步驟包括提供一氣體於該至少一晶片上。
- 如申請專利範圍第6項所述之晶片結合方法,其中提供該氣體之步驟包括提供一惰性氣體。
- 如申請專利範圍第1項所述之晶片結合方法,更包括提供至少一銲墊於該載板上。
- 一種晶片結合方法,包括:同時移轉複數個晶片至一載板上;以及加熱該複數個晶片及/或該載板並施加一正向壓力於該複數個晶片上;其中,於移轉該複數個晶片之步驟時係於室溫下進行。
- 如申請專利範圍第9項所述之晶片結合方法,其更包含於該載板上對位該複數個晶片之步驟。
- 如申請專利範圍第9或第10項所述之晶片結合方法,於加熱該複數個晶片及/或該載板並施加一正向壓力於該複數個晶片上的步驟之前更包含提供一負壓環境之步驟。
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TW100121501A TW201301412A (zh) | 2011-06-20 | 2011-06-20 | 晶片結合方法 |
US13/280,497 US20120318851A1 (en) | 2011-06-20 | 2011-10-25 | Chip bonding process |
CN201110368858XA CN102842514A (zh) | 2011-06-20 | 2011-11-09 | 芯片结合方法 |
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US20130153645A1 (en) * | 2011-11-17 | 2013-06-20 | Princeton Lightwave, Inc. | Process for Hybrid Integration of Focal Plane Arrays |
US9040837B2 (en) * | 2011-12-14 | 2015-05-26 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
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US4204854A (en) * | 1978-05-01 | 1980-05-27 | Mcmaster Harold | Apparatus and method for bending glass sheets |
US5878943A (en) * | 1990-02-19 | 1999-03-09 | Hitachi, Ltd. | Method of fabricating an electronic circuit device and apparatus for performing the method |
US5380982A (en) * | 1993-07-23 | 1995-01-10 | Fortune; William S. | Metallic conduction - hot gas soldering-desoldering system |
US5573174A (en) * | 1994-08-15 | 1996-11-12 | Pekol; Robert | Automatic reflow soldering system |
JP4029473B2 (ja) * | 1997-12-15 | 2008-01-09 | セイコーエプソン株式会社 | 固体接合方法およびその装置、導体接合方法、パッケージ方法 |
US6818543B2 (en) * | 2001-08-01 | 2004-11-16 | Lilogix, Inc. | Process and apparatus for mounting semiconductor components to substrates and parts therefor |
JP3809806B2 (ja) * | 2002-03-29 | 2006-08-16 | 富士電機デバイステクノロジー株式会社 | 半導体装置の製造方法 |
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JP2006181641A (ja) * | 2004-12-02 | 2006-07-13 | Ebara Corp | 接合装置及び接合方法 |
DE112006003019T5 (de) * | 2005-10-31 | 2008-10-23 | Cyberoptics Corp., Golden Valley | Elektronikmontagevorrichtung mit eingebauter Lötpastenprüfung |
US8528804B2 (en) * | 2006-04-10 | 2013-09-10 | Blackberry Limited | Method and apparatus for testing solderability of electrical components |
KR101030764B1 (ko) * | 2006-09-29 | 2011-04-27 | 후지쯔 세미컨덕터 가부시키가이샤 | 반도체 장치의 제조 방법 및 제조 장치 |
US7793819B2 (en) * | 2007-03-19 | 2010-09-14 | Infineon Technologies Ag | Apparatus and method for connecting a component with a substrate |
JP4625828B2 (ja) * | 2007-06-05 | 2011-02-02 | リンテック株式会社 | 半導体チップ接着装置及び接着方法 |
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TWI425580B (zh) * | 2009-09-09 | 2014-02-01 | Du Pont | 製造半導體晶片封裝模組之方法 |
JP5307669B2 (ja) * | 2009-09-09 | 2013-10-02 | 東京エレクトロン株式会社 | 半導体装置の製造方法及び電気的接続を得る方法 |
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