201238751 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種w柄 硬附銅載體之銅猪、該銅结之製造方 法、及使用該銅箔之電子 电卞電路用銅箔、該銅箔之製造方法 及電子電路之形成方、、么 去’ S玄附銅載體之銅箔係適於藉由蝕 刻來進行電路形忐$ Φ ^ 電子電路形成且由壓延銅箔或電解銅 箔構成。 【先前技術】 於電子、電氣設備中廣泛使用有電子電路用㈣，但 由於近年來之電子、電氣設備存在輕薄短小之傾向，故而 對電子電路用銅结而言亦要求更薄之銅[由於較薄之電 子電路用銅箔難以進行接 仃操作故而逐漸使用附有支持銅箔 之銅載體的附銅載體之銅落。 附銅載體之銅箱係於由電_或壓延㈣構成之鋼 上形成較薄之銅層者’但由於最後將銅載體自較薄之 銅層卸除而使用，故而於銅載 、ru W W 銅泊中，銅載體 容易與銅層剝離。 ^ :此，提出有於成為電子電路用銅落之較薄之 銅载體之間設置剝離層技術。 、 有於剝離層設置有機 皮膜（例如，㈣文獻n或金屬層（例如，專利文獻 之技術。於專利文獻2中，金屬層之候補可列舉1C。f *進而，於除去銅載體時，由於電子電路用鋼羯之° :::生成之面而具有變色或腐蝕之危險性。因此， 如出有如下構成之附載體之銅箔： 电十電路用銅箔之表 201238751 面設置防錄層，即，於_上設置剝離 子電路用銅fg (例如，專利文獻 方錄層、電 μ宙 寻矛J文獻3、專利文獻4)〇專利文 利文獻4中之防錄層均以川為代表而進行列舉。 二：剝離層，於專利文獻3中列舉有機皮膜或者金屬 層，於專利文獻4中列舉c〇層。 另一方面，電子電路用銅落為了形成目標電路，而藉 :塗佈抗姓劑及曝光步驟來印刷電路，進而，實施除去銅 泊之不必要部分的蝕刻處理，但於進行蝕刻而形成電路 時’存在產生壓陷而導致該電路無法成為預期之寬度 題。 因此，於專利文獻5中’提出有藉由將較薄之金、鉑 族金屬、冑等之層附著於電子電路用銅箔之表面而防止壓 陷之技術。 專利文獻1 :日本特開平11 一 3 17574號 專利文獻2 :日本特開2005 — 254673 專利文獻3 ·日本專利第3690962號 專利文獻4 ·日本專利第4〇7243丨號 專利文獻5 : WO2010/MMM 【發明内容】 如上所述’有於附銅載體之銅箔中，在電子電路用銅 %設置有較薄之錦或者鎳合金的例子，但此時之剝離層係 使用與鎳不同之層。又，並無於附銅載體之銅箔中，於電 子電路用銅箔之表面設置有較薄之金、鉑族金屬、銀等之 層的例子。 4 201238751 ::，本發明之課題在於獲得在由壓延銅落或電解銅 泊構成之附鋼載體之銅箔 s ^ ^ ^具有「於表面設置有由鉑族金 屬或其4之合金構成的較簿 欣 '專之層」之銅層的附銅載體之銅201238751 6. Technical Field of the Invention The present invention relates to a copper pig with a w-shank hard copper carrier, a method for producing the copper junction, and a copper foil for an electronic circuit for using the copper foil, The manufacturing method of the copper foil and the formation of the electronic circuit, the copper foil of the 'S Xuan copper carrier is suitable for circuit shape by etching Φ Φ ^ electronic circuit formation and by rolling copper foil or electrolytic copper foil Composition. [Prior Art] Electronic circuits are widely used in electronic and electrical equipment. (4) However, due to the tendency of light and thin electronic and electrical equipment in recent years, thinner copper is required for copper clads for electronic circuits. The copper foil for a thin electronic circuit is difficult to be connected, and the copper drop of the copper carrier with the copper carrier supporting the copper foil is gradually used. A copper box with a copper carrier is used to form a thin copper layer on steel consisting of electric or calendered (four) 'but since the copper carrier is finally removed from the thin copper layer, it is used in copper, ru WW In the copper poise, the copper carrier is easily peeled off from the copper layer. ^ : This is a technique for providing a peeling layer between thin copper carriers that become copper for electronic circuits. An organic film is provided on the peeling layer (for example, (4) Document n or a metal layer (for example, the technique of the patent document. In Patent Document 2, the candidate for the metal layer may be 1 C. f * Further, when the copper carrier is removed, The electronic circuit uses a steel 羯 ::: to create a surface that has the risk of discoloration or corrosion. Therefore, a copper foil with a carrier having the following structure is provided: a copper foil sheet for electric ten circuit 201238751 That is, the copper fg for the stripping sub-circuit is provided on _ (for example, the patent document recording layer, the electric micro-seeking J document 3, the patent document 4), and the anti-recording layer in the patent document 4 is In the case of the peeling layer, an organic film or a metal layer is exemplified in Patent Document 3, and a c〇 layer is exemplified in Patent Document 4. On the other hand, copper for electronic circuits is formed by forming a target circuit. The anti-surname agent and the exposure step are used to print the circuit, and further, an etching process for removing unnecessary portions of the copper pouring is performed. However, when etching is performed to form a circuit, there is a case where a depression occurs and the circuit cannot be expected to have a desired width. Therefore, in Patent Document 5, a technique for preventing indentation by adhering a layer of a thin gold, a platinum group metal, or a crucible to a surface of a copper foil for an electronic circuit has been proposed. Patent Document 1: Japanese Patent Laid-Open No. 11 Patent Document 2: Japanese Patent Laid-Open No. 2005-254673 Patent Document 3, Japanese Patent No. 3690962, Patent Document 4, Japanese Patent No. 4,724, 323, Patent Document 5: WO2010/MMM In the copper foil with a copper carrier, an example of a thinner metal or a nickel alloy is provided in the copper of the electronic circuit. However, in this case, the peeling layer is a layer different from nickel. In the copper foil, an example of a thin layer of gold, a platinum group metal, or silver is provided on the surface of the copper foil for electronic circuit. 4 201238751 :: The object of the present invention is to obtain copper or electrolytic copper by rolling The copper foil s ^ ^ ^ of the steel carrier composed of the poise has copper with a copper layer of a copper layer provided with a layer of a platinum group metal or an alloy of 4 thereof.
V白、且即便於剝離層传用植今、土 Μ X 鎳或者鎳合金，剝離性亦良好的 附銅載體之鋼箔及該銅箔 <取1^方法、及使用該銅箔之電 子電路用銅箔、該銅笛制、止 製k方法以及電子電路之形成方 法0 本發明人等獲得如下p ^ ^ _ 下見解.為了於具有電子電路用銅 治之由壓延銅箔或電解 冶構成的附銅載體之銅箔中，即 便於在銅載體之剝離層使 她^ 文用鎳層之情形時，亦可容易地剝 離’故而於銅載體上形出 形成鎳層，並將其暫時曝露於空氣中 之後，於鎳層上形成由金、 „ „ ll 姑族金屬或其等之合金構成之 層，藉此，可同時解決若 T徊問碭’其中，上述電子電路 用銅箱於㈣面形成由金 ？子電路 站孩金屬或其等之合金構成之 層而可形成無麼陷之電路寬度均 而且，獲得如下之目 見解：經剝離而獲得之電子電路用 銅泊之飯刻面具有由‘ 層，且調節銅落之寬度方：族金屬或其等之合金構成之 電路寬度Μ之電路。 刻速度，可形成無壓陷之 進而，亦獲得如下 ^ ^ ^ 見解·經剝離之載體銅箔亦可作 為可形成無壓陷之電路畜 電路中。 尾度均勻之電路的銅箔而用於電子 根據该見解，本發明提供 1) 一種附銅載體用銅 %冷，其係由下述部分構成：銅載 201238751 體（A)，其由壓延銅箔或電解銅箔構成；鎳層（b),其形 成於該銅載體（A)上，且厚度為〇.〇3〜2 y m ;層（C )， 其形成於该錄層（B)上’厚度為0.3〜15nm，且由金、在白 族金屬或其等之合金構成；及銅層（D)’其形成於由該金、 鉑族金屬或其等之合金構成之層（C)上。 又，本發明提供 2) 如上述1)之附銅載體用銅箔，其中，於上述鎳層 (B)、與由上述金、鉑族金屬或其等之合金構成之層（c) 之間剝離時的剝離強度未達〇. 5 k g / c m。 又，本發明提供 3) —種電子電路用銅箔，其係將上述i)或2)之附 銅載體之銅箔於鎳層（B)與由金、鉑族金屬或其等之合金 構成之層（C )之間剝離而獲得，且由層（c )與銅層（D ) 構成’該層（C)由金、鉑族金屬或其等之合金構成。 又，本發明提供 4) 一種載體銅箔’其係將上述1)或2)之附銅載體 之銅箔於鎳層（B)與由金、鉑族金屬或其等之合金構成之 層（C)之間剝離而獲得，且由鎳層（B )與銅載體（a )構 成。 又’本發明提供 5) 如上述4)之載體銅箔’其中’鎳層（b)之厚度為 0.03〜O.lym，且用於電子電路用。 又’本發明提供 6) —種附銅載體之銅箔之製造方法，其係於由壓延銅 6 201238751 羯或電解銅箱構成之銅載體（A)上，藉由濕式錢敷形成厚 度為0.03〜2/zm之鎳層（B)，並將其暫時曝露於空氣中之 後於D亥錦（B)層上進一步藉由濕式鍵敷或乾式鐘敷而形 成厚度為0.3〜15nm之由金、鉑族金屬或其等之合金構成 之層（c)，於由該金、鉑族金屬或其等之合金構成之層（c) 上，藉由電鍍銅而形成銅層（D)。 又’本發明提供 7) 種電子電路用銅箔之製造方法，其可獲得下述之 箔：藉由將以上述6)之製造方法製造的附銅載體之銅箔於 鎳層（B)與由金、鉑族金屬或其等之合金構成之層（c) 之間剝離而獲得，且由層（c)與銅層（D)構成，該層（c) 係由金、鉑族金屬或其等之合金構成。 又’本發明提供 8) —種載體銅箔之製造方法，其係：將以上述6)之 製造方法製造的附銅載體之銅箔於鎳層（B)與由金、鉑族 金屬或其等之合金構成之層（c)之間剝離，而獲得由鎳層 (B )與銅載體（A )構成之箔。 又’本發明提供 9) 一種電子電路之形成方法，其特係：使用上述3) 之電子電路用銅箔，於銅層（D)表面貼附樹脂基板，於其 相反面即由始族金屬或其等之合金構成之層（c)上形成電 路形成用抗蝕劑圓案，進一步使用由氣化銅溶液或氣化鐵 溶液構成之蝕刻液，將附有上述抗蝕劑圖案部分以外的由 鉑族金屬或其等之合金構成之層（C)及銅層（D)之不必 201238751 要部分除去，其次，除去抗蝕劑，從而形成具有特定寬度 之電路》 又，本發明提供 1 〇) —種電子電路之形成方法，其係··使用上述5)之 載體銅箔，於銅載體（A)表面貼附樹脂基板，於其相反面 即鎳層（B)上形成電路形成用抗蝕劑圖案，進—步使用由 氣化銅溶液或氯化鐵溶液構成之蝕刻液，將附有上述抗蝕 劑圖案部分以外的鎳層⑻及鋼載體（A)層之不必要部 分除去，其次，除去抗蝕劑，從而形成具有特定寬度之電 路0 由於本發明具有預先使用銅箔之銅載體、進而於其」 具有剝離層、進而形成銅之電子電路用銅$的構造，故市 操作容易，而且必要時可容易地將銅載體剝離。 由於可用作為下述銅荡’故而可任意使用於各種電子 :路之設計中，從而具有富有通用性之較大之效果，該銅 泊係：將載體銅箔剝離而獲得之「具備由金、鉑族金屬或 其等之合金構成之層」的極薄銅箱，即單純構造的銅落。 而且’於藉由對本發明之由層（c)與銅層⑼構成 且該層广係、由金、#族金屬或其等之合金構成的電子電 路用銅落進行蝕刻而形成電路车 ^ 驭电峪時具有可形成電路寬度更 標電路之效果，且具有可防止蝕刻所致之壓陷產 生之效果。 又，由於經剝離而獲得之載體鋼羯之表面亦旦有鎳， 故可用作電子電路用銅箔， j獲侍相同之效果。根據上 8 201238751 文所述，具有如下之效果：可提供一種可提高圖案蝕刻中 之蝕刻性、防止短路或電路寬度不良之產生的優異之電子 電路之形成方法。 【實施方式】 本發明係一種使用有由壓延銅箔或電解銅箔構成之銅 載體的附銅載體之銅箔、該銅箔之製造方法、電子電路用 銅箔、該銅箔之製造方法及電子電路之形成方法。 為了達成本案發明之目的，於由壓延銅箔或電解銅箔 構成之銅載體（A)上形成厚度為〇 〇3〜m之鎳層（B)。 於使用電解銅箔之情形時，可使用光澤面或粗面中之 任一者。只要能夠進行後續之步驟即鍍鎳便可。於鍍鎳時， 可使用濕式鍍敷’具體而言，可使用無電鍍鎳或電鍍鎳中 之任一者。 又，鑛敷層之厚纟亦無特別I5艮定，但從於剝離之情形 時所w之強度方面來看，0 03〜2"m可謂是適當之厚度。 即，該鍍鎳層（B)成為剝離面。 進而’於厚度為〇.03〜O.Wm之情形時，若銅載體（a) 之厚度為9〜35 μ m ’則具有如下之功能：可有效地抑制對 「剝離後之由鎳層（B)與鋼載體（a)構成之載體箔」進 行蝕刻而形成電路之情形時容易產生的「壓陷」。 ，其人冑已實施3亥鍍鎳之銅載體（幻暫時曝露於空氣 中後，於該鎳層（B )上；隹；^ # 進而藉由濕式鍍敷或乾式鍍敷而形 成厚度為0.3〜15nm之極薄之由金始族金屬或其等之合 金構成之層（C)。再者’於濕式鍵敷中，可列舉無電解錄 201238751 敷或電解電鍍等；於乾式鍍敷中，可列舉濺鍍或蒸錄等。 於此情形時’若曝露於空氣中，則由於鎳為容易氣化 之金屬’故而於鎳層（B)形成氧化膜之可能性非常高。 是，由於認為係非常薄之氧化膜，故而難以進行測定。 如上所述，於由該金、鉑族金屬或其等之合金構成之 層（C)上，藉由電錄銅而形成銅層（D)從而製造附鋼 體之銅箔，但可於鎳層（B)與由金、鉑族金屬或其等之入 金構成之層（C )之間將雙方剝離。 該剝離之容易性可視為於鎳層（B )形成氧化膜之結 果。利用此現象為本案發明之較大之特徵之一。 於在上述鎳層（B)與由金、鉑族金屬或其等之合金構 成之層（C)之間剝離後’其中一方之由層（c)與鋼層（〇) 構成的電子電路用銅箔（D)用於電子電路中其中，上， 層（C)係由金、鉑族金屬或其等之合金構成。 a 由於該電子電路用㈣於表面形成有由金、鉑族 或其等之合金構成之層（c)，故而具有 男另双地抑制於對銅 層（D)進行蝕刻而形成電路之情形時容易產生的 之功能。 」 再者，銅層（D)不僅可應用導電性較高之純銅，亦 根據目的而應用銅合金笛（Cu—Cr合金、“合金 Cu—Sn合金、Cu—Mn合金' Cu_si合金等 其等具有可任意調整導電性、耐敍性、錢敷 性、強度等電路設計中所必需之特性的功能。· 具有「可於形成電路之階段調節㈣速度」之功能。可'， 10 201238751 易理解，就該添加成分之搀合比例及厚度 t，σ ° /、要變更 鑛敷之條件便可任意地調節。 最近之傾向係傾向於形成微小電路，故 现阳厚度亦傾向 於減小化。通常設為i〜5 V m左右之厚度。 其次’於上述鎳層（B)與由金、鉑族金屬或其等之入 金構成之層（c)之間剝離，可將其中—方之由層（c) ^ 銅層（D)構成的電子電路用銅箔用於電子電路中，例如積 層於樹脂基板上而使用；其中，上述該層（c)係由金、鉑 族金屬或其專之合金構成。 於使用S亥電子電路用銅箔形成微細電路時，使用由氣 化銅溶液或氣化鐵溶液構成之蝕刻液，將附有上述抗蝕2 圖案部分以外之不必要部分除去。 其次，除去抗蝕劑，進而，視需要藉由軟蝕刻將殘留 部分之由鉑族金屬或其等之合金構成之層（c)除去。由於 利用形成該抗蝕劑圖案而除去不必要之銅箔為通常之進行 方法，故而無需多加說明。 一般情況下，較佳為使用蝕刻速度較快之由氣化鐵水 溶液形成之蝕刻液。其原因在於，存在因電路之微細化而 導致蝕刻速度降低之問題。由氣化鐵水溶液形成之蝕刻液 係防止上述問題之有效手段。但是，並不妨礙其他姓刻液 之使用。可視需要替換蝕刻液。 藉此，可高精度地形成為形成於銅之電路間且例如樹 脂基板上之空間具有鋼之厚度之2倍以上之寬度的電路。 亦可視需要形成具有銅之厚度之2倍以下、進而15倍以下 201238751 之寬度的電路β 部分進行具體說明，則位於靠近㈣上之抗飯劑 屬咬其等之二且抗触劑側之銅領的㈣速度受到由翻族金 行。藉此，白： ，之钮刻以通常之速度進 致垂直地、隹3電路之側面之抗敍劑側起向樹脂基板側大 也進仃蝕刻，從而形成矩形之銅箔電路。 屬或：：由層（c)與銅層（D)構成且該層（C)由始族金 層：B'):合金構成的電子電路用銅箔進行了說明，由鎳 、鋼載體構成之載體銅箔亦同樣， 成壓陷較少之電路丨之相Π6 ^ 路用銅落。 同的效果’因此，可用作電子電 但是，於載體銅络之情形時，可較佳地 用之錦層⑴之厚度為。,。3〜〇.一。 電路 ，鎳層係主要抑制壓陷之產生而形成電路寬度均句之目 =路。覆銅積層板係必需於形成電子電路之樹脂之貼附 ，驟中進行高溫處理，但於此情形時，錄層會被氧化， 而容易產生抗钮劑之塗佈性（均句性、密合性）不良之狀 况，又’於钱刻時，加熱時形成之界面氧化物容易使钮刻 產生不均’從而成為招致短路或電路寬度之不均勻性的原 因。於此情形時’較理想的是，較厚地形成鎳層。但是， 作為覆銅積層板，於未較大地受到加熱之影響之情形時， 可較薄地形成鎳層。 如此’可藉由較厚地形成鎳層，而防止熱氧化造成之 12 201238751 。其係意味著，於電 ’故而該除去步驟需 影響，㈣交厚地形成其本身未必較佳 路形成後，必需藉由軟蝕刻進行除去 要花費時間。 又’就適當厚度之鎮層而言，所4 σ 所s胃耐熱（耐變色）性 係指具有可抑制保管時之變色、焊錫構裝時之熱時變色、 因CCL基板製作時之熱所致之變色的功能。但是，於過多 之情形時，當軟蝕刻時，鎳層除去之步驟之負載變大，二 根據情況會產生處理殘留物，而於銅電路之設計方面成為 障礙。因此，可說是鎳層之厚度必需較佳為設為上述範圍。 於下述中表示具有代表性且較佳之鍍敷條件之例。 (鍍鎳） 硫酸鎳：250〜300g/L 氯化鎳：35〜45g/L 乙酸鎳：10〜20g/L 檸檬酸三鈉：15〜30g/L 光亮劑：糖精、丁炔二醇等 十二基硫酸鈉：30〜lOOppm pH : 4 〜6 浴溫：50〜700°C (鍍銅）V-white, and even if the peeling layer is used to transfer the present, earthworm X nickel or nickel alloy, the copper foil of the copper-attached carrier having good peelability and the copper foil <1 method, and the electron using the copper foil The copper foil for circuit, the copper flute, the method of forming the k, and the method of forming the electronic circuit 0 The inventors obtained the following p ^ ^ _ The following explanation. In order to have a copper foil or electrolytic smelting for the treatment of copper for electronic circuits In the copper foil with a copper carrier, even in the case where the peeling layer of the copper carrier causes the nickel layer to be used, it can be easily peeled off. Therefore, a nickel layer is formed on the copper carrier and temporarily exposed. After the air is formed on the nickel layer, a layer composed of gold, a metal, or an alloy thereof is formed on the nickel layer, thereby simultaneously solving the problem of the above-mentioned electronic circuit copper box (4). Face formed by gold? The sub-circuit station can be formed into a layer of a metal or an alloy thereof, and can form a circuit width without any trapping. Moreover, the following insight can be obtained: the copper-plated rice noodle surface of the electronic circuit obtained by peeling has a layer of And adjust the width of the copper drop: circuit of the circuit width of the metal or its alloy. The engraving speed can be formed without depression. It is also obtained as follows. ^ ^ ^ Insights: The stripped carrier copper foil can also be used as a circuit for forming a circuit without a depression. Copper foil for a circuit with a uniform tail for electrons According to this knowledge, the present invention provides 1) a copper-based cold copper-supported carrier which is composed of the following: copper-loaded 201238751 body (A), which consists of rolled copper a foil or an electrolytic copper foil; a nickel layer (b) formed on the copper carrier (A) and having a thickness of 〇.3~2 ym; a layer (C) formed on the recording layer (B) 'having a thickness of 0.3 to 15 nm and consisting of gold, an alloy of a white metal or the like; and a copper layer (D)' formed on a layer (C) composed of the alloy of gold, a platinum group metal or the like . Further, the present invention provides the copper foil for copper-attached carrier according to the above 1), wherein the nickel layer (B) and the layer (c) composed of the above-mentioned gold, a platinum group metal or the like are provided. The peel strength at the time of peeling did not reach 〇. 5 kg / cm. Further, the present invention provides 3) a copper foil for an electronic circuit comprising the copper foil of the copper carrier of the above i) or 2) in a nickel layer (B) and an alloy of gold, a platinum group metal or the like The layer (C) is obtained by peeling off between layers (c) and the copper layer (D). The layer (C) is composed of gold, a platinum group metal or the like. Further, the present invention provides 4) a carrier copper foil which is a layer comprising the copper foil of the copper carrier of the above 1) or 2) in a nickel layer (B) and an alloy of gold, a platinum group metal or the like ( C) is obtained by peeling between and is composed of a nickel layer (B) and a copper carrier (a). Further, the present invention provides a carrier copper foil of the above 4), wherein the nickel layer (b) has a thickness of 0.03 to O.lym and is used for electronic circuits. Further, the present invention provides a method for producing a copper foil with a copper carrier, which is formed on a copper carrier (A) composed of rolled copper 6 201238751 电解 or an electrolytic copper box, and formed into a thickness by wet money coating. a nickel layer (B) of 0.03 to 2/zm, which is temporarily exposed to air and then further formed by a wet bond or a dry bell to form a thickness of 0.3 to 15 nm on the layer of D (H) (B). A layer (c) composed of gold, a platinum group metal or the like is formed on the layer (c) composed of the gold, the platinum group metal or the like, and the copper layer (D) is formed by electroplating copper. Further, the present invention provides a method for producing a copper foil for an electronic circuit, which can obtain a foil obtained by laminating a copper foil with a copper carrier manufactured by the method of the above 6) to a nickel layer (B) Obtained by peeling between layers (c) of gold, a platinum group metal or the like, and consisting of layer (c) and copper layer (D), the layer (c) being made of gold, a platinum group metal or Its alloy composition. Further, the present invention provides a method for producing a carrier copper foil, which comprises: a copper foil with a copper carrier produced by the method of the above 6) in a nickel layer (B) and a metal or a platinum group metal or The layer (c) composed of the alloy is peeled off to obtain a foil composed of the nickel layer (B) and the copper carrier (A). Further, the present invention provides a method for forming an electronic circuit, which comprises: using a copper foil for an electronic circuit according to the above 3), attaching a resin substrate to the surface of the copper layer (D), and on the opposite side, a metal of the group a circuit for forming a circuit for forming a layer (c) of an alloy or the like, and further using an etching solution composed of a vaporized copper solution or a vaporized iron solution, and having a portion other than the resist pattern portion attached thereto The layer (C) and the copper layer (D) composed of a platinum group metal or the like are not necessarily required to be partially removed by 201238751, and secondly, the resist is removed to form a circuit having a specific width. Further, the present invention provides 1 〇 A method for forming an electronic circuit, comprising: using the carrier copper foil of the above 5), attaching a resin substrate to the surface of the copper carrier (A), and forming a circuit formation resistance on the opposite side, that is, the nickel layer (B) Etching the pattern, using an etching solution composed of a vaporized copper solution or a ferric chloride solution, and removing unnecessary portions of the nickel layer (8) and the steel carrier (A) layer other than the resist pattern portion, Second, the resist is removed to form Circuit 0 having a specific width. Since the present invention has a structure in which a copper carrier of copper foil is used in advance, and a structure in which a copper layer for copper is formed by a peeling layer and copper, the operation is easy, and if necessary, it can be easily The copper carrier was peeled off. Because it can be used as the following copper slabs, it can be used arbitrarily in various electronic: road designs, and thus has a large effect of versatility. The copper mooring system: the carrier copper foil is peeled off and obtained by "gold, An extremely thin copper box of a layer composed of a platinum group metal or an alloy thereof, that is, a copper structure of a simple structure. Further, the electronic circuit formed of the layer (c) and the copper layer (9) of the present invention and composed of an alloy of gold, a metal, or the like is etched to form a circuit board. The electric cymbal has the effect of forming a circuit-wider standard circuit, and has the effect of preventing the occurrence of the indentation due to etching. Further, since the surface of the carrier steel crucible obtained by peeling is also nickel, it can be used as a copper foil for electronic circuits, and the same effect can be obtained. According to the above-mentioned 8, 201238751, it is possible to provide an excellent method for forming an electronic circuit which can improve the etching property in pattern etching, prevent short circuit or poor circuit width. [Embodiment] The present invention relates to a copper foil with a copper carrier formed of a rolled copper foil or an electrolytic copper foil, a method for producing the copper foil, a copper foil for an electronic circuit, a method for producing the copper foil, and a method for producing the copper foil A method of forming an electronic circuit. In order to achieve the object of the present invention, a nickel layer (B) having a thickness of 〇 3 to m is formed on a copper carrier (A) composed of a rolled copper foil or an electrolytic copper foil. In the case of using an electrolytic copper foil, either a glossy surface or a rough surface can be used. As long as the subsequent steps can be carried out, nickel plating can be performed. In the case of nickel plating, wet plating can be used. Specifically, either electroless nickel or electroplated nickel can be used. Moreover, the thickness of the mineral deposit is not particularly determined by the I5, but from the viewpoint of the strength of the peeling, 0 03~2"m can be said to be an appropriate thickness. That is, the nickel plating layer (B) serves as a peeling surface. Further, when the thickness is 〇.03 to O.Wm, if the thickness of the copper carrier (a) is 9 to 35 μm, the following functions are obtained: the "nickel layer after peeling" can be effectively suppressed ( B) "Indentation" which is likely to occur when the carrier foil of the steel carrier (a) is etched to form a circuit. , the person has implemented a 3 gal nickel-plated copper carrier (the phantom is temporarily exposed to the air, on the nickel layer (B); 隹; ^ # and then formed by wet plating or dry plating to a thickness of A very thin layer of 0.3 to 15 nm consisting of a metal of the Jinshizu metal or its alloy (C). In addition, in the wet keying, electroless recording 201238751 or electrolytic plating can be cited; in dry plating In the case of sputtering, steaming, etc., in this case, when nickel is exposed to air, nickel is likely to form an oxide film in the nickel layer (B). Since it is considered to be a very thin oxide film, it is difficult to perform measurement. As described above, a copper layer is formed by electro-recording copper on the layer (C) composed of the gold, the platinum group metal or the like. Thereby, a copper foil with a steel body is produced, but both sides can be peeled off between the nickel layer (B) and the layer (C) composed of gold, a platinum group metal or the like. The ease of peeling can be regarded as The nickel layer (B) is the result of forming an oxide film. Using this phenomenon is one of the larger features of the invention. A copper foil for an electronic circuit comprising the layer (c) and the steel layer (〇) of the nickel layer (B) and the layer (C) composed of an alloy of gold, a platinum group metal or the like (D) used in an electronic circuit in which the upper layer (C) is composed of gold, a platinum group metal or the like. a Since the electronic circuit is formed on the surface by gold, a platinum group or the like The layer (c) composed of the alloy has a function that is easily suppressed when the copper layer (D) is etched to form a circuit. In addition, the copper layer (D) can be applied not only to conductivity. Higher pure copper, also used copper alloy flute according to the purpose (Cu-Cr alloy, "alloy Cu-Sn alloy, Cu-Mn alloy" Cu_si alloy, etc. have arbitrarily adjustable conductivity, resistance to narrative, and money The function of the characteristics necessary for circuit design such as strength, etc. · It has the function of "adjusting the speed (4) at the stage of forming the circuit." ' 10 10, 2011,387,51 Easy to understand, the ratio of the added components and the thickness t, σ ° /, can be arbitrarily adjusted to change the conditions of the mineral deposit. The tendency tends to form tiny circuits, so the thickness of the positive yang tends to decrease. Usually it is set to a thickness of about i~5 V m. Secondly, the above nickel layer (B) and gold, platinum group metals or the like The layer (c) formed by the deposit of gold is peeled off, and the copper foil for electronic circuit composed of the layer (c) and the copper layer (D) can be used in an electronic circuit, for example, laminated on a resin substrate. Wherein the layer (c) is composed of gold, a platinum group metal or a specific alloy thereof. When a fine circuit is formed using a copper foil for an electronic circuit, a vaporized copper solution or a vaporized iron solution is used. The etching solution removes unnecessary portions other than the pattern portion of the resist 2 described above. Next, the resist is removed, and further, a layer of a residual portion of an alloy of a platinum group metal or the like is formed by soft etching as needed. (c) removed. Since the unnecessary copper foil is removed by forming the resist pattern as a usual method, there is no need to explain it. In general, it is preferred to use an etching solution formed of a vaporized molten iron solution having a relatively high etching rate. This is because there is a problem that the etching speed is lowered due to the miniaturization of the circuit. An etching solution formed of an aqueous solution of a vaporized iron is an effective means for preventing the above problems. However, it does not prevent the use of other surnames. Replace the etchant as needed. Thereby, it is possible to accurately form a circuit formed between the circuits of copper and having a width of, for example, twice the thickness of the steel in the space on the resin substrate. It is also possible to form a circuit β portion having a width of 2 times or less and further 15 times or less the width of 201238751 as needed, and the anti-rice agent located close to (4) is the bite and the copper on the anti-contact agent side. The speed of the collar (four) is subject to the turn of the family. Thereby, the button is engraved at a normal speed, and the anti-reagent side of the side of the 隹3 circuit is further etched toward the resin substrate side to form a rectangular copper foil circuit. Dependent or:: The layer consisting of layer (c) and copper layer (D) and the layer (C) consisting of the initial group gold layer: B'): an electronic circuit is described by a copper foil, consisting of nickel and steel carriers. The carrier copper foil is also similar, and the circuit is less than the cathode of the circuit. The same effect is therefore used as an electronic power. However, in the case of a carrier copper network, the thickness of the layer (1) can be preferably used. ,. 3 ~ 〇. One. The circuit, the nickel layer system mainly suppresses the occurrence of the indentation and forms the circuit width of the sentence. The copper-clad laminate is required to be attached to the resin forming the electronic circuit, and is subjected to high-temperature treatment in the middle of the process. However, in this case, the recording layer is oxidized, and the coating property of the resist agent is easily generated (evenness and density). In the case of a bad condition, the interface oxide formed during heating tends to cause unevenness in the buttoning, which is a cause of short circuit or unevenness in circuit width. In this case, it is desirable to form a nickel layer thicker. However, as a copper clad laminate, when it is not greatly affected by heating, a nickel layer can be formed thin. Thus, the nickel layer can be formed thickly to prevent thermal oxidation caused by 12 201238751. This means that the removal step needs to be affected in the case of electricity, and (4) the formation of the thick thickness itself does not necessarily mean that it is necessary to remove it by soft etching. In addition, in the case of a town layer having an appropriate thickness, the stomata heat resistance (resistance to discoloration) of the sigma is such that it can suppress discoloration during storage, discoloration during heat of the solder assembly, and heat generated by the CCL substrate. The function of discoloration. However, in the case of excessive etching, the load of the step of removing the nickel layer becomes large at the time of soft etching, and the processing residue is generated depending on the situation, which becomes an obstacle in the design of the copper circuit. Therefore, it can be said that the thickness of the nickel layer is preferably set to the above range. Representative and preferred plating conditions are shown below. (nickel plating) Nickel sulfate: 250~300g/L Nickel chloride: 35~45g/L Nickel acetate: 10~20g/L Trisodium citrate: 15~30g/L Brightener: saccharin, butynediol, etc. Dibasic sodium sulfate: 30~lOOppm pH: 4~6 Bath temperature: 50~700°C (copper plating)
Cu ： 90g/L H2S〇4 : 80g/ L Cl ： 60ppm 液溫：55〜57°C 13 201238751 添加劑_聚二硫二丙烷磺酸二鈉 (BiS-(3-SUlfopropyl)-diSUlfide disodium) ( RASCHIG 公司製 造 CPS ) 5Oppm 添加劑：二节胺改質物50ppm (金、始族金屬之表面處理） 由金、始族金屬或其等之合金構成之層（c)之形成方 法為公知之濕式鍍敷或乾式鍍敷之方法即可，於濕式鍍敷 中，可列舉無電解鍍敷或電鍍等；於乾式鍍敷中，可列舉 濺鍍或蒸鍍等。 + 例如，於濺鍍中，作為一例列舉以下條件。 MNS- 裝置：批量式濺鍍裝置（ULVAC公司，并丨咕 6000 ) 極限真空：1 .〇x 1(T 5pa 濺鍍壓：0.2PaCu : 90g / L H2S 〇 4 : 80g / L Cl : 60ppm Liquid temperature : 55~57 ° C 13 201238751 Additives - Polysodium dithiodipropane sulfonate (BiS-(3-SUlfopropyl)-diSUlfide disodium) ( RASCHIG CPS manufactured by the company 5Oppm Additive: 50 ppm of di-amine modified product (surface treatment of gold, primary metal) The formation of layer (c) composed of gold, the first metal or its alloy is known as wet plating. The method of dry plating may be, for example, electroless plating or electroplating, and examples of dry plating include sputtering or vapor deposition. + For example, in sputtering, the following conditions are listed as an example. MNS- device: batch sputtering device (ULVAC, 丨咕 6000) Ultimate vacuum: 1. 〇x 1 (T 5pa sputtering pressure: 0.2Pa
濺鍍電力：50W 把材：金' Ιό族 (電鍍金之條件） 作為一例列舉以下 例如’於金之情形時使用電鍍金 條件。 N.E.CHEMCAT製造之鍍金液NCF〜5〇〇 金濃度.0.5〜3 g / L 液溫：20〜5〇。〇 pH : 8.0〜9.0 ( 25°C ) 液比重：5〜11 14 201238751 電流密度：〇·5〜1.2A/dm2 鑛敷時間：5〜9〇see (鎳附著量分析方法） 、為了刀析錄處理面，以FR — 4樹脂壓製製作相反面， 並進行遮蔽。利用濃度3〇%之硝酸將該樣品溶解，直至表 面處理被膜洛解’將燒杯中之溶解液稀釋為W倍，藉由原 子吸光分析進行鎳之定量分析。 (金、鉑族金屬附著量分析方法） 金、鉑族金屬附著量之分析方法係以與鎳附著量分析 方法相同之順序進行，但使用王水代替硝酸。 實施例 其次，對本發明之實施例及比較例進行說明。再者， 本實施例僅為一例，並不限定於該例。即，實施例以外之 所有態樣或者變形亦包含於本發明之技術思想之範圍内。 (實施例1 ) 使用箔厚1 8以m之電解銅箔。將該電解銅箔作為銅载 體（A )，而且，以上述鍍鎳條件，如下述表丨所示，藉由 電鍵鎳而形成0.03//m之鍍鎳層 其次，於該鍍鎳後，暫時曝露於空氣中，且以上述濺 鍍條件形成Pd之錢敷層（C)。第二層之pd鍵敷層之厚戶 為0.3 # m。將該組合同樣地示於表1中。 於該Pd鍍敷層上，以上述鍍銅條件進而形成厚度為5 μιη之鑛銅層（D)。 15 201238751Sputtering power: 50W Material: Gold' Ιό (conditions of electroplating gold) As an example, the following conditions are used, for example, in the case of gold. Gold plating liquid NCF~5〇〇 manufactured by N.E.CHEMCAT. Gold concentration: 0.5~3 g / L Liquid temperature: 20~5〇. 〇pH: 8.0~9.0 (25°C) Liquid specific gravity: 5~11 14 201238751 Current density: 〇·5~1.2A/dm2 Mineralization time: 5~9〇see (analysis method of nickel adhesion) Record the processing surface, press the FR-4 resin to make the opposite side, and cover it. The sample was dissolved using nitric acid at a concentration of 3% by weight until the surface treatment of the film was dissolved. The solution in the beaker was diluted to a W-fold, and quantitative analysis of nickel was carried out by atomic absorption analysis. (Analysis method of adhesion amount of gold and platinum group metals) The analysis method of the adhesion amount of gold and platinum group metals was carried out in the same order as the method for analyzing the amount of deposited nickel, but aqua regia was used instead of nitric acid. EXAMPLES Next, examples and comparative examples of the present invention will be described. Furthermore, this embodiment is merely an example and is not limited to this example. That is, all the aspects or modifications other than the embodiment are also included in the scope of the technical idea of the present invention. (Example 1) An electrolytic copper foil having a foil thickness of 18 m was used. The electrolytic copper foil was used as the copper carrier (A), and a nickel plating layer of 0.03/m was formed by nickel bonding with nickel plating conditions as shown in the following table, and after the nickel plating, Temporarily exposed to the air, and the Pd money coating (C) was formed under the above sputtering conditions. The thick layer of the pd bond layer of the second layer is 0.3 # m. This combination is also shown in Table 1. On the Pd plating layer, a copper ore layer (D) having a thickness of 5 μm was further formed under the above-described copper plating conditions. 15 201238751
【II 電子電路用銅箔 傾斜角 1 (N •Ο 表面 |附有Pd I 1附有Au | I附有Pt | 1 m 附有Pd 載體箔 傾斜角 fN 1 1 1 1 表面 1附有Ni 1 1附有Ni I 1附有Ni 1 1 I附有Ni I 剝離性 〇 〇 〇 X 〇 〇 評價 暫時曝露於空氣中 暫時曝露於空氣中 暫時曝露於空氣中 不曝露於空氣中 暫時曝露於空氣中 不曝露於空氣中 銅箔（D) 厚度 (um) «η V") EF 層（C) 厚度 ( d 1 ο 方法 濺鍍 1電鍍| 1濺鍍I 1電鍍| 1 1濺鍍I 種類 2 3 < £ 3 < 1 剝離層（B) 厚度 (βτη) 0.03 00 00 〇 <N 0.003 種類 2 2： 有機皮膜 載體箔（A) 厚度 (//m) 00 »n ON 00 〇〇 00 種類 電解銅箔 壓延銅箔 電解銅箔 電解銅箔 壓延銅箔 壓延銅箔 1實施例11 I實施例2 1 |實施例3 1 比較例1 I比較例2 1 |比較例3 I ^茛丧难：丨 201238751 進行剝離試驗，確認剝離之狀況。再者，剝離試 方法係於附銅载體之銅箱之銅層（D)側以15吖以上積層 於基材，敎剝離強度，將未達㈣八^情形設為剝離 性良好且記為「〇」’ ^0.5kg八㈣上之情形時，剝離性 不足且記為「X」。實施例1中’未達〇.5kg/Cm，剝離性良 好。 其次，關於將載體銅箱與電子電路用銅箱剝離而獲得 之2個mi，於在與剝離之面相反側之面貼附樹脂而製成 覆銅積層板後，藉由抗蝕劑塗佈及曝光步驟而印刷ι〇條電 路’進而，實施將鎳與銅落之不必要部分除去的蝕刻處理。 於藉由蝕刻形成電路後’除去抗蝕劑，藉由fib:_ 觀察電路之傾斜角。蝕刻條件、電路形成條件、電路之傾 斜角之觀察係如下所述。 (蝕刻條件） 氣化鐵水溶液：（37wt%、波美度：4〇。） 液溫：50°C 喷壓：0.15MPa (電路形成條件） 以下述條件形成電路。 (5//m及9//m銅箔：形成30ym間距電路） 抗蝕劑L/S=25y m/5# m、最終電路頂部（上部） 寬度：1 0 # m、蝕刻時間：4 8秒左右 (1 8 y m銅箔：形成5〇 a m間距電路） 抗蝕劑L/S = 33e m/17y m、最終電路頂部（上部） 17 201238751 寬度：1 5 /z m、蝕刻時間：105秒左右 (35^111銅箔：形成距電路） 抗蝕劑L/ S : 73 y m/ 27 μ m、最終電路頂部（上部） 寬度：1 5 v m '蝕刻時間：2丨0秒左右 (電路之傾斜角之觀察：電路之壓陷之觀察） 藉由FIB—SIM觀察電路剖面。傾斜角為63。以上，為 良好之結果’尤其理想之傾斜角為8〇〜95度之範圍。 以上述條件進行蝕刻而形成電路，進而，於除去抗蝕 劑後進行軟蚀刻。 將其結果示於表i中。其係1G條電路之評價結果。如 該表1所示，電子電路用銅馆之傾斜角成為84。，未產生壓 陷，S平仏為（〇），載體銅箔側之傾斜角亦良好，為72。。 電路宽度與銅層之厚度處於本案發明之範圍内。 (實施例2) 於本實施例中，使用箱厚35"m之壓延銅羯作為銅載 體（A)，如下述表！所示，以上述鑛錄條件於該壓延銅荡 形成鍍鎳層（B ) » 其次，於該鍍鎳後，暫時曝露於空氣中，且以上述電 鍍條件形成Au之鍍敷層（〇。鍍Au層之厚度為—。將 該組合同樣地示於表1中。 於》玄鍍Au層（C ) _h，以上述鑛銅條件進而形成厚度 為5"m之鍍銅層（〇)。 又 其後’將其接著於基板，進行剝離試驗，確認剝離之 狀況。附有基板之附銅載體之銅箱係於錦層（b)與Au層 18 201238751 (C)之間剝離，其強度未達〇.5kg/cm。 對經剝離之電子電路用銅箔實施蝕刻處理，形成電 路。蝕刻條件及電路形成條件與實施例i相同，電路之傾 斜角之觀察（電路之壓陷之觀察）亦與實施例1同樣地實 施。 以上述條件進行蝕刻而形成電路，進而，於除去抗飯 劑之後進行軟蝕刻。 將其結果同樣地示於表1中。其係1 〇條電路之評價結 果。如該表1所示，傾斜角為86。，壓陷較少，評價為（〇）。 再者’由於載體銅箔側之鎳層較厚，故而無法利用蝕刻來 形成電路。 (實施例3 ) 於本實施例中，使用箔厚9 /z m之電解銅箔作為銅載體 (A )如下述表1所示，以上述鑛鎮條件於該電解銅箔形 成鍍鎳層。其次，於該鍍鎳後，暫時曝露於空氣中，以上 述電鍍條件並藉由濺鍍法而形成Pt之鍍敷層（c)ept電鍍 層（c)之厚度為5nm。該組合同樣地示於表1中。 於該鍍pt層上，以上述鍍銅條件進而形成厚度為5“m 之鐘銅層（D )。 其後，將其接著於基板，進行剝離試驗，確認剝離之 狀況。附有基板之附銅載體之銅箔係於鎳層（B)與pt層 之間剝離’其強度未達〇.5kg/cm。 對經剝離之附有基板之電子電路用銅箔實施蝕刻處 理’形成電路。關條件及電路形成條件與實施例i相同， 19 201238751 電路之傾斜角之翻寂， 規察（電路之壓陷之觀察）亦與實施例1 同樣地實施。 ' ft ^列 乂上述條件進行蝕刻而形成電路，進而， 劑之後進行軟卜 將其結果同樣地示於表i中。其係10條電路之評價結 果。如該表1所；，Λκ x '、傾斜角為8 5。’壓陷較少，評價為（〇）。 再者’由於載體鋼落側之錄層⑻較厚’故而無法利用触 刻來形成電路。 (比較例1 ) 使用電解鋼4作為鋼載體（A ),於該電解銅羯以上述 鑛錄條件形成錄τ 1 ^ . 螺層1 ·2以m，於連續地實施鍍Au ( c )後， 形成厚度為5心之錄銅層（D)e 雖欲將載體銅落與電子電路用銅结剝離，但無法徹底 地剝離。結果，無法使用此後之銅荡來形成電路。 (比較例2) 使用壓延㈣作為銅載體⑷，於在該壓延銅箱以上 述鍍鎳條件形成1.5 a mM f ^ u之鎳層（B)後，暫時曝露於空氣 中，之後，形成厚度為5"爪之鍍銅層（d)。 其後，將其接著於基板，進行剝離試驗，確認剝離之 狀況。附有基板之附銅載體之㈣於該強度未達〇.5kg/cm 時係於錦層⑻與銅層⑻之間產生剝離，僅於銅層之 電子電路用銅洛表面不具有由金 '翻族金屬或其等之合金 構成之層。對經剝離之附有基板之電子電路用銅落實施敍 刻處理，形成電路。於電路形成中，電子電路用銅落之傾 20 201238751 斜角為52。，產生壓陷。 (比較例3) 使用厚度為18 之壓延銅箔作為銅載體（A)，且於 在其表面形成有機皮膜後，藉由賤鑛形成厚度為〇3nm之 鈀（Pd)層，之後，立刻形成厚度為w鍍銅層（d)。 其後，將其接著於基板，進行剝離試驗，確認剝離之 狀况。附有基板之附銅載體之銅羯係於銅載體（A )與鍍鈀 (Pd)層（C)之間產生剝離載體落表面不具有鎳層。 於電路形成中，經剝離之附有基板之電子電路用銅羯之傾 斜角為84。’未產生壓陷，故良好。 銅載體係將與經剝離之面相反側之面接著於基板，實 施蝕刻處理，形成電路。其結果，為45。，產生壓陷。 [產業上之可利用性] 由於本發明具有「預先使用銅络之銅載體、進而於其 上形成銅層（銅fi)」之構造，故而可容易地將銅層（銅羯） 剝離’可使製造步驟簡化。$而’由於可用作具有由金、 链族金屬或其等之合金構成之層的極薄㈣之單純構造的 銅猪，故而可任意使用於各種電子電路之設計，從而具有 富有通用性之較大之效果。 又，於藉由銅層（銅铭 、白）之蝕刻而形成電路時，具有 可形成電路寬度更均勻之目標雷 <^知1：路之效果，且具有如下之 效果··無钱刻所致之處理殘留铷 % 4物，可防止壓陷之產生，可 縮短利用姓刻形成電路之時間’而且可極力地使由金、翻 族金屬或其等之合金構成之層的厚度變薄。藉此，由於可 21 201238751 提高圖案蝕刻中之蝕刻性，且可防止短路或電路寬度不良 之產生，故而可作為覆銅積層板（硬質及軟質用）來利用、 且可用於形成印刷基板之電子電路。 【圖式簡單說明】 無 【主要元件符號說明】 無 22[II] Copper foil tilt angle 1 for electronic circuits (N • Ο Surface | with Pd I 1 with Au | I with Pt | 1 m with Pd carrier foil tilt angle fN 1 1 1 1 Surface 1 with Ni 1 1 with Ni I 1 with Ni 1 1 I with Ni I stripping 〇〇〇X 〇〇 evaluation temporarily exposed to the air temporarily exposed to the air temporarily exposed to the air not exposed to the air temporarily exposed to the air Not exposed to air in copper foil (D) Thickness (um) «η V") EF layer (C) Thickness (d 1 ο Method Sputter 1 Plating | 1 Splash I 1 Plating | 1 1 Sputtering I Type 2 3 < £ 3 < 1 Release layer (B) Thickness (βτη) 0.03 00 00 〇 <N 0.003 Type 2 2: Organic film carrier foil (A) Thickness (//m) 00 »n ON 00 〇〇00 Type Electrolytic copper foil rolled copper foil electrolytic copper foil electrolytic copper foil rolled copper foil rolled copper foil 1 Example 11 I Example 2 1 | Example 3 1 Comparative Example 1 I Comparative Example 2 1 | Comparative Example 3 I ^茛丨201238751 A peeling test was carried out to confirm the peeling condition. Further, the peeling test method was performed on the copper layer (D) side of the copper box with the copper carrier. When 15 吖 or more is laminated on the substrate, the peeling strength is less than (4) 八, and when the peeling property is good, and it is described as "〇"' ^0.5kg 八(四), the peeling property is insufficient and is referred to as "X". In the first embodiment, '5 kg/cm is not obtained, and the peelability is good. Next, the two pieces of mi obtained by peeling the carrier copper case and the copper case for the electronic circuit are attached to the side opposite to the peeled surface. After the copper-clad laminate is formed with a resin, the ruthenium circuit is printed by the resist coating and exposure steps, and an etching process for removing unnecessary portions of nickel and copper is performed. After the circuit, the resist is removed, and the tilt angle of the circuit is observed by fib: _. The etching conditions, the circuit formation conditions, and the tilt angle of the circuit are as follows. (etching conditions) An aqueous solution of vaporized iron: (37 wt%, Baume: 4〇.) Liquid temperature: 50°C Spray pressure: 0.15MPa (circuit formation conditions) The circuit is formed under the following conditions: (5//m and 9//m copper foil: 30ym pitch circuit) Agent L/S=25y m/5# m, the top of the final circuit (upper) Width: 1 0 # m, etching time 4 8 seconds or so (1 8 ym copper foil: 5 〇am pitch circuit) Resist L/S = 33e m/17y m, final circuit top (upper) 17 201238751 Width: 1 5 /zm, etching time: 105 Seconds or so (35^111 copper foil: forming the distance circuit) Resist L/S: 73 ym/ 27 μm, the top of the final circuit (upper) Width: 1 5 vm 'etching time: 2 丨 0 seconds or so (circuit Observation of the tilt angle: observation of the indentation of the circuit) Observe the circuit profile by FIB-SIM. The tilt angle is 63. The above is a good result. Particularly, the ideal tilt angle is in the range of 8 〇 to 95 °. The circuit was formed by etching under the above conditions, and further, after the resist was removed, soft etching was performed. The results are shown in Table i. It is the evaluation result of 1G circuit. As shown in Table 1, the inclination angle of the copper hall for electronic circuits is 84. There is no depression, S is flat (〇), and the inclination angle of the carrier copper foil side is also good, 72. . The width of the circuit and the thickness of the copper layer are within the scope of the invention. (Embodiment 2) In the present embodiment, a rolled copper crucible having a thickness of 35 " m was used as the copper carrier (A), as shown in the following table! As shown, the nickel plating layer (B) is formed on the rolled copper by the above-mentioned mining conditions. Next, after the nickel plating, the aluminum is temporarily exposed to the air, and the plating layer of Au is formed by the above plating conditions. The thickness of the Au layer is -. The combination is similarly shown in Table 1. In the "Austempered Au layer (C) _h, a copper plating layer (〇) having a thickness of 5 " m is formed by the above-mentioned ore conditions. Thereafter, the film was adhered to the substrate, and a peeling test was performed to confirm the peeling state. The copper case with the copper carrier attached to the substrate was peeled off between the layer (b) and the layer 18 of 201238751 (C), and the strength was not达〇.5kg/cm. The copper foil for the stripped electronic circuit is etched to form a circuit. The etching conditions and circuit formation conditions are the same as those of the embodiment i, and the observation of the tilt angle of the circuit (the observation of the circuit depression) This was carried out in the same manner as in Example 1. The circuit was formed by etching under the above conditions, and further, after the anti-rice agent was removed, soft etching was performed. The results are shown in Table 1. The evaluation results of the single-circuit circuit are shown. As shown in Table 1, the tilt angle is 86. The evaluation is (〇). Furthermore, since the nickel layer on the side of the carrier copper foil is thick, it is impossible to form an electric circuit by etching. (Example 3) In the present embodiment, an electrolytic copper foil having a foil thickness of 9 /zm was used. As the copper carrier (A), as shown in the following Table 1, a nickel plating layer was formed on the electrolytic copper foil under the above-described mineral condition. Secondly, after the nickel plating, it was temporarily exposed to the air, and the above plating conditions were used and splashed. The plating layer formed by Pt plating (c) The ep plating layer (c) has a thickness of 5 nm. The combination is similarly shown in Table 1. On the pt plating layer, a thickness of 5 is further formed by the above copper plating conditions. "M of the copper layer (D). Thereafter, the substrate was subjected to a peeling test to confirm the peeling condition. The copper foil with the copper carrier attached to the substrate was bonded between the nickel layer (B) and the pt layer. Peeling 'the strength is less than 55 kg/cm. The etching is performed on the peeled copper foil with electronic circuit attached to the substrate' to form a circuit. The closing conditions and circuit forming conditions are the same as those of the embodiment i, 19 201238751 The inclination angle of the circuit The silence, the inspection (the observation of the circuit's depression) is the same as in the first embodiment. [ ft ^ 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 乂 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' x ', the inclination angle is 8 5. 'There is less depression, and the evaluation is (〇). Furthermore, 'the recording layer (8) on the falling side of the carrier steel is thicker, so the circuit cannot be formed by the touch. (Comparative Example 1) The electrolytic steel 4 is used as the steel carrier (A), and the electrolytic copper crucible is formed by the above-mentioned mineral recording conditions to record τ 1 ^. The spiral layer 1 · 2 is m, and after continuous plating Au (c), a thickness of 5 is formed. The copper layer (D)e of the heart is intended to peel off the carrier copper drop from the copper junction of the electronic circuit, but cannot be completely peeled off. As a result, the subsequent copper turns cannot be used to form the circuit. (Comparative Example 2) After rolling (4) was used as the copper carrier (4), a nickel layer (B) of 1.5 a mM f ^ u was formed in the rolled copper box under the above-described nickel plating conditions, and then temporarily exposed to air, and then formed to have a thickness of 5"The copper plating of the claws (d). Thereafter, this was followed by a substrate, and a peeling test was performed to confirm the state of peeling. (4) The copper-attached carrier with the substrate is not peeled off between the layer (8) and the copper layer (8) when the strength is less than 5 kg/cm, and the copper surface of the electronic circuit only has no copper by the copper layer. A layer composed of a turn-over metal or an alloy thereof. The stripped electronic circuit with the substrate is subjected to a dicing process to form a circuit. In the circuit formation, the electronic circuit uses a copper drop 20 201238751 with an oblique angle of 52. , creating a depression. (Comparative Example 3) A rolled copper foil having a thickness of 18 was used as the copper carrier (A), and after an organic film was formed on the surface thereof, a palladium (Pd) layer having a thickness of 〇3 nm was formed by bismuth ore, and then formed immediately. The thickness is w copper plating layer (d). Thereafter, this was followed by a substrate, and a peeling test was performed to confirm the state of peeling. The copper lanthanum with the copper-attached carrier attached to the substrate is between the copper carrier (A) and the palladium-plated (Pd) layer (C) to produce a peeling carrier. The surface of the falling surface does not have a nickel layer. In the circuit formation, the peeling angle of the copper plaque for the electronic circuit with the substrate attached was 84. 'No depression occurred, so it is good. The copper carrier is subjected to an etching treatment by a surface on the opposite side to the peeled surface to form an electric circuit. The result is 45. , creating a depression. [Industrial Applicability] Since the present invention has a structure in which a copper carrier of a copper network is used in advance and a copper layer (copper fi) is formed thereon, the copper layer (copper copper) can be easily peeled off. Simplify the manufacturing steps. $ and 'Because it can be used as a copper pig with a very thin structure of a layer composed of an alloy of gold, a chain metal or the like, it can be arbitrarily used in the design of various electronic circuits, thereby having versatility. Larger effect. Further, when a circuit is formed by etching a copper layer (Bronze, White), it has the effect of forming a target of a more uniform circuit width, and has the following effects: The resulting residual 铷%4 material can prevent the occurrence of indentation, shorten the time for forming a circuit by using a surname, and can minimize the thickness of a layer composed of gold, a turnbone metal or the like. . Therefore, since 21 201238751 can improve the etching property in the pattern etching and prevent the occurrence of short circuits or circuit width defects, it can be used as a copper clad laminate (for hard and soft), and can be used for forming printed circuit boards. Circuit. [Simple description of the diagram] None [Key component symbol description] None 22