201236370 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種電子裝置，尤指一種電壓穩定裝置。 【先前技術】 [0002] 在電路設計中，經常需要將穩定的參考電壓提供至各個 電路區塊，以使各個電路區塊能夠正常運作。電路區塊 可以包含有主動元件及/或被動元件，當參考電壓耦接至 電路區塊時》電路區塊可能會自參考電壓處沒取電流或 輸出電流而造成參考電壓的抖動（或稱為突波，glitch) ，因此，電路區塊需要等待一段時間，至參考電壓穩定 後才能依據參考電壓進行後續的運作，而限制了電路區 塊的運作速率。所謂穩定，是指參考電壓已經適合讓電 路區塊用以參考而進行運作。 [0003] 因此，為了降低突波的影響，實作上經常會將參考電壓 搞接至電壓緩衝器（voltage buffer)，藉由較高驅動 能力（driving capabi lity)的電麼緩衝器來驅動電路 區塊，而向電路區塊（以下簡稱負載）提供穩定的參考電 壓。例如，在電路設計中採用單位增益的放大器（unity gain amplifier)等方式實施的電壓緩衝器。 [0004] 然而，當負載的阻抗值變大或是用以驅動負載的時間降 低時，電壓緩衝器若要在預設的時間内向負載提供穩定 的參考電壓，則必須提高電壓緩衝器的頻寬、降低電壓 緩衝器的輸出阻抗、及/或動態地改變電壓緩衝器的輸出 電流。因此，電壓緩衝器的電路面積及功率消耗皆會以 將***方倍的速度大幅上升，而造成硬體成本與能源的 10110169#單編號 A_ 第3頁/共21頁 1012003045-0 201236370 浪費。 【發明内容】 [0005] 有鑑於此，如何降低突波，讓參考電壓能快速的穩定， 並且降低能源消耗，實為業界有待解決的問題。 [0006] 本說明書提供了一種參考電壓穩定裝置，其包含有：一 輸入端，用以接收一參考電壓；一輸出端，用以耦接至 一負載；一電壓緩衝器，耦接於該輸入端及該輸出端之 間；一電荷儲存裝置，耦接於該輸出端；以及一充放電 電路，耦接於該電荷儲存電路；其中該充放電電路會對 該電荷儲存裝置進行充電或放電，並且該電壓緩衝器及 充電或放電後的該電荷儲存裝置會對該負載供電，使該 負載端的電壓經過一段時間後等於該參考電壓。 [0007] 本說明書另提供一種參考電壓穩定方法，其包含有：利 用一電壓缓衝器接收一參考電壓；對一電荷儲存裝置進 行充電或放電；以及利用該電壓缓衝器及充電或放電後 的該電荷儲存裝置對一負載供電，使該負載端的電壓經 過一段時間後等於該參考電壓。 [0008] 本說明書另提供一種參考電壓穩定裝置，其包含有：一 第一輸入端，用以接收一第一參考電壓；一第二輸入端 ，用以接收一第二參考電壓；一第一輸出端及一第二輸 出端；一第一電壓緩衝器，耦接於該第一輸入端及該第 一輸出端之間；一第二電壓緩衝器，耦接於該第二輸入 端及該第二輸出端之間；一第一電荷儲存裝置，耦接於 該第一輸出端；一第二電荷儲存裝置，耦接於該第二輸 出端；一充電電路，耦接於該第一電荷儲存電路；以及 1011016#單編號廳01 第4頁/共21頁 1012003045-0 201236370 一放電電路，耦接於該第二電荷儲存電路；其中該充電 電路會對該第一電荷儲存裝置進行充電，並且該放電電 路會對該第二電荷儲存裝置進行放電，該第一電壓緩衝 器及該充電後的第一電荷儲存裝置會於該第一輸出端提 供一第一輸出電壓，而該第二電壓緩衝器及該放電後的 第二電荷儲存裝置會於該第二輸出端提供一第二輸出電 壓，並且該第一輸出電壓與該第二輸出電壓間的電壓差 值與該第一參考電壓與該第二參考電壓間的電壓差值經 過一段時間後會相等。 [0009] 上述參考電壓穩定裝置的優點之一是能夠降低電壓緩衝 器的硬體需求，因而降低硬體成本與所消耗的能源。 [0010] 上述參考電壓穩定裝置的另一優點是能降低突波的影響 ，並且讓參考電快速的穩定，而能適用於各種高速的系 統應用。 【實施方式】 [0011] 以下將配合相關圖式來說明本發明之實施例。在這些圖 式中，相同的標號表示相同或類似的元件或流程步驟。 [0012] 圖1為本發明的實施例之一的參考電壓穩定裝置100簡化 後的功能方塊圖，參考電壓穩定裝置100包含有電壓緩衝 器110、電荷儲存裝置120、充放電電路130、控制電路 140、開關150和160、輸入端170及輸出端180。參考電 壓穩定裝置100可用以接收參考電壓Vref，並且將輸出端 的電壓Vo提供至負載，以使負載能夠接收到與參考電壓 Vref相同的輸出電壓Vo。負載可以包含有由各種主動元 件及/或被動元件所組成的電路，並且耦接於參考電壓穩 10110169#單編號 A0101 第5頁/共21頁 1012003045-0 201236370 定裳置100的輸出端18〇和第二電位間。 [0013] [0014] [0015] [0016] 電壓緩衝器110可以採用負回授組態的放大器電路，或者 乂放大器电路搭配源級隨偶器（s〇urce f〇u〇wer)、共 源級放大器（comm〇n s〇urce 及/或Μ類的 放大器（class-AB amplifier)等方式實施。在另一些 貝施例中，也可以採用其他電路設計，自輸入端17〇接收 輸入的參考電壓矸“，並提供與參考電壓Vref相同的輸 出電壓。 電荷儲存裝置120，耦接於充放電電路13〇及第一電位之 間，其可以採用一個或多個電容、或者以電容搭配其他 電路元件所實施，以儲存電荷。 充放電電路13〇用以對電荷儲存裝置12〇進行充電及/或放 電（以下簡稱充放電），使電荷儲存裝置12〇儲存有預設的 電何置。例如，充放電電路13〇可以採用各種架構的電流 源電路等方式實施。 控制電路140用以設置充放電電路13〇，使電荷儲存裝置 120此夠儲存合適的電荷量。例如控制電路丨4〇可以依 據參考電MVref及輸出端的電壓v〇的數值，採用查表的 方式，设置充放電電路13〇將電荷儲存裝置12〇充電或放 電至合適的電荷量。或者，控制電路14〇也可以依據參考 電壓Vref及輸出端的電壓乂〇的數值，採用其他的 類比及/ 或數位的彳5號處理電路，而設置充放電電路將電荷儲 存裝置120充電或放電至合適的電荷量。此外，控制電路 140還會控制開關15〇和16〇適時地呈現導通或不導通狀 10Π0169产#峨 A0101 第6頁/共21頁 1012003045-0 201236370 態，以於適當的時刻於輸出端180提供輸出電壓Vo。 [0017] 圖2為圖1的參考電壓穩定裝置100運作時的一實施例簡化 後的流程圖2 0 0，以下將以圖2搭配圖1，進一步說明參考 電壓穩定裝置100的運作方式。 [0018] 在流程210中，參考電壓穩定裝置100接收參考電壓Vref ，此時控制電路140將開關150設置為導通，並且將開關 160設置為不導通。使充放電電路130導通於電荷儲存裝 置120，並使電壓緩衝器110及電荷儲存裝置120不導通 於負載。 [0019] 在流程220中，控制電路140會依據參考電壓Vref及輸出 端的電壓Vo，而設置充放電電路130將電荷儲存裝置120 充放電至合適的電荷量。 [0020] 在流程230中，控制電路140會將開關150設置為不導通 ，並且將開關160設置為導通，而將電壓緩衝器110及電 荷儲存裝置120耦接至負載，使負載於輸出端180所接收 到的電壓Vo能夠快速地與參考電壓Vref相同。 [0021] 在上述的實施例中，控制電路140可以採用各種合適的方 式決定電荷儲存裝置120的充電或放電方式。例如，在一 些實施例中，控制電路14 0可以設置充放電電路1 3 0對電 荷儲存裝置120充放電的時間、電流、及/或電壓等。在 另一實施例中，電荷儲存裝置120包含有多個電容，控制 電路140可以設置充放電電路130僅對多個電容的部分電 容充放電，而改變電荷儲存裝置120所儲存的電荷量。 [0022] 在上述的實施例中，控制電路140會依據參考電壓Vref及 1012003045-0 10110169#單編號A〇101 第7頁/共21頁 201236370 輸出端的電壓Vo，來判斷電荷儲存裝置1 2 0的合適電荷量 。例如，在一實施例中，將負載以電容值C1的電容等效 表示，並將電荷儲存裝置120以電容值C2的電容等效表示 。若要將負載由現有的電位充電或放電至參考電壓Vref 時，負載所必須吸收的電荷為Q1 (或是釋放的電荷），則 控制電路140可設置充放電電路130將電荷儲存裝置120 先行充電至Q1+Q2，其中Q2為電荷儲存裝置120的電位等 於參考電壓Vref所需的電荷量。因此，將電壓緩衝器110 及電荷儲存裝置120耦接至負載後，Q1的電荷會由電荷儲 存裝置120流至負載，而使電壓緩衝器110的輸出、電荷 儲存裝置120、及負載的電位皆成為參考電壓Vref。由於 電荷於電荷儲存裝置120及負載之間的傳輸非常快，可以 使輸出端180的電壓Vo到達參考電壓Vref的時間不會受 限於電壓緩衝器110的電流，因而電壓緩衝器110的硬體 需求可以大幅降低。此外，藉由控制電路140適當地設置 電荷儲存裝置1 20所儲存的電荷量，也可以使參考電壓穩 定裝置10 0耦接至負載後的突波降低。 [0023] 在其他的實施例的流程220中，控制電路140也可以採用 其他的方式設置充放電電路130，例如，控制電路140不 依據參考電壓Vref或輸出端的電壓Vo設置充放電電路 130，而是僅設置充放電電路130對電荷儲存裝置120依 據一個或多個固定的時間進行充電及/或放電、或者充電 及/或放電至一個或多個固定的電荷量等方式。 [0024] 在另一些實施例的流程22 0中，控制電路1 4 0也可以僅依 據參考電壓Vref或輸出端的電壓Vo的其中之一而設置充 1〇1刪#單編號腿01 第8頁/共21頁 1012003045-0 201236370 [0025] [0026] [0027] [0028] [0029] 10110169#單編號 放電電路130對電荷錯存襄置j2〇 實施例中，控制電路〗4〇可以俏的充敌電。例如，在— 測的結果調整充放電電路130對^大波的大小，再根據·ί貞 電的電荷量。 電荷儲存裝置120所充放 在另-些實施例令’控制電路⑷ 結合而設置充放電電路13〇。或者也可以採用多種方式的 控制電路140也可以省略或簡化’在另一些實施例中， 在上述的實施例中，也可以在電 裝置120間增加另-開關（圖丨中未緩衝器及電荷儲存 130對電荷儲存裝置12〇進行充致、示），使充放電電路 與電荷儲存裝置120之間不㈣’電1緩衝器110 才將電壓緩衝器110與電荷健存^ °而於對負載供電時， 裝置120之間導通。 在上述的實施例的流程230令，火。 儲存裝置120辆接至負載時，也可，壓緩衝器110及電荷 也耗接至負載-段時間，而對置充放電電路咖 於輸出端180所接收到的電壓乂進订充放電’使負載 vref_。 Μ料地與參考電壓 在上述的實施例的流程230中，電厥 ^ ^ 緩衝器11〇及電荷儲 存裝置120可以設置為先後耦接至m 載。 負栽或者同時耦接至負 在上述的實施例中，控制電路14〇 J以藉由電何儲存褒置 120的電壓來估計其所儲存的電箱 重，或者也可以依據充 放電電路130進行充放電的時間、番阪 ^ ^ 聲壓、電流及/或電荷 儲存裝置12〇的阻抗值等估計電荷錢存裝置m所儲存的 伽m 第9頁/共21頁 1012003045-0 201236370 電荷量。 [0030] 在上述的實施例中 [0031] [0032] [0033] [0034] :圖1:電荷儲存裝置120所耗接的 同或不同的電 一電位與負載職接的第二電位可以是相…，第 位 10110169#單編號 A0I01 =的實施例中，充放電電路13〇可以僅 或放電功能，或者也可以同時具有充電及放電功能。 在上述的實施例中，充放電 1_接至高於參考嫌 1將電荷儲存裝置 後的電荷儲存u12D的電ΓΓΓΓ行充電，使充電 或者，充放電_也可以將電二 =考電編。 低於參考電壓Vref的電位 °4存裝置120輕接至 物的電壓小於或等:參考電電：r «置_化後 31°和311、電荷_置32::==、= 電電路331、控制雷技心 電電路330、放 、榦入端3心 開關咖、351,· ^ J 71、以及輪出端380和381。參考電壓稃 輪入端37。和371接收差動的參考·： 和Von提供至2輸出础❹和381將差動的輸出謂叩 、栽’以使負載能夠接收到與差動的參考電 的及^11相同的差動輸出電MVop和Von。 電壓緩衝_和川、電荷儲存裳綱和321、充電電 3〇放電電路331、控制電路340、開關350、351、 〇和361與圖1中相對應的功能方塊的連接方式、運作方 Oim 第10頁/共2i頁 1012003045-0 201236370 式與變化形大致相同，因此類似的部分不再贅述。 [0035] Ο [0036] [0037] [0038] 然而，由於參考電壓穩定裝置3〇〇需要產生差動的輸出電 壓Vop和Vcm，因此控制電路34〇需要設置充電電路33〇將 電荷儲存裝置320充電至合適的電荷量，並且設置放電電 路331將電荷儲存裝置321放電至合適的電荷量。因此當 控制電路340設置開關350和351不導通，並設置開關36〇 和361導通後，電壓緩衝器31〇和“I以及電荷儲存裝置 320和321會耦接至負載，使負載於輸出端38〇和所接 收到的電壓Vop和V0n間的差動電壓能夠快速地與參考電 壓Vrefp和Vrefn間的差動電壓相同。 在本實施例中’電荷儲存裝置32Q和321皆純至第一電 位。在另一些實施例中，電荷儲存裝置32〇和321也可以 分別耦接至不同的電位。 參考電Μ定裝置的輸出電壓v〇p和v〇n可以分別與參考 電壓Vrefp和Vrefn相同。或者，參考電麗穩定裝置的輪 出電壓Vop和Von可以分別與參考電壓 相同，但是輸出電壓Vop和v〇n間的電壓差值與參考電壓 Vrefp和Vrefn間的電壓差值相同 在上述的實施例中’也可以在電壓緩衝器3iq及電荷 裝置320間’以/或電壓緩衝器川及電荷储存裝置3 増加開關，使充電電路33G對電荷儲存裝置32〇進行充電0 時，及/或放電電路331對電荷儲存裝置321進行放電時 電壓緩衝器31Q與電荷儲存裝置320之間不會導通， 電壓緩衝器311與電荷儲存裝置321之間不會導通。而於 第11頁/共21頁 1011016#^ A0101 1012003045-0 201236370 對負載供電時，才將電壓緩衝器31 0與電荷儲存裝置320 之間導通，及/或電壓緩衝器311與電荷儲存裝置321之間 導通。 [0039] 在上述的實施例中，參考電壓穩定裝置藉由將電荷儲存 裝置預先充電或放電至合適的電荷量，因此當電壓緩衝 器及電荷儲存裝置耦接至負載時，即可快速的將電荷傳 送至（或汲取自）負載，使負載可以快速地達到與參考電 壓相近或相同的電壓。此時，電壓緩衝器僅需提供電流 以對預估的電荷與實際的電荷間的差異量進行充放電的 動作，而將參考電壓穩定裝置的輸出電壓修正至與參考 電壓相同。因此，對於電壓缓衝器的頻寬及驅動力的要 求皆可降低，並且電荷儲存裝置（如，電容）的硬體面積 和能源消耗都非常低，因此可以使參考電壓穩定裝置的 設計難度、硬體面積和功率消耗都能大幅降低。 [0040] 由於電荷儲存裝置與負載間傳輸電荷的時間相當快速， 並且電壓緩衝器僅須修正小幅的電壓差異。因此，本發 明能適用於高速的類比數位轉換器等系統應用中。 [0041] 此外，在如連續近似類比數位轉換器（successive approximation ADC)等應用中，控制電路可藉由查表 等方式，而設置充放電電路預先將電荷儲存裝置充放電 至精確的電荷值。 [0042] 此外，本發明也可以與各種電壓緩衝器的改良方式搭配 使用。例如，適當提高電壓緩衝器的頻寬、降低電壓緩 衝器的輸出阻抗、及/或動態地改變電壓緩衝器的輸出電 10110169#單編號 A〇101 第12頁/共21頁 1012003045-0 201236370 流，並且搭配上述實施例中採用充放電電路及電荷儲存 電路對負載充放電的方式。 [0043] Ο [0044] [0045]201236370 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to an electronic device, and more particularly to a voltage stabilizing device. [Prior Art] [0002] In circuit design, it is often necessary to provide a stable reference voltage to each circuit block so that each circuit block can operate normally. The circuit block may include active components and/or passive components. When the reference voltage is coupled to the circuit block, the circuit block may draw current or output current from the reference voltage to cause jitter of the reference voltage (or Surge, glitch), therefore, the circuit block needs to wait for a period of time, until the reference voltage is stable before the subsequent operation according to the reference voltage, and the operating rate of the circuit block is limited. The so-called stability means that the reference voltage is already suitable for the circuit block to operate for reference. [0003] Therefore, in order to reduce the influence of the glitch, the reference voltage is often connected to a voltage buffer, and the circuit is driven by a high-capacity driving capacitor. Block, and provide a stable reference voltage to the circuit block (hereinafter referred to as the load). For example, a voltage buffer implemented in a circuit design using a unity gain amplifier or the like. [0004] However, when the impedance value of the load becomes large or the time for driving the load decreases, if the voltage buffer supplies a stable reference voltage to the load for a preset time, the bandwidth of the voltage buffer must be increased. , reducing the output impedance of the voltage buffer, and / or dynamically changing the output current of the voltage buffer. Therefore, the circuit area and power consumption of the voltage buffer will rise sharply at a speed of nearly square times, resulting in hardware cost and energy. 10110169#单号 A_ Page 3 of 21 1012003045-0 201236370 Waste. SUMMARY OF THE INVENTION [0005] In view of this, how to reduce the glitch, allow the reference voltage to be quickly stabilized, and reduce energy consumption is a problem to be solved in the industry. [0006] The present specification provides a reference voltage stabilization device, including: an input terminal for receiving a reference voltage; an output terminal for coupling to a load; a voltage buffer coupled to the input Between the terminal and the output terminal; a charge storage device coupled to the output terminal; and a charge and discharge circuit coupled to the charge storage circuit; wherein the charge and discharge circuit charges or discharges the charge storage device And the voltage buffer and the charge storage device after charging or discharging supply power to the load, so that the voltage of the load terminal is equal to the reference voltage after a period of time. [0007] The present specification further provides a reference voltage stabilization method, including: receiving a reference voltage by using a voltage buffer; charging or discharging a charge storage device; and utilizing the voltage buffer and charging or discharging The charge storage device supplies power to a load such that the voltage at the load terminal is equal to the reference voltage over a period of time. [0008] The present specification further provides a reference voltage stabilization device, including: a first input terminal for receiving a first reference voltage; a second input terminal for receiving a second reference voltage; An output terminal and a second output terminal; a first voltage buffer coupled between the first input terminal and the first output terminal; a second voltage buffer coupled to the second input terminal and the a first charge storage device coupled to the first output terminal; a second charge storage device coupled to the second output terminal; a charging circuit coupled to the first charge a storage circuit; and 1011016# single number hall 01 page 4 / 21 pages 1012003045-0 201236370 a discharge circuit coupled to the second charge storage circuit; wherein the charging circuit charges the first charge storage device, And the discharge circuit discharges the second charge storage device, the first voltage buffer and the charged first charge storage device provide a first output voltage at the first output end, and the second voltage buffer And the second charge storage device after the discharge provides a second output voltage at the second output end, and a voltage difference between the first output voltage and the second output voltage and the first reference voltage and the first The voltage difference between the two reference voltages will be equal after a period of time. One of the advantages of the above reference voltage stabilizing device is that it can reduce the hardware requirements of the voltage buffer, thereby reducing the hardware cost and the energy consumed. [0010] Another advantage of the above reference voltage stabilizing device is that it can reduce the influence of the glitch and make the reference power fast and stable, and can be applied to various high speed system applications. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the related drawings. In the figures, the same reference numerals are used to refer to the same or similar elements or process steps. 1 is a simplified functional block diagram of a reference voltage stabilization device 100 according to an embodiment of the present invention. The reference voltage stabilization device 100 includes a voltage buffer 110, a charge storage device 120, a charge and discharge circuit 130, and a control circuit. 140, switches 150 and 160, input terminal 170 and output terminal 180. The reference voltage stabilizing device 100 can be used to receive the reference voltage Vref and supply the voltage Vo of the output terminal to the load to enable the load to receive the same output voltage Vo as the reference voltage Vref. The load may include a circuit composed of various active components and/or passive components, and is coupled to the reference voltage. 10110169# Single No. A0101 Page 5/Total 21 Page 1012003045-0 201236370 The output of the fixed slot 100〇 And the second potential. [0016] [0016] The voltage buffer 110 may be a negative feedback configuration of the amplifier circuit, or a 乂 amplifier circuit with a source-level hopper (s〇urce f〇u〇wer), common source Amplifiers (comm〇ns〇urce and/or class-AB amplifiers) are implemented. In other examples, other circuit designs can be used to receive the input reference voltage from the input terminal 17〇.矸", and provide the same output voltage as the reference voltage Vref. The charge storage device 120 is coupled between the charge and discharge circuit 13 and the first potential, which may use one or more capacitors, or a capacitor with other circuit components The charge and discharge circuit 13 is used to charge and/or discharge the charge storage device 12 (hereinafter referred to as charge and discharge), so that the charge storage device 12 is stored with a preset power. For example, The charge and discharge circuit 13 can be implemented by using a current source circuit of various structures, etc. The control circuit 140 is configured to set the charge and discharge circuit 13 to enable the charge storage device 120 to store a suitable amount of charge. The control circuit 丨4〇 can set the charge and discharge circuit 13 to charge or discharge the charge storage device 12 to a suitable amount of charge according to the reference voltage MVref and the value of the voltage v〇 at the output end. 14〇 can also use other analogy and/or digital 彳5 processing circuits according to the reference voltage Vref and the voltage 输出 value of the output terminal, and set the charging and discharging circuit to charge or discharge the charge storage device 120 to a suitable amount of charge. In addition, the control circuit 140 also controls the switches 15 〇 and 16 〇 to assume conduction or non-conduction in a timely manner. The state of the output is 180 at the appropriate time. [0017] FIG. 2 is a simplified flowchart of an embodiment of the reference voltage stabilizing device 100 of FIG. 1 in operation. The reference voltage stabilizing device 100 will be further described below with FIG. [0018] In the process 210, the reference voltage stabilizing device 100 receives the reference voltage Vref, at which time the control circuit 140 sets the switch 150 to be turned on, and The switch 160 is set to be non-conducting. The charge and discharge circuit 130 is turned on to the charge storage device 120, and the voltage buffer 110 and the charge storage device 120 are not turned on. [0019] In the process 220, the control circuit 140 is based on the reference voltage. Vref and the voltage Vo at the output, and the charge and discharge circuit 130 is set to charge and discharge the charge storage device 120 to a suitable amount of charge. [0020] In the flow 230, the control circuit 140 sets the switch 150 to be non-conducting, and the switch 160 The voltage buffer 110 and the charge storage device 120 are coupled to the load, so that the voltage Vo received by the load at the output terminal 180 can be quickly the same as the reference voltage Vref. [0021] In the above-described embodiments, the control circuit 140 may determine the manner in which the charge storage device 120 is charged or discharged in various suitable manners. For example, in some embodiments, the control circuit 140 can set the time, current, and/or voltage, etc. of the charge and discharge circuit 130 to charge and discharge the charge storage device 120. In another embodiment, the charge storage device 120 includes a plurality of capacitors, and the control circuit 140 can set the charge and discharge circuit 130 to charge and discharge only a portion of the plurality of capacitors, and change the amount of charge stored in the charge storage device 120. [0022] In the above embodiment, the control circuit 140 determines the charge storage device 1 2 0 according to the voltage Vo of the output voltage of the reference voltage Vref and 1012003045-0 10110169# single number A 〇 101 page 7 / 21 page 201236370. The appropriate amount of charge. For example, in one embodiment, the load is equivalently represented by the capacitance of the capacitance value C1, and the charge storage device 120 is equivalently represented by the capacitance of the capacitance value C2. To charge or discharge the load from the existing potential to the reference voltage Vref, the charge that the load must absorb is Q1 (or the discharged charge), and the control circuit 140 can set the charge and discharge circuit 130 to charge the charge storage device 120 first. To Q1+Q2, where Q2 is the amount of charge required for the potential of the charge storage device 120 to be equal to the reference voltage Vref. Therefore, after the voltage buffer 110 and the charge storage device 120 are coupled to the load, the charge of Q1 flows from the charge storage device 120 to the load, and the output of the voltage buffer 110, the charge storage device 120, and the potential of the load are both Become the reference voltage Vref. Since the transfer of charge between the charge storage device 120 and the load is very fast, the time during which the voltage Vo of the output terminal 180 reaches the reference voltage Vref is not limited by the current of the voltage buffer 110, and thus the hardware of the voltage buffer 110 Demand can be greatly reduced. In addition, by appropriately setting the amount of charge stored in the charge storage device 120 by the control circuit 140, the reference voltage stabilization device 100 can also be coupled to the surge after the load is reduced. [0023] In the flow 220 of other embodiments, the control circuit 140 may also set the charge and discharge circuit 130 in other manners. For example, the control circuit 140 does not set the charge and discharge circuit 130 according to the reference voltage Vref or the voltage Vo of the output terminal. It is a way to set only the charge and discharge circuit 130 to charge and/or discharge, or charge and/or discharge the charge storage device 120 to one or more fixed amounts of charge according to one or more fixed times. [0024] In the flow 22 0 of other embodiments, the control circuit 1400 may also set the charging only according to one of the reference voltage Vref or the voltage Vo of the output terminal. 1###### [0029] [0029] [0029] 10110169# single number discharge circuit 130 for charge misplacement j2 〇 In the embodiment, the control circuit can be pretty Fill the enemy with electricity. For example, the result of the measurement is adjusted to the magnitude of the large wave of the charge and discharge circuit 130, and then according to the charge amount of the electric charge. The charge storage device 120 is charged and charged in another embodiment, and the control circuit (4) is combined to provide a charge and discharge circuit 13A. Alternatively, the control circuit 140 can also be omitted or simplified. In other embodiments, in the above embodiments, another switch can be added between the electrical devices 120 (the buffer and the charge are not shown in the figure). The storage 130 charges (shows) the charge storage device 12 to make the voltage buffer 110 and the charge buffer between the charge and discharge circuit and the charge storage device 120. When power is supplied, the devices 120 are turned on. In the flow 230 of the above embodiment, fire. When the storage device 120 is connected to the load, the voltage buffer 110 and the electric charge may also be consumed to the load-segment time, and the voltage received by the opposite charging/discharging circuit at the output terminal 180 may be charged and discharged. Load vref_. The ground and reference voltages In the flow 230 of the above embodiment, the power buffer ^ 11 and the charge storage device 120 may be arranged to be coupled to the m carrier. Negatively or simultaneously coupled to the negative embodiment, the control circuit 14〇J estimates the stored box weight by the voltage of the storage unit 120, or may also be performed according to the charging and discharging circuit 130. The charge and discharge time, the sound pressure of the Fansong, the current and/or the impedance value of the charge storage device 12〇, etc., are estimated by the amount of charge stored in the charge storage device m, and the amount of charge is 101 pages 045-0 to 201236370. [0030] In the above embodiment, [0033] [0034] FIG. 1 : The second potential of the same or different electric potential and load interface consumed by the charge storage device 120 may be In the embodiment of the first bit 10110169# single number A0I01 =, the charge and discharge circuit 13A may have only a discharge function, or may have both a charge and discharge function. In the above embodiment, the charge/discharge 1_ is connected to the charge storage device u12D after the charge storage device is higher than the reference charge 1, so that charging or charging/discharging can also be performed. a potential lower than the reference voltage Vref, the voltage of the device 120 is lightly connected to the object is less than or equal to: reference electric power: r «set_31 and 311, charge_set 32::==, = electrical circuit 331, The lightning electrocardiograph circuit 330, the discharge, the dry end, the heart switch, the 351, the J 71, and the wheel ends 380 and 381 are controlled. Reference voltage 轮 wheeled terminal 37. And 371 receive the differential reference ·: and Von provide to the 2 output base and 381 to differential output, so that the load can receive the same differential output as the differential reference and ^11 Electric MVop and Von. The voltage buffer _ 川和川, charge storage and 321 , charging electric 3 〇 discharge circuit 331, control circuit 340, switches 350, 351, 〇 and 361 and the corresponding functional blocks in Figure 1, the operating method Oim The 10 pages/total 2i page 1012003045-0 201236370 are substantially the same as the variations, so similar parts will not be described again. [0035] However, since the reference voltage stabilizing device 3 needs to generate the differential output voltages Vop and Vcm, the control circuit 34 needs to set the charging circuit 33 to charge the charge storage device 320. The charge is charged to a suitable amount of charge, and the discharge circuit 331 is set to discharge the charge storage device 321 to a suitable amount of charge. Therefore, when the control circuit 340 sets the switches 350 and 351 to be non-conducting and sets the switches 36 and 361 to be turned on, the voltage buffer 31 and "I and the charge storage devices 320 and 321 are coupled to the load to load the output 38. The differential voltage between 〇 and the received voltages Vop and V0n can be quickly the same as the differential voltage between the reference voltages Vrefp and Vrefn. In the present embodiment, the 'charge storage devices 32Q and 321 are pure to the first potential. In other embodiments, the charge storage devices 32A and 321 can also be respectively coupled to different potentials. The output voltages v〇p and v〇n of the reference device can be the same as the reference voltages Vrefp and Vrefn, respectively. The turn-off voltages Vop and Von of the reference galvanic stabilization device may be the same as the reference voltage, respectively, but the voltage difference between the output voltages Vop and v〇n is the same as the voltage difference between the reference voltages Vrefp and Vrefn in the above embodiment. The middle 'can also be connected between the voltage buffer 3iq and the charge device 320' or the voltage buffer and the charge storage device 3 to cause the charging circuit 33G to charge the charge storage device 32. When the discharge circuit 331 discharges the charge storage device 321 , the voltage buffer 31Q and the charge storage device 320 are not turned on, and the voltage buffer 311 and the charge storage device 321 are not turned on. On page 11 / 21 pages 1011016#^ A0101 1012003045-0 201236370 When the load is supplied with power, the voltage buffer 31 0 is electrically connected to the charge storage device 320, and/or the voltage buffer 311 is electrically connected to the charge storage device 321. In the above embodiment, the reference voltage stabilizing device can charge or discharge the charge storage device to a proper amount of charge, so that when the voltage buffer and the charge storage device are coupled to the load, the charge can be quickly charged. Transfer to (or draw from) the load so that the load can quickly reach a voltage close to or the same as the reference voltage. At this point, the voltage buffer only needs to supply current to charge the difference between the estimated charge and the actual charge. The discharge action corrects the output voltage of the reference voltage stabilizing device to be the same as the reference voltage. Therefore, for the bandwidth and driving force of the voltage buffer The requirements can be reduced, and the hard area and energy consumption of the charge storage device (eg, capacitor) are very low, so that the design difficulty, hardware area, and power consumption of the reference voltage stabilizing device can be greatly reduced. [0040] Since the time for transferring charge between the charge storage device and the load is relatively fast, and the voltage buffer only has to correct a small voltage difference, the present invention can be applied to system applications such as high-speed analog digital converters. [0041] In applications such as a continuous approximate approximation ADC, the control circuit can set the charge and discharge circuit to charge and discharge the charge storage device to a precise charge value in advance by means of a look-up table or the like. Furthermore, the present invention can also be used in conjunction with various improved methods of voltage buffers. For example, appropriately increasing the bandwidth of the voltage buffer, reducing the output impedance of the voltage buffer, and/or dynamically changing the output of the voltage buffer. 10110169#单号A〇101 Page 12 of 21 page 1012003045-0 201236370 Stream And in combination with the above embodiment, the charging and discharging circuit and the charge storage circuit are used to charge and discharge the load. [0043] [0045]
[0046] [0047] 說明書及申請專利範圍中的某些詞彙被用來指稱特定的 元件，所屬技術領域的技術人員應可理解，同樣的元件 可能會用不同的名詞來稱呼。在說明書及申請專利範圍 中，並不以名稱的差異作為區分元件的方式，而是以元 件在功能上的差異來為區分的基準。在說明書及申請專 利範圍中所提及的「包含」為一開放式的用語，故應解 釋成「包含但不限定於」。另外，「搞接j 一詞包含任 何直接及間接的連接手段。 以上所述僅為本發明的實施例，各個實施例及各實施例 的部份技術特徵間皆能適當的結合而不互斥，凡依本發 明申請專利範圍所做的均等變化、修飾與組合，皆屬本 發明的涵蓋範圍。 【圖式簡單說明】 圖1為本發明一實施例的參考電壓穩定裝置簡化後的功能 方塊圖。 圖2為圖1的參考電壓穩定裝置運作時的一實施例簡化後 的流程圖。 圖3為本發明另一實施例的參考電壓穩定裝置簡化後的功 能方塊圖。 【主要元件符號說明】 [0048] 100 參考電壓穩定裝置 110 電壓緩衝器 第13頁/共21頁 1012003045-0 1011016#單編號 Α〇101 201236370 ^ … --------------------- 120 電荷儲存裝置 130 充放電電路 140 控制電路 150 、 160 開關 170 輸入端 180 輸出端 300 參考電壓穩定裝置 310 ' 311 電壓緩衝器 320 ' 321 電荷儲存裝置 330 充電電路 331 放電電路 340 控制電路 350 ' 351 ' 360 ' 361 開關 370 ' 371 輸入端 丨 380 、 381 i 輸出端 10U016#單編號 A〇101 1012003045-0 第14頁/共21頁[0047] Certain terms in the specification and claims are used to refer to particular elements, and those skilled in the art will understand that the same elements may be referred to by different nouns. In the scope of the specification and the patent application, the difference in the name is not used as the means for distinguishing the elements, but the difference in the function of the elements is used as the basis for the distinction. The term "including" as used in the specification and application patents is an open term and should be interpreted as "including but not limited to". In addition, the word “joining j” includes any direct and indirect connection means. The above description is only an embodiment of the present invention, and some of the technical features of each embodiment and each embodiment can be properly combined without being mutually exclusive. The equivalent variations, modifications, and combinations made by the scope of the present invention are within the scope of the present invention. [FIG. 1] FIG. 1 is a simplified functional block of a reference voltage stabilizing apparatus according to an embodiment of the present invention. Fig. 2 is a simplified flowchart of an embodiment of the reference voltage stabilizing device of Fig. 1. Fig. 3 is a simplified functional block diagram of a reference voltage stabilizing device according to another embodiment of the present invention. [0048] 100 Reference Voltage Stabilizer 110 Voltage Buffer Page 13/Total 21 Page 1012003045-0 1011016#单单Α〇101 201236370 ^ ... ----------------- ---- 120 charge storage device 130 charge and discharge circuit 140 control circuit 150, 160 switch 170 input terminal 180 output terminal 300 reference voltage stabilization device 310 ' 311 voltage buffer 320 ' 321 charge storage device 330 Electric discharge circuit 340 circuit 331 control circuit 350 '351' 360 '361 switch 370' 371 input Shu 380, 381 i output terminal 10U016 # A〇101 1012003045-0 order number of 14/21 Total