TW201236345A - Systems and methods for constant voltage mode and constant current mode in flyback power converters with primary-side sensing and regulation - Google Patents
Systems and methods for constant voltage mode and constant current mode in flyback power converters with primary-side sensing and regulation Download PDFInfo
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201236345 六、發明說明: 【發明所屬之技術領域】 本發明’#及雜電路。更具體地,本發賴供了肖贱麵式和定流 模式的系統和方法。僅僅作為神j,本發明已被顧於具有初級側感測 (sensmg)和調整(regulation)的返馳式電源變換器。但是將認識到,本 發明具有更廣的應用範圍。 【先前技術】 返馳式電源變換器因其簡單的結構和低的成本而被廣泛應用在低功 率應用中。但是在傳統返馳式魏器巾,通常湘光輪合器和 TL431 的 隔離佈置通過次級側回饋來執行輸出電壓調整,了增加祕成本以外, 由於電纜損耗引起的電壓降通常是難以補償的。201236345 VI. Description of the Invention: [Technical Field of the Invention] The present invention is a ## and a hybrid circuit. More specifically, the present invention provides systems and methods for the Xiao Wei surface and the constant flow mode. Merely as a god j, the present invention has been considered for a flyback power converter having primary side sensing (sensmg) and regulation. However, it will be appreciated that the invention has a broader range of applications. [Prior Art] The flyback power converter is widely used in low power applications due to its simple structure and low cost. However, in the traditional flyback type of scarf, usually the isolation arrangement of the Xiangguang wheel and the TL431 performs output voltage adjustment through the secondary side feedback, which increases the secret cost, the voltage drop due to cable loss is usually difficult to compensate.
-圖1疋麟具有次級输制的開關式返驰式電源變齡統的簡化傳 統丁圖如圖1所不’PWM控制器11〇用來控制和驅動電源隨 使電源MOSFETMl導通和載止來控制遞送給次級側上的負截的祕。因 圖2是示出魏式電源變齡統的輸出- Figure 1 Kirin has a simplified traditional D-switch of the switch-type fly-back power supply with secondary transmission. Figure 1 shows that the PWM controller 11 is used to control and drive the power supply to turn on and off the power MOSFET M1. To control the secret of the negative cut delivered to the secondary side. Figure 2 shows the output of the Wei-type power supply system.
部分,因此可以減小成本和大小。另外,利 可以基於控制器的内部計算來調整輸出電 201236345 =此’術咖賴,目此可峨整體變 傳統關模式返馳式電源變換系統的簡化 的另一簡化傳^圖1和調節的_模式返馳式《變換系統 如圖所不’輸出電壓v0ut被映射到節點mv處的D 通過I的調整來調整。在初級側調整中,v猜和^的關係^達^此 (1) 。另外,yD1和vD2是前 其中,η是輔助繞組匝數與次級繞組匝數之比 向二極體壓降。 設 ik:^i nxR, 因此’ Vout由下式給出: V0Ul=kxV1Ny+ivm-vD2 (2) 輸出電壓通輯獅齡的電壓賴絲調整。例如,躺到的電壓 VlNV與預定電壓位準~相比較。Vinv與VreF之;^與誤差信號相關聯, 此Vm與VreF之差被誤差放大器放大。至少部分地基於經放大的誤差信 號來產生PWM7PFM信號。 11 PWM/PFM信號控制電源開關的接通/斷開,因此控制遞送給次級側的 功率。結果’ Vinv與VreF之差變得越來越小,並且最終,變得等於 Vref。由於ViNV是輸出電壓V〇ut的反映,因此如果某些條件得到滿足,則 輸出電壓Vout可以線性地取決於Vinv,因此取決於VreF。 具體地,如下所示,如果二極體D1和D2兩端的前向電壓恒定,則 輸出電壓Vout線性地取決於VreF 〇 (3)Part, so you can reduce the cost and size. In addition, Lee can adjust the output power based on the internal calculation of the controller. 201236345=This is a simplified simplification of the simplified and traditionally closed mode power conversion system. _ mode flyback "transformation system as shown" output voltage v0ut is mapped to the node mv D is adjusted by I adjustment. In the primary side adjustment, the relationship between v guess and ^ is ^^(1). In addition, yD1 and vD2 are the former, and η is the ratio of the number of turns of the auxiliary winding to the number of turns of the secondary winding to the voltage drop of the diode. Let ik:^i nxR, so 'Vout is given by: V0Ul=kxV1Ny+ivm-vD2 (2) The output voltage is adjusted by the lion's age voltage. For example, the voltage VlNV lying down is compared to a predetermined voltage level. Vinv and VreF; ^ is associated with the error signal, and the difference between Vm and VreF is amplified by the error amplifier. A PWM7 PFM signal is generated based at least in part on the amplified error signal. 11 The PWM/PFM signal controls the on/off of the power switch, thus controlling the power delivered to the secondary side. As a result, the difference between Vinv and VreF becomes smaller and smaller, and eventually, becomes equal to Vref. Since ViNV is a reflection of the output voltage V〇ut, if certain conditions are met, the output voltage Vout can be linearly dependent on Vinv and therefore on VreF. Specifically, as shown below, if the forward voltage across the diodes D1 and D2 is constant, the output voltage Vout depends linearly on VreF 〇 (3)
Kut =kx Vj^p +~VD\~ VD2 201236345 專’ —絲的前向電壓通常取決於流麵二極體的電流。因此,如 電流改變,則D2的前向賴改變。由於流經〇1的電 出負載電,改變時也不變,因此D1的前向電壓總是恒定的。在輪 是具有她側感測和調節的_模式返馳式電觀齡統之又-電源變換系統2鳴包括初級敝厕、次級繞組_、 _ 、電源開關2020、電流感測電器2030、輸出電境的箄钟 ^器2040、電阻器2050和咖,以及整流二極體觸和2〇62。例如, JVTC)sZ 1〇2曰T㈣雙極電晶體。在另一示例中,電源開關2020是 電曰曰體。在又一示例中,電源開關2020是IGBT電晶體。 恭右所7^為了在預疋細内調整輸出電壓,與輸出電壓和輸出負 資訊通常需要被提取出來。在斷續傳導模式(d $ 存在次級繞蝴2巾。’能量被儲 .,,I:t., 交田電/原開關2020截止時,所儲存能眚姑經 X(V〇+^2+I〇XRec _D\ kxn λχα/ (4) 泌Γ處_ °Ri和R2分別表示電阻請〇和 比。具1 / 輔助繞組2014與次級繞组2012之間數Kut =kx Vj^p +~VD\~ VD2 201236345 The forward voltage of the wire is usually dependent on the current of the flow diode. Therefore, if the current changes, the forward direction of D2 changes. Since the electric current flowing through 〇1 is not changed when changing, the forward voltage of D1 is always constant. In the wheel is the _ mode of the side sensing and adjustment of the side - power conversion system 2 sounds including the primary squat, the secondary winding _, _, the power switch 2020, the current sensing device 2030, The output clock 2040, the resistor 2050 and the coffee, and the rectifying diode touch 2〇62. For example, JVTC) sZ 1〇2曰T (four) bipolar transistor. In another example, power switch 2020 is an electrical body. In yet another example, the power switch 2020 is an IGBT transistor. Christine's right 7^ In order to adjust the output voltage within the pre-measurement, the output voltage and output negative information usually need to be extracted. In the intermittent conduction mode (d $ has a secondary winding 2 towels. 'Energy is stored.,, I:t., when the Tianda Electric/original switch 2020 is cut off, the stored energy can be abundance X (V〇+^ 2+I〇XRec _D\ kxn λχα/ (4) The secretions _ °Ri and R2 respectively represent the resistance and ratio of the resistance. Between the 1 / auxiliary winding 2014 and the secondary winding 2012
和2於辅助繞組編賴數除以次級繞組2012的隨。V 2〇6Γ^ΪΪ 。此外,分別地’〜表示整流二極體 等效^,的電阻值,並且k表示等於货的回饋係卜數^表不 如圖====、變換系統2_的傳統4作機制的_^ 通過負反娜,彳峨贿w獅為止。And 2 in the auxiliary winding number divided by the secondary winding 2012. V 2〇6Γ^ΪΪ. In addition, respectively, '~ indicates the resistance value of the rectifying diode equivalent ^, and k is equal to the feedback coefficient of the goods ^ is not shown in the figure ====, the traditional 4 mechanism of the transformation system 2_ _^ By negative anti-Nana, he bribed the lion.
^FB =VmF (5) 5 201236345 組合等式4和5,可以獲得下式·· 一 Ή。、 基於等式6,輸出電壓隨著輸出電流的增大而 (6) =方案通常由於二極體D2的前向電壓的改變而對輪出電壓 此外,如果電源變換系統2〇⑻在斷續傳導模 丄 ^Dei 也可調整_紐,以便獲得蚊輸出電流。如圖操作,則 個開關週期中等於次級繞植2〇12的電流Isec的平均值,如下 =電流在每 2X/^p.x^FB =VmF (5) 5 201236345 By combining equations 4 and 5, the following equation can be obtained. Based on Equation 6, the output voltage increases with the output current. (6) = The scheme usually turns the voltage out due to the change of the forward voltage of the diode D2. In addition, if the power conversion system 2〇(8) is intermittent The conduction mode 丄^Dei can also be adjusted to obtain the mosquito output current. As shown in the figure, the average value of the current Isec equal to the secondary winding 2〇12 in the switching cycle is as follows = current is every 2X/^p.x
Ts ⑺ 因此 (8)Ts (7) therefore (8)
Ι〇=~χΝχ~χ f χT£fma«.df 2 T J〇 R T =如並 # „ λ/ 7_ ; s。此外,Rs表不電流感測電阻器2030的電阻 壓^的峰電流感測電阻器纖在每俯刪期喊測到的電 根二二t Λ〜表示退磁處理在每個開關週期内的持續時間。 流可以取決於初級繞組的電感;因此,_ /又、變匕’其在大批量生產中通常不能得到有效地補償。 如:希=:i:=調整和__的技術,例 【發明内容】 本發明涉及_電路。更具體地,本發明提供了藤定難式和定流 :、的系統和方法。僅僅作為示例,本發明已被顧於具有初級側感測和 調整的返,喊電源雜ϋ。但是將認制,本發有更廣的顧範圍。 „根據—個實施例’―種用於調整電源變換器的祕包括第-信號產生 器’配置以至少接收第-感測信號並且至少產生與退磁相_的第一輸出 201236345 1=。包括採樣元件,配置以至少接收輸入信號和第二輸出 ::盥5ί:第二輪出信號相關聯的資訊來採樣輸入信號,並且至少 誤差經採樣大小相關聯的第三輸出信號。此外,該系統包括 二$ 1吝Γ楚-以至;接收第二輸出信號和第一閾值電壓並且通過電容 信號,該電容器_合職誤差放大器。此外,該系 ^括補償元件,配置以至少接收第四輸出信號纽至少產生補償作號系 補Γ號與第一感測信號的組合。第-感測信號與麵合;“Ι〇=~χΝχ~χ f χT£fma«.df 2 TJ〇RT = 如和# „ λ/ 7_ ; s. In addition, Rs represents the peak current sensing resistance of the resistance voltage of the current sensing resistor 2030 The root of the fiber detected in each retrace period is two or two t Λ ~ indicates the duration of the demagnetization process in each switching cycle. The flow can depend on the inductance of the primary winding; therefore, _ / again, change 匕In the mass production, it is usually not possible to obtain effective compensation. For example, the technique of: = i: = adjustment and __, the invention [invention] The present invention relates to a circuit. More specifically, the present invention provides a rattan And the system and method of constant flow: By way of example only, the present invention has been taken care of with the primary side sensing and adjustment, and the power supply is mixed. However, it will be recognized that the present invention has a wider range of care. According to an embodiment, the secret for adjusting the power converter comprises a first signal generator configured to receive at least the first sense signal and at least generate a first output 201236345 1 = with the demagnetization phase. A sampling component is included, configured to receive at least an input signal and a second output: 盥5ί: information associated with the second round-out signal to sample the input signal, and at least the error is sampled by a third output signal associated with the magnitude. In addition, the system includes two $1 ---; receiving the second output signal and the first threshold voltage and passing the capacitance signal, the capacitor _ the coincidence error amplifier. In addition, the compensation component is configured to generate at least a combination of the compensation signature and the first sensing signal by receiving at least the fourth output signal. First-sensing signal and face-to-face;
=S£E:F =======號 薄。存二,此,,5亥系統包括用於至少調整輪出電壓的第二控制 ^ 第—控制脑置以至少接收第四輸出信號並且至少基於 ==的資訊來至少產生第二控制信號和第三控制信號:j四 器;,少接收第一控制信號和第二控制信號並且至 j生時鐘Μ ’以及第二信號產生器’配置以至少接收時鐘 =信號和第四控制信號並且至少產生調節信號。另外,該系統包括= ΐί!關ΓΓ至少接收調節信號並且至少將驅動信號輸出給開關。例二 系統l括第二控制器’用於至少調整峰值電流。例如,第三控 署μ 控制信號、第二感測信號和第二電壓,並且將第四控制二 置以蝴…翻於·電源賴11的祕包減樣元件,配 様大I Γ Μ輸人W ’祕輸入信號’並且至少產生與―個或多個瘦採 Μ的第-輸出信號。例如,輸人信號至少與於到電換= 第—繞組相關聯’並且次級繞組與電源變換器的輸出電^ 另外’該系統包括誤差放大器,配置以至少接收第;出 值電魅且通過電容器產生第二輸出信號,並且產生第= '〜電谷盗被麵合到該誤差放大器。此外,錄統包括前向饋觀件。 201236345 生第四輪出=輸出,並且至少基於與第三輸出信號相關聯的資訊產 制器,用於至少調整輸出電度。例如,控制器ΐ ί基ί二=包括信號產生器’配置以至少接收第—控制信號2至 ^制信,關聯的資訊來至少產生調節信號;以及閉驅動 ° " 至乂接收調節信號並且至少將驅動信號輪出妗Η關。 開關配置以影響流經耗合到次級繞組的初級繞組的第一^。歹’,該 根據又-實施例’―種·調整電 置以至少接收輪入信號,採樣輸入信號,並且至配 =;間,壓並且通過電容器產生第二輸出信號置 生第_則= ,並且至少基於與第三輪出信號相關聯的資訊產 ΪΓ!? 及控制器,配置以至少接收第二輸出信號和第四』 。第控制信號。此外,該系統包括補航件,配置以至少 生補償彳以’輸人職是補償魏與另—信號的組合。 產 器,電=變換器的系統包括第-信號產生 和與採樣相關聯產;與退磁相關聯的第-輸出信號 τ _唧旳弟一輸出仏唬。例如,輸入信號至 繞_關聯’並且次級繞組與電源變換“輸出電流 ! _。另外,該系統包括採樣元件,配置以至少接收輪 泸號’至少基於與第二輪出信號相關聯的f訊來採樣輸人/ ί ^ ΐίί 广、,括帛鋪n’用於至少調鎌出電流,該第-以至>、接收第-輸出信號和第三輸出信號,並且至少基於:^ ^第,出信號相關聯的資訊來至少產生第一控制信i。、此外,該系“ 括振盈益’配置以至少接收第—控制信號並且至 ^= 產生時鐘信號;以及第二信號產生二= 時鐘域和第二控偷號,並且至少基於與時鐘錢和第二㈣信號2 201236345 聯的資產生調節信號。另外,齡統包括閘驅動器,配置以至少 接收調節诚並且至少將驅動職輸出給開關 。例如,開關配置以影響流 經搞合到次級繞組的初級繞組的第一電流。此外,該系統包括用於至少調 整峰值電朗第三控㈣,配置以至少接收感測錢和閾值電壓,並且 ,第一控畅號輸出給第二信號產生器,如,感測信號與流經電源變換 器的初級繞組的第·_電流相_。調節信號對應於開關頻率,並 出信號對應於退磁脈衝寬度。 根據又一實施例,一種用於調整電源變換器的系統包括用於至少調整 峰值電流的控制器。例如,控制器配置以至少接收感測信號和第一間值信 戒並且至 > 產生第-控制信號,並且感測錢與流經電源賴器的初級繞 組的第:電流相關聯另外,該系統包括信號產生器,配置以至少接收第 控制k號並且至少產生調節信號;以及閘驅動器,配置以至少接收調節 信號並且至少將驅動信號輸出給開關。例如,該開關配置以影響第一電 流。在另-賴巾’該控繼包括第一比㈣,配置以触感測信號和第 -閾值電壓,並且至少基於與感·號和第—閾值電壓相_的資訊產生 比較信號;以及m配置以接收比較健並且至少基於與比較信號相 關聯的資訊來產生第二控制信號。另外,該控制器包括閾值產生器,配置 以接收第二控制信號並且至少基於與第二控制信號相關聯的資訊產生第 二閾值電壓;以及第二比較器’ 置以接收第二難電壓和感測信號,並 且至少基於與第二閾值電壓和感測信號相關聯的資訊產生第一控制信號。 根據又一實施例,一種用於調整電源變換器的方法包括由第一信號產 生器至少接收輸入信號並且至少基於與輸入信號相關聯的資訊來至^產 生與退磁相關聯的第一輸出信號和與採樣相關聯的第二輸出信號。另外, 該方法包括通過採樣元件來至少接收輸入信號和第二輸出信號,至少基於 與第一輸出信號相關聯的資訊來採樣輸入信號,並且至少產生與一個戋多 個經採樣大小相關聯的第三輸出信號;通過誤差放大器來至少接收第三輸 出信號和第一閾值電壓並且通過電容器至少產生第四輸出信號,該電容器 被耦合到該誤差放大器。此外,該方法包括通過補償元件來至少接收第四 輸出信號並且至少基於與第四輸出信號相關聯的資訊來至少產生補償信 號。例如,輸入信號是補償信號與第一感測信號的組合。在另一示例中, 201236345 號與耦合到瓣換器的次級繞組的第-繞組相關聯,並且-欠 t繞組與該電源變繼的輸出電流和輸出輕相_。另外=方ίΐς 輸出電流的第一控制器來至少接收第-輸出;;號和第 第;ΐ少基於與第一輸出信號和第三輸出信號相關聯的資訊 W、垃^帛制號;通過餘至少調整輸出電壓的第二控制器來至 i生第並且至少基於與第四輸出信號相關聯的資訊來至少 = 三控制信號。此外,該方法包括通 Γί:Γ:Γ第二控制信號並且通過該缝器至少產生時鐘信 叫、唸罘一彳„減;產生窃至少產生調節信號。 來至少接收調節信號並且至少將驅動信號輸出^關二響 耻峨,_她繞_第—獅;通概少調 接收第三控制信號、第二感測信號和第二間值電麼,並ΐ 變換器二二第二感測信號與流經電源 來二I:::用:=變::r法包括通_ 扭的楚結“ 輸號至少與耦合到電源變換器的次級繞 有並且次級繞組與電源變換器 採樣大小相關聯的第—輸出信號;通過誤差放大器來至少 合通糖11產生第·^峨,該電容器_ 號;通過=:===器產生第,信 來至少接收第二輸出信號和=出出電壓的控制器 2四輸出信細_的資訊來至少㈣^於 =信號產生器來至少接收第一控制信號並且至心 3關聯的資訊來至少產生調節信號;通過間驅動器來至= =2驅動信號輸出給開關來影響流_合到次級繞組的初= 201236345 來至電賴換11的方法包括稿採樣元件 或多鐘採樣大小相關聯的第—輸出信號。另外,該方法包 誤3 大器來至少接«-輸出信號和_電壓並 : ::值:聯的資訊來通過電容器產生第二輸出信;並= 咖爾容ί被 Μ,並一與第』:====第;輸 通=制_少㈣二輸峨和細臆號,第 二輸出信號和第四輸出信號相關聯的纽來 二外^ 方法包括通爾爾至地^ =该 =:嶋祕㈣生—蝴 產生麟輕魏籠11的方法包_過第一信號 次級繞組的第-繞組相關聯,並且次級繞組與電===== ίΐ?ΪΓ目關聯的第一輸出信號和與採樣相關聯的第二輸出二號通過 ff件來至少接收輸人信號和第二輸出信號,至少基於與出3 關聯的第三咖號。終嫌 ;=Tr第一輪出信號和第,信號,並== 娜至少接收第一控制信號並且至少基通過振 訊來至少產生時鐘信號。此外,該方法包括通^資 收時鐘信號和第二控制信號,並且至少基 生絲至少接 關聯的資訊來至少產生調節信號;通過閘驅動器二 通=少調整峰值電流的第三二=至 夕接收n杨閾值電壓’並且將第二控制信號輸出給第二信號產生 11 201236345 器。感測信號與流經電源變換器的初級繞組的第—電流相關聯,調節信號 對應於開關頻率’並且第一輸出信號對應於退磁脈衝寬度。 根據又一實施例,一種用於調整電源變換器的方法包括通過用於至少 調整峰值電流的控繼來至少接收細親和第—間值信號。例如,感測 信號與流經電·換㈣她繞組的第—電齡關。另外,該方法包括 至基於與感測信號和第一間值電壓才目關聯的資m來至少產生第一控制 信號;通過信號產生n來至少接收第—控制信餘且至少基於與第一控制 信號相關聯的資絲至少產生減;通關驅_來至少接收調節信 號並且至少將驅動信號輸出給開關以影響第—電流。至少產生第一控 制信號的處理包括通過第-比較器來接收感測信號和第—閾值電壓,並且 ^少基於與感測職和第—閾值電壓侧聯的f訊產生比較信號;通過電 4泵來接收比較信號並且至少基於與比較信號相關聯力資訊來產生第二 控制信號;通過閾值產生II來接收第二控制㈣並且至少基於與第二控制 信號相關聯的資訊產生第二難電壓;通過第二比㈣來接收第二間值電 壓#感州。號並且至少基於與第二間值電壓和感測信號相關聯的資訊產 生第一控制信號。 、與傳統技術槪’通過本發明獲得了許多魏。本發_某些實施例 可乂減>、。卩;^ 4數和/或降低系統成本。本發明的—些實施例可以提高可靠 ί生和/或 =率。本發明的某些實施例可關化_模式返馳式電源變換器中 的電路設計。本發明的—些實施例提供了初級侧制和調整方案。例如, 測和調整方案可以改善負載調整。在另—示例中,初級側感測和 Γΐ方案可以補償初級繞組電感變化以便在採用初級側調整的返馳式變 換器中獲得恒定的輸出電流。本發_某些實關可以在cc模 不隨著初峨組域的賴献變雜錄Μ流。 ,、 根據又-實施例種驗調整電源變換⑽祕包括:第—信號產 ^配置以接收第—感測信號並且產生與退磁相關聯的輸出信號:所 =一感測信號_合到電源變換㈣次級繞_第一繞組有關,並 ΐϊίίΐ,所述電源變換器的輸出電流相關聯。另外’該系統包括斜 2说產生配置以接收所述輸出信號並且產生斜坡信號;以及 斋配置以接收所述斜坡信號和第一閾值信號,並且至少基於與所述斜 12 201236345 坡硫和所述第-閾值信餘襲的資訊產生第—比較錢。此外,該系 統包括^比較器’配置以接收第二感測信號和第二賊信號並且產生第 -比較所述第二_信號與流軸合綱魏源變換⑽次級繞也 的初級繞組的第-電流相關聯。此外,該系統包括第二信號產生器,配置 以至少接收所述第-比較信號和所述第二比較信號並且產生調節信號;以 及閘驅動器’ s&置以接收所述調節信號並且向開關輸出驅動信號。所述開 關配置以前流經所述初峨_所述第—電流。所述輸紐號與退磁持 續時間相關聯,並且所述驅動信號與_週__。該祕還配置以使 所述退磁持續時間與所述開關週期之比保持恒定。 …根據又-實施例,-_於調整電源變換器的方法包括接收第一感測 k號、。所述第-細信號她合到電源變換㈣次級繞組的第—繞組相關 聯’並且所述次級繞組至少與所述電源變換器的輸出電流有關。另外,該 =法包括至少基於與所述第_感測信號相關聯的資訊產生輸出信號。所述 輸出信號與退磁相關聯^此外,該方法包括接收所述輸出信號;至少基於 與所述輸練號相_㈣誠生斜坡信號;接㈣述斜坡信號和第一閣 值Μ,處理與所述斜坡信號和所述第―閾值信號相關聯的資訊;至少基 於與所述斜坡《和所述第錢侧聯哺訊產生第—比健 號二此外,該方法包括接收第二感測信號和第二閾值信號。所述第二感測 城與流_合到所述電源變換器的次級繞組的初級繞組的第一電流相 外’ $方法包括處理與所述第二感測信號和所述第二閾值信號相 至少基於與所述第二感測信號和所述第二閾值信號相關聯的 比較^ ’接收所述第—比較信號和所述第二比較信號;處 2所述第-比較信號和所述第二比較信號相_的資訊;至少基於與所 2-比較㈣和所述第二比較信號相關聯喊訊產生瓣信號。此外, 接收所述調節信號;至少基於與所述調節信號相_的資訊來 ^關輸出驅動信號’以影響‘流經所述初__所述第—電流。所述輸 目關聯’並且所述驅動信號與開關週期相關聯。使 所述退磁持續時間與所述開關週期之比保持恒定。 =又-實施例…種祕調整電源變換器的系統包括第一信號產生 -己以至^接收輸入仏號並且至少產生與退磁相關聯的輸出信號,所 13 201236345 述輸入信號至少與電源變換器的輸出電流统 控制器,配置以至少接收所述輸出 f外私統包括第- 關聯的資訊來至少產生第>於與所述輸出信號相 述電源變換器的初級繞組的第第—感測信號與流經所 西?晉以至少接= 關聯。此外,該系統包括振盪器, 配置以至1收所㈣-控制信號,並且至少基 關聯,訊來至少產生時鐘信號;第二信號產生器’配3至3 號》所述開關配置以影響流經所述初級繞“;關53:信 所述羅動信號與開關週期相關^== 根據又-實施例’-種用於調整電源變換器的方法包括··至 入信號’並且至少基於與所述輸入信號相關聯的資訊來至少產生輸出俨 號。所述輸入信號至少與電源變換器的輸出電流有關,並且所述輸出信^ 與退磁有關。另外,該方法包括至少接收所述輸出信號;處理與所述^ 信號相關聯的資訊;至少基於與所述輸出信號相關聯的資訊來至少產生時 鐘信號。此外’該方法包括剧欠感測信號和閾值錄。所述感測信號與流 經所述電源變觀的初級繞組的第—電流相關。此外,該方法 與所述感測信號和所述閾健肋關聯的資訊;至少基於與所述感測二號 和所述閾健肋關聯的資訊產生控継號;至少接㈣述_信號ϋ 述控制is號,處理與所述時鐘信號和所述控制信號相關聯的資訊;至少基 於與所述時鐘信號和所述控制信號相關聯的資訊來至少產生調節信號1二 外該方法包括至少接收所述調節信號;至少基於與所述調節資^相關聯 的資訊向開關至少輸出驅動信號,以影響流經所述初級繞組的所述第一電 流。所述輸出信號與退磁持續時間相關聯,並且所述驅動信號與開關週期 相關聯。使所述退磁持續時間與所述開關週期之比保持恒定,並且使所述 第一感測信號的峰值在大小上保持恒定。 201236345 。根據又-實施例種麟娜電源變換器的系統包括第—信號產生 器’配置以接㈣-感翁號並且產生與退磁相_的第—輸出信號。所 述第-感測信號_合到電源變換器的次級繞_第一繞組有關,並且所 述次級齡至少無親源變換器的輸出電流相_。糾,齡統包括 第-斜坡信號產生器,配置以接收所述第一輸出信號並且產生第一斜坡信 號;第_比較器,配置以接收所述第一斜坡信號和第一間值信號,並且至 J基所述第—斜坡信號和所述第—雖信號相關聯的資訊產生第-比^號此外,s亥系統包括峰值檢測器,配置以接收驅動信號和第二感 此號並且產生锋值彳5號。所述第二感測信號與流經柄合到所述電源變換 器的次級繞_初級繞_第—電流相_。此外,齡統包括放大器,、 配置以接收所述峰魅號和第二閾值信號並且通過電容器產生第二輸出 信號’所述電容器被搞合到所述放大器;第二比較器,配置以接收所述第 =輸出,和第二斜坡信號’纽產生第二比較信號。另外,該系統包括 號產生器’配置以至少接收所述第一比較信號和所述第二比較信 1、+、^ 號’以及閉驅動器’配置以接收所述調節信號並且向 4峰值檢測器和開關輸出所述驅動信號。所述開關配置以影響流經所述 初級繞組的所述第一電流。 例Γ種用於調整電源變換器的方法包括接收第—感測 •細彳5號触合卿源麵⑽魏繞組㈣—繞組相關 =且所述次級繞組至少與所述電源變換器的輸㈣流有關。另外,該 /匕括至少基於與所述第—感測信號相關聯的資訊產生第一輸出信 f生第-斜坡域。所述第-輸出信號與退磁 收2第:斜坡信號和第-難信號;處理與所述第一斜坡信號和^= 信聯的資訊;至少基於與所述第—斜坡信號和所述第一閨值 ^目耳的飞產生第—比較信號;接收驅動信號和第二感測信號。所 測信號與流經麵合到所述電源變換器的次級繞組的初級繞组的 作泸相二此外’該方法包括處理與所述驅動信號和所述第二感測 ====基嫌卿動細爾㈣啦號相關聯 的貧《生峰值㈣’接收所述峰值信號和第二閾值信號;處理與所述峰 15 201236345 =號=述第二閾值信號相關聯的資訊;至 述第-閾值信號相關聯的資訊產生第二輪出信號 所述第二輸出信號和第二斜坡信號;處理與該方法包括接收 斜坡靖目關聯的資訊;至少基於與所述第二輪^出信號和所述第二 號相關聯的資訊產生第二比較信號。此外“二:所述第二斜坡信 信號和所述第二比較信號;處理與所述第卜一接收所述第一比較 相關聯的資訊;至少基於與所述第-比較所述第二比較信號 的資訊產蝴魏。糾,亀相關聯 於與所述調節信號相關聯的資訊輪出所述°=^=及,基 繞組的所述第-電流。 猫n以影響趁所述初級 根據又-實施例,—種用於調整電源變換器的系統包括第 ’配置以接收第-感測減並且產生與退磁 ^ =言號她合到電源變換器的次級繞组的第一 檢測器’配置以接收驅動信號和第二感測信號並且產生峰值 與流經耦合到所述電_換器的次級繞組的初級繞組的第-電以相關聯◊此外,該系統包括第二信號產生 、 =信號和所述峰值信號相關聯的資訊,並且產生調節信號:此: 統^括閘驅動器,配置以接收所述調節信號並且 ^ ,所述驅動信號,述開關配置以影響流經所述初、= ^。所述輸出信號與退磁持續時間相_,並且所述鶴信號與開= 目關聯。該系置以使所述退磁持續時間與所述 疋,以及使所述峰值«的平均大小在第—持續__保肿定保壯 於調整電源變換11的方法包括接收第一感測 η说所述第-感龜讀搞合到電源變換騎次級繞組的第—繞組 =、、,並且所述次級繞組至少與所述電源變換器的輸出電流有關。另外,該 驅與所述第_細信號相襲㈣訊產生輸丨信號;接收 3 :號;並且處理與驅動信號和第二感測信號相關聯的 所㈣第感息雜退磁相義,並且所述第二感測信號與流經輕合到 斤述電源變齡的次級繞_她繞組的苐—電_襲。此外,該方法 16 201236345 包括至少基於與所述驅動信號和所述第二感測信號相關聯的資訊產生峰 值信號;至少處理與所述輸出信號和所述峰值信號相關聯的資訊;至少基 於與所述輸出信號和所述峰值信號相關聯的資訊產生調節信號。此外,該 方法包括接收所述調節信號;至少基於與所述調節信號相關聯的資訊向開 關輸出所述驅動信號,以至少影響流經所述初級繞組的所述第一電流。所 述輸出仏號與退磁持續時間相關聯,並且所述驅動信號與開關週期相關 聯。使所述退磁持續時間與所述開關週期之比保持恒定;以及使所述峰值 信號的平均大小在第一持續時間期間保持恒定。 根據又一實施例,一種用於調整電源變換器的系統包括第一信號產生 器’配置以接收第一感測信號並且產生與退磁相關聯的第一輸出信號。所 述第一感測信號與耦合到電源變換器的次級繞組的第一繞組有關,並且所 述次級繞組至少與㈣電源變·_出電流相_。另外,該系統包括 峰值檢測1§ ’配置以接收鶴信號和第二感測信號並且產生峰值信號。所 述第二感測信號與流經麵合到所述電源變換器的次級繞組的初級繞組的 第-電流相關聯。此外’齡統包括第二信號產生器,配置以接收所述驅 動信號、所述第-輸出信號和所述峰值信號,並且產生第二輸出信號;放 大器’配置以接收所述第二輸出信號和閾值信號並且通過電容器產生第三 輸出信號’所述電容H她合到所述放大器。此外,該纽包括比較器: 配置=接收所述第三輸出信號和斜坡信號,並且產生比較信號;第三信號 產生器’配置以至少接收所述雜信號和時鐘錢,並且產生調節信號: :==.3器,置以接收所述調節信號並且向所述峰值檢 第1器和開關輸出所述驅動信號。所述開關配置以影 響流經所述初級繞組的所述第一電流。 、 m根實=二種用於調整電源變換器的方法包括接收第 ^就所述弟-感龜賴搞合到電源變換器的次級繞組的第一繞 所述次級繞組至少與所述電源變換器的輸出電流相_。另外, =法包括產生與退磁相_的第—輸出信號;接收驅動信號和第 二感測信號相關聯的資訊;至少基於與所述驅動信號和所述第二 17 201236345 辨值信號°此外’該方法包括接收所述驅動信號、所述 輸幻5就和所述峰值信號;處理與所述驅動信號、所述第 峰值信號相關聯的資訊;至少基於與所述驅動信號、所述第ϋ « 〇所述峰值信號相關聯的資訊產生第二輸出信號。另外,該方’ ==貧訊;至少基於與所述第二輸出信號和所述間值信號相關聯 坡—.處^ 號。此外,該方法包括接收所述第三輸出信號和斜 2 述第三_雜和所餅坡信號_聯的資訊;至少基 ;、述第二輪出信號和所述斜坡信號相關聯的資訊產生比較信號。此 包括接收所述比較信號和時鐘信號;處理與所述比較°信號和所 =訊產生調節信號。另外’該方法包括接收所述調節信號夺,:二關 ^繞Ξϊί訊輸出所述驅動信號,以影響流經所述初 根據又-實施例’ —_於調整電源變換器的系 :第:ί收第一感測信號並且產生與退糊 二二结口號與輕合到電源變換器的次級繞組的第一繞組相關聯,並且 組至少與所述電源變換器的輸出電流有關。另外,該系統包括 、,〜配置以接收驅動信號和第二感測信號並且產生峰值信 號输耦合到所述電源變換器的次級繞組的初級‘的 電抓相關聯’並且第二信號產生器配置以至少接收所述驅動作號 信號和所述峰值信號’並且產生第二輸出信號。此外厂該系統 = 二輸出信號和閣值信號並且通過電容器產 ==第四輸出信號。所述電容馳合到所述放二 第輸入仏虎與由所述初級繞組接收的第二輸入信號成比例。 配置轉收所述第四輸出信號和第二感測信號並產生二 «二㈤《號產生器’配置以至少接收所述比較信號和時 生調郎信號。另外,齡統包括閘咖,配與收所卿信號^ 18 201236345 向所述峰值檢測器、所述第二信號產生器和開關輸出所述驅動信號。所述 開關配置以影響流經所述初級繞組的所述第一電流。 根據又-實施例,-種用於調整電源變換器的方法包括接收第一感測 信號。所述第-制錢_合職源·器的次級繞組的第_繞组相關 聯,並且所述次級繞組至少與所述電源變換器的輸出電流有關。另外,該 ^法包括產生與退磁相關聯的第一輸出信號;接收驅動信號和第二感測信 唬。所述第二感測信號與流經麵合到所述電源變換器的次級繞組的初級繞 流相關聯。此外,該方法包括處理與所述驅動信號和第二感測 二二:姦12資::至少基於與所述驅動信號和所述第二感測信號相關聯 棒k、.值=。此外,該方法包括接收所述驅動信號、所述第一輸 .峰峰值信號;處理與所述驅動信號、所述第—輸出信號和所述 ==相__資訊;至少基於與所述驅動信號、所述第L號和 ====產生第二輸出信號。另外,該方法包括接收所 關聯的資訊Γ至少基於與:當理J:述二二號和所述閾健 ίϋϊίί 所述第三輸出信號和第一輸入信號。所述第一 述初級繞組接收的第二輸入信號成比例。此外,兮方I包 2處理與所述第三輸出信號和所述第一輸入信號相關聯的資气至= 所;,感測信號相:====== === 所述比較信號和所述時鐘信號相^ 號,,該方法L:::===,生職 資訊來輪一動信號;響蝴二 生写根ΞίϋίΓ:種用於調整電源變換11的系統包括·· m產 所述第一_=_====目__—輸出: 、、的-人級繞組的第一繞組相關聯,並 201236345 且所述次級繞組至少與所述電源變換器的輸出電流有關另外,該系統包 括峰值檢測n,配置以接收驅動舰和第二感測㈣並且產生峰值信號。 所述第二感測信號與流經麵合到所述電源變換器的次級繞組的初級^ 的第-電流相關聯。此外,該系統包括第二信號產生器,配置以至少接收 二述所述第一輸出信號和所述峰值信號,並且產生第二輸出信 说’放大^配置以接收所述第二輸出魏和驗錄並且通過電容 生號’所述電容器被耦合到所述放大器。此外,該系統包括第 二Μ產生$,配置以接收所述第—感測信號、所述第三 驅動信^且產生第四輸出信號;比較器,配置以接收所述第^出作號 和所述第二感測信號並產生比較信號。另外,該系統包括第四 / 器,配置以至少所耻較信號和時鐘信魅且產 器’配置以接收所述調節信號並且向所述峰值檢測器、所』二: =、所述紅信號產生器和開關輸出所述驅動信號 ^ 流經所述初級繞組的所述第一電流。 i嘱配置以衫響 根據又-實施例’一種用於調整電源變換 信號。所述第-感測信號與搞合到電源變換器的次級繞二^一^ 聯’並且所糧恤爛物撕_峨 方法包括產生與退磁相關聯的第—輸出信號;接收 另外〜 號。所述第二感測信號與流經輕合到所述電源變換:纽〇第—感· 組的第一電流相關聯。此外,該方法包括處理與所述且,,繞 的資訊產生峰值信號。另外,該===,,相關聯 出信號和所述峰值信號;處理與所述 動彳5说、所述第一輸 峰值信號相關聯的資訊;至少基於與所述^述第一輸出信號和所述 所述峰值信號相關聯的資產生第_松 ° 所述第-輸出信號和 述第二輸出信號和閾值信號.;處’該方法包括接收所 關聯的資訊;至少基於與所述第二給屮卜“ 3出域和所述間值信號相 產生第三輸出信號。此外,該方法故二靖關聯τ 輸出信號和所述驅動信號;處理與所述第一丄πα測仏唬、所述第三 號和所述驅動信號相關聯的資訊;至少美於^測彳°號、所述第三輸出信 土、、述第一感測信號、所述第 20 201236345 三輸出信號和所述驅動信號相關聯的資訊產生第四輸出信號。另外,該 法包括接收所述第四輪出信號和所述第二感測信號;處理與所述第四= 信號和所述第二感測信號相關聯的資訊;至少基於與所述第四輸 = 所述第二感測信號相關聯的資訊產生比較信號。此外,該方法包括至: 收二述比健號和時鐘信號;處理朗航較錢崎料雜號相= 的貧訊;至少基於與所述比較信號和所料鐘雜侧聯的資訊產生 信號。此外,該方法包括接收所述調節信號;以及至少基於與所述: 號相關聯的資訊來輸出所述驅動信號,以影響流經所述初級敝的所述^ 一電流。 根據又-實施例…種_調整電源變換器的系統包括第—信 器,配置以接收第-感測信號並且產生與退磁相關聯的輸出信號。°所 -感測信號與耗合到電源變換n的次級繞_第—繞組相義,並且 次級繞組至少與所述電源變換n的輸出電流有關^另外,料統包括值 檢測器’ g&置以接收驅動信號和第二感測信號並且產生峰健^所 二感測信號錢_合制述電源騎魏敝的她繞 2流相關聯。此外,該系統包括第二信號產生器,配置以至少處理 輸出信號和所述峰值信號相關聯的資訊,並且產生調節信號;以及間驅動 器’配置轉收所述信號並且至少向所述峰值檢測器和開關輸 驅動信號。所述開關配置以影響流經所述初級繞組的所述第 驅動信號與關職侧聯,並额述輸出信號與退磁持續時^關:述 所述退__間在大社麟料健肋乘輯料辦值。該胃 還配置以使職開騎齡雜定,使所舰磁峰值的^姓 續時間期舰持恒定,並且使所述輸出電流保持恒定。 根據又-實施例於調整電源變鮮的綠包括接 信號。所述第-_織_合到電源變換器敎 ^ 方法,括產生與退___出信號;接收驅祕號和第二感攀號: 2第-感測信號與流_合到所述電源變換器的次級繞組的初級^ 的第-電流相關聯。此外,該方法包括處理與所述驅動信號和所述第二感 .说相關聯的資訊;至少基於與所述驅動信號和所述第二感測信號相關 21 201236345 聯的資訊產生峰值信號;處理與所述輸出信號 訊;至少基於與所述輪出信號和 ^^目_的資 號。此外,驅紐㈣侧 ^所述驅動信號與_週__,並且所述輸出 值。使所述關週期保持桓定,使所述退磁峰值的平均大小在第!^時 間期間保持恒定,並且使所述輸出電流保持恒定。 持續時 取決於實施例,可以獲得這些益處中的一個或多個。可以參考下面的 洋細描述和關全魏理解本發·這些聽以及各種另外的目的、特徵 和優點。 【實施方式】 本發明涉及繼電路。更地,本發賴供了麟定雜式和定流 模式的系統和綠。僅僅作為示例,本發明已應用於具有初級側感測和調 整的返驰式電源變補。但是應理解本發明具有更廣的應用範圍。 圖7疋根據本發明-實施例具有初級側感測和調整的開關模式電源變 換系統的簡化示圖。該示圖健是示例,其不應當不當地限射請專利範 圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 開關模式電源變換系統500包括初級繞組502、次級繞組504和輔助 繞組506。另外,變換系統5〇〇包括電阻器510、512和580。此外,變換 系統500包括電容器526、開關550和二極體554。此外,變換系統500 包括以下元件: •用於產生Demag信號和SamP!ing」:!k信號的元件520 ; •用於採樣和保持一個或多個信號的元件522 ; •誤差放大器524 ; •用於負載補償的元件532 ; •用於定壓(CV)控制的元件534 ; •用於產生PWM/PFM調節信號的元件538; •用於電流感測(CS)峰值調整的元件540 ; 22 201236345 •用於定流(CC)控制的元件542 ; •用於產生閘驅動信號的元件546 ; •振盪器562 ;以及 •用於前向饋送的元件568。 在-個實施例中’元件 52G、522、532、534、538、540、542、546 和568,誤差放大器524以及振盪器562位於晶片59〇上。例如晶片59〇 至少包括端子516、530、552和566。儘管上面利用所選出之用於系統5〇〇 的-組元件進行了示出,然而還可以存在許多替代、修改和變體。例如, 元件中的-些可被紐和/顿合。其它元件可健人上面提到的那些元件 中。取決於實關,元件的制可以與被替換的其它元件互換。例如 統500是開關模式返馳式電源變換系統。這些元件魏一步細節可在說 明書,更具體地可在下面找到。 ° 如圖7所示,根據本發明的實施例,輸出電壓v〇ut通過變換系統5〇〇 的初級側來感測。例如’輸出電壓vDut的感測至少部分地取決於次級繞組 5〇4與輔助繞組5〇6之間的阻數比。例如,次級繞組5〇4緊密地鶴合到輔 助繞組506。在另-示例中,次級繞組5〇4向二極體5M發送信號5兄, 並且通過二極體554被耦合到變換系統5〇〇的輸出。 在一個實施例中,輔助繞組506的輸出信號5〇8用Vaux表示。在另 一實施例中,輸出信號508經過包括電阻器51〇 (即,和電阻器512 、(即’ r2)的分壓器的處理。輸出信號514 (即,Vjnv)從該分壓器被饋 送到端子516 (即,端子INV)。例如,輸出信號514通過元件532被進行 了負載補償。在另一示例中,經補償的信號514被饋送到元件52〇和522 兩者中。 根據一實施例,元件532包括如圖14 (a)、14 (b)、15 (a)和/或15 (b)所示的一個或多個設備。根據另一實施例,元件52〇包括如圖1〇和 11所示的某些設備。例如’元件520將从信號輸出給元件522。 利用 Sampling—clk,元件 522 產± Hokling clk 信號。 ^在一個實施例中’元件522基於信號對經補償的信號514 才木樣,並且基於从信號來保持經採樣信號。例如,元件522在 23 201236345 退磁將近結束時對經補償的信號514採樣,並且保持經採樣信號直到下次 採樣為止。在另一示例中,該採樣和保持處理在圖8中示出。 此外,如圖7所示,經採樣和保持的信號^^^從元件522發送給誤 差放大器524。根據某些實施例,元件524包括如圖14 (a)、μ (b)、15 (a)和/或15(b)所示的一些設備。誤差放大器524還接收參考信號Vref。 例如,參考信號Vref基於變換系統500的輸出負載被補償。在另一^示例;, 仏號v_p與參考信號vref作比較,並且其差值被誤差放大器524放大。在 一個實施例中,誤差放大器524通過電容器526產生輸出信號528。例如, 電容器526通過端子530 (即,端子COMP)連接到誤差放大器524。在 另一示例中’輸出信號528 (即’ VC0MP)反映了負載條件。在又一示例中,=S£E:F ======= No. In addition, the 5H system includes a second control for adjusting at least the wheel-out voltage, the control brain is configured to receive at least the fourth output signal and generate at least a second control signal based on at least information of == Three control signals: j quad; less receiving the first control signal and the second control signal and to the j clock Μ 'and the second signal generator' configured to receive at least the clock=signal and the fourth control signal and at least generate an adjustment signal. In addition, the system includes = ΐί! Guan to receive at least the adjustment signal and at least output the drive signal to the switch. Example 2 The system includes a second controller 'for adjusting at least the peak current. For example, the third control unit μ control signal, the second sensing signal, and the second voltage, and the fourth control is turned into a butterfly...turned on the power supply of the power supply to the subcontracting component, with a large I Γ Μ The person 'sends the input signal' and at least produces a first-output signal with one or more thin picks. For example, the input signal is at least associated with the electrical switch = the first winding and the output of the secondary winding and the power converter is different. The system includes an error amplifier configured to receive at least the first; The capacitor produces a second output signal and produces a = '~ electric thief faceted to the error amplifier. In addition, the recording system includes forward feeds. 201236345 The fourth round out = output, and based at least on the information producer associated with the third output signal, for at least adjusting the output power. For example, the controller 包括 基 ί 2 = includes a signal generator 'configured to receive at least the first control signal 2 to ^, the associated information to generate at least the adjustment signal; and the closed drive ° " to receive the adjustment signal and At least the drive signal will be turned off. The switch is configured to affect the first pass through the primary winding that is drawn to the secondary winding.歹', according to the further embodiment - the adjustment of the electric device to receive at least the wheeling signal, the input signal is sampled, and the voltage is applied to and the second output signal is generated by the capacitor to generate the first _th = And configured to receive at least the second output signal and the fourth state based at least on the information output associated with the third round-out signal and the controller. The first control signal. In addition, the system includes a compensator that is configured to at least compensate for the combination of the 'offer' and the other's signals. The system of the generator, the electric converter includes a first-signal generation and a correlation with the sampling; a first-output signal τ_唧旳-an output 相关 associated with the demagnetization. For example, the input signal to wrap-associated' and the secondary winding and power supply transform "output current! _. Additionally, the system includes sampling elements configured to receive at least the rim number" based at least on the f associated with the second round-trip signal To sample the input / ί ^ ΐ ί ί , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , And outputting the information associated with the signal to generate at least the first control signal i. In addition, the system is configured to receive at least the first control signal and to generate a clock signal; and the second signal generates two = The clock domain and the second control stealer are generated based on at least the clock money and the second (four) signal 2 201236345. In addition, the age system includes a gate driver configured to receive at least regulation and at least output the driver's job to the switch. For example, the switch configuration affects the first current flowing through the primary winding that is engaged to the secondary winding. In addition, the system includes at least adjusting a peak galvanic third control (four) configured to receive at least the sensed money and the threshold voltage, and the first control signal is output to the second signal generator, eg, the sensing signal and the stream The _ current phase _ of the primary winding of the power converter. The adjustment signal corresponds to the switching frequency, and the output signal corresponds to the demagnetization pulse width. In accordance with yet another embodiment, a system for adjusting a power converter includes a controller for adjusting at least a peak current. For example, the controller is configured to receive at least the sensing signal and the first inter-rate signal and to > generate a first-control signal, and sense the money associated with the current flowing through the primary winding of the power supply, in addition, the The system includes a signal generator configured to receive at least a first control k number and at least generate an adjustment signal; and a gate driver configured to receive at least the adjustment signal and output at least the drive signal to the switch. For example, the switch is configured to affect the first current. In addition, the control includes a first ratio (four) configured to sense the touch signal and the first threshold voltage, and generate a comparison signal based on at least information related to the sense and the first threshold voltage; and the m configuration is The receiving is relatively robust and generates a second control signal based at least on information associated with the comparison signal. Additionally, the controller includes a threshold generator configured to receive the second control signal and generate a second threshold voltage based on at least information associated with the second control signal; and the second comparator to receive the second difficult voltage and sense The signal is measured and the first control signal is generated based at least on information associated with the second threshold voltage and the sensed signal. In accordance with yet another embodiment, a method for adjusting a power converter includes receiving, by a first signal generator, at least an input signal and generating, based on at least information associated with the input signal, a first output signal associated with demagnetization and A second output signal associated with the sample. Additionally, the method includes receiving, by the sampling component, at least an input signal and a second output signal, sampling the input signal based on at least information associated with the first output signal, and generating at least a number associated with one of the plurality of sampled sizes a three output signal; at least a third output signal and a first threshold voltage are received by the error amplifier and a fourth output signal is generated by the capacitor, the capacitor being coupled to the error amplifier. Moreover, the method includes receiving, by the compensation component, at least a fourth output signal and generating at least a compensation signal based on at least information associated with the fourth output signal. For example, the input signal is a combination of a compensation signal and a first sensed signal. In another example, 201236345 is associated with a first winding of a secondary winding coupled to the vane converter, and the -under t winding is lightly phased with the output current and output of the power supply. In addition, the first controller outputting the current to receive at least the first output; the number and the first; the reduction based on the information associated with the first output signal and the third output signal; The second controller that adjusts at least the output voltage is at least = three control signals based on at least information associated with the fourth output signal. In addition, the method includes: Γ: Γ: Γ a second control signal and generates at least a clock call through the slot, 罘 彳 ; ;; generates at least an adjustment signal to generate at least an adjustment signal and at least a drive signal Output ^ Guan two ring shame, _ she around _ first lion; general less received the third control signal, the second sensing signal and the second value of electricity, and 变换器 converter two two second sensing signal And the flow through the power supply to the second I::: with: = change:: r method includes the pass _ twisted Chu knot "the input number is at least coupled with the secondary winding coupled to the power converter and the secondary winding and power converter sample size Associated first-output signal; at least the sugar 11 is generated by the error amplifier to generate the first capacitor, the capacitor_number; the second is generated by the =:===, the signal is received by at least the second output signal, and the output is output The voltage controller 2 outputs the information of the signal _ to at least (four) = the signal generator to receive at least the first control signal and the information associated with the heart 3 to generate at least the adjustment signal; through the inter-driver to the == 2 drive The signal is output to the switch to affect the flow_into the secondary winding's initial = 2 01236345 The method of switching to 11 includes the sample sampling component or the first output signal associated with the sample size. In addition, the method includes 3 errors to at least receive the «-output signal and _ voltage and: :: value: associated information to generate a second output letter through the capacitor; and = garrong ί is Μ, and one and the first 』:====第;通通=制_少(四)二输峨 and fine 臆, the second output signal and the fourth output signal are associated with the new two methods ^ method includes the pass to the ground ^ = =: 嶋 secret (four) raw - butterfly production method of lining light cage 11 _ over the first winding of the first signal secondary winding, and the secondary winding and electricity ===== ίΐ? An output signal and a second output number associated with the sample pass at least the input signal and the second output signal, at least based on the third coffee number associated with the output 3. The first round of the signal and the first, the signal, and == Na receive at least the first control signal and at least generate a clock signal by vibration. In addition, the method includes: receiving and receiving the clock signal and the second control signal, and at least the associated raw wire is connected to at least the associated information to generate at least the adjustment signal; and the third pass of the gate current through the gate driver = less adjustment of the peak current n Yang threshold voltage 'and output the second control signal to the second signal generation 11 201236345. The sense signal is associated with a first current flowing through the primary winding of the power converter, the adjustment signal corresponds to a switching frequency ' and the first output signal corresponds to a demagnetization pulse width. In accordance with yet another embodiment, a method for adjusting a power converter includes receiving at least a fine affinity inter-value signal by a control for adjusting at least a peak current. For example, the sensed signal is related to the first electrical age of the windings that flow through the electricity. Additionally, the method includes: generating at least a first control signal based on a resource m associated with the sensed signal and the first inter-value voltage; generating at least a first control residual by the signal generating n and based at least on the first control The signal associated with the signal produces at least a subtraction; the pass-through drive receives at least the adjustment signal and outputs at least the drive signal to the switch to affect the first current. The process of generating at least the first control signal includes receiving the sensing signal and the first threshold voltage through the first comparator, and generating a comparison signal based on the f signal associated with the sensing user and the first threshold voltage; Pumping to receive the comparison signal and generating a second control signal based at least on the force information associated with the comparison signal; receiving the second control (4) by threshold generation II and generating a second difficult voltage based on at least information associated with the second control signal; The second value voltage #感州 is received by the second ratio (four). And generating a first control signal based on at least information associated with the second value voltage and the sensed signal. With the conventional technology, a lot of Wei has been obtained by the present invention. The present invention may be derogated >, in some embodiments.卩;^ 4 numbers and / or reduce system costs. Some embodiments of the present invention can improve reliability and/or rate. Certain embodiments of the present invention can turn off circuit design in a _mode flyback power converter. Some embodiments of the present invention provide a primary side and adjustment scheme. For example, measurement and adjustment schemes can improve load adjustment. In another example, the primary side sensing and chirp scheme can compensate for the primary winding inductance variation to achieve a constant output current in a flyback converter employing primary side regulation. This issue _ some real-time can be circulated in the cc mode. Adjusting the power conversion (10) according to the embodiment-research includes: the first signal generating configuration to receive the first sensing signal and generating an output signal associated with the demagnetization: == a sensing signal _ coupled to the power conversion (4) The secondary winding is associated with the first winding, and is ΐϊίίΐ, the output current of the power converter is associated. Further 'the system includes a skew 2 to generate a configuration to receive the output signal and generate a ramp signal; and a fast configuration to receive the ramp signal and the first threshold signal, and based at least on the slope 12 201236345 The information of the first-threshold letter is the first to compare the money. Additionally, the system includes a comparator 'configured to receive the second sensed signal and the second thief signal and to generate a first-to-first comparison of the second_signal and the flow-axis to the Wei-yuan transform (10) - Current is associated. Additionally, the system includes a second signal generator configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal; and a gate driver 's & to receive the adjustment signal and output to the switch Drive signal. The switch configuration previously flows through the first current_the first current. The input button number is associated with a demagnetization duration and the drive signal is associated with ____. The secret is also configured to maintain a constant ratio of the demagnetization duration to the switching period. According to yet another embodiment, the method of adjusting a power converter includes receiving a first sense k number. The first-order signal is coupled to a power-converting (four) first-winding associated with the secondary winding and the secondary winding is associated with at least an output current of the power converter. Additionally, the = method includes generating an output signal based at least on information associated with the _th sense signal. The output signal is associated with demagnetization. Further, the method includes receiving the output signal; at least based on the _(4) Shunsheng ramp signal with the transmission number; and (4) the ramp signal and the first threshold Μ, processing and The ramp signal and the information associated with the first threshold signal; generating a second sensing signal based at least on the slope and the first money side feed to generate a first to second health signal And a second threshold signal. The second sensing city and the first current out of the primary winding of the secondary winding of the power converter comprise a process of processing the second sensing signal and the second threshold signal The phase receives the first comparison signal and the second comparison signal based on at least a comparison associated with the second sensing signal and the second threshold signal; at step 2 the first comparison signal and the Information of the second comparison signal phase _; generating a lobes signal based on at least the utterance associated with the 2-1 comparison (4) and the second comparison signal. In addition, the adjustment signal is received; the output drive signal is turned off based on at least information related to the adjustment signal to affect the current flowing through the first__. The output is associated' and the drive signal is associated with a switching period. The ratio of the demagnetization duration to the switching period is kept constant. = again - the embodiment ... the system for adjusting the power converter includes a first signal generation - to receive an input nickname and at least generate an output signal associated with the demagnetization, 13 201236345 the input signal is at least with the power converter An output current controller configured to receive at least the output f and the information including the first associated information to generate at least a first sense signal of the primary winding of the power converter with the output signal And flowing through the West? Jin is at least connected to =. In addition, the system includes an oscillator configured to receive (4)-control signals and at least base associated with each other to generate at least a clock signal; the second signal generator 'with 3 to 3' is configured to affect flow through The primary winding "; off 53: the letter is related to the switching period ^== according to yet another embodiment - the method for adjusting the power converter includes ···into the signal' and at least based on Deriving information associated with the input signal to generate at least an output nickname. The input signal is associated with at least an output current of the power converter, and the output signal is related to demagnetization. Additionally, the method includes receiving at least the output signal; Processing information associated with the ^ signal; generating at least a clock signal based at least on information associated with the output signal. Further, the method includes a panning signal and a threshold record. The sensing signal and the flow path a first current correlation of the primary winding of the power supply. Further, the method is associated with the sensing signal and the threshold rib; at least based on the sensing Generating a control nickname associated with the threshold rib; at least (4) _signal control control is number, processing information associated with the clock signal and the control signal; at least based on the clock signal and the Controlling the information associated with the signal to generate at least the adjustment signal 1 . The method includes receiving at least the adjustment signal; at least outputting a drive signal to the switch based on at least information associated with the adjustment resource to affect flow through the primary The first current of the winding. The output signal is associated with a demagnetization duration, and the drive signal is associated with a switching period. Keeping the ratio of the demagnetization duration to the switching period constant, and causing the The peak value of the first sensing signal remains constant in size. 201236345. According to yet another embodiment, the system of the Linna power converter includes a first signal generator configured to connect the (four)-sensing number and generate a demagnetization phase. a first output signal, the first sense signal is coupled to a secondary winding of the power converter, and the secondary age is at least free of a home-source converter An output current phase. The correction includes a first-ramp signal generator configured to receive the first output signal and generate a first ramp signal; a first comparator configured to receive the first ramp signal and the first An inter-valued signal, and the information associated with the first-slope signal and the first-to-sense signal of the J-base generates a first-to-number signal. In addition, the sig system includes a peak detector configured to receive the driving signal and the second sense This number and produces a front value 彳 5. The second sensing signal is coupled to the secondary winding _ primary winding _ first current phase _ flowing through the power converter. In addition, the age includes an amplifier, Configuring to receive the peak charm and a second threshold signal and generating a second output signal through a capacitor 'the capacitor is compliant to the amplifier; a second comparator configured to receive the first output, and a second The ramp signal 'New generates a second comparison signal. Additionally, the system includes a number generator 'configured to receive at least the first comparison signal and the second comparison signal 1, +, ^ ' and the closed drive 'configuration to receive The adjustment No. 4 and the drive signal peak detector and switch outputs. The switch is configured to affect the first current flowing through the primary winding. An example of a method for adjusting a power converter includes receiving a first sensing, a fine sensing, and a winding winding (four) - winding correlation = and the secondary winding is at least coupled to the power converter (4) Flow related. Additionally, the / generating includes generating a first output signal based on at least information associated with the first sensing signal. The first output signal and the demagnetization 2: ramp signal and the first-difficult signal; processing information associated with the first ramp signal and ^=; at least based on the first-ramp signal and the first The fly of the value of the eye produces a first comparison signal; the drive signal and the second sense signal are received. The measured signal is coupled to the primary winding of the secondary winding of the power converter, and the method includes processing the driving signal and the second sensing ==== The poor peak (four) associated with the squirrel (4) is received by the peak signal and the second threshold signal; the information associated with the peak 15 201236345 = number = the second threshold signal is processed; Information associated with the first threshold signal produces a second round out signal, the second output signal and a second ramp signal; processing and the method includes receiving information associated with the ramp; at least based on the second round signal The information associated with the second number produces a second comparison signal. Further "two: said second ramp signal and said second comparison signal; processing information associated with said first comparison of said first comparison; at least based on said second comparison with said first comparison The information of the signal is generated, and the correlation is associated with the information associated with the adjustment signal to rotate the first current of the base winding. The cat is affected by the primary current. Still another embodiment, a system for adjusting a power converter comprising a first detector configured to receive a first sense subtraction and to generate a demagnetization and a decoupling to a secondary winding of the power converter Configuring to receive the drive signal and the second sensed signal and generate a peak associated with the first electrical current flowing through the primary winding coupled to the secondary winding of the electrical converter. In addition, the system includes a second signal generation And = the signal associated with the peak signal and generating an adjustment signal: this: a gate driver configured to receive the adjustment signal and the drive signal, the switch configuration to affect flow through Initial, = ^. The output signal a demagnetization duration phase _, and the crane signal is associated with an open source. The system is configured to cause the demagnetization duration to be related to the enthalpy, and to cause the average magnitude of the peak « to be continually __ The method for maintaining the power conversion 11 includes receiving a first sensing η saying that the first sensing tang is engaged to the first winding of the power conversion riding secondary winding, and the secondary winding is at least In addition, the drive is related to the output current of the power converter (4), generating an input signal; receiving a 3: number; and processing the (4) associated with the driving signal and the second sensing signal The first sensing signal is demagnetized, and the second sensing signal is coupled to the secondary winding of the power supply to the secondary winding of the power supply. In addition, the method 16 201236345 includes at least Information associated with the drive signal and the second sensed signal produces a peak signal; processing at least information associated with the output signal and the peak signal; based at least on the output signal and the peak signal Associated information generation Additionally, the method includes receiving the adjustment signal; outputting the drive signal to a switch based on at least information associated with the adjustment signal to affect at least the first current flowing through the primary winding. An output apostrophe is associated with a demagnetization duration, and the drive signal is associated with a switching period. maintaining a ratio of the demagnetization duration to the switching period is constant; and causing an average magnitude of the peak signal to be at a first duration The time period remains constant. According to yet another embodiment, a system for adjusting a power converter includes a first signal generator 'configured to receive a first sensed signal and to generate a first output signal associated with demagnetization. A sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is at least coupled to (d) a power supply _ current. In addition, the system includes peak detection 1 § 'configuration to A crane signal and a second sensing signal are received and a peak signal is generated. The second sense signal is associated with a first current flowing through a primary winding that is coupled to a secondary winding of the power converter. Further, the age system includes a second signal generator configured to receive the drive signal, the first output signal, and the peak signal, and to generate a second output signal; the amplifier 'configures to receive the second output signal and The threshold signal and a third output signal is generated by the capacitor 'the capacitance H she is coupled to the amplifier. Additionally, the button includes a comparator: configuration = receiving the third output signal and the ramp signal and generating a comparison signal; the third signal generator 'configuring to receive at least the hash signal and clock money and generating an adjustment signal: ==. And a means for receiving the adjustment signal and outputting the drive signal to the peak detector and the switch. The switch is configured to affect the first current flowing through the primary winding. , m root real = two methods for adjusting the power converter include receiving the first winding of the secondary winding of the power converter to the second winding The output current phase of the power converter is _. Additionally, the = method includes generating a first output signal with the demagnetization phase, and receiving information associated with the second sensing signal; at least based on the identification signal with the driving signal and the second 17 201236345 The method includes receiving the drive signal, the illusion 5 and the peak signal; processing information associated with the drive signal, the first peak signal; at least based on the drive signal, the third « The information associated with the peak signal produces a second output signal. In addition, the party' == lean; at least based on the slope associated with the second output signal and the inter-value signal. At the ^ number. In addition, the method includes receiving information of the third output signal and the third _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Compare signals. This includes receiving the comparison signal and the clock signal; processing the comparison signal and the signal generation adjustment signal. In addition, the method includes receiving the adjustment signal, and outputting the driving signal to affect the flow through the initial according to the embodiment of the power converter: The first sensed signal is received and associated with the first winding of the secondary winding of the power converter, and the set is associated with at least the output current of the power converter. Additionally, the system includes, - configured to receive the drive signal and the second sense signal and generate a peak signal that is coupled to the primary 'an electric catch' of the secondary winding of the power converter and the second signal generator Configuring to receive at least the drive number signal and the peak signal 'and to generate a second output signal. In addition, the system has two output signals and a threshold signal and is produced by a capacitor == fourth output signal. The capacitance is coupled to the second input scorpion and is proportional to a second input signal received by the primary winding. The fourth output signal and the second sense signal are configured to be passed and a two-to-two (five) number generator configuration is generated to receive at least the comparison signal and the time-growth signal. In addition, the age includes a gate coffee, and the receiving and receiving signal ^ 18 201236345 outputs the driving signal to the peak detector, the second signal generator and the switch. The switch is configured to affect the first current flowing through the primary winding. According to yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first winding of the secondary winding of the first-to-money source is associated with at least the output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a primary flow that flows through the secondary winding of the power converter. In addition, the method includes processing and the driving signal and the second sensing: at least based on the driving signal and the second sensing signal associated with the bar k,. Value =. Additionally, the method includes receiving the drive signal, the first input. a peak-to-peak signal; processing and the driving signal, the first output signal, and the == phase__ information; generating a second output signal based at least on the driving signal, the Lth number, and ==== . Additionally, the method includes receiving the associated information, based at least on the third output signal and the first input signal, and the first and second input signals. The second input signal received by the first primary winding is proportional. In addition, the first party I packet 2 processes the resource associated with the third output signal and the first input signal to =; the sensing signal phase: ========= the comparison signal And the clock signal, the method L:::===, the job information to turn the signal; the ring to write the root Ξ ϋ ϋ ϋ 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种The first _=_==== ___ output: the first winding of the - human winding is associated, and 201236345 and the secondary winding is at least related to the output current of the power converter Additionally, the system includes peak detection n configured to receive the drive ship and the second sense (4) and generate a peak signal. The second sensed signal is associated with a first current flowing through a primary junction of the secondary winding of the power converter. Additionally, the system includes a second signal generator configured to receive at least the first output signal and the peak signal, and to generate a second output signal saying 'amplify' to receive the second output The capacitor is recorded and coupled to the amplifier by a capacitor. Additionally, the system includes a second chirp generation $, configured to receive the first sense signal, the third drive signal, and a fourth output signal; a comparator configured to receive the first output and The second sensing signal produces a comparison signal. Additionally, the system includes a fourth/device configured to at least be stunned and clocked and configured to receive the adjustment signal and to the peak detector, the second: =, the red signal A generator and a switch output the drive signal ^ the first current flowing through the primary winding. i嘱 is configured to illuminate according to yet another embodiment for adjusting the power conversion signal. The first sensing signal is coupled to the secondary winding of the power converter and the method of tearing off the material includes generating a first output signal associated with demagnetization; receiving another ~ . The second sensing signal is associated with a first current flowing through the power conversion: the first-inductive group. Additionally, the method includes processing the sum signal with the sum, and the information generated. In addition, the ===, the associated output signal and the peak signal; processing the information associated with the first output peak signal; the at least based on the first output signal And the associated signal of the peak signal generates a first output signal and a second output signal and a threshold signal. The method includes receiving the associated information; generating a third output signal based on at least the second outbound signal and the intervening value signal. Further, the method is associated with the τ output signal And the driving signal; processing the information associated with the first 丄πα 仏唬, the third number and the driving signal; at least the 彳°°, the third output, The first sensing signal, the 20th 201236345 three output signal, and the information associated with the driving signal generate a fourth output signal. In addition, the method includes receiving the fourth rounding signal and the second sense Measuring a signal; processing information associated with the fourth=signal and the second sensed signal; generating a comparison signal based on at least information associated with the fourth output=the second sensed signal. The method includes: receiving a second-order health signal and a clock signal; processing a poor message that is compared with the money-synthesizing number of the singularity; and generating a signal based at least on the information that is side-by-side with the comparison signal and the clock. The method includes receiving the adjustment letter And outputting the drive signal to affect the current flowing through the primary turns based at least on information associated with the :: a system for adjusting a power converter according to yet another embodiment Including a first messenger configured to receive the first sensing signal and generate an output signal associated with the demagnetization. The sensed signal is compared with the secondary winding_first winding that is coupled to the power conversion n, and The stage winding is at least related to the output current of the power conversion n. In addition, the system includes a value detector 'g& set to receive the driving signal and the second sensing signal and generate a peak sensing signal. The power supply rides Wei Wei's associated with the 2 stream. In addition, the system includes a second signal generator configured to process at least the output signal and the information associated with the peak signal and generate an adjustment signal; and an inter-driver configuration Retrieving the signal and transmitting a drive signal to at least the peak detector and switch. The switch is configured to affect the first drive signal flowing through the primary winding and the off-duty side, and to output an output signal With the degaussing duration ^ Guan: The retreat __ between the Dashe and the ribs of the ribs by the amount of materials. The stomach is also configured to make the occupation of the age of the dynasty, so that the ship's magnetic peak value of the surname of the ship Holding the constant, and keeping the output current constant. According to yet another embodiment, the green signal for adjusting the power supply to be fresh includes a signal. The first-to-the-power method is coupled to the power converter ,^ method, including generating and retreating __ _ outgoing signal; receiving the drive number and the second slogan: 2 the first sense signal is associated with the first current of the primary fused to the secondary winding of the power converter. Further, the method includes Processing with the drive signal and the second sense Said associated information; generating a peak signal based on at least information associated with said drive signal and said second sensed signal 21 201236345; processing and said output signal; at least based on said round-trip signal and ^^ The number of the target. In addition, the drive (four) side ^ the drive signal and the _ week __, and the output value. Keeping the off period constant, so that the average size of the demagnetization peak is at the first! The period of time is kept constant and the output current is kept constant. Continuation Depending on the embodiment, one or more of these benefits may be obtained. Reference can be made to the following detailed descriptions and to the full understanding of the present invention, as well as various other objects, features and advantages. [Embodiment] The present invention relates to a relay circuit. More groundly, this issue relies on the system and green of the Linding hybrid and constant flow modes. By way of example only, the invention has been applied to flyback power supply variations with primary side sensing and adjustment. However, it should be understood that the invention has a broader range of applications. Figure 7 is a simplified diagram of a switched mode power supply conversion system with primary side sensing and adjustment in accordance with the present invention. This diagram is an example and should not be unreasonably limited to the scope of the patent scope. Those skilled in the art will recognize many variations, substitutions and modifications. The switched mode power conversion system 500 includes a primary winding 502, a secondary winding 504, and an auxiliary winding 506. In addition, the conversion system 5A includes resistors 510, 512, and 580. Additionally, conversion system 500 includes a capacitor 526, a switch 550, and a diode 554. In addition, the transform system 500 includes the following components: • an element 520 for generating a Demag signal and a SamP!ing::!k signal; • an element 522 for sampling and holding one or more signals; • an error amplifier 524; Load-compensated component 532; • Component 534 for constant voltage (CV) control; • Component 538 for generating PWM/PFM adjustment signals; • Component 540 for current sensing (CS) peak adjustment; 22 201236345 • Element 542 for constant current (CC) control; • Element 546 for generating a gate drive signal; • Oscillator 562; and • Element 568 for forward feed. In an embodiment, 'element 52G, 522, 532, 534, 538, 540, 542, 546, and 568, error amplifier 524 and oscillator 562 are located on wafer 59A. For example, wafer 59A includes at least terminals 516, 530, 552, and 566. Although the above has been illustrated with the selected set of elements for the system 5, many alternatives, modifications, and variations are possible. For example, some of the elements can be combined with and/or combined. Other components can be used in those components mentioned above. Depending on the actual implementation, the component's system can be interchanged with other components that are replaced. For example, system 500 is a switch mode flyback power conversion system. A step-by-step detail of these components can be found in the specification, more specifically below. ° As shown in FIG. 7, in accordance with an embodiment of the present invention, the output voltage v〇ut is sensed by the primary side of the conversion system 5〇〇. For example, the sensing of the output voltage vDut depends, at least in part, on the resistance ratio between the secondary winding 5〇4 and the auxiliary winding 5〇6. For example, the secondary winding 5〇4 fits tightly to the auxiliary winding 506. In another example, the secondary winding 5〇4 sends a signal 5 brother to the diode 5M and is coupled through the diode 554 to the output of the conversion system 5〇〇. In one embodiment, the output signal 5 〇 8 of the auxiliary winding 506 is represented by Vaux. In another embodiment, the output signal 508 is processed through a voltage divider comprising a resistor 51 (ie, and a resistor 512, (ie, 'r2). The output signal 514 (ie, Vjnv) is from the voltage divider. Feed to terminal 516 (ie, terminal INV). For example, output signal 514 is load compensated by element 532. In another example, compensated signal 514 is fed into both elements 52A and 522. In an embodiment, element 532 includes one or more devices as shown in Figures 14 (a), 14 (b), 15 (a), and/or 15 (b). According to another embodiment, element 52 includes Some of the devices shown in Figures 1 and 11. For example, 'element 520 will output a signal to element 522. With Sampling-clk, element 522 produces a ± Hokling clk signal. ^ In one embodiment 'component 522 is compensated based on signal pair The signal 514 is only wooded and the sampled signal is held based on the slave signal. For example, the component 522 samples the compensated signal 514 near the end of 23 201236345 demagnetization and maintains the sampled signal until the next sample. In the example, the sample and hold process is In addition, as shown in Figure 7, the sampled and held signal is sent from element 522 to error amplifier 524. According to some embodiments, element 524 includes Figure 14 (a), μ (b) Some devices shown in 15 (a) and/or 15 (b). The error amplifier 524 also receives the reference signal Vref. For example, the reference signal Vref is compensated based on the output load of the transform system 500. In another example; The apostrophe v_p is compared to the reference signal vref and its difference is amplified by the error amplifier 524. In one embodiment, the error amplifier 524 produces an output signal 528 through the capacitor 526. For example, the capacitor 526 passes through the terminal 530 (ie, terminal COMP). Connected to error amplifier 524. In another example, 'output signal 528 (ie 'VC0MP') reflects the load condition. In yet another example,
Vc〇mp被用來影響PWM/PFM開關頻率和PWM/PFM脈寬,以便調整輸出 電壓Vout。 π 如圖7所示,輸出信號528發送給元件532和534。例如,元件534 在定壓(cv)模式中使輸出電壓乂⑽保持恒定。在另一示例中,元件534 將控制彳§號536發送給元件538,並將控制信號558發送給振盈器562。 作為回應,振盪器562向元件538輸出時鐘信號560。 另外’在一個實施例中,誤差放大器524還向元件568輸出信號57〇, 作為回應,元件658產生信號572併發送給元件534。在另一實施例中, 元件534接收信號572和信號528兩者。 如圖7所示,元件520還將Dew喂信號發送給元件542 ,元件542還 接收信號Vsamp。作為回應’元件542輸出控制信號592。根據一實施例, 控制信號592被用來在定流(CC)模式中使輸出電流丨⑽保持恒定。例如, 元件542包括如圖17所示的一個或多個設備。在另一示例中,元件542 通過振盪器562根據初級繞組電感來鎖定開關頻率,並且因此補償初級繞 組電感的變化。在又一示例中,使得定流(CC)模式中的輸出電流U 立於初級繞組電感。 根據一個實施例,元件538至少接收信號560、536和592、以及來自 元件540的信號574。元件54〇除了接收來自端子566 (即,端子cS)的 信號564以外,還接收Vth—〇c。例如,vth_oc表示預定閾值電壓位準。 在另一示例中,信號564是電壓信號。作為回應,元件538向元件546輸 24 201236345 出控制信號544 ’元件546進而向開關550發送驅動信號548。例如,控 制信號544是調節信號。在另一示例中,開關是電源MOSFET。在又一示 例中,開關是電源BJT。在又一示例中,開關通過端子552(即,端子Gate) 連接到元件546。在又一示例中,驅動信號548由VGate表示。 根據一個實施例,控制信號544用來確定PWM/PFM控制的導通時間 和開關頻率。例如,較大的VC0MP大小會產生較長的導通時間,並且因此 將產生被遞送到輸出的較高的功率水準。在另一示例中,較大的Vc〇脚大 小會產生較高的開關頻率,並且因此將產生被遞送到輸出的較高的水 準。根據另一實施例,PWM/PFM控制的導通時間由元件538確定,並且 PWM/PFM控制的開關頻率由振盪器562確定。 /上輯並在此進-步強調,7健是示例,其不應當不當地限制 申清專利誠的$|_。熟知該項技觸域之人將認翻許多變體、替 修改。例如,變換系統500還包括未在圖5中示出的一個或多個元件。在 另一示例中’變⑽統還包括未在圖5中示出的—個或多個連接 =一,例中’變換系統包括與圖5所示的元件不同的一個或多個元 一示例中,變換系統撕包括與圖5所示的連接不同的—個或多 Η 8 ^容器526可用於環路穩定補償的另-電路替換。 元件L ^ 拍作她一部分的 疋件522所執行的信號採樣和保持的簡化時 I刀= 不應當不當地限制申請專利範圍的範峰 、疋不糾,其 許多變體、替換和修改。 $ ',、、%項技術領域之人將認識到 660表示作為時間的函數的。另外’並且波: 信號,並且波祕0表示=二,作為時間的函數 參考圖7,如波形610所示的仲v ^函數的祕一喻 據本發明的實施例,在開關55G通過^ 送到開㈣〇。例如, 5〇2中的能量觀專送到輔助繞組5〇6‘ ·^麦,錯存在初級繞为 中,如波形620所示的信號¥績類 _ •且04兩者。在另一示1 實施例中,信號556反映了臨近每個退處的信請。在-彳 時奴結束時的輪出電壓vout。4 25 201236345 又一示例中’如波形630所示的信號VrNV類比每個退磁時段期間的如波形 620所示的信號vAUX。 另外,根據本發明一實施例,波形64〇所示出之信號从的 脈衝在退磁時段結束時被產生。根據另—實施例,波形65G所示出的信號 //〇/泣《g_c/A:的脈衝在退磁時段結束時被產生。 υ 根據實施例,如波形630所示,信號在Samp/ing—c/k信號的下 降邊緣被採樣,並且在時鐘週期的其餘部分期間被保持。例如,信號 的經採樣和保持的值被用來產生信號Vsamp。在另一示例中,信號幅度% 反映了元件522的輸出電壓。 如上所述並在此進一步強調,圖8僅僅是示例,其不應當不當地限制 申清專利範圍的範_。熟知該項技術領域之人將認識到許多變體、替換和 修改。例如,Va從一個採樣時鐘週期到另一採樣時鐘週期而改變,因此 Vsamp在大小上也從一個採樣時鐘週期到另一採樣時鐘週期而改變。 圖9是示出根據本發明實施例用於開關模式電源變換系統5〇〇的輸出 電壓調整的某些元件關化示圖。該示圖僅僅是示例,其不應當不當地限 制申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換 和修改。 如圖7和圖9所示,根據一實施例,分壓器接收來自輔助繞組5〇6的 仏號508 ’並且向端子ijsjv輸出信號514。在另一實施例中,信號514通 過元件532而進行負載補償。經補償的信號514被饋送到元件520和522 兩者。 例如’元件522在臨近退磁結束時對經補償信號514採樣,並保持經 採樣信號直到下次採樣。經採樣和保持的信號Vsamp從元件522發送給誤 差放大器524,誤差放大器524還接收參考信號Vref。信號乂胃^與參考信 號vref作比較’並且其差值被誤差放大器524放大。 在一個實施例中,誤差放大器524通過電容器526產生輸出信號528。 例如’電容器526通過端子53〇(即,端子C〇MP)連接到誤差放大器524。 在另示例中,輸出is號528 (即,Vcomp)反映了負載條件,並且影響 PWM/PFM開關頻率和pwm/PFM脈寬,以便調整輸出電壓vDut。 26 201236345 如圖7和圖9所示,根據一實施例’輸出信號528 (即,Vc〇Mp)發送 給元件534。例如,元件534將控制信號536發送給元件538 ,並將控制 信號558發送給振盪器562。在一個實施例中,控制信號558是注入振盪 器562的電流。作為回應,振盪器562處理控制信號558以便確定時鐘信 號560的頻率,並且還向元件538輸出時鐘信號56〇。在另一示例中,乂 件538接收L號560和536兩者,並且向元件546輸出控制信號544。元 件546處理該控制信號544以便確定PWM/PFM開關頻率和PWM/pF]vm 寬兩者。在一個實施例中,PWM/PFM脈寬用來確定初級繞組5〇2的電 流。初級繞組502的電流和PWM/PFM開關頻率一起用來調整輸出電壓, 並且在CV模式令維持其恒定大小。 根據一個實施例,如果vOTmp的大小小於預定值,則電源變換系統5〇〇 ,於CV模式。例如,如果電壓Vsamp在大小上等於Vref,則v_p小於預 疋值。在CV模式中,ν_ρ用來調節PWM/PFM開關頻率和/或脈寬。例 如,控制PWM/PFM開關頻率和pwM/PFM脈寬兩者,以便使輸出電壓 Vout保持恒定。 根據另一實施例,如果Vc〇mp的大小超過預定值,則電源變換系統5〇〇 處=CC模式。例如,如果電壓Vsamp在大小上低於Vref,則v_p將超過 預定值。在CC模式巾,為了調整輸㈣流I()ut,電壓Vsamp觀來控制開 關頻率。例如’ PWM/PFM開關頻率與V轉成線性比例關係,V,進而 與輸出電壓Vout比例。 如上所述,根據本發明一些實施例,參考圖7,元件520包括如圖1〇 和圖11所示的設備。 圖1 〇是不出作為根據本發明實施例之開關模式電源變換系統50〇 一 部分,7L件520之產生£)_g信號的某些設備的簡化示圖。該示圖 僅僅疋不例,其不應當不當地限制申請專利範圍的範疇。熟知該項技術領 域之人將認識到許多變體、替換和修改。 如圖7和圖10所示’信號Vmv由元件520接收並且與兩個閾值電壓 作=較。-個閾值電壓是Vthi,另一閾值電壓是U脱。v如和v⑽是 預定常數’並且VsamP是從元件522接收的先前採樣出的電壓。至少部分 27 201236345 地基於信號Vinv與兩個閾值電壓的比較來產生^^历喂信號。例如,檢測 退磁時段,以便產生信號。 圖11是示出作為根據本發明實施例之開關模式電源變換系統500 — 部分的兀件520之用於產生加g c伙信號的某些設備的簡化示圖。該 示圖僅僅是神j ’其不應當不當地關巾請專利制的範_。熟知該項技 術領域之人將認識到許多變體、替換和修改。 號的持續時間資訊被積分韻存。例如,積分器包括和電容器9i〇和 920 (即刀別為電谷器C1和C2)。在另一示例中,電容器Q和Q的 電壓分別為節點912處的VC1和節點922處的VC2。 在-個實施例中,開關由信號Pin々Pui2控制。在另一實施例中,所 儲存的Demag錄的持續時間資訊用來確定Samp^dk信號的下一脈衝 的定時。例如’—淡信號的下一脈衝正好在退磁時段结束之前出 現,如圖8所示。另外,下一脈衝的寬度由單穩態(〇ne_shw紐咖 圖10所示產生Dewag彳§號。至少部分地基於£)e/w喂信號,也產 支其匕U 號 PM,Pin2, Sy„ch Sy„c2, SampI 和 Scmip2,如爾 \\ 所示。Demag 信Vc〇mp is used to influence the PWM/PFM switching frequency and PWM/PFM pulse width to adjust the output voltage Vout. π As shown in Figure 7, output signal 528 is sent to elements 532 and 534. For example, element 534 maintains output voltage 乂(10) constant in constant voltage (cv) mode. In another example, element 534 sends control § 536 to element 538 and control signal 558 to oscillating device 562. In response, oscillator 562 outputs a clock signal 560 to component 538. In addition, in one embodiment, error amplifier 524 also outputs a signal 57 元件 to element 568, in response, element 658 generates signal 572 and sends it to element 534. In another embodiment, element 534 receives both signal 572 and signal 528. As shown in Figure 7, component 520 also sends a Dew feed signal to element 542, which also receives signal Vsamp. In response, element 542 outputs control signal 592. According to an embodiment, control signal 592 is used to keep output current 丨(10) constant in a constant current (CC) mode. For example, element 542 includes one or more devices as shown in FIG. In another example, component 542 locks the switching frequency by oscillator 562 based on the primary winding inductance and thus compensates for variations in the primary winding inductance. In yet another example, the output current U in the constant current (CC) mode is made to stand in the primary winding inductance. According to one embodiment, component 538 receives signals 560, 536, and 592, and signal 574 from component 540. Element 54 receives Vth_〇c in addition to receiving signal 564 from terminal 566 (i.e., terminal cS). For example, vth_oc represents a predetermined threshold voltage level. In another example, signal 564 is a voltage signal. In response, component 538 outputs 24 201236345 control signal 544 ' component 546 and in turn sends drive signal 548 to switch 550. For example, control signal 544 is an adjustment signal. In another example, the switch is a power MOSFET. In yet another example, the switch is a power source BJT. In yet another example, the switch is connected to element 546 by terminal 552 (ie, terminal Gate). In yet another example, the drive signal 548 is represented by VGate. According to one embodiment, control signal 544 is used to determine the on-time and switching frequency of the PWM/PFM control. For example, a larger VC0MP size will result in a longer on-time and will therefore produce a higher power level delivered to the output. In another example, a larger Vc footer size will result in a higher switching frequency and will therefore produce a higher level of delivery to the output. According to another embodiment, the on-time of the PWM/PFM control is determined by element 538 and the switching frequency of the PWM/PFM control is determined by oscillator 562. / The previous series and here, step by step, stressed that 7 is an example, it should not unduly restrict Shen Qing's patent since $|_. Those who are familiar with the technical touch will recognize many variants and modify them. For example, transform system 500 also includes one or more components not shown in FIG. In another example, the '10' system also includes one or more connections = one not shown in FIG. 5, where the 'transformation system' includes one or more element-one examples that are different from the elements shown in FIG. The change system tearing includes one or more Η 8 ^ containers 526 different from the connection shown in FIG. 5 for another circuit replacement of loop stabilization compensation. Component L ^ The simplification of the sampling and holding of the signal performed by the component 522 that is part of her. The knives = the limits of the patentable scope should not be unduly limited, and many variations, substitutions, and modifications thereof. Those in the technical field of $ ', , , % will recognize that 660 is expressed as a function of time. In addition, 'and wave: signal, and wave secret 0 means = two, as a function of time, referring to FIG. 7, the secret of the secondary v^ function as shown by the waveform 610 is based on the embodiment of the present invention, and is sent at the switch 55G through the ^ To open (four) 〇. For example, the energy view in 5〇2 is dedicated to the auxiliary winding 5〇6′··^, and the error is present in the primary winding, as shown by the waveform 620, the signals _ • and 04. In another embodiment, signal 556 reflects the proximity of each retreat. At - 彳 when the slave ends the voltage vout. 4 25 201236345 In yet another example, the signal VrNV as shown by waveform 630 is analogous to the signal vAUX as shown by waveform 620 during each demagnetization period. Additionally, in accordance with an embodiment of the invention, the pulse from which the signal is shown in waveform 64 is generated at the end of the demagnetization period. According to another embodiment, the signal shown by waveform 65G //〇/泣 "g_c/A: is generated at the end of the demagnetization period. According to an embodiment, as shown by waveform 630, the signal is sampled at the falling edge of the Samp/ing-c/k signal and is held during the remainder of the clock cycle. For example, the sampled and held values of the signal are used to generate the signal Vsamp. In another example, the signal amplitude % reflects the output voltage of element 522. As described above and further emphasized herein, FIG. 8 is merely an example, and should not unduly limit the scope of the patent scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, Va changes from one sampling clock cycle to another sampling clock cycle, so Vsamp also changes in size from one sampling clock cycle to another sampling clock cycle. Figure 9 is a diagram showing certain components of the output voltage adjustment for the switched mode power conversion system 5A in accordance with an embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. As shown in Figures 7 and 9, according to an embodiment, the voltage divider receives an apostrophe 508' from the auxiliary winding 5〇6 and outputs a signal 514 to the terminal ijsjv. In another embodiment, signal 514 is load compensated by element 532. The compensated signal 514 is fed to both elements 520 and 522. For example, component 522 samples compensated signal 514 near the end of demagnetization and maintains the sampled signal until the next sample. The sampled and held signal Vsamp is sent from component 522 to error amplifier 524, which also receives reference signal Vref. The signal ^ stomach ^ is compared with the reference signal vref' and the difference is amplified by the error amplifier 524. In one embodiment, error amplifier 524 produces an output signal 528 through capacitor 526. For example, capacitor 526 is coupled to error amplifier 524 via terminal 53A (i.e., terminal C〇MP). In another example, the output is number 528 (i.e., Vcomp) reflects the load condition and affects the PWM/PFM switching frequency and the pwm/PFM pulse width to adjust the output voltage vDut. 26 201236345 As shown in Figures 7 and 9, an output signal 528 (i.e., Vc 〇 Mp) is transmitted to element 534 in accordance with an embodiment. For example, element 534 sends control signal 536 to element 538 and control signal 558 to oscillator 562. In one embodiment, control signal 558 is the current injected into oscillator 562. In response, oscillator 562 processes control signal 558 to determine the frequency of clock signal 560 and also outputs clock signal 56 to component 538. In another example, the device 538 receives both L numbers 560 and 536 and outputs a control signal 544 to element 546. Element 546 processes the control signal 544 to determine both the PWM/PFM switching frequency and the PWM/pF]vm width. In one embodiment, the PWM/PFM pulse width is used to determine the current of the primary winding 5〇2. The current of the primary winding 502, along with the PWM/PFM switching frequency, is used to adjust the output voltage and maintain its constant magnitude in the CV mode. According to one embodiment, if the size of the vOTmp is less than a predetermined value, the power conversion system 5 is in the CV mode. For example, if the voltage Vsamp is equal in magnitude to Vref, then v_p is less than the pre-value. In CV mode, ν_ρ is used to adjust the PWM/PFM switching frequency and/or pulse width. For example, both the PWM/PFM switching frequency and the pwM/PFM pulse width are controlled to keep the output voltage Vout constant. According to another embodiment, if the size of Vc 〇 mp exceeds a predetermined value, the power conversion system 5 = = CC mode. For example, if the voltage Vsamp is less than Vref in size, then v_p will exceed a predetermined value. In the CC mode towel, in order to adjust the input (four) flow I () ut, the voltage Vsamp view to control the switching frequency. For example, the PWM/PFM switching frequency is linearly proportional to V, and V is proportional to the output voltage Vout. As described above, with reference to FIG. 7, element 520 includes the apparatus as shown in FIGS. 1A and 11 in accordance with some embodiments of the present invention. Figure 1 is a simplified illustration of some of the devices that generate the £)_g signal for a 7L piece 520 as part of a switch mode power conversion system 50 in accordance with an embodiment of the present invention. The diagram is merely an exception and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions, and modifications. As shown in Figures 7 and 10, the signal Vmv is received by element 520 and compared to two threshold voltages. - One threshold voltage is Vthi and the other threshold voltage is U off. v as and v(10) are predetermined constants' and VsamP is the previously sampled voltage received from element 522. At least a portion of the 201236345 ground generates a signal based on the comparison of the signal Vinv with the two threshold voltages. For example, the demagnetization period is detected to generate a signal. Figure 11 is a simplified diagram showing certain devices for generating a g ji signal as part of a switch mode power conversion system 500 in accordance with an embodiment of the present invention. The diagram is only a model of God's patent system that should not be improperly closed. Those skilled in the art will recognize many variations, substitutions and modifications. The duration information of the number is stored in the score. For example, the integrator includes and capacitors 9i and 920 (i.e., the blades are electric grids C1 and C2). In another example, the voltages of capacitors Q and Q are VC1 at node 912 and VC2 at node 922, respectively. In one embodiment, the switch is controlled by signal Pin 々 Pui2. In another embodiment, the stored duration information of the Demag record is used to determine the timing of the next pulse of the Samp^dk signal. For example, the next pulse of the light signal appears just before the end of the demagnetization period, as shown in Figure 8. In addition, the width of the next pulse is derived from monostable (the Dne_shw Newcom diagram 10 shows the Dewag彳§ number. Based at least in part on the £) e/w feed signal, which also produces the 匕U number PM, Pin2, Sy „ch Sy„c2, SampI and Scmip2, as shown in er \\. Demag letter
疋不例’科應當*當地_巾請專繼_範^^熟知該 固。該示圖僅僅 該項技術領域之 人將認識到許多變體、替換和修改。疋 例 ’ ' 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科 科This figure is only apparent to those skilled in the art that many variations, substitutions, and modifications are possible.
例如,Demag信號的持 28 201236345 續時間是如圖丨2所示的Demag信號的脈寬。根據另一實施例,信 號具有與&mp2信號相同的脈寬。例如,脈寬等於開關550的載止與下一 採樣之間的時間間隔。在另一示例中,沿叫以和及信號用來媒定 Sampling—观信藏的定時。 在一個實施例中,户⑽信號與沿师2信號之間的關係可通過以下的差 等式來描述。 (9) 八中Pln]表示47信號,並且samP2表示&信號。該關係可以 進一步通過下面的Z變換來描述: βΡΜ (Ζ)Ζ~1 - α * Samp2 (Ζ)Ζ-, _A = Samp^ (Z) (i〇) 和 Samp2{Z) = ilPiAZ)Z~y -A _β*ΡΜ{Ζ)Ζ~λ Ι+α^Ζ-丨 ~~l+a*Z-1 其中’ A是恒定的初始值。 l+a*Z' (11) 另外,第二項___A_ l + a*Z~' 今〇 (時間今oo);因此For example, the duration of the Demag signal 28 201236345 is the pulse width of the Demag signal as shown in Figure 2. According to another embodiment, the signal has the same pulse width as the &mp2 signal. For example, the pulse width is equal to the time interval between the load of switch 550 and the next sample. In another example, the sum and signal are used to mediate the timing of the Sampling. In one embodiment, the relationship between the household (10) signal and the teacher 2 signal can be described by the following difference equation. (9) Eight Pln] indicates 47 signals, and samP2 indicates & signals. This relationship can be further described by the following Z transformation: βΡΜ (Ζ)Ζ~1 - α * Samp2 (Ζ)Ζ-, _A = Samp^ (Z) (i〇) and Samp2{Z) = ilPiAZ)Z~ y -A _β*ΡΜ{Ζ)Ζ~λ Ι+α^Ζ-丨~~l+a*Z-1 where 'A is a constant initial value. l+a*Z' (11) In addition, the second item ___A_ l + a*Z~' is now (time oo); therefore
Samp2 ^ (12) ι + α*Ζ~ι ( —間號的脈寬在每個週期根據前, 如圖13所示,波形111〇矣_从法士 、少 作為時間的函數的I,的函數的L,波形1_示 號。另外,波形1140表示作為時_ 不作為時間的函數的乃⑽^信 位準,並且波形1150表;=^的函數的端子CS處的信號 564的電壓 如上所迷,_請。 (a)、圖14 (b)、圖15 (a)和/ ,圖^兀件532包括如圖14 )所示的一個或多個設備,並 29 201236345 且’元件524包括如圖14 (a)、圖14 (b)、圖15⑷和/或圖i5⑻所 示的一些設備。 圖14 (a )疋不出作為根據本發明實施例之開關模式電源變換系統5〇〇 ,部分的το件532和誤差放大器524的某些設備的簡化示圖。該示圖僅僅 是示例,其不應當不當地限辦請專__射。熟知該項技術領域之 人將認識到許多變體'替換和修改。 如圖14 (a)所示,元件532包括電流源123〇,並且誤差放大器524 包括元件121G和跨導放大器㈣。例如,耕確定兩個輸入信號在 大小上的差異。 例如’ 7L件1210接收電壓信號Vsamp和參考信號Vref,並且產生大小 等於VrerVsamp的信號570。在另一示例中,跨導放大器122〇放大信號57〇 以產生輸出k號528。根據一個實施例,輸出信號528由電容器526接收。 例如,電容器526用作用於閉合環路的低通濾波器。另外,作為前向饋送 路徑-部分的元件568向閉合環路提供零,以提高變換系統的操作穩 定性。 〜 電流源1230產生隨著輸出負載變化的電流j-CojyjpEN—p。電流 I—C0MPEN_P;A經端子INV和電阻器512。例如,電流c〇MpE=p用 來補償因f纜引起的電歸以及隨著輸出電流w變化的其它電壓損耗。 在另一示例中,I_C0MPEN_P電流在無負載條件時達到其最大值,並且^ 滿負載條件時變為零^ 根據一個實施例,通過負載補償,輸出電壓乂⑽可表達為如下。 V〇u,=k-V^f+^-VDX -k-I^OMPEN p.^HR^ ( 13 ) 其中,η是輔助繞組506與次級繞組5〇4之間的匝數比。另外,v 是二極體554的前向二極體壓降,並且 D1 k nR2 (14) 例如,等式13中最後一項表示用於抵消因電纜引起的電壓降的補 因數。 30 201236345 圖14(b)是不出作為根據本發明實施例之開關模式電源變換系統5〇〇 令的元件532的一部分的電流源123〇的某些設備的簡化示圖。該示圖僅 僅是示例’其不應當不當地限制申請專利範圍的範脅。熟知該項技術領域 之人將認識到許多變體、替換和修改。 參考圖14 (a),元件532包括電流源1230。如圖14 (b)所示,電流 源1230包括電壓到電流轉換器124〇、定流源125〇和元件126〇〇例如, 元件1260確定兩個輸入信號在大小上的差異。 例如,信號528 (即’ vCOMP)由電壓到電流轉換器1240接收並且被 轉換為電流I_COMPEN。在另一示例中,定流源125〇產生恒定電流Icc。 電流Icc和I_COMPEN兩者由元件1260接收,元件1260產生電流 I_COMPEN_P。在一個實施例中,電流等於Icc _ I_C0MPEN H實糊巾,如果 V_^A,則糕 IJX)MpEN p /J、。 圖15 (a)是示出作為根據本發明另一實施例之開關模式電源變換系 統500的部分的元件532和誤差放大器524的某些設備的簡化示圖。該示 圖僅僅是示例,其不應當不當地限制申請專利範圍的範疇。熟知該項技術 領域之人將認識到許多變體、替換和修改。 如圖15 (a)所示’元件532包括電流槽1330,並且誤差放大器524 包括元件1310和跨導放大器1320。例如,元件1310確定兩個輸入信號在 大小上的差異。 > 例如,元件1310接收電壓信號ν_ρ和參考信號Vref,並且產生大小 等於VrerVsamp的信號570。在另一示例中,跨導放大器1320放大信號57〇 以產生輸出信號528。根據一個實施例’輸出信號528由電容器526接收。 例如,電容器526用作用於閉合環路的低通濾波器。另外,作為前向饋送 路徑一部分的元件568向閉合環路提供零,以提高變換系統500的操作穩 定性。 電流槽1330產生隨著輸出負載變化的電流I_C0MPEN_N。電流 I一C0MPEN_N流經電阻器510和端子INV。例如,電流I—c〇MPEN N用 來補償因電纜引起的電壓降以及隨著輸出電流1_變化的其它電塵損耗。 31 201236345 在另-賴巾’ I_COMPEN_N電流在滿貞載條件時制其最大值,並且 在無負載條件時變為零。 圖15 ( b )是示出作為根據本發明實施例之開關模式電源變換系統5 〇 〇 中,元件532的-部分的電流槽133〇的某些設備的簡化示圖。該示圖僅 僅是示例,其不應當不當地關”專概_麟。熟知該項技術領域 之人將認識到許多變體、替換和修改。 參考圖15 (a) ’元件532包括電流槽1330。如圖15 (b)所示,電流 槽1330包括電壓到電流轉換器134〇以及包括電阻器135〇和136〇的電流 鏡。例如Μέ號528 (即,VC0MP)由電壓到電流轉換器134〇接收並且被 轉換為H I_COMPEN。在$ -示例巾,電流^CC)MpEN丨錢鏡接收, 電抓鏡產生電流I_COMPEN_N。在一個實施例中,電流等 於mx I_COMPEN ’ m是正整數。在另一實施例中,如果Vc〇Mp變大,則 電流I_C0MPEN_N也變大。 圖16是示出作為根據本發明實施例之開關模式電源變換系統5〇〇的 部分的元件568和誤差放大器524的CMOS實現的簡化示圖❹該示圖僅僅 是示例,其不應當不當地限制申請專利範圍的範疇。熟知該項技術領域之 人將認識到許多變體、替換和修改。 圖17是不出作為根據本發明實施例之開關模式電源變換系統5〇〇的 部分的元件542的某些設備的簡化示圖。該示圖僅僅是示例,其不應當不 备地限制申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變 體、替換和修改。 如圖17所示,元件542包括電壓到電流轉換器151〇、元件152〇和鎖 相環1530。例如,元件152〇確定兩個輸入信號在大小上的差異。在另〆 不例中’元件1520接收來自電壓到電流轉換器151〇的信號1512和來自 鎖相環1530的信號1534 ’並且輸出表示信號〗512與信號1534的大小之 差的信號1522。 如圖7和圖Π所示’元件522採樣信號514並且產生信號Vsamp。另 外’ Demag信號由元件520產生。在一個實施例中,信號的持續時 間與初級繞組502的電流成比例並且也與次級繞組5〇4的電流成比例。例 如,化號的持續時間是如圖12所示的Demag信號的脈寬。 32 201236345 在一個實施例中,如果信號vsamp在大小上小於信號vref,則乂⑶师的 大小超過預定值’並且電源變換系統500處於CC模式。例如,vc()mp的大 小達到其最大值時’ CC模式被檢測到。在另—實施例中,在cc模式中, PWM/PFM開關頻率由電壓Vsamp來控制。例如,PWM/PFM開關頻率與 Vsamp成線性比例關係,Vsamp進而與輸出電壓V〇ut比例。 例如,在CC模式中,斷續傳導模式(DCM)下的v〇ut由下式給出: P〇 = Vo*I〇 = ^LpFswIl (15) 其中’ Po表示變換系統500的輸出功率。另外,乂〇和1〇分別表示輸 出電壓Vout和輸出電流Iout。此外,Lp表示初級繞組502的電感,Fsw表 示開關頻率,並且Ip表示初級繞組502的峰值電流。η是常數。 如果FSW與Vsamp成比例,則FSW也與V〇成比例,如下。Samp2 ^ (12) ι + α*Ζ~ι (The pulse width of the - sign is before each cycle, as shown in Figure 13, the waveform 111〇矣_ from the law, less as a function of time I, L of the function, waveform 1_. In addition, the waveform 1140 represents the (10)^ level as a function of time _, and the waveform 1150 is a function of the signal 564 at the terminal CS of the function of =^ (a), Figure 14 (b), Figure 15 (a) and /, Figure 532 includes one or more devices as shown in Figure 14), and 29 201236345 and 'Element 524 includes Some of the devices shown in Figure 14 (a), Figure 14 (b), Figure 15 (4) and / or Figure i5 (8). Figure 14 (a) shows a simplified diagram of some of the devices of the switch mode power conversion system 5A, a portion of the device 532 and the error amplifier 524, in accordance with an embodiment of the present invention. This diagram is only an example, it should not be unreasonably restricted. Those skilled in the art will recognize many variations and modifications. As shown in FIG. 14(a), the element 532 includes a current source 123A, and the error amplifier 524 includes an element 121G and a transconductance amplifier (4). For example, ploughing determines the difference in size between the two input signals. For example, the '7L member 1210 receives the voltage signal Vsamp and the reference signal Vref and produces a signal 570 having a magnitude equal to VrerVsamp. In another example, transconductance amplifier 122 amplifies signal 57 〇 to produce output k number 528. According to one embodiment, output signal 528 is received by capacitor 526. For example, capacitor 526 acts as a low pass filter for the closed loop. In addition, element 568, which is part of the forward feed path, provides zero to the closed loop to improve the operational stability of the conversion system. ~ Current source 1230 produces a current j-CojyjpEN-p that varies with the output load. Current I_C0MPEN_P; A via terminal INV and resistor 512. For example, the current c 〇 MpE = p is used to compensate for the electrical return caused by the f-cable and other voltage losses that vary with the output current w. In another example, the I_C0MPEN_P current reaches its maximum value under no load conditions and becomes zero at full load conditions. According to one embodiment, the output voltage 乂(10) can be expressed as follows by load compensation. V〇u,=k-V^f+^-VDX -k-I^OMPEN p.^HR^ ( 13 ) where η is the turns ratio between the auxiliary winding 506 and the secondary winding 5〇4. Further, v is the forward diode voltage drop of the diode 554, and D1 k nR2 (14) For example, the last term in Equation 13 represents a complement factor for canceling the voltage drop caused by the cable. 30 201236345 Figure 14(b) is a simplified diagram of some of the devices of current source 123A that are part of element 532 of a switched mode power conversion system 5 in accordance with an embodiment of the present invention. This illustration is only an example 'it should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. Referring to Figure 14 (a), component 532 includes a current source 1230. As shown in Figure 14(b), current source 1230 includes voltage to current converter 124A, constant current source 125A, and component 126. For example, component 1260 determines the difference in magnitude between the two input signals. For example, signal 528 (i.e., 'vCOMP) is received by voltage to current converter 1240 and converted to current I_COMPEN. In another example, the constant current source 125 〇 produces a constant current Icc. Both current Icc and I_COMPEN are received by element 1260, which produces current I_COMPEN_P. In one embodiment, the current is equal to Icc _ I_C0MPEN H real paste, if V_^A, then cake IJX)MpEN p /J,. Figure 15 (a) is a simplified diagram showing certain devices of component 532 and error amplifier 524 as part of a switched mode power conversion system 500 in accordance with another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions, and modifications. As shown in Fig. 15(a), the element 532 includes a current sink 1330, and the error amplifier 524 includes an element 1310 and a transconductance amplifier 1320. For example, component 1310 determines the difference in size between the two input signals. > For example, element 1310 receives voltage signal ν_ρ and reference signal Vref and produces a signal 570 having a magnitude equal to VrerVsamp. In another example, transconductance amplifier 1320 amplifies signal 57 〇 to produce output signal 528. Output signal 528 is received by capacitor 526 in accordance with an embodiment. For example, capacitor 526 acts as a low pass filter for the closed loop. Additionally, element 568, which is part of the forward feed path, provides zero to the closed loop to improve the operational stability of the conversion system 500. Current tank 1330 produces a current I_C0MPEN_N that varies with the output load. Current I_C0MPEN_N flows through resistor 510 and terminal INV. For example, current I_c〇MPEN N is used to compensate for the voltage drop caused by the cable and other dust losses that vary with the output current 1_. 31 201236345 In the other, the I_COMPEN_N current is at its maximum load condition and becomes zero when there is no load condition. Figure 15 (b) is a simplified diagram showing some of the devices of the current slot 133 of the portion of the element 532 in the switch mode power conversion system 5 〇 根据 according to an embodiment of the present invention. This illustration is merely an example and should not be unconventional. A person skilled in the art will recognize many variations, substitutions, and modifications. Referring to Figure 15 (a) 'Element 532 includes current sink 1330 As shown in Figure 15(b), current sink 1330 includes a voltage to current converter 134A and a current mirror including resistors 135A and 136A. For example, nickname 528 (i.e., VC0MP) is provided by voltage to current converter 134. 〇 Received and converted to H I_COMPEN. Received in the $-example towel, current ^CC) MpEN, the electric gripper produces a current I_COMPEN_N. In one embodiment, the current is equal to mx I_COMPEN 'm is a positive integer. In another In the embodiment, if Vc 〇 Mp becomes large, the current I_C0MPEN_N also becomes large. Fig. 16 is a CMOS implementation showing an element 568 and an error amplifier 524 as part of the switched mode power conversion system 5 根据 according to an embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The drawings are merely examples, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. A simplified diagram of some of the elements of element 542 of a portion of a switched mode power conversion system 5A of an embodiment of the invention. This illustration is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions, and modifications. As shown in Figure 17, component 542 includes voltage to current converter 151A, component 152A, and phase locked loop 1530. For example, component 152 determines two input signals. In the other case, 'element 1520 receives signal 1512 from voltage to current converter 151 and signal 1534' from phase locked loop 1530 and outputs a difference between signal 512 and signal 1534. Signal 1522. As shown in Figures 7 and ', 'element 522 samples signal 514 and produces signal Vsamp. Additionally, the 'Demag signal is generated by element 520. In one embodiment, the duration of the signal is proportional to the current of primary winding 502. It is also proportional to the current of the secondary winding 5〇4. For example, the duration of the syndrome is the pulse width of the Demag signal as shown in Figure 12. 32 201236345 In one embodiment If the signal vsamp is smaller in size than the signal vref, then the size of the 乂(3) division exceeds the predetermined value' and the power conversion system 500 is in the CC mode. For example, when the size of vc() mp reaches its maximum value, the CC mode is detected. In another embodiment, in the cc mode, the PWM/PFM switching frequency is controlled by the voltage Vsamp. For example, the PWM/PFM switching frequency is linearly proportional to Vsamp, and Vsamp is in turn proportional to the output voltage V〇ut. For example, in the CC mode, v〇ut in the discontinuous conduction mode (DCM) is given by: P〇 = Vo*I〇 = ^LpFswIl (15) where 'Po denotes the output power of the transform system 500. In addition, 乂〇 and 1 表示 indicate the output voltage Vout and the output current Iout, respectively. Further, Lp represents the inductance of the primary winding 502, Fsw represents the switching frequency, and Ip represents the peak current of the primary winding 502. η is a constant. If the FSW is proportional to Vsamp, the FSW is also proportional to V〇, as follows.
SW -eVo (16) 其中,ε是常數。組合等式15和16,則 1〇 (17) 、由於η和ε是常數,因此如果Ip#〇Lp被精確控制,則輸出電流1〇是恒 疋的。但是’如果Lp未被精確控制,則1〇即使在cc模式中也可能改變。 替代地,如果(18) 其中,α是常數,則 /〇 = 2ηαΙ1 (19) 因此,如果Ip被精確控制並且如果滿足等式18,則可以使1〇恒定。 另外’對於返馳式操作’根據—實施例,可以通過次級繞組5⑽的電 鬥二次級繞組5〇4的峰值電流‘以及輸出電壓阶來確定退磁持續時 下。例如,退磁持續時間與D_w號的持續時間(例如圖㈣ 不的Demag信號的脈寬)相同。 LSXlP secν〇 (20)SW -eVo (16) where ε is a constant. Combining equations 15 and 16, then 1 〇 (17), since η and ε are constants, if Ip#〇Lp is precisely controlled, the output current 1〇 is constant. However, if Lp is not precisely controlled, 1〇 may change even in cc mode. Alternatively, if (18) where α is a constant, then /〇 = 2ηαΙ1 (19) Therefore, if Ip is precisely controlled and if Equation 18 is satisfied, then 1〇 can be made constant. Further, for the flyback operation, according to the embodiment, the demagnetization duration can be determined by the peak current ' and the output voltage step of the secondary winding 5 〇 4 of the secondary winding 5 (10). For example, the demagnetization duration is the same as the duration of the D_w number (for example, the pulse width of the Demag signal in Figure (4)). LSXlP secν〇 (20)
Demag 由於Ls與Lp成比例並且Ip sec與Ip成比例 r,Lpxin TDema^pi£lLP Vo (21) 33 201236345 其中,P是常數。如果滿足了等式18,則 TDemag X Fsw = βί£^χ psw = αβΙρ 因此,如果Ip被精確控制,則 ^Demag ~ y (22) (23) (24) (25) 根據一實施例,如圖7和圖17所示,在CC模式中,PWM7PF1V[開關 頻率由鎖相環1530鎖定。 (26) 並且/„=·£_ αβ 其中,γ是常數。組合等式19和24, /〇 =-/71/ 2β r νDemag is proportional to Lp and Ip sec is proportional to Ip r, Lpxin TDema^pi£lLP Vo (21) 33 201236345 where P is a constant. If Equation 18 is satisfied, then TDemag X Fsw = βί£^χ psw = αβΙρ Therefore, if Ip is precisely controlled, then ^Demag ~ y (22) (23) (24) (25) According to an embodiment, As shown in FIGS. 7 and 17, in the CC mode, PWM7PF1V [the switching frequency is locked by the phase locked loop 1530. (26) and /„=·£_ αβ where γ is a constant. Combine equations 19 and 24, /〇 =-/71/ 2β r ν
Demag (27) 並且/ooc γ —根據另一實施例,通過根據等式26基於TDemag來調節Fsw,γ保持恒 定。例如,是等於或大於〇.25並且等於或小於0.75的常數。因此,只要 根據等式27將除了γ以外的^也控制為恒定的,則輸出電流1〇被保 m定。 例如,元件542根據初級繞組502的電感來鎖定開關頻率Fsw,並且 因此補償了初級繞組電感的變化。在又__示例中,使彼流(cc)模式中 p輪^電机Iout獨立於初級繞組電感。根據一實施例,如圖7和圖P所示, 竹ί器562來自作為疋件542 一部分的元件1520的信號1522,並且還向 元件542 一部分的鎖相環1530發送時鐘信號1532。 -邮^ 18疋不一出作為根據本發明實施例之開關模式電源變換系統500的 圖;之輸出電流(CC) _的元件542的某些設備的簡化示 該項例,其不齡不當地限㈣料·_範鳴。熟知 技術領域之人將認識到許多變體、替換和修改。 電荷包括脈衝拷貝電路162G、相位檢測請〇' 收來Ϊ元件1650。在—個實施例中,脈衝拷貝電路1620接 的彳遷以絲自時鐘分_〗⑽的時鐘信號祕,並且 34 201236345 產生信號1629。時鐘信號1614用CLK4表示,並且信號1629用瓜C表 示。例如,D2C信號是Demag信號的拷貝,但是與時鐘信號CLK4同步。 在另一實施例中,脈衝拷貝電路1620包括NAND (反及)閘1622、 M〇S電晶體1624和1626、以及電容器1628。例如,NAND閘1622接收 Dewcrg信號和時鐘信號1614,並且產生電壓信號瓜。如圖18所示電壓 仏號£>2控制MOS電晶體1624。例如,如果信號/)2為邏輯低位準,則 MOS電晶體1624通過電流铋對電容器1628充電。在另一示例中,如果 k號Z)2為邏輯高位準,則M〇s電晶體1626通過電流^654對電容器 1628放電根據一個實施例,緊鄰這樣的放電之前,電容器1幻8的電壓 反映了信號^低電壓位準時的脈寬。根據另一實施例,電流^等於電流 ”2彳1如彳„號£>2低電壓位準時的脈寬與信號02c高電厘位準時的脈寬 Hi在另一示例中,信號肌的上升邊緣與時鐘信號1614的下降邊緣 腿的^邊 ==細C的上概與由⑽細時鐘信號 的一 trir拷由貝作電為 之開關模式電源變換系統· 是1 產生號的簡化時序圖。該示圖僅僅 人將叫、識到许多變體、替換和修改。 片〜 為時树為BH1的函細時鐘域,波形表示作 為時間的函數的時鐘信號0⑽, 3 a表轉 ㈣表示作糊《,並且波形 如圖19所示,結果,D2 邊緣以及時鐘信號C⑽的下“二牛升邊緣與時鐘錢cm的下降 信號高電整位準時的脈寬與 厂此外’如圖19所示’Demag 參考㈣,信號1必從“時的脈寬相同。 高電驗準時的脈寬與時鐘㈣例如’ D觸發器1632將敗:信號 在一個實施例中,如果電壓位準時的脈寬相比較。 CXD低龍鲜時,高贿傅_脈寬大於時鐘信號 貝]Μ子處的信號I634為高電塵位準,並且 35 201236345 端子4的信號1636為低電壓位準。在另一實施例中,如果脱信號 间電2立準時的脈寬小於時鐘信號匸⑽低電壓位準時的脈寬,則q端子 處的域I634為低電壓位準,並且QN端子處的信號1636為高電壓位準。 如圖18所示,號1634和1636由電荷泉1640接收。電荷泵1640 包括電㈣1642 °例如’電容器1642回應於信號1634和脳而被充電 放電。在另—示例中’電容器1642的充電和放電觀來調整由/w表示 的電流信號1644。 ,,一實施例,電流信號1644由振盪器562接收,振盪器562產生 時鐘L號166G。例如’電流信號1644被用來調整振盈器562的偏置電流, 以調整時鐘信號1660的頻率。 ▲如上=述並在此進一步強調,圖7僅僅是示例,其不應當不當地限制 申請專利魏<#。熟知該項技術領域之人將認酬許多變體、替換和 修改。例如,如圖18所示,變換系統5⑻包括時鐘分頻器i6i〇,其接收 時鐘信號1660並且產生時鐘信號1612和1614。 ,根據一個實施例,時鐘信號1612的頻率是時鐘信號166〇的頻率的一 半。根據-實關,時鐘信號1612的鮮是時鐘錢1614的頻率的兩 倍大。例如’如圖19所示,時鐘信號1614 (即,時鐘信號匸⑽)的下 降邊緣與時鐘信號1612 (即,時鐘信號cz/:2)的下降邊緣同步。 返回圖18,時鐘信號1612和1614被輸出到元件542用於定流(cc) 控制。例如,如圖17所示的時鐘信號1532表示時鐘信號1612和1614。 在另不例中,儘管圖7和圖17未明確示出時鐘分頻器⑹〇,然而根據 一實施例’時鐘分頻器1610是變換系統500的一部分。 作為回應,元件542產生由振盈器562接收的電流信號1644。例如, 電流信號1644是如圖17所示的錢153心根據— 時鐘分頻器1610和元件542形成環路。 例如’該環路具有足夠高的增益。在另-示例中,在該環路變娜定 之後,時鐘信號16U的週期被鎖定為D瞻心號高驗位準時的脈^ 兩倍長。在-個實施例中,D_g信號高電壓位準時的脈寬與時鐘信號 1612 (即’時鐘信號C⑷)高電壓位準時的脈寬相同如圖19所示。在 36 201236345 ,_信號1612的週期等於—常數乘以信號高電壓 位準時的脈寬。例如,該常數等於Ι/γ.。 ,外’賴19所示並如上所述,根據本發_實關,伙啊信號 =麗位辦的脈寬與腹錢高糖立料的脈寬姻。耻,例如, 準時的脈寬與時鐘信以⑽高電準時的脈 同0 再次參相18’自校準電路_配置以校準錢㈣大小和電流l 的大小。例如,電流^的大小等於電流^的大小。 根據個實施例’如圖18所示,細呢信號和雜信號被饋 送=包括振盈器562、鐘分頻器161〇和元件542的環路。該環路調節時 鐘信號cm的頻率,以使得時鐘信號瓜2的頻率被鎖定到偏^信號 的頻率。例如’時鐘信號(;认2的頻率等於驅動信號548的開關頻率,如 等式26所示。 如上所述,在一個實施例中,輸出電流I〇ut由開關550截止時的初級 繞組502的峰值電流ip來確定。但是,峰值電流、可能由於控制電路的傳 播延遲而隨著AC輸入電壓(例如,圖7中的VAC)改變。例如,較高的 AC輸入電壓將產生較高的峰值電流Ip,反之亦然。因此,根據一個實施 例,無論輸入AC電壓如何,峰值電流ιρ都應當被精確控制在恒定位準。 圖20是示出作為根據本發明實施例之開關模式電源變換系統5〇〇的 一部分之用於電流感測(CS)峰值調整的元件540的某些設備的簡化示 圖。該示圖僅僅是示例,其不應當不當地限制申請專利範圍的範疇。熟知 該項技術領域之人將認識到許多變體、替換和修改。 如圖20所示’元件540包括高速比較器1810、電荷泵1820、動離間 值產生器1830以及過流保護(OCP)比較器1840。 在一個實施例中’高速比較器1810除了接收來自端子566 (即,端子 CS)的信號564之外’還接收Vth_oc。例如,流經初級繞組502的電流 被電阻器580感測,電阻器580的電阻用Rs表示。如圖7所示,其大小 由Is表示的電流582流經電阻器580,並且作為回應,電阻器58〇產生其 大小用Vcs表示的電壓信號564。在另一示例中,當開關550剛剛載止時, Vcs與Vth oc作比較。 37 201236345 在另一實施例中,高速比較器1810將Vth_oc與信號564相比較,並 產生比較信號1812。比較信號1812由OCP_det表示。例如,比較信號1812 由電荷泵1820接收。在另一示例中,電荷泵1820包括RS鎖存器1822和 電容器1824。在一個實施例中,RS鎖存器1822接收比較信號1812,並 且作為回應控制電容器1824的充電和放電。在另一實施例中,電容器1824 提供電壓信號1826,其由動態閾值產生器1830接收。 在又一實施例中’動態閾值產生器1830將電壓信號1826轉換為電流 信號。例如’轉換後的電流信號由電流鏡處理,該電流鏡產生動態電流信 號1832。動態電流信號1832用Iocp_PWM表示。在另一示例中,電流信 號1832由動態電阻器1834接收,動態電阻器1834由R2表示。在一個實 施例中,動態電阻器1834包括線性電阻器1836以及電晶體1838和1839。 例如’電晶體1838和1839提供與溫度有關的電阻補償。 在另一實施例中’動態電阻器1834將電流信號1832轉換為電壓信號 1835。電壓信號1835用OCP ref表示。例如,如果Vth oc在大小上小於 電壓信號564,則電壓信號1835將被動態閾值產生器1830調得較低。在 另一示例中,如果Vth__oc在大小上大於電壓信號564,則電壓信號1835 將被動態閾值產生器1830調得較高。 如圖20所示,電壓信號1835由過流保護(〇CP)比較器1840接收。 0CP比較器1840還接收來自端子566 (即,端子CS)的信號564。例如, OCP比較器1840將0CP一ref與信號564相比較,並且產生信號574。在 另一示例中’信號574由元件538接收,以調整初級繞組502的峰值電流。 如上所述,信號564例如由高速比較器1810與Vth_0C相比較,並 且由0CP比較器1840與〇CP_ref相比較。在一個實施例中,高速比較器 1810、電荷泵1820、動態閾值產生器1830、0CP比較器1840以及其它元 件开>成了具有高增益的環路。在另一實施例中,即使線電壓的改變導致信 號564的斜率的改變,初級繞組502的峰值電流也被維持在恒定位準。在 又一實施例中’即使PWM/PFM信號的傳播延遲改變,初級繞組5〇2的峰 值電流也被維持在恒定位準。 根據又一實施例’如圖20所示,比較信號1812被用來控制電荷泵 1820 ’以調節由〇CP_ref表示的電壓信號1835。例如,電壓信號ι835用 38 201236345 電壓的大小如何。因此’基於等式25 ’恒定的輸出電流例如為如 1 Vth oc 卜 ° ;m—f=— Rs 作OCP比較器1840的閾值電壓。結果,根據本發明某邊實施例,初級繞 組502的峰值電流被内部環調整為使得峰值電流等於,而不管線 2β " Rs (28) 在另-示例中’通過調整由Vwv表示的輸出信號514來控制輪出電壓 。因此,根據本發明一些實施例,可以分別在cv模式和cc模 得恒定電壓V。和恒定電流1〇。例如,CC模式可應用於為電池J 池的電壓達到預定大小為止。 直 _根據另-實關,-種毅調整電源變換器的系統(例如, 不)包括第-信號產生器(例如,如元件52〇所示),配置以至少 磁相關聯的第一輸出信號和於採樣相關聯的第u -輸出㈣。另外,該系統包括採樣元件(例如,如元件% :===和::輸罐’至少基於與第二輪出信號相關聯 至/接收第二輸.號和第-雖電壓並 第:輸出《,該電㈣触麵賴纽大ϋ。料 Ϊ生補:二如:件532所示)’配置以至讀收第四輸出信號並且至/ 號與耗合^源信號與第—感測信號的組合。第一感測信 電源變換器的輸出電流和^出繞^目關聯,並且次級繞組與該 出信號和第二:=!:第三輸出信號,並且至少基於與第-輸 系統包括用於至少調鎌㈣μ來至少產生第—控制舰。此外,該 例如,第二控制3|被配置3壓的第二控制器(例如,如元件534所示)。 出信號相關聯的少接收第四輸出信號並且至少基於與第四輸 和第三控制信號(例如號(例如,如信號558所示) 如,如元件562所示)°至,鶴統包括録器(例 少接收第一控制信號和第二控制信號並 39 201236345 二信號產生器(例如,如元件538所示), m μ收細5、第三控制信號和第四控制信號並且至少產生調 ("J" ^ ^ ^ 二至少將堪動信號輸出給開關。例如,該開關配置以 ===ΐ^:::級第—電流。此外,該系統包括第三 ) 至少調整峰值電流。例如,第三 經電源變換器的趣示例中’第二感測信號與流 以從^放括前向饋送元件(例如’如,68所示),配置 ^ _置_-輪出信號在大小上二預’ 恒定電流位準,並且在第四發Φ产缺+丄, 巧職出電流調整為 Τ定電_第:=:==^ 二咖蝴㈣號執行至 產生第二經採樣大大持該第-經採樣大小直到 個經採樣大小中的兩個。在又—示例中樣大小是一個或多 汹所示並且如圖7和圖1〇所示)還配置以結二如至=件 與第三輸出信號相關聯的資訊確定第三閾值電壓第==基於 ===;號並且至少基於與第三間值一信= 圖::二=調==(例如,如圖7和 入信號,採樣輸人«,並牛’配置以至少接收輸 第-輸出信號。例如,輸入信號 -繞組相關聯,並且次級繞組與電源變換器的輸出Ϊί==的第 另外’該系統包括誤差放大器(例如,如元==輪_有關。 收第-輸出信號和間值輸且通過用於環路穩定補償的電 201236345 並且產生第二輸出信號。例如,用於環路穩定補償的電路時 器。此外,該嫩括前向饋送元件(例如°射誤差放大 杻从结-认I 丨丁、丨~斯’如兀件568所不),配置以 /第ς輸出錢,並且至少基於娜三輸出親 ί If; ^ 少產生第一置=少接收第二輸出信號和第四輸出信號’並且至 所m 該系統包括信號產生器(例如,如元件538 不)HX至少接收第—控制信號並且 聯的資訊來至少產生調節信號侧驅動器(;:L=: :己=接收調節信號並且至少將驅動信號輸出給開關。例如,該:關 •置以影響丸_合到次級繞組的初級繞組的第一電流。 例^ ’該控制器(例如’如元件534所示)還配置以 在大小上小於預定值時將輪出電_整 」=戒 該系統還包括補償元件(例如,如元件532 =f位準在另一_令, :出==與第二_號相‘ 次級燒組職祕,u細嫩爛合到 根據又-實施例’―種用於調整Demag (27) and /ooc γ - According to another embodiment, by adjusting Fsw based on TDemag according to Equation 26, γ remains constant. For example, it is a constant equal to or greater than 25.25 and equal to or less than 0.75. Therefore, as long as the γ other than γ is also controlled to be constant according to Equation 27, the output current 1 〇 is fixed. For example, element 542 locks switching frequency Fsw based on the inductance of primary winding 502 and thus compensates for variations in primary winding inductance. In the yet __ example, the p-wheel motor Iout is made independent of the primary winding inductance in the cc mode. According to an embodiment, as shown in Figures 7 and P, the bamboo 562 is from the signal 1522 of the component 1520 that is part of the component 542, and also sends a clock signal 1532 to the phase locked loop 1530 of a portion of the component 542. - The mail is not shown as a diagram of a switch mode power conversion system 500 according to an embodiment of the present invention; a simplified example of some of the devices of the output current (CC)_ element 542, which is not aged Limit (four) material · _ Fan Ming. Those skilled in the art will recognize many variations, substitutions and modifications. The charge includes a pulse copy circuit 162G and a phase detection request 收 'receiving Ϊ element 1650. In one embodiment, the pulse copy circuit 1620 is connected to the clock signal from the clock segment _ (10), and 34 201236345 generates the signal 1629. Clock signal 1614 is represented by CLK4 and signal 1629 is represented by melon C. For example, the D2C signal is a copy of the Demag signal, but is synchronized with the clock signal CLK4. In another embodiment, pulse copy circuit 1620 includes NAND (reverse) gates 1622, M〇S transistors 1624 and 1626, and capacitors 1628. For example, NAND gate 1622 receives the Dewcrg signal and clock signal 1614 and generates a voltage signal melon. The voltage 仏#>2 controls the MOS transistor 1624 as shown in FIG. For example, if signal /) 2 is at a logic low level, MOS transistor 1624 charges capacitor 1628 via current 铋. In another example, if k number Z)2 is a logic high level, M〇s transistor 1626 discharges capacitor 1628 by current ^654. According to one embodiment, the voltage of capacitor 1 is reflected immediately before such discharge. The pulse width of the signal ^ low voltage level. According to another embodiment, the current ^ is equal to the pulse width Hi of the current "2" 1 such as 彳 号 > 2 low voltage level and the signal 02c high PCT level. In another example, the signal muscle The edge of the rising edge and the falling edge of the clock signal 1614 == the upper of the thin C and the (10) the fine clock signal of a trig copy of the switch mode power conversion system is a simplified timing diagram of the generation number . The diagram will only be called, and many variants, substitutions and modifications will be recognized. The slice ~ time tree is the BH1 function fine clock domain, the waveform represents the clock signal 0 (10) as a function of time, 3 a table turn (four) represents the paste, and the waveform is as shown in Figure 19, the result, the D2 edge and the clock signal C (10) The next "two cows rise the edge with the clock money cm down signal high-powered whole-time pulse width with the factory addition' as shown in Figure 19 'Demag reference (four), signal 1 must be the same from the "time pulse width." The pulse width of the high power check and the clock (4), for example, the 'D flip-flop 1632 will fail: the signal, in one embodiment, if the pulse width at the voltage level is compared. When CXD is low, the high bribe _ pulse width is greater than the clock signal. The signal I634 at the scorpion is high dust level, and 35 201236345 terminal 1 signal 1636 is the low voltage level. In another embodiment, if the pulse width of the off-signal 2 is less than the pulse width at the low voltage level of the clock signal 匸 (10), the domain I634 at the q terminal is a low voltage level, and the signal at the QN terminal 1636 is a high voltage level. As shown in Figure 18, numbers 1634 and 1636 are received by charge spring 1640. Charge pump 1640 includes an electrical (four) 1642 ° e.g., capacitor 1642 is charged and discharged in response to signal 1634 and 脳. In the other example, the charging and discharging views of the capacitor 1642 adjust the current signal 1644 represented by /w. In one embodiment, current signal 1644 is received by oscillator 562, and oscillator 562 generates clock L number 166G. For example, current signal 1644 is used to adjust the bias current of oscillator 562 to adjust the frequency of clock signal 1660. ▲ As mentioned above and further emphasized here, FIG. 7 is merely an example, which should not unduly restrict the application of patents. Those skilled in the art will recognize many variations, substitutions, and modifications. For example, as shown in Figure 18, transform system 5 (8) includes a clock divider i6i, which receives clock signal 1660 and generates clock signals 1612 and 1614. According to one embodiment, the frequency of the clock signal 1612 is one half of the frequency of the clock signal 166 。. According to the real off, the clock signal 1612 is twice as large as the clock 1614. For example, as shown in Fig. 19, the falling edge of the clock signal 1614 (i.e., the clock signal 匸(10)) is synchronized with the falling edge of the clock signal 1612 (i.e., the clock signal cz/: 2). Returning to Figure 18, clock signals 1612 and 1614 are output to element 542 for constant current (cc) control. For example, clock signal 1532 as shown in FIG. 17 represents clock signals 1612 and 1614. In the other examples, although the clock divider (6) is not explicitly shown in Figures 7 and 17, the clock divider 1610 is part of the conversion system 500 in accordance with an embodiment. In response, element 542 produces a current signal 1644 that is received by oscillator 562. For example, current signal 1644 is a money 153 core as shown in FIG. 17 - clock divider 1610 and element 542 form a loop. For example, the loop has a sufficiently high gain. In another example, after the loop has been set, the period of the clock signal 16U is locked twice as long as the pulse of the D-axis high level. In one embodiment, the pulse width at the high voltage level of the D_g signal is the same as the pulse width at the high voltage level of the clock signal 1612 (i.e., 'clock signal C(4)). At 36 201236345, the period of the _ signal 1612 is equal to the pulse width at which the constant is multiplied by the signal high voltage level. For example, the constant is equal to Ι/γ. , outside the Lai 19 and as described above, according to the hair _ real off, the gang signal = the pulse width of the office and the pulse of the high-sugar diet. Shame, for example, on-time pulse width and clock signal with (10) high-power on-time pulse with 0 again phased 18' self-calibration circuit _ configuration to calibrate money (four) size and current l size. For example, the magnitude of the current ^ is equal to the magnitude of the current ^. According to an embodiment, as shown in Fig. 18, the thin signal and the mixed signal are fed = a loop including the vibrator 562, the clock divider 161, and the element 542. The loop adjusts the frequency of the clock signal cm such that the frequency of the clock signal melon 2 is locked to the frequency of the offset signal. For example, the 'clock signal'; the frequency of the 2 is equal to the switching frequency of the drive signal 548, as shown in Equation 26. As described above, in one embodiment, the output current I〇ut is turned off by the primary winding 502 when the switch 550 is turned off. The peak current ip is determined. However, the peak current may vary with the AC input voltage (eg, VAC in Figure 7) due to the propagation delay of the control circuit. For example, a higher AC input voltage will produce a higher peak current. Ip, and vice versa. Therefore, according to one embodiment, the peak current ιρ should be accurately controlled at a constant level regardless of the input AC voltage. Fig. 20 is a diagram showing a switch mode power conversion system 5 as an embodiment of the present invention. A simplified illustration of some of the devices of element 540 for current sensing (CS) peak adjustment. This illustration is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions, and modifications. As shown in Figure 20, component 540 includes a high speed comparator 1810, a charge pump 1820, a moving distance generator 1830, and Stream Protection (OCP) Comparator 1840. In one embodiment, 'High Speed Comparator 1810' receives Vth_oc in addition to signal 564 from terminal 566 (i.e., terminal CS). For example, the current flowing through primary winding 502 is Resistor 580 senses that the resistance of resistor 580 is represented by Rs. As shown in Figure 7, current 582, whose magnitude is represented by Is, flows through resistor 580, and in response, resistor 58 produces its size in Vcs. Voltage signal 564. In another example, Vcs is compared to Vthoc when switch 550 is just being loaded. 37 201236345 In another embodiment, high speed comparator 1810 compares Vth_oc with signal 564 and produces a comparison signal 1812. Comparison signal 1812 is represented by OCP_det. For example, comparison signal 1812 is received by charge pump 1820. In another example, charge pump 1820 includes RS latch 1822 and capacitor 1824. In one embodiment, RS latch 1822 The comparison signal 1812 is received and in response to charging and discharging of the capacitor 1824. In another embodiment, the capacitor 1824 provides a voltage signal 1826 that is received by the dynamic threshold generator 1830. In one embodiment, the dynamic threshold generator 1830 converts the voltage signal 1826 into a current signal. For example, the 'converted current signal is processed by a current mirror that produces a dynamic current signal 1832. The dynamic current signal 1832 is represented by Iocp_PWM. In one example, current signal 1832 is received by dynamic resistor 1834 and dynamic resistor 1834 is represented by R2. In one embodiment, dynamic resistor 1834 includes linear resistor 1836 and transistors 1838 and 1839. For example, 'transistors 1838 and 1839 provide temperature dependent resistance compensation. In another embodiment, dynamic resistor 1834 converts current signal 1832 to voltage signal 1835. Voltage signal 1835 is represented by OCP ref. For example, if Vth oc is smaller than voltage signal 564 in size, voltage signal 1835 will be adjusted lower by dynamic threshold generator 1830. In another example, if Vth__oc is greater in magnitude than voltage signal 564, voltage signal 1835 will be adjusted higher by dynamic threshold generator 1830. As shown in FIG. 20, voltage signal 1835 is received by an overcurrent protection (〇CP) comparator 1840. The 0CP comparator 1840 also receives a signal 564 from terminal 566 (i.e., terminal CS). For example, OCP comparator 1840 compares 0CP-ref with signal 564 and produces signal 574. In another example, signal 574 is received by element 538 to adjust the peak current of primary winding 502. As noted above, signal 564 is compared, for example, by high speed comparator 1810 to Vth_0C, and is compared by ORCP comparator 1840 to 〇CP_ref. In one embodiment, high speed comparator 1810, charge pump 1820, dynamic threshold generator 1830, 0CP comparator 1840, and other components are turned into loops with high gain. In another embodiment, even if the change in line voltage causes a change in the slope of signal 564, the peak current of primary winding 502 is maintained at a constant level. In still another embodiment, the peak current of the primary winding 5 〇 2 is maintained at a constant level even if the propagation delay of the PWM/PFM signal changes. According to yet another embodiment, as shown in Figure 20, a comparison signal 1812 is used to control the charge pump 1820' to regulate the voltage signal 1835 represented by 〇CP_ref. For example, the voltage signal ι835 uses 38 201236345 voltage magnitude. Therefore, the output current constant based on Equation 25 is, for example, 1 Vth oc ο °; m - f = - Rs is the threshold voltage of the OCP comparator 1840. As a result, according to an embodiment of the invention, the peak current of the primary winding 502 is adjusted by the inner loop such that the peak current is equal to, without the pipeline 2β " Rs (28) in another example - by adjusting the output signal represented by Vwv 514 to control the wheeling voltage. Thus, in accordance with some embodiments of the present invention, a constant voltage V can be modeled in cv mode and cc, respectively. And a constant current of 1 〇. For example, the CC mode can be applied until the voltage of the battery J pool reaches a predetermined size. The system of adjusting the power converter (eg, not) includes a first-signal generator (eg, as shown by element 52A) configured to at least magnetically correlate the first output signal. And the u-output (four) associated with the sample. Additionally, the system includes sampling elements (eg, such as component %:=== and ::tank) based at least on the second round-out signal associated with the second round-out signal and the first-th voltage and the: output ", the electricity (four) touches the face of the New Zealand. It is expected to make up: two: as shown in Figure 532) 'Configure to read the fourth output signal and to / and the source signal and the first - sensing signal The combination. The output current of the first sense signal power converter is associated with the output, and the secondary winding and the output signal and the second:=!: third output signal, and at least based on the At least 镰 (4) μ to generate at least the first control ship. Additionally, for example, the second control 3| is configured with a second controller (e.g., as shown by element 534). The output signal associated with less receiving the fourth output signal and based at least on the fourth and third control signals (e.g., as indicated by signal 558), as indicated by element 562, (eg less receiving the first control signal and the second control signal and 39 201236345 two signal generators (eg, as indicated by element 538), m μ fine 5, third control signal, and fourth control signal and generating at least a tone ("J" ^ ^ ^ 2 at least output the signal to the switch. For example, the switch is configured with ===ΐ^::: level - current. In addition, the system includes a third) to adjust at least the peak current. For example, in the interesting example of the third power converter, the second sensing signal and the stream are arranged to feed forward elements (for example, as shown by 68), and the configuration is set to _-round the signal in size. The second pre-' constant current level, and in the fourth Φ production shortage + 丄, the skill output current is adjusted to Τ定电_第:=:==^ 二咖花(四)号 execution to produce the second sampled greatly Hold the first-sampling size up to two of the sampled sizes. In the example - in the example The sample size is one or more (as shown in FIG. 7 and FIG. 1B) and is further configured to determine the third threshold voltage by using information associated with the third output signal. ====== ; and at least based on the third value with a letter = map:: two = tune == (for example, as shown in Figure 7 and the incoming signal, the sample input «, and the cow's configuration to receive at least the output of the output signal. For example The input signal-winding is associated, and the secondary winding is connected to the output of the power converter Ϊί== the other 'the system includes an error amplifier (for example, as the element == wheel_). The first-output signal and the inter-valued input And through the electrical 201236345 for loop stabilization compensation and generating a second output signal. For example, a circuit timer for loop stabilization compensation. In addition, the tender forward feed element (for example, the amplitude error is amplified from the junction - I believe that I, 丨 斯 斯 兀 兀 兀 兀 兀 兀 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 568 Four output signals 'and to m the system includes a signal generator (eg, as component 5 38 No) The HX receives at least the first control signal and the associated information to generate at least the adjustment signal side driver (;: L =: : has = received the adjustment signal and at least outputs the drive signal to the switch. For example, the: off The first current that affects the primary winding of the secondary winding. Example ^ 'The controller (eg, as shown by element 534) is also configured to power out the wheel when the magnitude is less than a predetermined value. The system also includes compensating elements (eg, such as element 532 = f level in another _ order, : out == and second _ number phase ' secondary burn group secrets, u fine smashed to according to again - embodiment '- kind for adjustment
Ca) 14 (b) ? ^ 15 (a) ® 14 i如元件522所示),配置以至少接收‘°號,、: 號心誤差放Ϊί=一個或多個經採樣大小相關聯的第-輪出信 =號^值電壓並且通過電容器產生第二輪出信號,並且產生ϋΐ Μ ’該f容H_麵输魏M。 t輪出 =,如元件568所示),配置以接收第三輸出包 牛 =二輸出仏號相關聯的資訊產生第四輸出信號及控⑽二^與 產:::i,配此置:至少接收第二輸出信號和第四輸出信號,並且至: 產生控制Μ。此外,該系統包括補償元件 主> «第二_信號並且至少基於與第二輸=^^=’ 辟至少產生補餘號,輸人信號是補償信號與另—信號^組合。、- 201236345 =如第—輸^信號時電隸號,並且補償 ΓΓ1:該ί統還包括信號產生器(例如,如元件别所示),配置ϋ一 二J痛5號’並且至少基於與控制信號相關聯的資訊來至少產生w 以及_!!(例如,如元件546獅),_至少魏產^ 的初動信號輸出給開關,該開關配置以影響流經電源變換器 圖πΤ-又二制於雕電源㈣⑽祕(例如,如圖7和 拉认不上广*一信號產生器(例如,如元件520所示),配置以至+ 聯至少產生與退磁相關聯的第一輸出信號和與採樣相關 第^且相關聯,並且次級繞组與電源變換器的輸出電流和輸出電 系統包括採樣元件(例如,如元件522所示),配置以至少 =輪,並且至少產生與—個衫個經採樣大小糊聯的第三輸出 ^戒。此外,該系統包括第一控制器(例如,如元件542所示),用^至 =整,電流’該第—控制器配置以至少接收第—輸出信號和第三輸出 ϊί,少基於與第—輸出信號和第三輸出信號相關聯的資訊來至少 生第-控制信號。此外’該系統包括振蘆器(例如,如元件淑所 為ί少接收第—控制信號並且至少基於與第一控制信號相關聯的 "Α至>產生時鐘信號;以及第二信號產生器(例如,如元件538所示), 配置以至少接收時鐘信號和第二控繼號,並且至少基於與時鐘信號和第 二控制信號相關聯的資訊來至少產生調節信號。另外,該系統包括閑驅動 二缺!!如’如70件546所示)’配置以至少接收調節信號並且至少將驅動 出給Μ。例如’開關配置以影響流_合到次級繞組的初級敝 的第-電流。此外i該系統包括用於至少調整峰值電流的第三控制器(例 如元件540所示)’配置以至少接收感測信號和閾值電壓,並且將第 j制信號輸出給第二信號產生器(例如,如元件538所示)。例如,感 S二號麟輕換器的初級繞組的第—電流相關聯。瓣信號對應於 開關頻率,並且第一輸出信號對應於退磁脈衝寬度。 42 201236345 例如’開關頻率與退磁脈衝寬度成反比,開關週期與退磁脈衝寬度成 正比,並且輸出電流與峰值電流成比例。在另一示例中,峰值電流是恒定 並且輸出電流是恒定的。在另一示例中,在申請專利範圍帛項的 系統(例如’如圖7和圖17所示)中,第一控制器(例如,如元件542 所不)包括電壓到電流轉換器(例如’如元件151〇所示),配置以結束第 二輪出信號並且聲稱第二電流;鎖相環(例如,如播153()所示),配置 以至少接收第-輸出信號和時鐘信號並且產生第三電流;以及確定元件 (例如’如元件1520所示),配置以接收第二電流和第三電流,確定第二 電流和第三電流在大小上異,並且至少基於 關聯的資訊產生第一控制信號。 ^ 根據又-實關,-種胁機電源變鮮的純(例如,如圖7和 圖20所示)包括用於至少調整峰值電流的控制器(例如,如元件54〇所 不)。^】如,控制器配置以至少接收感測信號和第__信號並且至少產 生第-控繼號’並且細信號與流經電源變換⑽初級繞_第一電流 相關聯。另外’該系統包括信號產生器(例如,如元件5邛所示),配置 以至少接收第-控制信號並且至少產生調節信號;以及閘驅動器(例如, ^件546所示),配置以至少接收調節信號並且至少將驅動信號輸出給 開關。例如,該開關配置以影響第—電流。在另—示例中,該控制器(例 如,如元件540所示)包括第一比較器(例如,如元件_所示配置 以接收感聽餘第-_龍’並且至少基於賊測信號和第值電 壓相關聯的資訊產生比較信號;以及電荷泵(例如,如元件所示), 配置以接收比較信號並且至少基於與味錢侧聯的資訊來產生第二 控制信號。另外,該控制器(例如,如元件54〇所示)包括閾值產生器(例 如’如元件1830所示),配置以接收第二控制信號並且至少基於與第二控 制信號相關聯的資訊產生第二間值電壓;以及第二比較器(例如,如元^ 1840所示),西己置以接收第二閾值電壓和感測信號,並且至少基 閾值電壓和感測信號相關聯的資訊產生第一控制信號。 根據又_實施例,-種用於調整電源變換器的方法(例如,如 現的)包括由第一信號產生器(例如,如元件52〇所示)至少接收輸入信 號並且至少基於與輸人信號相關聯的資訊來至少產生與退磁相關聯的第 43 201236345 元==和〇採樣相關聯的第二輸出信號。另外,該方法包括通過採樣 少基於與第二輪:,)來至少接收輸入信號和第二輸出信號,至 個或多個哺絲雜輸人紐,並且至少產生與一 元件524所示)’小,關聯的第三輸出信號;通過誤差放大器(例如,如 ί:/]/、基來至乂接收第三輸出信號和第一閾值電壓並且通過電容器 =¾如該電容器被麵合到該誤差放大器。心 且至少基於與第四^出^件532所不)來至少接收第四輸出信號並 入信號是補你號與_的資訊來至少產生補償㈣。例如,輸 與搞合到電源“器的組合。在另—示例# ’第—感測信號 源變換器的輸出電q 的第—繞組相關聯,並且次級繞組與該電 調整輸出電流的第:關聯。另外,該方法包括通過用於至少 出信號和第三輸出信’如元件542所示)來至少接收第-輸 關聯的資訊來至少產生第 ' 二基於與第一輸出信號和第三輸出信號相 控制器(例如,it戶=;通過用於至編^ 與第四輸出信號相關聯的資^至少^2收並且至少基於 信號並且通過該振盈器g丨:__至少接收第一控制信號和第二控制 過第二信號產生器(例如,如元件=戶至少產生時鐘信號;通 控制信號和第四控制信號並且通過該第二ϋ號產生鐘信號、第三 所示)至少產生調節信號。另生15 (例如’如元件538 件546所示)來至少接收f ^ 過間驅動器(例如,如元 流經—繞:=== =她 的第三控制_如,如元件54^^接3=少調整峰值電流 :號考口第二間值_,並且將第四控制信號輸出匕控二感測 如,第二感測信號與流經電源變換器的初級繞組的第例 在另一示例令,該方法還包括通過前向饋送 :相關聯。 所示)來接收來自誤差放大器(例如,如元件5 (例如’如元件568 並且至少基於與第五輸出信號相關聯的資 :輸出信號’ 44 201236345 牛=4所示)輸出第六輸出信號。在又一示例中,該方法還包括在第四輸 出信號在大λ!、上大於預定辦將輸出t流調鹤恒定電流辦,並且在第 四輸出信號在大小上小於預定值時將輸出電壓調整為恒定電壓位準。在又 不例中’用於採樣輸人信號的處理包括在第_退磁時段結束時或者在接 近第-退磁時段結束時採樣輸入信號,產生與第一退磁時段相對應的第一 =採樣大小,在或者接近第二退磁_結束時採樣輸人信號,並且產生與 第,退磁時段相_的第二經採樣大小。第—經採樣大小和第二經採樣大 $疋一個或多個經採樣大小令的兩個。在又一示例中,用於至少產生第三 輸出信號的處理包括保持第—經採樣大小直到第― 止。在又一示例中,在該方法(例如,如圖7和圖1〇實現的)中用於 ^產生與退翻_的第-輸出信號和於採樣侧聯的第二輸出信號 定第三輸出信號,至少基於與第三輸出信號相關聯的資訊確 將第三閾值電壓與輸人信號在大小上進行比較,並且至 少土於,、第二閾值電壓和輸人信號相關聯的資訊產生第—輸出信號。 μ m實關…细於雕電輕換騎綠(例如,如圖7和 過採樣元件(例如,如元件522所示)來至少接收輸入信 i =信號至少雜合到電源變換器的次級繞組的第—繞組相關 人級繞組與電源變換器的輸出電流和輸出電壓有關。另外,該方 生i (例如’如元件522所示)對輸人信號採樣,至少產 哭吝μ ^ 接收第—輸出信號和間值電壓並且通過電容 該電容器被麵合到該誤差放大器。此外,該方s °祐、生第二輪出信號;通過前向饋送元件來接收第三輸出 ^於至少三輸出信號相關聯的資訊產生第四輸出信號;通 第二輸出2壓的控制器(例如,如元件534所示)來至少接收 信心第=於=二輸出信號和第四輸出 =二ΓΓ 538 所咖;二;== 與第控她仙_崎訊來物生聰細過嶋器(; 45 201236345 件546所不)來至少接收調節信號並且至少將驅動信號輸出給η 衫響流經耦合到次級繞組的初級繞組的第一電流。 汗 電壓:為:3=如2二輸^號在大小上小於預定值則將輪*Ca) 14 (b) ? ^ 15 (a) ® 14 i as shown in element 522), configured to receive at least '° number, , : centroid error Ϊ ί = one or more sampled size associated with - Turning the signal = the value of the voltage and generating a second round-out signal through the capacitor, and generating ϋΐ 该 'the f-H_face is sent to Wei M. t wheel out =, as shown in component 568), configured to receive the third output packet = two output nickname associated information to produce a fourth output signal and control (10) two ^ and production :::, with this: At least a second output signal and a fourth output signal are received, and to: generate a control chirp. Furthermore, the system comprises a compensating element master > second_signal and at least based on the second output =^^=' generating at least a remnant number, the input signal being a combination of the compensating signal and the other signal. , - 201236345 = as the first - input ^ signal when the electric code, and compensation ΓΓ 1: the system also includes the signal generator (for example, as shown in the component), the configuration of the first two J pain 5 ' and at least based on The information associated with the control signal is used to generate at least w and _!! (for example, as component 546 lion), and at least the initial signal of the Wei product is output to the switch, which is configured to affect the flow through the power converter diagram πΤ-two The sculpt power supply (4) (10) secret (for example, as shown in Figure 7 and the acknowledgment of a signal generator (e.g., as shown by element 520), configured to at least produce a first output signal associated with demagnetization and The samples are correlated and associated, and the output current and output electrical system of the secondary winding and power converter includes sampling elements (e.g., as shown by element 522) configured to at least = wheel and at least produce a shirt The third output of the sampled size is coupled. In addition, the system includes a first controller (eg, as shown by element 542), with ^ to = integer, current 'the first controller configured to receive at least the first - output signal and third output Ϊί, based on the information associated with the first output signal and the third output signal, at least the first control signal. In addition, the system includes a vibrator (for example, if the component is 接收 less receiving the first control signal and at least Generating a clock signal based on "Α> associated with the first control signal; and a second signal generator (e.g., as indicated by element 538) configured to receive at least the clock signal and the second control number, and at least At least an adjustment signal is generated based on information associated with the clock signal and the second control signal. Additionally, the system includes idle drive two!! as shown in '70 546' configuration to receive at least the adjustment signal and at least drive Output Μ. For example, the 'switch configuration to affect the flow-to-first current of the primary winding of the secondary winding. Further i the system includes a third controller (shown as component 540) for configuring at least the peak current' configuration Receiving at least the sensing signal and the threshold voltage, and outputting the jth signal to the second signal generator (eg, as shown by element 538). For example, the S-Spin converter The first current of the primary winding is associated. The lobes signal corresponds to the switching frequency, and the first output signal corresponds to the demagnetization pulse width. 42 201236345 For example, 'the switching frequency is inversely proportional to the demagnetization pulse width, the switching period is proportional to the demagnetization pulse width, and The output current is proportional to the peak current. In another example, the peak current is constant and the output current is constant. In another example, the system of the scope of the patent application (eg, as shown in Figures 7 and 17) The first controller (e.g., as element 542 does not) includes a voltage to current converter (e.g., as shown by element 151A) configured to end the second round out signal and claim the second current; phase locked loop (e.g., as shown by broadcast 153()), configured to receive at least a first output signal and a clock signal and to generate a third current; and a determining component (eg, as shown by element 1520) configured to receive the second current and The three currents determine that the second current and the third current are different in magnitude and generate the first control signal based on at least the associated information. ^ According to yet-real, the purity of the power supply (as shown in Figures 7 and 20) includes a controller for adjusting at least the peak current (e.g., as component 54 does not). For example, the controller is configured to receive at least the sensed signal and the __ signal and at least generate a first-control relay ' and the fine signal is associated with the power-transform (10) primary winding _ first current. Additionally, the system includes a signal generator (e.g., as shown by element 5A) configured to receive at least a first control signal and at least generate an adjustment signal; and a gate driver (e.g., as shown in FIG. 546) configured to receive at least The signal is adjusted and at least the drive signal is output to the switch. For example, the switch is configured to affect the first current. In another example, the controller (eg, as shown by element 540) includes a first comparator (eg, as shown in component _ to receive the sensation -_dragon) and based at least on the thief signal and The value voltage associated information produces a comparison signal; and a charge pump (eg, as shown by the component) configured to receive the comparison signal and generate a second control signal based at least on information associated with the money. In addition, the controller ( For example, as shown by element 54A) includes a threshold generator (eg, as shown by element 1830) configured to receive a second control signal and to generate a second inter-value voltage based on at least information associated with the second control signal; A second comparator (eg, as shown in FIG. 1840) is set to receive the second threshold voltage and the sensed signal, and at least the base threshold voltage and the information associated with the sensed signal generate a first control signal. An embodiment, a method for adjusting a power converter (eg, as present) includes receiving at least an input signal by a first signal generator (eg, as indicated by element 52A) and Generating at least a fourth output signal associated with the demagnetization of the 43rd 201236345 == and 〇 sampling based on at least information associated with the input signal. Additionally, the method includes sampling based on less than the second round: Receiving at least an input signal and a second output signal, to one or more of the wires, and generating at least a small, associated third output signal as shown by a component 524; passing through an error amplifier (eg, For example, ί: /] /, the base output 乂 receives the third output signal and the first threshold voltage and is passed through the capacitor = 3⁄4 as the capacitor is faceted to the error amplifier. At least based on the fourth IGBT 532 No) to receive at least the fourth output signal is incorporated into the signal to supplement your number and _ to generate at least compensation (4). For example, the combination of the input and the power supply is combined with the first winding of the output electric q of the sensing source converter, and the secondary winding and the electric current of the output current are adjusted. In addition, the method includes at least generating the second-based and first output signals and the third by receiving at least the first-input associated information by using at least the outgoing signal and the third output signal 'as indicated by element 542. Outputting a signal phase controller (eg, it is =; by means of at least 2) associated with the fourth output signal and at least based on the signal and passing the vibrator g丨: __ at least a control signal and a second control second signal generator (eg, such as component = household generating at least a clock signal; a pass control signal and a fourth control signal and generating a clock signal through the second apostrophe, third)) An adjustment signal is generated. Another 15 (eg, as shown in element 538, 546) to receive at least the f ^ inter-driver (eg, such as a cell flow-winding: === = her third control), such as a component 54^^接3=less adjustment of peak current: number test The second value of the port is _, and the fourth control signal is outputted by the second sensing, for example, the second sensing signal and the first example of the primary winding flowing through the power converter are in another example, the method further includes To feed: associated. shown) to receive from an error amplifier (eg, as component 5 (eg, 'as element 568 and based at least on the associated with the fifth output signal: output signal' 44 201236345 牛 = 4) Outputting a sixth output signal. In still another example, the method further includes: when the fourth output signal is greater than a predetermined value, the output current is greater than a predetermined value, and the fourth output signal is smaller in magnitude. The output voltage is adjusted to a constant voltage level at a predetermined value. In another example, the process for sampling the input signal includes sampling the input signal at the end of the _ demagnetization period or near the end of the first demagnetization period, resulting in The first = sampling size corresponding to the first demagnetization period, sampling the input signal at or near the end of the second demagnetization_, and generating a second sampled size that is _ with the demagnetization period. The sample size and the second sampled are larger than two of the one or more sampled size orders. In yet another example, the process for generating at least the third output signal includes maintaining the first sampled size until the first stop. In yet another example, in the method (eg, as implemented in FIGS. 7 and 1B), a third output for generating a first output signal with a rollback _ and a second output signal for a sample side The signal, based at least on the information associated with the third output signal, determines that the third threshold voltage is compared in magnitude to the input signal, and wherein at least the second threshold voltage and the information associated with the input signal are generated. Output signal. μ m real-off... finer than eagle-lighting (eg, as shown in Figure 7 and oversampling components (eg, as shown in element 522) to receive at least the input signal i = signal at least hybrid to the power converter The first winding-related human winding of the secondary winding is related to the output current and output voltage of the power converter. In addition, the controller i (e.g., as indicated by element 522) samples the input signal, producing at least the output signal and the inter-value voltage and is coupled to the error amplifier by the capacitor. In addition, the party s ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ (For example, as shown by element 534) to receive at least confidence = = = two output signals and fourth output = two 538 café; two; = = with the control of her immortal _ 崎 信 物 物 聪 聪The device (4, 2012, 363, 445, 546) does not receive the adjustment signal and outputs at least the drive signal to the first current flowing through the primary winding coupled to the secondary winding. Sweat voltage: is: 3 = such as 2 two lose ^ number in the size is less than the predetermined value will be round *
如元件532所示)來至少接收第二輸出信號,並且至少基於與第J if日目Γ”訊產生補償信號。輸人信號時補償信號與感測信號二 ° 感州5號至少與耗合到次級繞組的第-繞組相關聯。 ^據又-實施例,—種用於調整電源變換器的方 ==Μ⑻或者_ 7、圖15 (a)和圖15⑻所示。該方法^ 樣ΐ小相關聯的第—輸出信號。另外,該方法包括通過誤差放ί 少基於與第一少接收第一輸出信號和間罐並且至 輪出n *,°號和職電壓相關聯的資訊來通過電容11產生第二 :輪出 ϋ少基於與第—輸出信號和閾值電塵相關聯的資訊產生第 容器_合到該誤差放大器。另外,該方法包括通過^ 於與第二給屮如70件568所示)來接收第三輸出信號’並且至少基 *元件通過控制器(例如, 外,IS: 號相關聯的資訊來至少產生控制信號。此 輪出信號並如元件532所示)來至少接收第二 號,輸入仲‘ϋ —11幻§號相關聯的資訊來至少產生補償信 鞠入l唬疋補償信號與另一信號的組合。 例如’第二輸出信號時電壓信號,並頭 過==訊來至少產生調節信號,通 驅動彳古號輪出仏伽 丁)來至接收調節信號,並且至少將 ‘櫨又::經電源變換器的初級繞組的電流。 圖17實現的)包^過—第種電源_的方法(例如,如圖7和 貫兒的)包括通過第-錢產生器(例如,如元件52〇所示)來至 46 201236345 ,號°例如’輸人信號至少與轉合到電_換器的次級繞_ 關。另ί ΐ聯’並且次級繞組與電源變換器的輸出電流和輸出電壓有 〜方法包括至少基於與輸入信號相關聯的資訊來至少連4泡 (:,輪_繼__^細m;通過採樣元件 於與第二輸Hi2所示)來至少接收輸入信號和第二輸出信號,至少基 多個經關聯的資訊來採樣輸入信號’並且至少產生與-個或 調整輸出ί2關聯的第三輸出信號。此外,該方法包括通過用於至少 出信號和第如元件542所示)來至少接收第-輸 少基於與第—輸出信號和·三輸出«相 貧絲至v產生第一控制信號;通過振I器(例如,如元 :至少控制,並且至少基於與第一控 铲H = 接收時鐘信號和第二控制信號,並且至少基於與時 ,°第了控制信號侧聯的資訊來至少產生調節信號;通過閘驅動器 ::以影響流經到次級繞組的初咖^ f通過用於至少調整峰值電流的第三控制器(例如’如元件540=t 信號和閾值電壓,並且將第二控制信號輸出給第二信= 的m關所不)。感測信號與流經電源變換器的初級繞組 __於_率,獻第—_號對應於 正比例:另=與:=!=並且輸出電流與峰 1Jr #值電机疋定的’並且輸出電流是恒定的0 在又-示财,例如由圖7和圖17所示,用於 =理,過電壓到電流轉換器(例如,如元件151。所= 一出《’至少基於與第三輸出信號相關聯的資訊產 1530::^ = 八;輸出域和時鐘信號相關聯的資訊產生第:電 如元件測所示)來接收第二電流和第三電流,並且至少基;^如電 201236345 流^三電流«聯的資訊產生第___信號,該確定元件配置以確 一電流和第二電流在大小上的差異。 ® 7 ,〇 圖20所不)包括通過用於至少調整峰值電流的控制器(例如,如 所示)來至少接收感測信號和第一閾值信號。例如,感測 變級繞組的第-電流相關聯。另外, 第-閾值電壓相關聯的資訊來至少產生第—控制信號;通過信號產】 ^⑷如’如元件5料示)來至少接收第_控制信號並且至少基 2一控制信號糊聯的資訊來至少產生靖信號;通過難動器(例如,、 如凡件546所示)來至少接收調節信號並且至少將驅動传 ,響第-電流。用於至少產生第一控制信號的處理包括;過第一二】 ^例如’如元件刪所示)來接收_雜和第—曝糕,並且 基=感測信號和第-閾值電壓相_的資訊產生比較信號;通過電荷果 (例如,如讀1820所示)來接·較信號並且至少基齡 關聯的資訊來產生第二控制信號;通過閾值產生器(例如,'如元件^As shown in element 532), at least the second output signal is received, and the compensation signal is generated based on at least the information of the J if date. The compensation signal and the sensing signal are at least incompatible with the sensing signal. Corresponding to the first winding of the secondary winding. According to yet another embodiment, the square for adjusting the power converter ==Μ(8) or _ 7, Figure 15 (a) and Figure 15 (8). In addition, the associated first-output signal. In addition, the method includes the error-based feedback based on information associated with the first less received first output signal and the inter-tank and the round-up n*, ° number and the duty voltage. Generating a second through the capacitor 11: the round-out reduction generates a first container based on the information associated with the first output signal and the threshold dust to the error amplifier. Additionally, the method includes passing the second supply such as 70 The component 568 is shown to receive the third output signal 'and at least the base* component generates at least a control signal via the controller (eg, the IS:number associated information. This rounds the signal and is shown as component 532) At least receive the second number, enter the secondary 'ϋ -11 幻§ The associated information is used to generate at least a compensation signal and a combination of the compensation signal and another signal. For example, the voltage signal of the second output signal, and the first pass == signal to generate at least the adjustment signal, Turning out the 仏 丁 )) to receive the adjustment signal, and at least the '栌:: the current through the primary winding of the power converter. Figure 17 is implemented by the method of the first power supply _ (for example, as shown 7) and through the money generator (for example, as shown by element 52 来) to 46 201236345, number ° such as 'input signal at least with the turn to the electric _ converter secondary winding _ off The method of outputting the output current and the output voltage of the secondary winding and the power converter has a method comprising at least four bubbles based on at least information associated with the input signal (:, round_following __^ fine m; Receiving at least the input signal and the second output signal by the sampling element and the second input Hi2), sampling the input signal at least based on the plurality of associated information and generating at least a third associated with the adjusted output ί2 Output signal. In addition, the method Included by at least the outgoing signal and the first component 542 to receive at least the first-input-based and the first-output signal and the third-output «the lean line to v to generate the first control signal; , such as: at least controlling, and based at least on the first control shovel H = receiving the clock signal and the second control signal, and based at least on the information associated with the second control signal to generate at least the adjustment signal; through the gate driver :: to affect the flow through to the secondary winding through a third controller for at least adjusting the peak current (eg 'as component 540 = t signal and threshold voltage, and output the second control signal to the second The signal is not related to the signal. The sense signal flows through the primary winding of the power converter __ at the _ rate, and the _ number corresponds to the proportional: another = and: =! = and the output current and the peak 1Jr # The value motor is set to 'and the output current is constant 0. In addition, it is shown in FIG. 7 and FIG. 17, for the sense, overvoltage to current converter (eg, as element 151). = = "At least based on the information output associated with the third output signal 1530::^ = eight; the output field and the clock signal associated with the information generated by: electricity as measured by the component) to receive the second current and The third current, and at least the base; the information such as the current 201236345 flow ^ three currents « generates a ___ signal, the determining component is configured to determine the difference in magnitude between the current and the second current. ® 7 , 〇 Figure 20 does not include receiving at least the sensed signal and the first threshold signal by a controller (e.g., as shown) for adjusting at least the peak current. For example, sensing the first current associated with the variable winding. In addition, the information associated with the first threshold voltage is used to generate at least a first control signal; the signal is generated by a signal ^ ^ (4) such as "as indicated by component 5" to receive at least the first control signal and at least the base 2 - control signal paste information At least a signal is generated; at least the adjustment signal is received by the hard disk (e.g., as shown by item 546) and at least the drive is transmitted to the first current. The processing for generating at least the first control signal includes: passing the first two] ^, for example, as indicated by the component deletion, to receive the _heterogeneous and the first-exposure cake, and the base=sensing signal and the first-threshold voltage phase _ The information produces a comparison signal; the second control signal is generated by the charge fruit (eg, as shown in read 1820) to correlate the signal and at least the age-related information; by a threshold generator (eg, 'such as component ^
If-二控制信號並且至少基於與第二控制信號相關聯的資訊產 生第一閾值電壓;通過第二比較器(例如,如元件所示)來接 號並且至少基於與第二間值電壓和感測信號相關聯 與傳統技術她’通過本發爾得了許多祕 的電的某些實施例可以簡化開關模式返赋電源變換器中 的電路4。本發明的一些實施例提供了初級側感測和調整方案。例如, 轉可以改善負載調整。在另一示例中,初級側感測和 贼绝組電感變化以便在採用初級側調整的返馳式變 換斋中獲^^的輸出電流。本發_某些實猶彳可以在c 不隨著初級繞組電感的改變而改變的恒定輸出電流。 ./、 參考等式8 ’如果N為常數’為了使工。保持恒定,也應當使 I 1/ Ύ1An If-two control signal and generating a first threshold voltage based on at least information associated with the second control signal; receiving a number by a second comparator (eg, as indicated by the component) and based at least on the voltage and sense of the second value Detecting Signal Correlation and Conventional Techniques Some embodiments of the power that has been obtained by Benfair can simplify the circuit 4 in a switched mode return-to-power converter. Some embodiments of the present invention provide a primary side sensing and adjustment scheme. For example, turn can improve load adjustment. In another example, the primary side sense and the thief set inductance change to obtain an output current in the flyback type of the primary side adjustment. This is a constant output current that c can change without changing the inductance of the primary winding. ./, refer to Equation 8 ' if N is constant' in order to work. Keep it constant and should also make I 1/ Ύ1
•X•X
T J〇 R J^dt S保持恒定。由於Rs是常數,因此至少存在如下方法來使 48 201236345 保持恒定: (a) 使Ves_pk保持恒定並且使1^_保持恒定; (b) 使匕保持恒定並且保持恒定;或者 使7χί匕―沐保持恒定並i^Ts保持恒定; 本發明的某些實施繼用上_方法⑷、⑻或(e)’來實現定流 (CC)模式,其中,輸出電流被維持在恒定位準,而不管初級繞組、次級 繞組和輔助繞組的電感水準和輸出電壓如何。 圖21是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 電源變換系統2100包括初級繞組211〇、次級繞組2112、輔助繞組 2114、電阻器2120、2122和2124、開關2130、退磁檢測元件2150、電流 源2160、電流槽2162、開關2164和2166、NOT (非)閘2170、電容器 2172、比較器2180和2182、觸發器元件2190、以及驅動元件2192。例如, 退磁檢測元件2150 ’電流源2160、電流槽2162、開關2164和2166、NOT 閘2170、電容器2172、比較器2180和2182、觸發器元件2190、以及驅 動元件2192位於晶片2140上。在另一示例中,晶片2140至少包括端子 2142、2144和2146。在又一示例中,系統2100是開關模式返驰式電源變 換系統。 如上面討論並且在此強調的,圖21僅僅是示例,其不應當不當地限 制申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換 和修改。例如’上升邊緣遮沒(leading_e(jgeblanking)元件被***在端子 2146與比較器2180之間,並且所***的上升邊緣遮沒元件接收來自端子 2146的信號並且將信號2147輸出到比較器218〇。 圖22是作為根據本發明實施例之開關模式電源變換系統2100 —部分 的退磁檢測元件2150的簡化示圖。該示圖僅僅是示例,其不應當不當地 限制申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替 換和修改。該退磁檢測元件2150包括比較器2210、觸發器元件2220和 2222、NOT 閑 2230 和 2232、以及 AND 閘 2240。 49 201236345 圖23是根據本發明實施例包括如圖 ⑽的開關模式電源變換系統21〇 ^圖22,的退磁檢測元件 其不應當不當地限制帽專利範_範僅是示例, 到許多變體、替換和修改。 冑以柄技術領域之人將認識 :::=rr 信號2185,_=:== 如,ϋ 觸表示作為時間的函數的感測信號2147 (例 如圖21和23所示,當驅動信號2193 (對應於波形235〇 雷Γ ^通並且因此被閉合上。根據一個實施例,流經初級 H 2111線性地傾斜上升,並且信號2147 (例如也線 生地傾斜上升。例如,信號2147 (例如Ves)由比較器2⑽接收,比較器 」80還接收閾值信號2181 (例如D。在另一示例中,比較器测將 ^號2147 (例如Ves)與閾值信號2181 (例如d ^目比較,並且將比較 城2187輸出給觸發11元件219G。在-個實施例中,觸發H元件2190還 接收來自比較器2182的控制信號2185,並且產生調節信號2191。在另一 實施例中,調節信號2191由驅動H元件2192接收,作鱗應,驅動器元 件2192產生驅動信號2193。 如波形2350和2360所示的,如果信號2147 (例如Ves)在大小上達 到閾值信號2181 (例如Vth()e),則驅動信號2193從邏輯高位準變為邏輯低 位準,並且開關2130截止並且因此被斷開。例如,當開關2130截止時, 所儲存的能量被遞送給電源變換系統2100的輸出,並且退磁處理開始。 在另一示例中,在退磁處理期間,流經初級繞組2112的電流線性地傾斜 下降。 如圖21所示,輔助繞組2114的輸出電壓(例如,Vaux)反映了電源 變換系統2100的輸出電壓(例如,V。)’並且被電阻器2120和2122轉換 為回饋信號2143 (例如,vFB)。例如,回饋信號2143 (例如,vFB)由作 為退磁檢測元件2150 —部分的比較器2210接收。在另一示例中,比較器 50 201236345 Z將咖⑽(例如,Vfb)與__(例如铺)相比 如波形231〇* 2320所示,當回饋信號2143 (例如 ’(πν)以上時,D_g信號2151變為邏輯古 退磁處理的開始。此外,信號2143 ^ 值信號2211 (例如,〇 lv)以下拄n ^ ^ vfb)下降到閾 好干退祕舰B 纟減151縣_低位準, ,才二退磁處理的結束。例如,當流經次級繞組2ιΐ2的電流 為零時’退磁處理結束。在另一示例中,.艰磁虎神处土 糸绩2100 14入扯在退磁處理名。束之後,電源變換 系統2100从雜域狀態,並且_錄21 波形2310)近似為正弦波。 VFB)(對應於 如圖21所tf ’ Demag ^號2151由開關2166和NOT閘2170接收, 閘217〇作為回應將信號則輸出給開關2164。例如,如果仏 信號2151為邏輯高鱗,賴關2164斷開並且關遍閉合。因此, 根據-個實施例’電容器2172通過電流槽2162被放電,並且斜坡信號挪 ^列如’ W雜地獨。在另-補巾,如果仏臂信號則為邏 輯低位準,則開關2164閉合並且開關2166斷開。因此,根據另一實施例, 電容器2172通過電流源2160被充電,並且斜坡信號2165 線性地上升。 ramp) 根據又-實施例,斜坡信號2165 (例如,V,)由比較器2182接收, 比較器2182還接收閣值信號2183 (例如,Vref)。例如,比較器2182將斜 坡信號2165 (例如,Vramp)與閾值信號2183 (例如,I)相比較,並且 向觸發器元件2190輸出控制信號2185。如波形233〇和235〇所示,如果 斜坡彳έ號2165 (例如,Vramp)在大小上達到閾值信號2183 (例如,ν^), 則驅動信號2193從邏輯低位準變為邏輯高位準,並且開關213〇導通e。 如圖21、22和23所示,例如,電源變換系統21〇〇的開關週期如下:T J〇 R J^dt S remains constant. Since Rs is a constant, there are at least the following methods to keep 48 201236345 constant: (a) keep Ves_pk constant and keep 1^_ constant; (b) keep 匕 constant and keep constant; or keep 7χί匕-mu Constant and i^Ts remain constant; some implementations of the invention follow the above method (4), (8) or (e)' to implement a constant current (CC) mode in which the output current is maintained at a constant level, regardless of the primary The inductance level and output voltage of the winding, secondary winding and auxiliary winding. 21 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. The power conversion system 2100 includes a primary winding 211 〇, a secondary winding 2112, an auxiliary winding 2114, resistors 2120, 2122, and 2124, a switch 2130, a demagnetization detecting element 2150, a current source 2160, a current tank 2162, switches 2164 and 2166, and a NOT ( Non) gate 2170, capacitor 2172, comparators 2180 and 2182, flip-flop element 2190, and drive element 2192. For example, demagnetization detecting element 2150' current source 2160, current sink 2162, switches 2164 and 2166, NOT gate 2170, capacitor 2172, comparators 2180 and 2182, flip-flop element 2190, and drive element 2192 are located on wafer 2140. In another example, wafer 2140 includes at least terminals 2142, 2144, and 2146. In yet another example, system 2100 is a switch mode flyback power conversion system. As discussed above and emphasized herein, Figure 21 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, a leading edge masking element is inserted between the terminal 2146 and the comparator 2180, and the inserted rising edge masking element receives the signal from the terminal 2146 and outputs the signal 2147 to the comparator 218A. Figure 22 is a simplified diagram of a demagnetization detecting element 2150 as part of a switched mode power conversion system 2100 in accordance with an embodiment of the present invention. This illustration is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions, and modifications. The demagnetization detecting element 2150 includes a comparator 2210, flip-flop elements 2220 and 2222, NOT idle 2230 and 2232, and an AND gate 2240. 49 201236345 Figure 23 is based on this Embodiments of the invention include the switch mode power conversion system 21 of Fig. (10), the demagnetization detecting element of which should not unduly limit the cap patent, which is merely an example, to many variations, alternatives, and modifications. Those skilled in the art will recognize:::=rr signal 2185, _=:== eg, the touch represents the sensed signal 2147 as a function of time (eg Figure 2 1 and 23, when the drive signal 2193 (corresponding to the waveform 235 〇 并且 并且 and thus closed). According to one embodiment, the flow through the primary H 2111 linearly ramps up, and the signal 2147 (eg, also obliquely For example, signal 2147 (eg, Ves) is received by comparator 2 (10), and comparator "80" also receives threshold signal 2181 (eg, D. In another example, comparator measures ^ 2147 (eg, Ves) with threshold signal 2181 (For example, d^ compares, and compares the city 2187 to the trigger 11 element 219G. In an embodiment, the trigger H element 2190 also receives the control signal 2185 from the comparator 2182 and generates the adjustment signal 2191. In an embodiment, the adjustment signal 2191 is received by the drive H element 2192, and the driver element 2192 generates a drive signal 2193. As shown by waveforms 2350 and 2360, if the signal 2147 (eg, Ves) reaches the threshold signal 2181 in size ( For example, Vth()e), the drive signal 2193 changes from a logic high level to a logic low level, and the switch 2130 is turned off and thus turned off. For example, when the switch 2130 is turned off, the stored energy is The output is delivered to the power conversion system 2100, and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the primary winding 2112 linearly ramps down. As shown in Figure 21, the output voltage of the auxiliary winding 2114 ( For example, Vaux) reflects the output voltage of the power conversion system 2100 (eg, V. And is converted by the resistors 2120 and 2122 into a feedback signal 2143 (e.g., vFB). For example, feedback signal 2143 (e.g., vFB) is received by comparator 2210, which is part of demagnetization detecting element 2150. In another example, comparator 50 201236345 Z compares coffee (10) (eg, Vfb) to __ (eg, paved) as shown by waveform 231〇* 2320, when feedback signal 2143 (eg, '(πν) or more, D_g The signal 2151 becomes the beginning of the logical ancient demagnetization process. In addition, the signal 2143 ^ value signal 2211 (for example, 〇 lv) below 拄n ^ ^ vfb) falls to the threshold of good retreat, the secret ship B minus 151 counts _ low level, Only the end of the demagnetization process. For example, when the current flowing through the secondary winding 2 ι 2 is zero, the demagnetization process ends. In another example, the Hard Tigers landed 2100 14 into the demagnetization process name. After the beam, the power conversion system 2100 is from a hetero-domain state, and the _record 21 waveform 2310) is approximately a sine wave. VFB) (corresponding to tf 'Demag ^ No. 2151 as shown in Fig. 21 is received by the switch 2166 and the NOT gate 2170, and the gate 217〇 is output as a response to the switch 2164. For example, if the chirp signal 2151 is a logic high scale, 2164 is turned off and turned off. Therefore, according to the embodiment, the capacitor 2172 is discharged through the current slot 2162, and the ramp signal is sorted as if it is a separate source. In the other, if the arm signal is The logic low level, then switch 2164 is closed and switch 2166 is open. Thus, according to another embodiment, capacitor 2172 is charged by current source 2160 and ramp signal 2165 rises linearly. ramp) According to yet another embodiment, ramp signal 2165 (e.g., V,) is received by comparator 2182, which also receives a threshold signal 2183 (e.g., Vref). For example, comparator 2182 compares ramp signal 2165 (e.g., Vramp) to threshold signal 2183 (e.g., I) and outputs control signal 2185 to flip-flop component 2190. As shown by waveforms 233A and 235A, if ramp nick 2165 (eg, Vramp) reaches threshold signal 2183 (eg, ν^) in size, drive signal 2193 changes from a logic low level to a logic high level, and The switch 213 turns on e. As shown in FIGS. 21, 22 and 23, for example, the switching cycle of the power conversion system 21A is as follows:
Ts =Ts =
(29) 其中,Ts表示開關週期,並且TDemag表示退磁處理的持續時間。^表 示電流源2160的充電電流的大小’並且1】表示電流槽2162的放電電流的 大小。 51 (30) 201236345 在一個實施例中,如果(29) where Ts represents the switching period and TDemag represents the duration of the demagnetization process. ^ indicates the magnitude of the charging current of the current source 2160' and 1] indicates the magnitude of the discharge current of the current sink 2162. 51 (30) 201236345 In one embodiment, if
Ks—pk=Vth〇c 則7〆·!^ 彳而信號214川物Ves)的峰值,並且Vt-表示r ^ g ' ,、。另外,Ip表不流經初級繞組2110的電流2111的峰值, 與-欠二2124的電阻值。在另—實施例中,假設初級繞組2110 與-人級繞組2U2之間的效率為!,則輸出電流為: τ -χΝχΙηχ^!Ά 2 P TsKs_pk=Vth〇c then 7〆·!^ 彳 and signal 214 Sichuan Ves), and Vt- denotes r ^ g ' , . In addition, Ip represents the peak value of the current 2111 flowing through the primary winding 2110, and the resistance value of the -2 2124. In another embodiment, it is assumed that the efficiency between the primary winding 2110 and the human winding 2U2 is! , the output current is: τ -χΝχΙηχ^!Ά 2 P Ts
. 1 T (32) 之中’〗°表讀出電流’並且N表示初級繞組211G與次級繞組2112 之間的比。利用等式29和31,等式32變為: ’。= — X ——-X Yj^oc 2 7〇+/. K (33) 恒定!1如’基於等式33,由於11,12,^11〇<:和心為常數,因此輸出電流1。是 掊=。在另一示例中’電源變換系統2100意圖使和%^兩者保 寻la疋,以便使輸出電流1〇保持恒定。 7; 圖24是根據本發明另一實施例之具有初級側感測和調整的開關模式 袁^換祕的簡化賴。該相僅僅是示例,其不應當不當地限制申請 ^範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 開關模式電源變換系統2400包括以下元件: 少 用於產± Demcfg信號和Scmphng dk信號的元件2420 ; 用於採樣和保持一個或多個信號的元件2422 ; 用於產生PWM/PFM調節信號的元件2438 ; 用於電流感測(CS)峰值調整的元件2440 ; 用於產生閘驅動信號的元件2446 ; 振盪器2462 ; 電壓到電流轉換器2510 ; 用於確定兩個輸入信號在大小上的差異的元件252〇 ; 時鐘分頻器2610 ; 52 201236345 • 脈衝拷貝電路2620 ;以及 • 相位檢測器和電荷泵2635。 在一個實施例中,元件2420、2422、2438、2440和2446、振盈器2462、 電壓到電流轉換器2510、元件2520、時鐘分頻器2610、脈衝拷貝電路 2620、以及相位檢測器和電荷泵2635位於晶片2490上。例如,晶片249〇 至少包括端子2416、2452和2466。 儘管上面利用所選出之用於系統2400的一組元件進行了示出,然而 還可以存在許多替代、修改和變體。例如,元件中的一些可被擴展和/戋組 合。在另一示例中,上升邊緣遮沒元件被***在端子2466與元件244〇之 間,並且所***的上升邊緣遮沒元件接收來自端子2466的信號並且將信 號2464輸出給元件2440。取決於實施例,元件的排列可以與被替換的& 它元件互換。這些元件的進一步細節可在本說明書中找到。 例如’開關模式電源變換系統2400與開關模式電源變換系統5〇〇相 同。在另一示例中,晶片2490與晶片590相同。在又一示例中,端子2416、 2452和2466分別與端子516、552和566相同。 在又一示例中,元件242〇、2422、2438、244〇和2446分別與元件52〇、 522、538、540和546相同,並且振盪器2462與振盪器562相同。在又一 示例中,電壓到電流轉換器2510與電壓到電流轉換器151〇相同並且元 件2520與元件1520相同。在又一示例中,時鐘分頻器261〇和脈衝拷貝 電路2/20分別與時鐘分頻器161〇和脈衝拷貝電路162〇相同,並且相位 檢測器和電荷泵2635包括相位檢測器1630和電荷泵164〇。返回參考圖 17和圖18,根據一個實施例,元件542包括電壓到電流轉換器〗51〇、元 件1520和鎖相環153〇,並且鎖相環153〇至少包括脈衝拷貝電路獅、 相位檢測器1630和電荷泵164〇。 在又示例中,仏號2414、2444、2448、2460、2464和2474分別與 仏號514、544、548、560、564和574相同。在又一示例中,信號2512 矛25刀别與t號1512和1522相同。在又一示例中,信號2612、2614、 2629、26443和 2660 與信號 1612、1614、1629、1644 和 1660 相同。 =25疋示出作為根據本發明實施例之開模式電源變換系統μ⑻的 -部分的用於電流感測(cs)峰值調整的元件2·的某些^備的簡化示 53 201236345 圖。該示圖僅僅是示例,其不應當不當地限制申請專利範圍的範疇。熟知 該項技術領域之人將認識到許多變體、替換和修改。如圖25所示,元件 2440包括高速比較器2710、邏輯控制元件2722、電荷泵2724、動態閾值 產生器2730以及過流保護(OCP)比較器2740。 例如,元件2440包括與高速比較器1810、動態閾值產生器1830以及 過流保護(OCP)比較器1840相同的高速比較器2710、動態閾值產生器 2730以及過流保護(OCP)比較器2740。在另一示例中,邏輯控制元件 2722和電荷泵2724形成電荷泵1820。在又一示例中’信號2464和2474 分別與信號564和574相同。在又一示例中’信號2712、2726和2735分 別與信號1812、1826和1835相同。 返回圖24 ’根據一個實施例,開關模式電源變換系統24〇〇是返驰式 電源變換器。在另一實施例中,開關模式電源變換系統24〇〇包括用於控 制開關辭的-個或多個元件’以及用於控撇經初級繞組的峰值電流的 -個或多個元件。例如’峰值電流被調整到預定位準,而不管線路A 入電壓如何。 ’ 根據另-實施例,M模式電源魏线綱的輸出電壓由通過端 子2416 (例如,端子FB)的信號2414 (例如,Vfb)表示。例如,俨號 2414 (例如,Vfb)被元件2422採樣和保持,元 由 266〇的頻fM2522 ^2522 _定_ 產生的信號 -又—實施例’信號24M (例如’ Vfb)由元件期接收。例如 理,該鎖相環0括掂洛„。we 。士 呢由鎖相%處 衣包括振虚益2462、時鐘分頻器261〇 相位檢測器和電荷泵脑以及元件攻 = 拷=路獅、 信號2660的振盪頻率’以使得 在又補中,該鎖相環調節In 1 T (32), the current reading is performed, and N represents the ratio between the primary winding 211G and the secondary winding 2112. Using Equations 29 and 31, Equation 32 becomes: '. = — X ————X Yj^oc 2 7〇+/. K (33) Constant! 1 as 'Based on Equation 33, since 11, 12, ^11〇<: and the heart are constant, the output current is 1 . Yes 掊=. In another example, the power conversion system 2100 is intended to assert both 和 and %^ to keep the output current 1 恒定 constant. Figure 24 is a simplified diagram of a switch mode with primary side sensing and adjustment in accordance with another embodiment of the present invention. This phase is merely an example and should not unduly limit the scope of the application. Those skilled in the art will recognize many variations, substitutions and modifications. The switched mode power conversion system 2400 includes the following components: an element 2420 that is less used to produce a ± Demcfg signal and a Scmphng dk signal; an element 2422 that samples and holds one or more signals; and an element 2438 that generates a PWM/PFM adjustment signal. Element 2440 for current sense (CS) peak adjustment; element 2446 for generating gate drive signal; oscillator 2462; voltage to current converter 2510; element for determining the difference in size of the two input signals 252〇; clock divider 2610; 52 201236345 • Pulse copy circuit 2620; and • Phase detector and charge pump 2635. In one embodiment, components 2420, 2422, 2438, 2440, and 2446, oscillator 2462, voltage to current converter 2510, component 2520, clock divider 2610, pulse copy circuit 2620, and phase detector and charge pump 2635 is located on wafer 2490. For example, wafer 249A includes at least terminals 2416, 2452, and 2466. Although shown above using a selected set of elements for system 2400, many alternatives, modifications, and variations are possible. For example, some of the components can be expanded and/or combined. In another example, a rising edge blanking element is inserted between terminal 2466 and element 244, and the inserted rising edge blanking element receives the signal from terminal 2466 and outputs signal 2464 to element 2440. Depending on the embodiment, the arrangement of the components can be interchanged with the replaced & components. Further details of these elements can be found in this specification. For example, the 'switch mode power conversion system 2400 is the same as the switch mode power conversion system 5'. In another example, wafer 2490 is identical to wafer 590. In yet another example, terminals 2416, 2452, and 2466 are identical to terminals 516, 552, and 566, respectively. In yet another example, elements 242, 2422, 2438, 244, and 2446 are identical to elements 52A, 522, 538, 540, and 546, respectively, and oscillator 2462 is identical to oscillator 562. In yet another example, voltage to current converter 2510 is the same as voltage to current converter 151 and component 2520 is identical to element 1520. In yet another example, clock divider 261 and pulse copy circuit 2/20 are identical to clock divider 161 and pulse copy circuit 162, respectively, and phase detector and charge pump 2635 includes phase detector 1630 and charge. Pump 164 〇. Referring back to Figures 17 and 18, element 542 includes a voltage to current converter 〇 51 〇, element 1520 and phase locked loop 153 〇, and phase locked loop 153 〇 includes at least a pulse copy circuit lion, phase detector, according to one embodiment 1630 and charge pump 164 〇. In still another example, apostrophes 2414, 2444, 2448, 2460, 2464, and 2474 are identical to apostrophes 514, 544, 548, 560, 564, and 574, respectively. In yet another example, the signal 2512 is the same as the t15s 1512 and 1522. In yet another example, signals 2612, 2614, 2629, 26443, and 2660 are the same as signals 1612, 1614, 1629, 1644, and 1660. = 25 疋 shows a simplified illustration of some of the components 2 for current sensing (cs) peak adjustment as part of the open mode power conversion system μ (8) according to an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. As shown in FIG. 25, element 2440 includes a high speed comparator 2710, a logic control element 2722, a charge pump 2724, a dynamic threshold generator 2730, and an overcurrent protection (OCP) comparator 2740. For example, component 2440 includes the same high speed comparator 2710, dynamic threshold generator 2730, and overcurrent protection (OCP) comparator 2740 as high speed comparator 1810, dynamic threshold generator 1830, and overcurrent protection (OCP) comparator 1840. In another example, logic control element 2722 and charge pump 2724 form charge pump 1820. In yet another example, signals 2464 and 2474 are identical to signals 564 and 574, respectively. In yet another example, the signals 2712, 2726, and 2735 are identical to the signals 1812, 1826, and 1835, respectively. Returning to Fig. 24', according to one embodiment, the switched mode power conversion system 24A is a flyback power converter. In another embodiment, the switched mode power conversion system 24A includes one or more components for controlling the switching words and one or more components for controlling the peak current through the primary winding. For example, the peak current is adjusted to a predetermined level regardless of the line A input voltage. According to another embodiment, the output voltage of the M mode power supply line is represented by a signal 2414 (e.g., Vfb) that passes through terminal 2416 (e.g., terminal FB). For example, the nickname 2414 (e.g., Vfb) is sampled and held by component 2422, and the signal generated by the 166 〇 frequency fM2522^2522 _定_--the embodiment' signal 24M (e.g., 'Vfb) is received by the component period. For example, the phase-locked loop 0 brackets „ „.we. The cymbal by the phase-locked% clothing including Zhenxuyi 2462, clock divider 261 〇 phase detector and charge pump brain and component attack = copy = road lion The oscillation frequency of the signal 2660 is such that, in addition, the phase-locked loop is adjusted
Demag βχΤ, (34) 其中’β是常數。在又一示例巾,P等於2 54 201236345 該項技術領域之人將認綱許多魏、魏和專__姆。熟知 (Γ. 另外’波謂4表示作為時間的函數的β號 ==4)。 2629 , ^ 例如’在信號2614 (對應於波形2682) (對應於波形細)被同步到信號膽的;^邊^’ $信號 中,在信號2629 (對應於波开㈣μΙΪ )另"'示例 波細())蝴L 謂)的下降邊緣處,信號斯(對應於 目實補’如果雜號迎採如_嫩邏輯低位準, 的伟^期的,^時,(例如,TDemag)小於信號2612(對應於波形2680) 在大丨《V权據另一實施例,作為回應,信號2522 (對應於波形2688) 在大=上減小’從料致錢2612 (舰於波形細)的鮮也減小。 从孝/或圖2〇示出了根據某些實施例用於調整初級繞組的峰值電流 ‘-種或多種實現方式。例如’在定流(cc)模式中,感測到的電壓(例 /或Ϊ=:·通過鳴調整麵位準,而不管線路AC輸入電壓和 在示例中’如圖25所示,當電源開關(例如,開關55〇)剛剛截 止時,㈣2464(例如,Vcs)由比較器2710與預定閾值信號(例如,% 〇c) 相比較。根據-個實施例’比較器·輸出信號2712,以便靖信號別5 (例如’信號OCP—ref),信號2735被用作比較器2740的閾值電壓。根據 另^實施例,感測到的電壓(例如,Vcs)的峰值通過這樣的回饋被調整到 預&位準(例如,νΛ 〇(;)’以使得開關模式電源變換系統24⑻的輸出電流 保持恒定。 圖27是根據本發明某些實施例分別作為開關模式電源變換系統5〇〇 或2400 一部分的用於電流感測(CS)峰值調整的元件540或2440的簡化 55 201236345 時序圖。該示圖健是示例,其不應當不當地限 熟知該項技術領域之人將認酬許錢體、雜和修改。—_範嘴。 參考圖27和圖20,根據-個實施例,波形27 的信號560 (例如,CLK),並且波形繼表示作 =時間的函數 Γ,另一實施例,波形2784表示作為時間的二ΐΓ LEB—b,並且波形2786表示作為時間的函數的信號1812 (例如,〜 =CP_det)。根據又-實施例,波形2·表示作為時間的函數、作為 Charge_con_b與信號Charge相及(娜)的結果的信號(例如,= ,波形2792表示作為時間的函數、作為信號CWge—咖與信號 ^ 相及的絲的紐⑷如,DOWN)。卿,錢和錢C ^ 都是短脈衝信號。根據又-實施例,波形2794表示作為時間的函數· 號1826 (例如’ V_d),並且波形27%表示作為時間的函數的信號183°5 (例如,OCP_ref)。 如圖27所示,根據一個實施例,如果信號564 (對應於波形2782) 的峰值小於Vth_〇C (例如,〇.9V) ’則信號1812 (對應於波形2786)為邏 輯低位準,並且信號1835 (對應於波形2796)逐步增大。根據另一實施 例’如果信號564 (對應於波形2782)在一時段期間變得大於Vth_〇c (例 如’ 0.9V)’則信號1812 (對應於波形2786)在該同一時段期間為邏輯高 位準,並且信號1835 (對應於波形2796)逐步減小,以便動態地在預定 位準(例如,Vth_。。)處獲得感測電壓(例如’ ves)的恒定峰值。 圖28是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 電源變換系統2800包括初級繞組2810、次級繞組2812、輔助繞組 2814、電阻器2820、2822和2824、開關2830、斜坡產生器2832、跨導放 大器2834、逐週期(cycle-by-cycle)峰值產生器2836、上升邊緣遮沒元件 2838、退磁檢測元件2850、電流源2860、電流槽2862、開關2864和2866、 N〇T (非)閘2870、電容器2872和2858、比較器2880和2882、觸發器 元件2890、以及驅動元件2892。 56 201236345 例如’斜坡產生器2832、跨導放大器2834、逐週期峰值檢測器2836、 =邊緣件2838、退磁侧元件2咖、電赫286G、電流槽2862、 ^繼* 2866、NOT閘2870、電容器2872、比較器2880和2882、觸 ,儿件2890以及驅動元件纖位於晶片厕上。在另一示例中晶 編二至少包括端子2842、2844、2846和2848。在又—示例中,系統 1 =侧模式返馳式電源變換系統。在又-示例中,退磁檢測猶2850 與如圖22所示的退磁檢測元件2150相同。 =9疋根據本發明實施例之開關模式電源變換系統π⑻的簡化時序 該頂僅疋不例’其不應當不當地限制申請專利範圍的範缚。熟知 “技術魏之人龍、識顺乡變體、雜和修改。 v ΛϋΓ不波形291G表示作树_函數的輸人信號2813(例如, 波Ϊ,2^Γ-2^示作為時間的函數的斜坡信號2833 (例如,VB),並且 2·表示作時間的函數的信號2881 (例如,CMP)。另外,波形 表示作沾曰的函數的感測信號2847 (例如’ Vcs),並且波形2940 表作為時間的函數的峰值信號2837 (例如,Vc2)。 並且SC 2:蛊29-51Ϊΐ作為時間的函數的回饋信號2843 (例如,Vfb), 表示二=^=^^;^:^錄2851,並且波形2970 數的驅動信號2893。 錢^990表不作為時間的函 高位對應觸_為邏輯 線性地傾斜上升,並且信號(例電流 件2838也線性地傾斜上升。例如,信號 了)通過上升邊緣遮沒元 檢測器2836接收,檢測考(蚵如,Vcs)由逐週期峰值 並且輪_』=:===的峰值 的信號2847的峰值。在另一示射H勘表示檢測到 放大器趣接收,跨導_ 導 根據-個實施例,峰值信號細(儿⑴如滅)。 如U之間_差被放大並且被轉換為電=== 57 201236345 電容器2858轉換為電壓信號2881 (例如,CMP)。根據另一實施例,電壓 信號2881 (對應於波形2922)由比較器2880接收,比較器2880還接收 斜坡信號2833 (對應於波形2920)。 例如,電壓信號2881 (例如,CMP)的大小隨著時間是恒定的。在另 一示例中,比較器2880將電壓信號2881 (對應於波形2922)與斜坡信號 2833 (對應於波形2920)相比較,並且向觸發器元件2890輸出比較信號 2887。在一個實施例中,觸發器元件2890還接收來自比較器2882的控制 信號2885並且產生調節信號2891。在另一實施例中,調節信號2891由驅 動器元件2892接收,作為響應,驅動器元件2892產生驅動信號2893。 如波形2920和2990所示,如果斜坡信號2833 (例如’ Vb)達到電 壓信號2881 (例如’CMP)’則驅動信號簡從邏輯高位準變為邏輯低位 準並且開關283G截止。例如,當關勘截止時,·存能量被遞送到 電源變換魏28GG的輸出並且退磁處理開始。在另—示例中,在退磁處 理期間,流經次級繞組2812的電流線性地傾斜下降。 如圖28所示,辅助繞組綱的輸出電麼(例如,u反映電源變 換系,2800的輪出電壓(例如,v〇),並且被電阻器獅和迎轉換為 =域2843 (例如,Vfb)。例如,回饋信號綱(例如υ由退磁 =件2850接收’元件285〇將回饋信號_ (例如,Μ與閣值信 唬(例如,0.1 V)相比較。 口肠例,如波形2950和296〇所示,當回饋信號2843(例如, 高位準,(例如’ G1V)以上時,作號2851變為邏輯 Γ,= 處理的開始。根據另—實施例’當回饋信號湖(例 邏輯二準」以下時,Μ信號2851變為 流下降到幾乎為零時,退二: ’當流f欠級繞組2812的電 、)如(對應彻测^節叫例如, N〇 丁閉號2851由開關2866和NOT間2870接收, 信物輸_關施。例如,如果^ 為邏“辦,_關2864 _並且聊施壯β因此, 58 201236345 根據一個實施例,電容器2872通過電流槽2862被放電,並且斜坡信號2865 (例如,vA)線性地下降。在另一示例中,如果信號2851為邏輯 低位準’則開關2864閉合並且開關2866斷開。因此,根據另一實施例, 電容器2872通過電流源2860被充電,並且斜坡信號2865 (例如,Va) 線性地上升。 根據又一實施例,斜坡信號2865 (例如,Va)由比較器2882接收, 比較器2882還接收閾值信號2883 (例如’ Vrefi)。例如,比較器2882將 斜坡信號2865 (例如,Va)與閾值信號2883 (例如,Vrefl)相比較,並 且向觸發器元件2890輸出控制信號2885。如波形2970和2990所示,如 果斜坡信號2865 (例如,vA)在大小上達到閾值信號2883 (例如,vref]), 則驅動信號2893從邏輯低位準變為邏輯高位準,並且開關283〇導通。 .圖30是作為根據本發明實施例之電源變換系統28〇〇 一部分的逐週期 峰值檢 2836的簡化示圖。該示g僅僅是示例,其*應當不當地限制 申明專利範圍的範鳴。熟知該項技術領域之人將認識到許多變體、替換和 修改。 、 在一個實施例中,逐週期峰值檢測器2836包括比較器3〇1〇、開關 3020'3022和3024、、緩衝器3030、電容器3_和3〇42、電流源3〇5〇、 以及單穩態產生器3_。在另-實施例中,開關3〇22和3〇24分別由_號 3062和3064控制,信號3〇62和遍是單穩態產生器·回應於驅^ 戒2893產生的。例如,信號3〇62和3〇64各自是具有3〇〇 ns脈寬的單穩 態信號。 〜 替換 圖31是作為根據本發明實施例之電源變換系統28〇〇 一部分的 峰值檢測器2836的簡化時序圖。該示圖僅僅是示例,其不應當不當地限 制:請專利範圍的鱗。熟知該項技術賴之人將認酬許多變體田、 ㈣所示,波形表示作為時間的函數的驅動信號2893,並且 及形3120表不作為時間的函數的感測信號2847 (例如,v 形3130表示作為時間的函數的單穩態信號3062,並且波形^14〇表’」 時間的函數的單穩態信號遍。此外,波形删表示作==的為 59 201236345 b號3023 (例如’ vel),並且波形316〇表示作為時間的函數的信號細。 此外’波形3170表示作為時間的函數的峰值信號2837 (例如,%)。 如圖3〇和圖Μ所示’單穩態產生器3_接收驅動信號2893 (對應 於波先3110),並且回應於驅動信號2893的上升邊緣產生單穩態信號3〇62 (對應於波形3130)。例如,單穩態信號3〇62具有3〇〇 ns的脈寬。在另 一不例中,當單穩態信號3062為邏輯高位準時,開關3022被閉合;因此, 電容器3040被放電並且信號3〇23(對應於波形315〇)下降到邏輯低位準。 在又一示例中,信號3023 (對應於波形315〇)由比較器3〇1〇接收, 比較器3010將信號3023與信號2847 (對應於波形3120)相比較。根據 一個實施例,如果信號2847在大小上大於信號3023,則開關3020閉合並 且電谷器3022通過電流源3050被充電。根據另一實施例,如果信號3023 在大小上達到信號2847,則開關3020斷開;因此,信號3〇23在相應的信 號週期中表示信號2874的峰值,直到開關3022通過單穩態信號3022的 下一脈衝被再次閉合為止。根據又一實施例,信號3023由緩衝器3030接 收,緩衝器3030產生信號3031 (對應於波形3160)。 根據又一實施例’單穩態產生器3060接收驅動信號2893 (對應於波 形3110),並且回應於駆動信號2893的下降邊緣產生單穩態信號3〇64(對 應於波形3140)。例如,單穩態信號3064具有300 ns的脈寬。在另一示 例中,當單穩態信號3064為邏輯高位準時,開關3024被閉合;因此,電 容器3042被充電並且信號2837 (對應於波形3170)被用來對信號3〇31 採樣。在又一示例中’經採樣的信號3031被保持在電容器3042上並且作 為信號2837被輸出,信號2837表示相應信號週期中的信號2874的峰值 直到驅動信號2844的下一脈衝到來為止。 參考圖28,例如,電源變換系統2800的開關週期如下:Demag βχΤ, (34) where 'β is a constant. In another example towel, P equals 2 54 201236345. Those skilled in the art will recognize many Wei, Wei, and special __ 姆. Well known (Γ. In addition, the wave means 4 represents the β number as a function of time == 4). 2629 , ^ For example 'in signal 2614 (corresponding to waveform 2682) (corresponding to waveform detail) is synchronized to the signal bile; ^ edge ^' $ signal, in signal 2629 (corresponding to wave open (four) μΙΪ) another "'example Waves ()) at the falling edge of the butterfly L, the signal s (corresponding to the real complement) if the slogan welcomes the _ Logic low level, the wei, the ^, (for example, TDemag) is smaller than Signal 2612 (corresponding to waveform 2680) is in the other hand, in response to another embodiment, in response to signal 2522 (corresponding to waveform 2688) decreasing in large = 'from the money 2612 (the ship is fine) Freshness is also reduced. From filial piety or FIG. 2A shows a peak current's or multiple implementations for adjusting the primary winding in accordance with certain embodiments. For example, in a constant current (cc) mode, sensed The voltage (example / or Ϊ =: · through the adjustment surface level, regardless of the line AC input voltage and in the example 'as shown in Figure 25, when the power switch (for example, switch 55 〇) just cut off, (4) 2464 ( For example, Vcs) is compared by a comparator 2710 with a predetermined threshold signal (eg, % 〇 c). Comparator output signal 2712 for signal 5 (eg, 'signal OCP-ref), signal 2735 is used as the threshold voltage of comparator 2740. According to another embodiment, the sensed voltage (eg, Vcs) The peak is adjusted to the pre-amp level (e.g., ν Λ 〇 (;)' by such feedback to keep the output current of the switched mode power conversion system 24 (8) constant. Figure 27 is a switch mode, respectively, in accordance with some embodiments of the present invention. Simplified 55 201236345 timing diagram of a component 540 or 2440 for current sensing (CS) peak adjustment, part of a power conversion system 5 or 2400. This diagram is an example and should not be unfamiliar with the technical field. The person will be rewarded with money, miscellaneous and modified. - _ mouth. Referring to Figures 27 and 20, according to an embodiment, the signal 560 of waveform 27 (e.g., CLK), and the waveform is shown as = time Function Γ, another embodiment, waveform 2784 represents binary LEB_b as time, and waveform 2786 represents signal 1812 as a function of time (eg, ~=CP_det). According to yet another embodiment, waveform 2 is represented as time The function, a signal that is the result of Charge_con_b and the signal Charge and (Na) (for example, = 2, waveform 2792 represents a function of time, as a signal CWge - coffee and signal ^) and the wire (4), such as DOWN. The money and money C^ are both short pulse signals. According to yet another embodiment, waveform 2794 represents as a function of time, number 1826 (eg, 'V_d), and waveform 27% represents signal 183°5 as a function of time (eg, , OCP_ref). As shown in FIG. 27, according to one embodiment, if the peak of signal 564 (corresponding to waveform 2782) is less than Vth_〇C (eg, 〇.9V)' then signal 1812 (corresponding to waveform 2786) is at a logic low level, and Signal 1835 (corresponding to waveform 2796) is gradually increased. According to another embodiment 'if signal 564 (corresponding to waveform 2782) becomes greater than Vth_〇c (e.g., '0.9V) during a time period, then signal 1812 (corresponding to waveform 2786) is a logic high during the same time period. Quasi, and signal 1835 (corresponding to waveform 2796) is stepped down to dynamically obtain a constant peak of the sensed voltage (eg, 'ves') at a predetermined level (eg, Vth_.). 28 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. Power conversion system 2800 includes primary winding 2810, secondary winding 2812, auxiliary winding 2814, resistors 2820, 2822, and 2824, switch 2830, ramp generator 2832, transconductance amplifier 2834, cycle-by-cycle peak generation 2836, rising edge blanking element 2838, demagnetization detecting element 2850, current source 2860, current sink 2862, switches 2864 and 2866, N〇T (non) gate 2870, capacitors 2872 and 2858, comparators 2880 and 2882, flip-flops Element 2890, and drive element 2892. 56 201236345 For example, 'ramp generator 2832, transconductance amplifier 2834, cycle-by-cycle peak detector 2836, = edge member 2838, demagnetization side component 2, electric 286G, current sink 2862, ^ 2 * 2866, NOT gate 2870, capacitor 2872, comparators 2880 and 2882, contacts, 2890 and drive component fibers are located on the wafer toilet. In another example, the lithography 2 includes at least terminals 2842, 2844, 2846, and 2848. In yet another example, System 1 = Side Mode Flyback Power Conversion System. In yet another example, the demagnetization detection 2850 is the same as the demagnetization detection element 2150 shown in FIG. = 9 简化 Simplified Timing of Switch Mode Power Conversion System π(8) in accordance with an embodiment of the present invention This top is merely an example of 'not to unduly limit the scope of the patent application. Familiar with "Technology Wei Zhiren, Shishun Township variants, miscellaneous and modified. v ΛϋΓNo waveform 291G represents the input signal 2813 of the tree _ function (for example, Ϊ, 2^Γ-2^ shows as a function of time) Ramp signal 2833 (eg, VB), and 2· represents signal 2881 (eg, CMP) as a function of time. Additionally, the waveform represents a sensed signal 2847 (eg, 'Vcs) as a function of the smear, and waveform 2940 The table is a peak signal 2837 (e.g., Vc2) as a function of time. And SC 2: 蛊29-51Ϊΐ is a feedback signal 2843 (e.g., Vfb) as a function of time, representing two =^=^^;^:^录2851 And the waveform 2970 number of the drive signal 2893. The money ^990 table does not serve as the time of the high level corresponding to the touch _ is linearly ramped up, and the signal (such as the current piece 2838 also linearly ramps up. For example, the signal) through the rising edge The masking element detector 2836 receives, detects (eg, Vcs) the peak of the signal 2847 from the peak of the cycle and the peak of the wheel _』=:===. In another shot, the survey indicates that the amplifier is interestingly received. , transconductance _ guided according to an embodiment, the peak signal is fine (Children (1) if off). If the difference between U is amplified and converted to electricity === 57 201236345 Capacitor 2858 is converted to voltage signal 2881 (eg, CMP). According to another embodiment, voltage signal 2881 (corresponding to Waveform 2922) is received by comparator 2880, which also receives ramp signal 2833 (corresponding to waveform 2920). For example, the magnitude of voltage signal 2881 (eg, CMP) is constant over time. In another example, comparison The comparator 2880 compares the voltage signal 2881 (corresponding to the waveform 2922) with the ramp signal 2833 (corresponding to the waveform 2920) and outputs a comparison signal 2887 to the flip-flop component 2890. In one embodiment, the flip-flop component 2890 also receives comparisons. The control signal 2885 of the 2882 generates the adjustment signal 2891. In another embodiment, the adjustment signal 2891 is received by the driver element 2892, and in response, the driver element 2892 generates the drive signal 2893. As shown by waveforms 2920 and 2990, if the ramp signal 2833 (eg 'Vb) reaches voltage signal 2881 (eg 'CMP') and the drive signal is changed from a logic high level to a logic low level and switch 283G is turned off. When the cutoff is off, the stored energy is delivered to the output of the power conversion Wei 28GG and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the secondary winding 2812 linearly ramps down. 28, the output of the auxiliary winding class (for example, u reflects the power conversion system, the wheeling voltage of 2800 (for example, v〇), and is converted to the = field 2843 (for example, Vfb) by the resistor lion and welcoming. For example, the feedback signal (eg, 接收 is received by demagnetization = component 2850 'component 285 〇 will feedback signal _ (eg, Μ is compared to a threshold value (eg, 0.1 V). Examples of mouth, such as waveforms 2950 and 296〇 As shown, when the feedback signal 2843 (for example, a high level, such as 'G1V), the number 2851 becomes a logical Γ, = the beginning of the process. According to another embodiment, when the signal is returned to the lake (example logic 2) In the following, when the Μ signal 2851 becomes a flow drop to almost zero, the second is reversed: 'When the flow f is lower than the power of the winding 2812, for example, (corresponding to the test, for example, the N 〇 closed number 2851 is controlled by the switch 2866) And the NOT 2870 receives, the token is switched off. For example, if ^ is a logical ", _ off 2864 _ and chats strong β therefore, 58 201236345 According to one embodiment, the capacitor 2872 is discharged through the current slot 2862, and the slope Signal 2865 (eg, vA) decreases linearly. In another example, if signal 2851 is at a logic low level then switch 2864 is closed and switch 2866 is open. Thus, according to another embodiment, capacitor 2872 is passed through current source 2860 Charging, and ramp signal 2865 (example Va) rises linearly. According to yet another embodiment, ramp signal 2865 (eg, Va) is received by comparator 2882, and comparator 2882 also receives threshold signal 2883 (eg, 'Vrefi). For example, comparator 2882 will ramp signal 2865 (e.g., Va) is compared to a threshold signal 2883 (e.g., Vrefl) and a control signal 2885 is output to flip-flop element 2890. As shown by waveforms 2970 and 2990, if ramp signal 2865 (e.g., vA) reaches a threshold in magnitude Signal 2883 (e.g., vref)), then drive signal 2893 changes from a logic low level to a logic high level, and switch 283 turns "on". Figure 30 is a portion of power conversion system 28 in accordance with an embodiment of the present invention. A simplified diagram of a cycle-by-cycle peak check 2836. This g is merely an example, and * should unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions, and modifications. In one embodiment, the cycle-by-cycle peak detector 2836 includes a comparator 3〇1〇, switches 3020'3022 and 3024, a buffer 3030, capacitors 3_ and 3〇42, a current source 3〇5〇, and a monostable Generator 3_. In another embodiment, switches 3〇22 and 3〇24 are controlled by _ numbers 3062 and 3064, respectively, and signals 3〇62 and unipolar generators are generated in response to drive 2893. For example, signals 3〇62 and 3〇64 are each a monostable signal having a pulse width of 3〇〇ns. 〜 Replacement FIG. 31 is a peak detector as part of power conversion system 28〇〇 according to an embodiment of the present invention. A simplified timing diagram for 2836. This diagram is only an example and should not be unduly restricted: please ask for the scale of the patent. Those skilled in the art will recognize many variations, as shown in (d), the waveform represents the drive signal 2893 as a function of time, and the shape 3120 represents the sensed signal 2847 as a function of time (eg, v-shaped 3130) A monostable signal 3062 representing a function of time, and a monostable signal of a function of the time of the waveform '''. Further, the waveform is shown as == 59 201236345 b, 3023 (eg ' vel) And waveform 316 〇 represents the signal detail as a function of time. Further 'waveform 3170 represents the peak signal 2837 (eg, %) as a function of time. As shown in Figure 3A and Figure ' 'monostable generator 3_ A drive signal 2893 is received (corresponding to wavefront 3110) and a monostable signal 3〇62 (corresponding to waveform 3130) is generated in response to the rising edge of drive signal 2893. For example, monostable signal 3〇62 has 3〇〇ns In another example, when the monostable signal 3062 is at a logic high level, the switch 3022 is closed; therefore, the capacitor 3040 is discharged and the signal 3〇23 (corresponding to waveform 315〇) falls to a logic low level. In another example Medium, signal 3023 (corresponding to waveform 315A) is received by comparator 3〇1〇, and comparator 3010 compares signal 3023 with signal 2847 (corresponding to waveform 3120). According to one embodiment, if signal 2847 is greater in magnitude Signal 3023, switch 3020 is closed and battery 8522 is charged by current source 3050. According to another embodiment, if signal 3023 reaches signal 2847 in size, switch 3020 is turned off; therefore, signal 3〇23 is in the corresponding The peak of signal 2874 is represented in the signal period until switch 3022 is again closed by the next pulse of monostable signal 3022. According to yet another embodiment, signal 3023 is received by buffer 3030, and buffer 3030 produces signal 3031 (corresponding to Waveform 3160). According to yet another embodiment, monostable generator 3060 receives drive signal 2893 (corresponding to waveform 3110) and produces a monostable signal 3〇64 (corresponding to waveform 3140) in response to the falling edge of flip signal 2893. For example, monostable signal 3064 has a pulse width of 300 ns. In another example, when monostable signal 3064 is at a logic high level, switch 3024 is closed; The controller 3042 is charged and the signal 2837 (corresponding to waveform 3170) is used to sample the signal 3〇 31. In yet another example, the 'sampled signal 3031 is held on the capacitor 3042 and output as the signal 2837, the signal 2837 representing The peak of the signal 2874 in the corresponding signal period until the next pulse of the drive signal 2844 comes. Referring to Figure 28, for example, the switching period of the power conversion system 2800 is as follows:
Ts=^±xTDen,ag (35) 其中,Ts表示開關週期’並且Toemag表示退磁處理的持續時間β 12表 示電流源2860的充電電流的大小,並且Ιι表示電流槽2862的放電電流的 大小。 201236345 根據—個實施例,AC輸入信號2815被轉換為經整流的輸入信號2813 (例如,Vin),如下:Ts = ^ ± xTDen, ag (35) where Ts represents the switching period 'and Toemag represents the duration of the demagnetization process β 12 represents the magnitude of the charging current of the current source 2860, and Ιι denotes the magnitude of the discharging current of the current slot 2862. 201236345 According to one embodiment, the AC input signal 2815 is converted to a rectified input signal 2813 (eg, Vin) as follows:
^ x ^rm X sin (1π \ τ \JAC J (36) 其中,Vin表示經整流的輸入信號2813。另外,VnnS表示AC輸入信 號2815的均方根大小,並且Tac表示AC輸入信號2815的週期。例如, Tac 等於 2〇 ms。 在另—示例中,因此,峰值信號2837為 K2^ x ^rm X sin (1π \ τ \JAC J (36) where Vin represents the rectified input signal 2813. Additionally, VnnS represents the root mean square size of the AC input signal 2815, and Tac represents the period of the AC input signal 2815. For example, Tac is equal to 2〇ms. In the other example, therefore, the peak signal 2837 is K2.
yflxV xsinYflxV xsin
r 2π 、 -xt v T \XAC J L- (37) 其中,VC2表示峰值信號2837。另外,t〇n表示驅動信號2893的脈寬, 並且Rs表示電阻器2824的電阻值》此外,Lp表示初級繞組2810的電感。 在又一示例中’如圖28所示,峰值信號2837被平均並且使得峰值信 號2837的平均值等於參考信號2835 »根據一個實施例,如果 '^cZp<~KxTAC (38) 貝1卜〜2 =匕--=争X ί ¥ = + X f匕_〆/ (39) 其中,gm是跨導放大器2834的跨導值,並且Ccmp是電容器2858的電 谷值。另外,T表示積分週期,並且κ是遠大於1的正整數。例如,丁等 於或大於TAC。在另一示例中,K不小於3。在又一示例中,κ等於35, 6, 1〇或2〇。在又一示例中,跨導放大器2834的頻寬遠小於AC輸入信號2815’ 的頻率。此外,Vcs ave表示峰值信號2837的平均值,並且Vref2表示參考信 號2835。此外,Vcs_pk表示信號2847的峰值,其例如等於Vc2。 根據另一實施例,如圖28所示, I。 •dt (40) 其中,Ιο表示開關模式電源變換系統2800的輪出電流,並且錄示 初級繞組2810與次級繞組2812之間的匝數比。另外,Rs表示電阻器2824 61 201236345 的電阻值’並且1;表不電源變換系統28〇〇的開關週期。此外, 示每個_聊_退磁處_持續時間。 td, 丨emag 表 根據又一實施例,將等式35和39與等式4〇 組合,可以獲得下式: (41) 日例如基於等式斗卜由於认^’匕和^^都是常數’因此輸出電流 I。是恒定的。在另一示例中,電源變換***28〇〇使X匕,和^保 持恒定’以1便,輸出電流Ϊ。保持恒定。在—個實施例中,通過至少g足等 式38,使7XJ0匕-〆’保持恒定。在另-實施例巾,通過至少滿足等式35 來使f保持恒定。 所述並在此強調,圖28僅僅是示例,其不應當不當地限制申請 專利範圍的範》#。熟知該項技術領域之人將認制許多變體、替換和修 改。例如,電源變換系統2800包括用於將^^輸入信號2815轉換為由初 級繞組2810接收的DC信號的一個或多個大容量電容器,如圖32所示。 圖32是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 例如,除了電源變換系統3200還包括電容器3210和3220、電阻器 3230以及電感器3240以外’電源變換系統3200與電源變換系統2800相 同。在另一示例中,電容器3210和3220、電阻器3230以及電感器3240 用來將AC輸入信號3215轉換為DC輸入信號3213 (例如,ViJ。 根據一個實施例,電源變換系統2800的優點在於無需使用一個或多 個大容量電容器以及將AC輸入信號轉換為由初級繞組2810接收的DC輸 入信號。根據又一實施例’儘管如此,電源變換系統2800可以利用一個 或多個這樣的大容量電容器來操作,如圖32所示。 圖33是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 電源變換系統3300包括初級繞組3310,次級繞組3312,輔助繞組 3314,電阻器3320、3322和3324,開關3330,跨導放大器3334,逐週期 62 201236345 峰值檢測器3336,上升邊緣遮沒元件3338,退磁檢測元件3350,振盪器 3360,AND閘3366,電容器3358,積分器3370,比較器3382,觸發器 元件3390以及驅動元件3〗92。 例如,跨導放大器3334、逐週期峰值檢測器3336、上升邊緣遮沒元 件3338、退磁檢測元件3350、振盪器3360、AND閘3366、積分器3370、 比較器3382、觸發器元件3390以及驅動元件3392位於晶片3340上。在 另一示例中,晶片3340至少包括端子3342、3344、3346和3348。在又一 示例中,系統3300是開關模式返馳式電源變換系統。在又一示例中,退 磁檢測元件3350與如圖22所示的退磁檢測元件2150相同。在又一示例 中,逐週期峰值檢測器3336與如圖30所示的逐週期峰值檢測器2836相 同。在又一示例中,積分器3370是在每個開關週期之後(例如,在每個 開關週期内的退磁處理結束時)被重置的逐週期積分器。 圖34是作為根據本發明實施例之電源變換系統33〇〇 一部分的積分器 337=的簡化不圖。該示圖僅僅是示例,其不應當不當地限制申請專利範圍 的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 在一個實施例中,積分器3370包括開關342〇、3422和3424、緩衝器 =30、電容器3440和3442、電晶體3450、3452和3454、放大器3460 : :穩態產,器3462、以及電阻器347〇。在另一實施例中,開關332〇由 ' ^« 3422ί〇 3424 號3393而^ 例如,信號遍由單穩態產生器鳩回應於驅動信 种,信號_由單觀產生—應於 伽絲作她迎,波形 轉為時啊純的單鷄«3461,並錢 63 201236345 =單穩態信號3463。此外,波形侧表示作為時間的函數的伙釋信 说335 Wt外,波形3570表示作為時間的函數的信號期獻波形· 表示作為時間的函數的信號3372。 如圖34和圖35所tf,單穩態產生器购接收驅動信號3视(對應 於波形雙)並且回應於驅動信號3393的上升邊緣產生信號週(對應 於波形3540)。例如,錢3461是單鷄錄。在另-補中,當單穩雖 信號3461為邏輯高鱗時,_ 3422 _合;因此,電篇344〇被放 電並且信號3423 (對應於波形3570)下降為邏輯低位準。 根據-個實關,#細%錢3351 (_赠形侧)為邏輯高 位準時,開關遞閉合》根據另一實施例,峰值信號迎(對應於波形 3530)由放大器346〇接收,放大器遍將作為電壓信號的峰值信號挪 轉換為電流信號,當開關3420通過信號3351被閉合時,該電流 信號用來對電容ϋ綱充電。例如,電爲购輸出信號期(對應於 波开/ 3570 )。在另-示例中吕號3423 φ緩衝器3030接收,、緩衝器3030 產生信號3431。 根據又-實補’單鶴產生H 3462接收£>雜作號則(對應於 波开> 3560)’並且回應於謂g信號3351的下降邊緣而產生信號3463(對 應於波形3550)。例如,信號3463是單穩態信號。在另一示例中,當單穩 態仏號3463為邏輯尚位準時,開關3424被閉合;因此,電容器3442被 充電並且信號3372 (對應於波形3580)被用來對信號3431採樣。在又一 示例中,經採樣的信號3431被保持在電容器3442上並且作為信號3372 被輸出直到驅動信號3344的下一脈衝到來為止。 根據又一實施例,信號3372為r 2π , -xt v T \XAC J L- (37) where VC2 represents the peak signal 2837. In addition, t〇n represents the pulse width of the drive signal 2893, and Rs represents the resistance value of the resistor 2824. Further, Lp represents the inductance of the primary winding 2810. In yet another example, as shown in FIG. 28, the peak signal 2837 is averaged such that the average of the peak signal 2837 is equal to the reference signal 2835 » according to one embodiment, if '^cZp<~KxTAC (38) Bay 1b~2 =匕===争为X ί ¥ = + X f匕_〆/ (39) where gm is the transconductance value of the transconductance amplifier 2834, and Ccmp is the electric valley value of the capacitor 2858. In addition, T represents an integration period, and κ is a positive integer much larger than 1. For example, D is equal to or greater than TAC. In another example, K is not less than 3. In yet another example, κ is equal to 35, 6, 1 or 2 〇. In yet another example, the transconductance amplifier 2834 has a bandwidth that is much less than the frequency of the AC input signal 2815'. Further, Vcs ave represents the average value of the peak signal 2837, and Vref2 represents the reference signal 2835. Furthermore, Vcs_pk represents the peak value of signal 2847, which is for example equal to Vc2. According to another embodiment, as shown in Figure 28, I. • dt (40) where Ιο represents the wheel-out current of the switched mode power conversion system 2800 and records the turns ratio between the primary winding 2810 and the secondary winding 2812. In addition, Rs represents the resistance value of the resistor 2824 61 201236345 and 1; the switching period of the power conversion system 28A is shown. In addition, each _ _ _ demagnetization _ duration is shown. Td, 丨emag table According to still another embodiment, combining equations 35 and 39 with equation 4 ,, the following equation can be obtained: (41) Day is for example based on the equation, and both are constants. 'Therefore, the current I is output. It is constant. In another example, the power conversion system 28 causes X匕, and remains constant at '1' to output current Ϊ. keep constant. In one embodiment, 7XJ0匕-〆' is held constant by at least g foot equation 38. In another embodiment, the f is kept constant by satisfying at least Equation 35. It is emphasized herein that FIG. 28 is merely an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions, and modifications. For example, power conversion system 2800 includes one or more bulk capacitors for converting input signal 2815 to a DC signal received by primary winding 2810, as shown in FIG. 32 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 3200 is the same as power conversion system 2800 except that power conversion system 3200 includes capacitors 3210 and 3220, resistor 3230, and inductor 3240. In another example, capacitors 3210 and 3220, resistor 3230, and inductor 3240 are used to convert AC input signal 3215 to DC input signal 3213 (eg, ViJ. According to one embodiment, power conversion system 2800 has the advantage of not requiring use One or more bulk capacitors and converting the AC input signal to a DC input signal received by the primary winding 2810. According to yet another embodiment, the power conversion system 2800 can operate with one or more such bulk capacitors. Figure 33 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is merely an example and should not unduly limit the patent application. A range of ranges. Those skilled in the art will recognize many variations, alternatives, and modifications. Power conversion system 3300 includes primary winding 3310, secondary winding 3312, auxiliary winding 3314, resistors 3320, 3322, and 3324, switch 3330. , transconductance amplifier 3334, cycle-by-cycle 62 201236345 peak detector 3336, rising edge blanking component 3338, demagnetization detection Element 3350, oscillator 3360, AND gate 3366, capacitor 3358, integrator 3370, comparator 3382, flip-flop element 3390, and drive element 3 92. For example, transconductance amplifier 3334, cycle-by-cycle peak detector 3336, rising edge masking No element 3338, demagnetization detecting element 3350, oscillator 3360, AND gate 3366, integrator 3370, comparator 3382, flip-flop element 3390, and drive element 3392 are located on wafer 3340. In another example, wafer 3340 includes at least terminal 3342. 3344, 3346, and 3348. In yet another example, system 3300 is a switch mode flyback power conversion system. In yet another example, demagnetization detecting element 3350 is the same as demagnetization detecting element 2150 as shown in Figure 22. In one example, the cycle-by-cycle peak detector 3336 is identical to the cycle-by-cycle peak detector 2836 shown in Figure 30. In yet another example, the integrator 3370 is after each switching cycle (eg, within each switching cycle) At the end of the demagnetization process, the cycle-by-cycle integrator is reset. Fig. 34 is an integrator 337 = as part of the power conversion system 33 根据 according to an embodiment of the present invention. The illustrations are merely examples, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. In one embodiment, the integrator 3370 Included are switches 342A, 3422, and 3424, buffer = 30, capacitors 3440 and 3442, transistors 3450, 3452, and 3454, amplifier 3460:: steady state, 3462, and resistor 347A. In another embodiment, the switch 332 is represented by '^« 3422ί〇3424 3393. For example, the signal is transmitted by the monostable generator 鸠 in response to the driving signal, and the signal _ is generated by a single image. She greeted, the waveform turned into a pure single chicken «3461, and money 63 201236345 = monostable signal 3463. In addition, the waveform side represents the 351 Wt as a function of time, and the waveform 3570 represents the signal duration waveform as a function of time. The signal 3372 is represented as a function of time. As shown in Figures 34 and 35, the monostable generator purchases a receive drive signal 3 (corresponding to waveform double) and produces a signal cycle (corresponding to waveform 3540) in response to the rising edge of drive signal 3393. For example, the money 3461 is a single chicken record. In the other-complement, when the one-shot signal 3461 is a logical high scale, _ 3422 _ is combined; therefore, the electrical part 344 〇 is discharged and the signal 3423 (corresponding to the waveform 3570) falls to a logic low level. According to a real off, #细%钱3351 (_ gift side) is logic high level on time, the switch is closed. According to another embodiment, the peak signal welcome (corresponding to waveform 3530) is received by amplifier 346〇, the amplifier will The peak signal as a voltage signal is converted into a current signal, which is used to charge the capacitor when the switch 3420 is closed by the signal 3351. For example, electricity is the output signal period (corresponding to wave open / 3570). In another example, the Lu 3423 φ buffer 3030 receives, and the buffer 3030 generates a signal 3431. The signal 3463 (corresponding to waveform 3550) is generated in response to the falling edge of the g signal 3351 according to the re-complementary single crane generating H 3462 receiving £ > hash number (corresponding to wave open >3560)'. For example, signal 3463 is a monostable signal. In another example, when the one-shot slogan 3463 is logic still on, switch 3424 is closed; therefore, capacitor 3442 is charged and signal 3372 (corresponding to waveform 3580) is used to sample signal 3431. In yet another example, the sampled signal 3431 is held on capacitor 3442 and output as signal 3372 until the next pulse of drive signal 3344 arrives. According to yet another embodiment, the signal 3372 is
Q 氏 xC3 (42) 其中’ Vc4表示信號3372,並且V。2表示峰值信號3337。另外,Tn 上—t - JJcnisg 表不母個開關週期内的退磁處理的持續時間。此外,R3表示電阻器3470 的電阻值’並且Q表示電容器3440的電容值。 64 201236345 圖3.6是作為根據本發明實施例的電源變換系統33〇〇 —部分的振盈器 3360的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專利範圍 的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 在一個實施例中,振盪器3360至少包括電阻器364〇和電容器365〇。 在另一實施例中,振盪器3360接收參考信號361〇、362〇和363〇,並且產 生時鐘雜3362和概舰遍j又—實關巾,時鐘錢遍和斜 坡信號3364的週期由下式確定:Q's xC3 (42) where 'Vc4 denotes signal 3372, and V. 2 represents a peak signal 3337. In addition, Tn on -t - JJcnisg represents the duration of the demagnetization process in the parent switching cycle. Further, R3 represents the resistance value of the resistor 3470' and Q represents the capacitance value of the capacitor 3440. 64 201236345 Figure 3.6 is a simplified diagram of a vibrator 3360 as part of a power conversion system 33A in accordance with an embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. In one embodiment, the oscillator 3360 includes at least a resistor 364A and a capacitor 365A. In another embodiment, the oscillator 3360 receives the reference signals 361 〇, 362 〇, and 363 〇, and generates a clock multiplex 3362 and a clock pass, and the cycle of the clock signal and the ramp signal 3364 is represented by determine:
Tosc=^Ri^CsX ref 2 ~Kef3Tosc=^Ri^CsX ref 2 ~Kef3
Ke/1 (43) 具中 丄〇sc表不時鐘信號3362和斜坡信號3364的週期。另外,v门、 vref2和vrefi分別表示參考信號3610、362〇和363〇。此外 =' 3640的電阻值,並且Cs表示電容器365〇的電容值。 ° # 施例巾’電源變齡統纖的卿週解於時鐘信號3362 .和斜坡Μ 3364的週期,並且開關頻率被確定為如下: =--^ref\_ W (44) 33〇〇 = ii==^33GG關關辭。.,魏變換系統 圖。模式電源變齡統綱的簡化時序 及項技術領域之人將認識到許多變體、替換和修改。 濟』 vm),:且:皮:二::3:::作為時間的函數的輸入信號3313(例如, 3730表·為日_函數的驅動信號3393。另外,波形 數的斜坡信號3364,並且波形37ϋ3362,波形374G表轉Μ間的函 如,C叫此外,波形375〇表表=乍為時間的函數的信號蓮(例 I),並且波形遍表示作為時===數的感測信號加(例如, 此外,波形伽表補树_^=的峰值信號挪(例如,W。 表示作為時_函數驗號助。數的細喂錄咖’並且波形378〇 65 201236345 如圖33和圖37所示,在信號3362 (對應於波形3730)的上升邊緣 處’驅動信號3393 (對應於波形3720)變為邏輯高位準並且開關3330導 通。根據一個實施例’流經初級繞組3310的電流3311線性地傾斜上升, 並且信號3347 (例如’ Vcs)通過上升邊緣遮沒元件3338也線性地傾斜上 升。例如’信號3347 (例如,Vcs)由逐週期峰值檢測器3336接收,檢測 器3336檢測每個開關週期内的信號3347的峰值並且輸出峰值信號3337 (對應於波形3760),峰值信號3337表示檢測到的信號3347的峰值。在 另一示例中,峰值信號3337(例如,Vc2)由積分器3370接收,積分器3370 還接收驅動信號3393 (對應於波形3720)和Dewafg信號3351 (對應於波 形3770) ’並且向跨導放大器3334輸出信號3372 (對應於波形3780)。 根據一個實施例’跨導放大器3334還接收參考信號3335(例如Vref), 並且作為回應,將信號3372 (例如,V。4)與參考信號3335 (例如Vref) 之間的電壓差放大並轉換為電流信號,該電流信號進而被電容器3358轉 換為電壓信號3381 (例如,CMP)。根據另一實施例,電壓信號3381 (對 應於波形3742)由比較器3382接收,比較器3382還接收斜坡信號3364 (對應於波形3740)。 例如,電壓信號3381 (例如’ CMP)的大小隨著時間是恒定的。在另 一示例中,比較器3382將電壓信號3381 (對應於波形3742)與斜坡信號 3364 (對應於波形3740)相比較,並且向觸發器元件339〇輸出比較信號 3385。在一個實施例中,觸發器元件339〇還至少接收來自振盪器336〇的 時鐘信號3362 ’並且產生信號339b在另一實施例令,信號3391由_ 閘3366接收,AND閘3366還接收時鐘信號3362並且產生調節信號3368。 在又一實施例中,驅動器元件3392接收調節信號3368,並且產生驅動俨 號 3393。 ° 如波形3720、3740和3742所示,如果斜坡信號3364達到電壓信號 3381 (例如’ CMP) ’則驅動信號3393從邏輯高位準變為邏輯低位準並且 開關3330戴止。例如,當開關333〇截止時,所儲存能量被遞送到電源變 換系統3300的輸出並且退磁處理開始。在另一示例中,在退磁處理期間, 流經次級繞組3312的電流線性地傾斜下降。 66 201236345 換===繞組的輪出_如,u反映電源變 換系統遍的輸出輕(例如,ν。),並城餘器伽和迎轉換為 例如’ Μ。例如’回饋信號3343 (例如,Vfb)由退磁 ’___343 (例如,〜)與間值信 唬(例如’ 0.1 V)相比較。 如Γ丨個實Γ,當回馈信號3343 (例如,Vfb)上升到閾值信號(例 二w⑻m 3351變為邏輯高位準,其指示退磁處理 V歼。’/皮形3770所示。根據另一實施例,當回饋信號3343 (例如, FB下降到閾值L號(例如,〇 1V)以下時,細%信號3351變為邏輯 低位準’其指示退磁處理的結束。例如,當流經次級繞組3312的電流下 降到歲乎為零時,退磁處理結束。在利料,在磁 電源變換系統33。。進入諧振減狀態,並且_信號綱(例如束 近似為正弦波。根據又一實施例’如波形372〇和迎所示,在時鐘信號 3362的下-上升邊緣處,驅動信號3393再次變為邏輯高位準並且開關 3330再次導通。 在一個實施例中’AC輸入信號3315被轉換為經整流的輸入俨號3313 (例如’ Vin),如下: V2 xKm,xsinKe/1 (43) has a period of 不sc indicating no clock signal 3362 and ramp signal 3364. In addition, v gates, vref2, and vrefi represent reference signals 3610, 362, and 363, respectively. In addition, the resistance value of =' 3640, and Cs represents the capacitance value of the capacitor 365〇. ° #例巾's power supply is the same as the clock signal 3362. and the slope Μ 3364 cycle, and the switching frequency is determined as follows: =--^ref\_ W (44) 33〇〇= Ii==^33GG Guan Guan. ., Wei transformation system diagram. A simplified sequence of mode power supply ages and those skilled in the art will recognize many variations, alternatives, and modifications.济 ” vm),: and: skin: two::3::: input signal 3313 as a function of time (for example, 3730 table · drive signal 3393 for the day _ function. In addition, the slope signal 3364 of the waveform number, and Waveforms 37ϋ3362, waveforms 374G table turn-to-turn functions such as C, in addition, waveforms 375〇 table=乍 is a function of time signal (example I), and waveforms are represented as sense signals with time === number Add (for example, in addition, the peak signal of the waveform gamma complement tree _^= (for example, W. represents the fine-feeding coffee as the time_function test number. and the waveform 378〇65 201236345 as shown in Figure 33 and 37, at the rising edge of signal 3362 (corresponding to waveform 3730) 'driver signal 3393 (corresponding to waveform 3720) becomes a logic high level and switch 3330 is turned on. Current 3311 flowing through primary winding 3310 according to one embodiment Linearly ramping up, and signal 3347 (e.g., 'Vcs) is also ramped up linearly by rising edge masking element 3338. For example, 'signal 3347 (e.g., Vcs) is received by cycle-by-cycle peak detector 3336, and detector 3336 detects each Peak of signal 3347 during the switching cycle And output a peak signal 3337 (corresponding to waveform 3760), peak signal 3337 representing the peak value of the detected signal 3347. In another example, peak signal 3337 (eg, Vc2) is received by integrator 3370, and integrator 3370 also receives the drive. Signal 3393 (corresponding to waveform 3720) and Dewafg signal 3351 (corresponding to waveform 3770)' and output signal 3372 (corresponding to waveform 3780) to transconductance amplifier 3334. Transconductance amplifier 3334 also receives reference signal 3335 according to one embodiment ( For example, Vref), and in response, the voltage difference between signal 3372 (eg, V. 4) and reference signal 3335 (eg, Vref) is amplified and converted into a current signal, which in turn is converted by capacitor 3358 into a voltage signal 3381. (eg, CMP). According to another embodiment, voltage signal 3381 (corresponding to waveform 3742) is received by comparator 3382, and comparator 3382 also receives ramp signal 3364 (corresponding to waveform 3740). For example, voltage signal 3381 (eg ' The size of CMP) is constant over time. In another example, comparator 3382 corresponds to voltage signal 3381 (corresponding to waveform 3742) and ramp signal 3364 (corresponding to Waveform 3740) compares and outputs a comparison signal 3385 to flip-flop element 339. In one embodiment, flip-flop element 339A also receives at least clock signal 3362' from oscillator 336's and generates signal 339b in another implementation. Alternatively, signal 3391 is received by _ gate 3366, and AND gate 3366 also receives clock signal 3362 and produces adjustment signal 3368. In yet another embodiment, driver component 3392 receives adjustment signal 3368 and generates drive semaphore 3393. ° As shown by waveforms 3720, 3740, and 3742, if ramp signal 3364 reaches voltage signal 3381 (e.g., 'CMP') then drive signal 3393 changes from a logic high level to a logic low level and switch 3330 is toggled. For example, when the switch 333 is turned off, the stored energy is delivered to the output of the power conversion system 3300 and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the secondary winding 3312 linearly ramps down. 66 201236345 Change === Winding of windings _ If u, the output of the power conversion system is light (for example, ν.), and the gamma and gamma are converted to eg ’. For example, the feedback signal 3343 (e.g., Vfb) is compared by demagnetization '___343 (e.g., ~) to a value of the letter (e.g., '0.1 V). As a matter of fact, when the feedback signal 3343 (eg, Vfb) rises to the threshold signal (example two w(8) m 3351 becomes a logic high level, which indicates the demagnetization process V 歼 . ' / skin shape 3770 is shown. According to another implementation For example, when the feedback signal 3343 (eg, FB falls below the threshold L number (eg, 〇 1V), the fine % signal 3351 becomes a logic low level 'which indicates the end of the demagnetization process. For example, when flowing through the secondary winding 3312 When the current drops to zero, the demagnetization process ends. In the interest, the magnetic power conversion system 33 enters the resonance subtraction state, and the signal is (for example, the beam is approximately sinusoidal. According to yet another embodiment) Waveform 372 and 迎, at the lower-rising edge of clock signal 3362, drive signal 3393 again becomes a logic high level and switch 3330 is again turned on. In one embodiment 'AC input signal 3315 is converted to rectified Enter the apostrophe 3313 (eg ' Vin) as follows: V2 xKm, xsin
2π ^ --·χ/ 、Τ \lAC J (45) 〇其中,Vin表示經整流的輸入信號3313 »另外,Vms表示AC輸入信 號3315的均方根大小,並且TAC表示AC輸入信號3315的週期。例如, Tac 等於 20 ms。 在另一示例中,峰值信號3337為 (46)2π ^ --·χ/ , Τ \lAC J (45) where Vin represents the rectified input signal 3313 » In addition, Vms represents the root mean square size of the AC input signal 3315, and TAC represents the period of the AC input signal 3315 . For example, Tac is equal to 20 ms. In another example, the peak signal 3337 is (46)
Vc2=^Xt〇nxRs 其中’I表示峰值信號3337。另外,t〇n表示驅動信號3393的脈寬, 並且Rs表示電阻器3324的電阻值。此外,Lp表示初級繞組3310的電感。 在又一示例中,基於等式42,信號3372等於Vc2 = ^Xt 〇 nxRs where 'I represents the peak signal 3337. In addition, t〇n represents the pulse width of the drive signal 3393, and Rs represents the resistance value of the resistor 3324. Further, Lp represents the inductance of the primary winding 3310. In yet another example, based on equation 42, signal 3372 is equal to
VcA - -fl^Joemag _ Ks_pk X ^Demag ^xC3 R3xC3 — (47) 67 201236345 其中,VC4表示信號3372,並且TDemag表示每個開關週期内的退磁處 理的持續時間。另外,R3表示電阻器3470的電阻值,並且c3表示電容器 3440的電容值。此外,表示信號3347的峰值,其例如等於να。 在又一示例中,如圖33所示,信號3372被平均並且使得信號1372 的平均值等於參考信號3335。根據一個實施例,如果 gm (48) 則, Γ『 (49) 其中,gm疋跨導放大器3334的跨導值,並且Ccmp是電容器⑽的電 容值。另外,Τ表示積分週期,並且Κ是遠大於i的正整數。例如,丁等 於或大於TAC。在另-示例中’K不小於3。在又一示例中,κ等於3小 6、10或20 〇在又一示例中,跨導放大器3334的頻寬遠小於ac輸 率。此外,V^示錢迎的平均值,並且^表轉 根,另一實施例,組合等式47和49,可以獲得下式: 77 ^ J0 ^cs-Pk X ^Demag^ = Χ^3Χ V , ’ (50) 根據又一實施例,基於等式44,雷M m 操作,則 ^ 原變換系統3300以固定開關頻率VcA - -fl^Joemag _ Ks_pk X ^Demag ^xC3 R3xC3 — (47) 67 201236345 where VC4 represents the signal 3372, and TDemag represents the duration of the demagnetization process in each switching cycle. Further, R3 represents the resistance value of the resistor 3470, and c3 represents the capacitance value of the capacitor 3440. Furthermore, it represents the peak value of the signal 3347, which is for example equal to να. In yet another example, as shown in FIG. 33, signal 3372 is averaged such that the average of signal 1372 is equal to reference signal 3335. According to one embodiment, if gm (48) then, (49) where gm is the transconductance value of transconductance amplifier 3334, and Ccmp is the capacitance value of capacitor (10). In addition, Τ denotes an integration period, and Κ is a positive integer much larger than i. For example, D is equal to or greater than TAC. In the other example, 'K is not less than 3. In yet another example, κ is equal to 3 small 6, 10 or 20 又一 In yet another example, the transconductance amplifier 3334 has a bandwidth that is much smaller than the ac rate. In addition, V^ shows the average value of the money, and the table turns to the root, and another embodiment, combining equations 47 and 49, can obtain the following formula: 77 ^ J0 ^cs-Pk X ^Demag^ = Χ^3Χ V [50] According to yet another embodiment, based on equation 44, Ray M m operates, then the original conversion system 3300 has a fixed switching frequency.
h——rNxT 1 fVcsh——rNxT 1 fVcs
Pk ,^Demag、了(Pk, ^Demag, (
N 1Y^TXJXV xTDema dt (51) 其中,I〇表示開關模式電源變換系統33〇〇 泣 她繞組3310與次級繞組3312之間的隨比。r^表不 的電阻值,其是常數。此外,τ夹 s T電阻器3324 是等於犯的電源變換系統纖的開關週期,其 根,又-實施例1 ’將等式44和5G與等式51組合,可以獲得下式: I0=-xNx~Lx_-—. 2 Rs 2xR5^C, 5 ^re/2~Ke/3 ~r-^^Vref (52)(53〕 68 201236345 則 ’。=去χ#χ + χ尺。X匕, (54) 曰一例如’基於等式54’由於1〇),\^4艮和:^都是常數,因此輸出電流1。 是恒定的。在另一示例中,電源變換系統3300意圖使 和乃保持恒定,以便使輸出電流I。保持恒定。在一個實施例中,通過至少 滿足等式48來使汾保持恒定。在另一實施例中,通過至 少滿足等式44來使I保持恒定。 如圖33所示’在一個實施例中,經整流的輸入電壓3313 (例如,vin) 由下式確定N 1Y^TXJXV xTDema dt (51) where I〇 denotes the switching mode power conversion system 33 soaring the ratio between the winding 3310 and the secondary winding 3312. r^ represents the resistance value, which is a constant. In addition, the τ clip s T resistor 3324 is equal to the switching period of the power conversion system fiber, and its root, again - Embodiment 1 ' Combining Equations 44 and 5G with Equation 51, the following equation can be obtained: I0=- xNx~Lx_--. 2 Rs 2xR5^C, 5 ^re/2~Ke/3 ~r-^^Vref (52)(53] 68 201236345 Then '.=去χ#χ + χ. X匕, (54) For example, 'based on Equation 54' is 1〇), \^4艮 and :^ are constants, so the output current is 1. It is constant. In another example, power conversion system 3300 is intended to keep sum and current in order to output current I. keep constant. In one embodiment, the enthalpy is held constant by satisfying at least Equation 48. In another embodiment, I is kept constant by at least satisfying equation 44. As shown in Figure 33, in one embodiment, the rectified input voltage 3313 (e.g., vin) is determined by
Vin: yf2xV xsin f 2π Λ -xt nns 、Tac / (55) 在另一實施例中’流經初級繞組3310的電流3311的峰值由下式確定Vin: yf2xV xsin f 2π Λ -xt nns , Tac / (55) In another embodiment, the peak value of the current 3311 flowing through the primary winding 3310 is determined by the following equation
Τ on Lp (56) 其中,Ip表示電流3311的峰值,並且Lp表示初級繞組3310的電感。 另外’ U表示驅動信號3393的脈寬。 圖38是根據本發明實施例之開關模式電源變換系統33〇〇的某些電流 j簡化時序圖。該示圖僅僅是示例,其不應當不當地限制申請專利範圍的 範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 _例如,波形3810表示作為時間的函數的電流3311 ,並且波形3820表 不作為時間的函數的經整流的輸入電流3317 (例如,Ιώ)β在另一示例中, 經整流的輸入電流3317 (例如,Iin)對應於如圖33所示的經整流的輸入 電壓3313 (例如,Vin)。 如圖38所示,在一個實施例中,經整流的輸入電流3317 (例如,Τ on Lp (56) where Ip represents the peak value of the current 3311, and Lp represents the inductance of the primary winding 3310. Further, 'U' represents the pulse width of the drive signal 3393. Figure 38 is a simplified timing diagram of certain currents j of a switched mode power conversion system 33A in accordance with an embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. For example, waveform 3810 represents current 3311 as a function of time, and waveform 3820 represents rectified input current 3317 (eg, Ιώ) β as a function of time. In another example, rectified input current 3317 (eg, Iin) corresponds to the rectified input voltage 3313 (eg, Vin) as shown in FIG. As shown in FIG. 38, in one embodiment, the rectified input current 3317 (eg,
(57) 其中’ Iin表示經整流的輸入電流3317。在另一實施例中,組合等式 56與等式57,可以獲得: 69 (58)201236345 2^LpxTs 在又一實施例中, 2 Kef2-Kf3 (59) 其中,VCmP表示信號3381。另外,v 362〇和363〇的常數。例如,基於 V邮是分別表示參考信號 輸入信號3315的至少一個週期内是抟定、、果滿足等式48,則。在AC 號3315的至少一個週期内是恒定的。、並且因此,ναηρ在AC輸入信 如果Λ/ =-g? (60) 2χΖρΧΓ 則,根據等式58, 4 =M^vin 根據-個實施例,如圖38所示,基料心 的開_ Ts是恒定的;因此,Μ在AC輸入信號3315 ^至期 内也是正整數’並且電源變換系統3綱的功率因數(pF)等於i或者基 本上等於1。例如’電源變換系統33⑻的功率因數㈣)等於或大於〇 9。 根據另-實施例’通過至少滿足等式44和48,電源變換系統33〇〇的率 因數(PF)接近於1。 如上所述並在此強調,圖33僅僅是示例,其不應當不當地限制申請 專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修 改。例如’電源變換系統3300包括用於將AC輸入信號3315轉換為由初 級繞組3310接收的DC信號的一個或多個大容量電容器,如圖39所示。 圖39是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 例如,除了電源變換系統3900還包括電容器3910和3920、電阻器 3930以及電感器3940以外,電源變換系統3900與電源變換系統3300相 201236345 同。在另一示例中,電容器3910和3920、電阻器3930以及電感器3940 用來將AC輸入信號3915轉換為DC輸入信號3913 (例如,ViJ。 參考圖33和圖39,根據一個實施例,電源變換系統3900可以在功率 因數等於1或基本上等於1的情況下獲得恒定的輸出電流。例如,電源變 換系統3900的功率因數(PF)等於或大於〇.9。根據另一實施例,電源變 換系統3300被用來向一個或多個發光二極體提供功率,如圖4〇所示。 圖40是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統3300的簡化示圖《該示圖僅僅是示例,其不應當不當地限制 申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和 修改。例如,電源變換系統3300被用來向一個或多個發光二極體4〇1〇提 供功率。 圖41是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 電源變換系統4100包括初級繞組4110、次級繞組4112、輔助繞組 4114、電阻器 4120、4122、4124、4126 和 4128、開關 4130、跨導放大器 4134、逐週期峰值檢測器4136、上升邊緣遮沒元件4138、退磁檢測元^ 4150、振盈器416〇、AND閘4166、電容器4158、積分器417〇、比較器 4182、乘法器4184、觸發器元件4190、以及驅動元件4192。 例如,跨導放大器4134、逐週期峰值檢測器4136、上升邊緣遮沒元 件4138、退磁檢測元件4150、振盪器4160、AND閘4166、積分器4Π0、 比較器4182、乘法H 4184、觸發器元件4190以及驅動元件4192位於晶 片4140上。在另一示例中,晶片414〇至少包括端子4142、侧曰、 4148和4149。在又-示例中,系統侧是_模式返馳式電源變換系統。、 在又-示例中,退磁檢測元件415〇與如圖22所示的退磁檢測 2150相同。在又-示射,逐週期峰值檢測器4136與如圖所 期峰值檢測器2836相同。在又-示例中,積分器417〇與如圖^所^週 積分器3370相同。在又-示例中,振盪器侧與如圖%所示的振= 3360相同。在又-示财’齡^侧是在細職之 ^ 在每個開關週_的退磁處理結束時)被重置的逐週 J如’ 71 201236345 圖42 疋根據本發明實施例之開關模式電 該項 4Π3α^, 表不作為時齡 62 形 並倾形4230 函數的信號伽(例如,_),並且“ 4=42=示作為時間的 信號娜(例如餐)。此外,波形4250表示作^的函數的 號彻(例如,Vcs),並且波形侧表 3為=的函數的感測信 (例如,Vc2),並且、皮开,伽矣m為夺間的函數的♦值信號4137 波开M27〇mt 表乍為時間的函數的信號4185。此外, / 不作為時間的函數的〇績容信號4B卜並且波开 作為時間的函數的信號4172。 並且波$4280表不 考^ 41和圖42所示’在信號4162 (對應於波形4230)的上升邊緣 =還:193 (對應於波形422〇)變為邏輯高位準並且開關= Ϊ且3^列’流經初級繞組4η〇的電流4111線性地傾斜上升, ί = ’ Μ通過上升邊緣遮沒元件4138也線性地傾斜上 升。例如’ k號4147 (例如,Vcs)由逐週期峰值檢測器他接收檢測 ,4136檢痛關__的職4147的峰值並且輸料健號仰 對,於波开/4260) ’學值k號4137表示檢測到的信號4147的♦值。在 另-示例中,峰健號4137(例如,Vc2)由積分器㈣接收,積分器417〇 還接收驅動信號4193 (對應於波形422〇)和細^信號㈣(對應於波 开> 4270) ’並且向跨導放大器4134輸出信號斗⑺(對應於波形428〇)。 根據-個實施例’跨導放大器4134還接收參考信號4135(例如D, 並且作為回應,將信號4172 (例如,Ve4)與參考信號4135 (例如Vref) 之間的電壓差放大並轉換為電流信號,該電流信號進而被電容器4158轉 換為電壓信號4181 (例如,CMP)。例如,電壓信號4181 (例如,CMP) 在大小上隨著時間是恒定的。在另一示例中,電壓信號4181 (對應於波形 4242)由乘法器4184接收,乘法器4184還接收信號4183 (對應於波形 4240)。在又一示例中,信號4183通過電阻器4126和4128而與輸入信號 4113 (例如,Vin)成比例。 72 201236345 根據另一實施例’乘法器4184作為回應向比較器4182輸出信號4185 (對應於波形4262) ’比較器4182還接收感測信號4147 (對應於波形 4250)。例如,比較器4182將信號4185 (對應於波形4262)與感測信號 4147 (對應於波形4250)相比較,並且向觸發器元件419〇輸出比較俨號 4187 »在-個實施例中’觸發器元件419〇還至少接收來自振魅4ι^的 時鐘信號4162 ’並且產生信號4191。在另一實施例中,信號4ΐ9ι由娜 閘4166接收’AND間4166還接收時鐘信號4162並且產生調節信號侧。 在又-實施例中,驅動器元件4192接收調節信號4168,並且產生驅 號 4193。 ° 如波形4220、4250和4262所示,如果信號4147達到信號挪,則 驅動信號4193從邏輯高鱗縣邏輯低辦並且_ 鼓。例如, 當開關4130截止時,所儲存能量被遞送到電源變換系統侧的輸出並且 退磁處理開始。在p示财,在退磁處理_,流經次級繞組川 電流線性地傾斜下降。 舰Ϊ圖41所示,輔助繞組4114的輸出電壓(例如,D反映電源變 換么統侧的輸出電壓(例如’ V。) ’並且被電阻器侧和4122轉換為 =^號4143 (例如’ Vfb)。例如,_信號4143 (例如,由退磁(57) where 'Iin denotes the rectified input current 3317. In another embodiment, combining Equation 56 with Equation 57, it is possible to obtain: 69 (58) 201236345 2^LpxTs In yet another embodiment, 2 Kef2-Kf3 (59) where VCmP represents signal 3381. In addition, the constants of v 362 〇 and 363 。. For example, based on V-mail, it is indicated that at least one cycle of the reference signal input signal 3315 is determined, and the equation 48 is satisfied. It is constant during at least one cycle of AC number 3315. And, therefore, ναηρ is in the AC input signal if Λ / = -g? (60) 2 χΖ ρ , , according to the equation 58, 4 = M ^ vin according to an embodiment, as shown in Figure 38, the opening of the base material _ Ts is constant; therefore, Μ is also a positive integer ' during the AC input signal 3315 ^ to the period and the power factor (pF) of the power conversion system 3 is equal to i or substantially equal to 1. For example, the power factor (four) of the power conversion system 33 (8) is equal to or greater than 〇 9. According to another embodiment, the rate factor (PF) of the power conversion system 33A is close to 1 by satisfying at least Equations 44 and 48. As noted above and emphasized herein, Figure 33 is merely an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. For example, the power conversion system 3300 includes one or more bulk capacitors for converting the AC input signal 3315 into a DC signal received by the primary winding 3310, as shown in FIG. Figure 39 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This diagram is only an example and should not unduly limit the scope of the patent application. Those skilled in the art will recognize many variations, substitutions and modifications. For example, the power conversion system 3900 is the same as the power conversion system 3300 201236345 except that the power conversion system 3900 further includes capacitors 3910 and 3920, a resistor 3930, and an inductor 3940. In another example, capacitors 3910 and 3920, resistor 3930, and inductor 3940 are used to convert AC input signal 3915 to DC input signal 3913 (eg, ViJ. Referring to Figures 33 and 39, according to one embodiment, power conversion System 3900 can obtain a constant output current with a power factor equal to 1 or substantially equal to 1. For example, power factor (PF) of power conversion system 3900 is equal to or greater than 〇.9. According to another embodiment, power conversion system 3300 is used to provide power to one or more of the light emitting diodes, as shown in Figure 4A. Figure 40 is a simplified illustration of a switched mode power conversion system 3300 for powering a light emitting diode in accordance with yet another embodiment of the present invention. The illustrations are merely examples, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, the power conversion system 3300 is used to A plurality of light-emitting diodes provide power. Figure 41 is a simplified diagram of a switch mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. The drawings are merely examples, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions, and modifications. The power conversion system 4100 includes primary windings 4110, times. Stage winding 4112, auxiliary winding 4114, resistors 4120, 4122, 4124, 4126 and 4128, switch 4130, transconductance amplifier 4134, cycle-by-cycle peak detector 4136, rising edge blanking element 4138, demagnetization detecting element ^ 4150, vibration 416, AND gate 4166, capacitor 4158, integrator 417, comparator 4182, multiplier 4184, flip-flop element 4190, and drive element 4192. For example, transconductance amplifier 4134, cycle-by-cycle peak detector 4136, rising edge Masking element 4138, demagnetization detecting element 4150, oscillator 4160, AND gate 4166, integrator 4Π0, comparator 4182, multiplication H 4184, flip-flop element 4190, and drive element 4192 are located on wafer 4140. In another example, wafer 414〇 includes at least terminal 4142, side turns, 4148, and 4149. In yet another example, the system side is a _mode flyback power conversion system. The demagnetization detecting element 415 is the same as the demagnetization detecting 2150 shown in Fig. 22. In the again-show, the cycle-by-period peak detector 4136 is identical to the peak detector 2836 as shown. In the re-example, the integrator 417 相同 is the same as the integrator 3370 shown in Fig. 2. In the example - the oscillator side is the same as the vibration = 3360 shown in Fig. %. At the end of each switch cycle _ demagnetization process, the cycle is reset, such as '71 201236345. FIG. 42 开关 according to the embodiment of the present invention, the switch mode electric item 4Π3α^, the table is not 62 years old and is inclined 4230 The signal gamma of the function (for example, _), and "4 = 42 = shows the signal Na as a time (for example, meal). Further, the waveform 4250 represents the number of the function of ^ (for example, Vcs), and the waveform side table 3 is a sensing signal of a function of = (for example, Vc2), and the skin is opened, and the gamma m is a function of the traverse. The ♦ value signal 4137 is on the M27 〇mt table as a function of time 4185. In addition, / is not a function of time and the signal is 4B and the signal is 4172 as a function of time. And the wave $4280 does not test ^ 41 and Figure 42 shows the rising edge of the signal 4162 (corresponding to the waveform 4230) = also: 193 (corresponding to the waveform 422 〇) becomes a logic high level and the switch = Ϊ and 3 ^ column The current 4111 flowing through the primary winding 4n is linearly ramped up, and ί = 'Μ is also linearly ramped up by the rising edge blanking element 4138. For example, 'k 4147 (for example, Vcs) is detected by the cycle-by-cycle peak detector, 4136 checks the peak of the 4147 of the __ __ and the feed is positive, and the wave is /4260) 'K value 4137 represents the value of ♦ of the detected signal 4147. In another example, peak health number 4137 (eg, Vc2) is received by integrator (4), and integrator 417A also receives drive signal 4193 (corresponding to waveform 422〇) and fine signal (four) (corresponding to wave open > 4270 And 'outputs a signal hopper (7) to the transconductance amplifier 4134 (corresponding to waveform 428A). The transconductance amplifier 4134 also receives a reference signal 4135 (eg, D, and in response, amplifies and converts the voltage difference between the signal 4172 (eg, Ve4) and the reference signal 4135 (eg, Vref) into a current signal, in response thereto. The current signal is in turn converted by capacitor 4158 into a voltage signal 4181 (eg, CMP). For example, voltage signal 4181 (eg, CMP) is constant in magnitude over time. In another example, voltage signal 4181 (corresponding The signal is received by multiplier 4184, and multiplier 4184 also receives signal 4183 (corresponding to waveform 4240). In yet another example, signal 4183 is proportional to input signal 4113 (e.g., Vin) by resistors 4126 and 4128. 72 201236345 According to another embodiment, the multiplier 4184 outputs a signal 4185 (corresponding to waveform 4262) to the comparator 4182. The comparator 4182 also receives the sense signal 4147 (corresponding to the waveform 4250). For example, the comparator 4182 will Signal 4185 (corresponding to waveform 4262) is compared to sense signal 4147 (corresponding to waveform 4250) and outputs a comparison apostrophe 4187 to flip-flop element 419 » » in one embodiment The device element 419A also receives at least the clock signal 4162' from the stun and generates a signal 4191. In another embodiment, the signal 4ΐ9i is received by the NAND gate 4166. The AND between 4166 also receives the clock signal 4162 and produces an adjustment signal side. In a further embodiment, driver component 4192 receives adjustment signal 4168 and generates a drive number 4193. ° As shown by waveforms 4220, 4250, and 4262, if signal 4147 reaches a signal shift, then drive signal 4193 is from logic high scale logic. For example, when the switch 4130 is turned off, the stored energy is delivered to the output of the power conversion system side and the demagnetization process starts. At p, the demagnetization process _, the current flowing through the secondary winding is linearly The ship is tilted down. The ship's output voltage is shown in Figure 41 (for example, D reflects the output voltage of the power conversion side (eg 'V.)' and is converted to =^4143 by the resistor side and 4122 ( For example 'Vfb). For example, _ signal 4143 (for example, by demagnetization
==㈣接收’元件415〇將回饋信號4143 (例 唬(例如,0.1 V)相比較。 辨阎值L 的心纟健4151縣龍高轉,雜錢磁處理 低位準,奸-/靜(物’ G_1V)以下時’⑽喂信號4151變為邏輯 降到幾乎為二退丄當流經次級繞組4112的電流下 近似為正皆振減狀態,並且回績信號4143 (例如,VFB) 4162的下」上升實施例’如波形棚和所示,在時鐘信號 再次導通。處’驅動信號4193再次變為邏輯高位準並且開關 在個實施例中,如圖41所示,輪出電流為 73 201236345 L = —χΝ^~τχ 2==(4) Receiving 'component 415〇 compares the feedback signal 4143 (for example, 0.1 V). The heart value of the L L 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 When the object 'G_1V' is below, '(10) the feed signal 4151 becomes logically reduced to almost two retreats. When the current flowing through the secondary winding 4112 is approximately the positive-synchronization state, and the return signal 4143 (for example, VFB) 4162 The lower "rise embodiment" as shown in the waveform shed and shown, is turned on again at the clock signal. The drive signal 4193 again becomes a logic high level and the switch is in one embodiment, as shown in Figure 41, the wheel current is 73. 201236345 L = —χΝ^~τχ 2
Rs c〇xKe/ (62) 其中’I〇表示開關模式電源變換系統4100的輸出電流。另外,N是表 示初級繞組4110與次級繞組4112之間的匝數比的常數。此外,&表示電 阻器4124的電阻值,並且Vref表示參考信號4135,心和Vref都是^定的。 此外,K〇是常數。 例如,為了獲得等式62,電源變換系統41〇〇以固定開關頻率操作, 並且 ' / __!__ (63)Rs c〇xKe/ (62) where 'I 〇 denotes the output current of the switched mode power conversion system 4100. Further, N is a constant indicating the turns ratio between the primary winding 4110 and the secondary winding 4112. Further, & represents the resistance value of the resistor 4124, and Vref represents the reference signal 4135, and both the heart and Vref are fixed. In addition, K〇 is a constant. For example, to obtain equation 62, power conversion system 41 操作 operates at a fixed switching frequency, and ' / __!__ (63)
2^rxCcmp KxTAC 其中,gm是跨導放大器4134的跨導值,並且%是電容器侧的電 容值。另外,TAC表示AC輸入信號4115的週期,並且κ是遠大於丨的正 整數。例如’ Κ不小於3。在另一示例中,κ等於3、5、6、1〇戋2〇。 在又一示例中’跨導放大器4134的頻寬遠小於AC輸入信號仙5的頻率。 在又-示例中,基於等式62’由於1^邮心和]^都是常數,因此輸 是恒定的。在另-示例中’電源變換系統41〇〇意圖使 fxi匕-〆和7:保持恒定,以便使輸出電流τ。保持恒定。^表八 週期丄义,Τ,於,大於TAC。在—個實施例中,通過至少滿足等式二 來使ρί〆~保持恒定。在另—實施财,通過紐器 忑保持恒定。 如圖41所示,在-個實施例中’信號4185被確定為如下:2^rxCcmp KxTAC where gm is the transconductance value of the transconductance amplifier 4134, and % is the capacitance value on the capacitor side. In addition, TAC represents the period of the AC input signal 4115, and κ is a positive integer much larger than 丨. For example, 'Κ is not less than 3. In another example, κ is equal to 3, 5, 6, 1〇戋2〇. In yet another example, the bandwidth of the transconductance amplifier 4134 is much smaller than the frequency of the AC input signal. In the again-example, based on the equation 62', since both the 1st and the heart are constant, the input is constant. In another example, the power conversion system 41 is intended to keep fxi匕-〆 and 7: constant so as to cause the output current τ. keep constant. ^表八 Cycle 丄 meaning, Τ, 于, greater than TAC. In one embodiment, ρί〆~ is kept constant by satisfying at least Equation 2. In another implementation, the money is kept constant through the button. As shown in Figure 41, the signal 4185 is determined as follows in one embodiment:
Ks pk ~r mp :^Kmi,xKult=axVempKs pk ~r mp :^Kmi,xKult=axVemp
xF (64) 其中’ Vcs』k表示感測信號4147的峰值,並且、表示信號侧 外π是乘法器4184的恒钱數。此外,%表示信號4⑻並且 表不仏號4183。此外’尺3和!^分別表示電阻器斗似和他的 並且Vin表示經整流輸入電壓4Π3。 在另一示例中’感測信號4147的峰值為xF (64) where 'Vcs』k represents the peak value of the sensing signal 4147, and represents that the signal side π is the constant money number of the multiplier 4184. In addition, % represents signal 4 (8) and is not nicknamed 4183. Also ‘foot 3 and! ^ Represents the resistance of the resistor and his and Vin respectively represents the rectified input voltage of 4Π3. In another example, the peak value of the sense signal 4147 is
Ks_pk =γ-χΐ〇ηΧ^ (65) 201236345 其中,ton表示驅動信號4193的脈寬,並且rs表示電阻器4124的電 阻值。另外’ Lp表示初級繞組4110的電感。 組合等式64和65,可以獲得下式: αχKs_pk = γ - χΐ〇 Χ Χ ^ (65) 201236345 where ton represents the pulse width of the drive signal 4193, and rs represents the resistance value of the resistor 4124. Further, 'Lp denotes the inductance of the primary winding 4110. By combining equations 64 and 65, the following equation can be obtained: αχ
Kmp L· (66) 例如,基於等式66,如果滿足等式63,則1〇11在八(:輸入信號4115的 至少一個週期内是恒定的,並且因此,Vcmp在AC輸入信號4115的至少一 個週期内是恒定的。 在另一示例中,如圖41所示,與經整流的輸入電壓4113 (例如,Vjj 相對應的經整流輸入電流4117 (例如,D為 (67) 2x1x7 其中,Iin表示經整流的輸入電流4117,並且Ts表示電源變換系統41〇〇 的開關週期。 (68) 如果M =--22- ^Lp^Ts 則,根據等式67,Kmp L· (66) For example, based on Equation 66, if Equation 63 is satisfied, then 1〇11 is constant at least one cycle of the input signal 4115, and therefore, Vcmp is at least at the AC input signal 4115. In one example, it is constant. In another example, as shown in FIG. 41, the rectified input current 4117 corresponding to the rectified input voltage 4113 (eg, Vjj (eg, D is (67) 2x1x7 where Iin Represents the rectified input current 4117, and Ts represents the switching period of the power conversion system 41. (68) If M = -22 - ^Lp^Ts, according to Equation 67,
Iin=MxVin ⑽) 根據一個實施例,如圖41所示,電源變換系統41〇〇的開關週期ts 是恒定的,並且“在AC輸入信號4115的至少一個週期内是恒定的;因 此,Μ在AC輸入信號4115的至少一個週期内也是正整數,並且電源變 換系統4100的功率因數(PF)等於1或者基本上等於例如,電源變換 系統4100的功率因數(pf)等於或大於〇 9。根據另一實施例,通過至少 使開關頻率保持恒定並且滿足等式63,電源變換系統4100的功率因數 (PF)等於1或者基本上等於!。 如上所述並在此強調,圖41僅僅是示例,其不應當不當地限制申請 專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修 改。例如,電源變換系統4100包括用於將AC輸入信號4115轉換為由初 級繞組4110接收的DC信號的一個或多個大容量電容器。 75 201236345 參考圖41,根據一個實施例,電源變換系統4100可以在功率因數等 於1或基本上等於1的情況下獲得恒定的輸出電流。根據另一實施例,電 源變換系統4100被用來向一個或多個發光二極體提供功率,如圖43所示。 圖43是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統4100的簡化示圖。該示圖僅僅是示例,其不應當不當地限制 申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和 修改。例如,電源變換系統4100被用來向一個或多個發光二極體431〇提 供功率。 圖44是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖。該示圖僅僅是示例,其不應當不當地限制申請專 利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修改。 電源變換系統4400包括初級繞組4410、次級繞組4412、輔助繞組 4414、電阻器 4420、4422 和 4424、開關 4426、放大器 4428、開關 4430、 跨導放大器4434、逐週期峰值檢測器4436、上升邊緣遮沒元件4438、退 磁檢測元件4450、振盪器4460、AND閘4466、電容器4458、積分器4470、 比較器4482、乘法器4484、觸發器元件4490、以及驅動元件4492。 例如,跨導放大器4434、逐週期峰值檢測器4436、上升邊緣遮沒元 件4438、退磁檢測元件4450、振盪器4460、AND閘4466、積分器4470、 比較器4482、乘法器4484、觸發器元件4490以及驅動元件4492位於晶 片4440上。在另一示例中,晶片444〇至少包括端子4442、4444、4446 和4448。在又-示例中,系統棚是開關模式返馳式電源變換系統。在 又一示例中’積分器4470是在每個開關週期之後(例如,在每個開關週 期内的退磁處理結束時)被重置的逐週期積分器。 根據-個實關’她繞組441G、她繞組4412、輔輯組4414、 電阻器4420、4422和4424、開關443〇、跨導放大器_、逐週期峰值檢 測器4436、上升邊緣遮沒元件、退磁檢測元件侧、振盈器 ' AND間4466、t容胃觀、胃侧、比健術娜^件·、 以及驅動元件4492分雜如下元件姻·_她敝侧、她繞组4ii2、 辅助繞組他、電阻器4120、4122和4124、開關413〇、跨導放大器4134、 逐週期峰值檢測器4136、上升邊緣遮沒元件4138、退磁檢測元件415〇、 76 201236345 振盪器4160、AND閘4166、電容器4158、積分器4170、比較器4182、 觸發器元件4190、以及驅動元件4192。 根據另一實施例,開關4430由驅動信號4493控制。例如,如果驅動 信號4493為邏輯高位準,則開關4430閉合。在另一實施例中,當開關4493 閉合時,回饋信號4443 (例如,VFB)通過放大器4428 (例如,運算放大 器)被鉗位到地位準。在又一示例中’回饋信號4443 (例如,VFB)被設 置為零,並且電流信號4483由下式確定Iin = MxVin (10)) According to one embodiment, as shown in Figure 41, the switching period ts of the power conversion system 41A is constant and "constant during at least one cycle of the AC input signal 4115; The AC input signal 4115 is also a positive integer for at least one period, and the power factor (PF) of the power conversion system 4100 is equal to 1 or substantially equal to, for example, the power factor (pf) of the power conversion system 4100 is equal to or greater than 〇9. In one embodiment, by at least keeping the switching frequency constant and satisfying Equation 63, the power factor (PF) of the power conversion system 4100 is equal to 1 or substantially equal to !. As noted above and emphasized herein, FIG. 41 is merely an example, The scope of the claimed patents should not be unduly limited. Those skilled in the art will recognize many variations, substitutions, and modifications. For example, power conversion system 4100 includes means for converting AC input signal 4115 to be received by primary winding 4110. One or more bulk capacitors of the DC signal. 75 201236345 Referring to FIG. 41, according to one embodiment, the power conversion system 4100 can be A constant output current is obtained with a factor equal to 1 or substantially equal to 1. According to another embodiment, power conversion system 4100 is used to provide power to one or more of the light emitting diodes, as shown in Figure 43. Figure 43 is A simplified diagram of a switched mode power conversion system 4100 for powering a light emitting diode in accordance with yet another embodiment of the present invention. This illustration is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, power conversion system 4100 is used to provide power to one or more of the light-emitting diodes 431. Figure 44 is a primary side feel in accordance with yet another embodiment of the present invention. A simplified diagram of a measured and adjusted switched mode power conversion system. This illustration is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. The power conversion system 4400 includes a primary winding 4410, a secondary winding 4412, an auxiliary winding 4414, resistors 4420, 4422, and 4424, a switch 4426, and amplification. 4428, switch 4430, transconductance amplifier 4434, cycle-by-cycle peak detector 4436, rising edge blanking component 4438, demagnetization detecting component 4450, oscillator 4460, AND gate 4466, capacitor 4458, integrator 4470, comparator 4482, multiplication 4484, flip-flop element 4490, and drive element 4492. For example, transconductance amplifier 4434, cycle-by-cycle peak detector 4436, rising edge blanking element 4438, demagnetization detecting element 4450, oscillator 4460, AND gate 4466, integrator 4470 The comparator 4482, the multiplier 4484, the flip-flop element 4490, and the driving element 4492 are located on the wafer 4440. In another example, wafer 444A includes at least terminals 4442, 4444, 4446, and 4448. In yet another example, the system shed is a switch mode flyback power conversion system. In yet another example, the integrator 4470 is a cycle-by-cycle integrator that is reset after each switching cycle (e.g., at the end of the demagnetization process during each switching cycle). According to a real turn 'her winding 441G, her winding 4412, auxiliary group 4414, resistors 4420, 4422 and 4424, switch 443 〇, transconductance amplifier _, cycle-by-cycle peak detector 4436, rising edge occlusion component, demagnetization The detection component side, the vibrator 'AND between the 4466, the t-stomach view, the stomach side, the health control element, and the drive element 4492 are mixed with the following components: _ her side, her winding 4ii2, auxiliary winding He, resistors 4120, 4122 and 4124, switch 413, transconductance amplifier 4134, cycle-by-cycle peak detector 4136, rising edge blanking element 4138, demagnetization detecting element 415, 76 201236345 oscillator 4160, AND gate 4166, capacitor 4158, an integrator 4170, a comparator 4182, a flip-flop element 4190, and a drive element 4192. According to another embodiment, the switch 4430 is controlled by the drive signal 4493. For example, if drive signal 4493 is at a logic high level, switch 4430 is closed. In another embodiment, when switch 4493 is closed, feedback signal 4443 (e.g., VFB) is clamped to a positive position by amplifier 4428 (e.g., an operational amplifier). In yet another example, the feedback signal 4443 (e.g., VFB) is set to zero, and the current signal 4484 is determined by
Ifb = 1~T= ΊΓχν^ (70) 1 \ P Ji 其中,Ifb表示電流信號4483。另外,Vin表示經整流的輸入電壓4413, 並且Vaux表示輔助電壓4419。此外,Naux是輔助繞組4414的匝數,並且 Np是初級繞組4410的匝數。此外’ &表示電阻器4420的電阻值。 在又一示例中,基於等式70,電流信號4483與經整流輸入電壓4413 成比例,如下: lFBXVin (71) 根據又一實施例,電流信號4483由乘法器4484接收,乘法器4484 還接收電壓信號4481並且向比較器4482輸出信號4485。例如,信號4485 由下式確定: ° ' (72)Ifb = 1~T= ΊΓχν^ (70) 1 \ P Ji where Ifb represents the current signal 4484. In addition, Vin represents the rectified input voltage 4413, and Vaux represents the auxiliary voltage 4419. Further, Naux is the number of turns of the auxiliary winding 4414, and Np is the number of turns of the primary winding 4410. Further, ' & represents the resistance value of the resistor 4420. In yet another example, based on equation 70, current signal 4484 is proportional to rectified input voltage 4413 as follows: FBXVin (71) According to yet another embodiment, current signal 4484 is received by multiplier 4484, which also receives voltage Signal 4481 and a signal 4485 is output to comparator 4482. For example, signal 4485 is determined by: ° ' (72)
Vm〇^bxVcn,P^lFB 其中,vm。表示信號4485。另外,vcmp表示電壓信號4481,並且b是 乘法器4484的恒定係數。 在另-示例中,將等式72與等式64相組合可以看出,信號娜與 信號4185類似並且與電壓信號4481和經整流的輸入電壓4413的積成比 例,如下: (73) dt 和Vm〇^bxVcn, P^lFB where vm. Indicates signal 4485. In addition, vcmp represents a voltage signal 4481, and b is a constant coefficient of the multiplier 4484. In another example, combining equation 72 with equation 64, it can be seen that signal Na is similar to signal 4185 and is proportional to the product of voltage signal 4481 and rectified input voltage 4413, as follows: (73) dt and
Vn^o^V xVin 根據一個實施例,電源變換系統44〇〇意圖使丄 使 7XJ。 持恒定 定以做輸出電流1(5保持恒定。例如’通Γ過至少滿足等k 63來 "Γ 胃〆〖保持恒定。在另一示例中,通過振盪器446〇來使c保 77 201236345 根據另一實施例,如至少等式73所示,通過至少使開關頻率保持恒 定並且滿足等式63,電源變換系統4400的功率因數(PF)等於1或者基 本上等於1。例如,電源變換系統4400的功率因數(pf)等於或大於0.9。 如上所述並在此強調’圖44僅僅是示例’其不應當不當地限制申請 專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和修 改。例如’電源變換系統4400包括用於將AC輸入信號4415轉換為由初 級繞組4410接收的dc信號的一個或多個大容量電容器。 參考圖44,根據一個實施例,電源變換系統4400可以在功率因數等 於1或基本上等於1的情況下獲得恒定的輸出電流。根據另一實施例,電 源變換系統4400被用來向一個或多個發光二極體提供功率,如圖45所示。 圖45是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統4400的簡化示圖。該示圖僅僅是示例,其不應當不當地限制 申請專利範圍的範疇。熟知該項技術領域之人將認識到許多變體、替換和 修改。例如,電源變換系統4400被用來向一個或多個發光二極體451〇、 供功率。 根據另一實施例,一種用於調整電源變換器的系統(例如,如圖21 所不)包括:第一信號產生器(例如,如元件215〇所示),配置以接收第 一感測信號並且產生與退磁相關聯的輸出信號。所述第一感 到電源變換騎次級繞_第-繞組有關,並且所述魏繞组至少盘= 電源變換器的輸出f流相_。另外,該线包括斜駿號產生器(例如, 如元件2170、2160、2162、2164、2166和2172的組合所示),酉己置以接 收所述輸出信號並且產生斜坡魏(例如,如健挪所示”以及第一 =交器(例如’如猶2182所示)’配置以接收所述斜坡信號和第一閨值 U虎(例如’如城2183所示)’並且至少級麟料坡減和所 二閾值信號侧聯的資訊產生第—比較信號^此外,該系統包括第二比較 器(例如,如元件2180所示),配置以接收第二感測信號(例如,如信 ϋ所Γ)和第二_信號並且產生第二味信號。所述第二感測信號與 外,«統包括第二信號產生器(例如,如元件测所示),配置以至= 接收所述第-比較信號和所述第二比較信號並且產生調節信號(例如,如 78 201236345 信號2191所示);以及間驅動器(例如,如元件加 (例如,如钱簡所示)。所述 ^^聯。峨咖靡魏雖_細酬期之比保 竇银實施例…種用於調整電源變換器的方法(例如,如圖21 收第一感測信號。所述第一感測信號她合到電源變換器 的=出電=有關,t相關聯’並且所述次級繞組至少與所述電源變換器 :方法包括至少基於與所述第-感測信號相關聯 t ί= 咖纖觸目卿。糾省法包括接 少基於與所述輸出信號相關聯的資訊產生斜坡信號; =斤述斜坡信號和第-聽信號;處理與斜坡信號和所述第一間值 基於與所述斜坡信號和所述第__間值信號相關聯 值广號所、f 7 /號。此外,該方法包括接收第二感測信號和第二閾 第—感測信號與流經麵合到所述電源變換器的次級繞組的初 ==的第-電流相關聯。另外,該方法包括處理與所述第二感測信號和 斤^第-閾值信號相關聯的資訊;至少基於與所述第二感測信號和所述第 j值信細刚資訊產生第二比較親;接收所述第—比較信號和所 i第二比較信號;處理與所述第一比較信號和所述第二比較信號相關聯的 ΐ調『ΐΠΓΐΓ比較信號和所述第二比較信號相關聯的資訊產 2即W。此外,该方法包括接收所述調節信號;至少基於與所述調節 W相關聯的資訊來向開__動信號,以影響流經所述初級繞組 述第-電流。所述輸出信號與退磁持續時間相關聯,並且所述驅動信 開關週期侧聯。使所述退磁持續咖與所賴關職之比雜恒定;。、 根據又-實施例’-種用於調整電源變換器的系統(例如,如 圖24所不)包括第-信號產生器(例如,如元件52〇或元件勘所示' 配=以至少接收輸人信號並且至少產生與退__的輸出信號,所 入信號至少與《變換n的輪㈣流相_。另外,齡統包括第1 器(例如’如元件542或者如元件251〇、252〇、262〇和沉%的組合所示)制 79 201236345Vn^o^V xVin According to one embodiment, the power conversion system 44 is intended to enable 7XJ. Keep constant for output current 1 (5 remains constant. For example, 'passing at least satisfying etc. k 63 " 〆 stomach 〆 〖maintained constant. In another example, by oscillator 446 〇 to make c Bao 77 201236345 According to another embodiment, the power factor (PF) of the power conversion system 4400 is equal to 1 or substantially equal to 1 by at least keeping the switching frequency constant and satisfying Equation 63, as shown by at least Equation 73. For example, a power conversion system The power factor (pf) of 4400 is equal to or greater than 0.9. As mentioned above and emphasized herein, 'FIG. 44 is merely an example' and should not unduly limit the scope of the scope of the patent application. Those skilled in the art will recognize many variations. Body, replacement, and modification. For example, 'power conversion system 4400 includes one or more bulk capacitors for converting AC input signal 4415 into a dc signal received by primary winding 4410. Referring to Figure 44, a power conversion is performed in accordance with one embodiment System 4400 can obtain a constant output current with a power factor equal to 1 or substantially equal to 1. According to another embodiment, power conversion system 4400 is used to One or more of the light emitting diodes provide power, as shown in Figure 45. Figure 45 is a simplified diagram of a switched mode power conversion system 4400 for powering a light emitting diode in accordance with yet another embodiment of the present invention. It is merely an example, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, the power conversion system 4400 is used to direct one or more light emitting diodes Body 451 〇, power supply. According to another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 21) includes: a first signal generator (eg, as shown by element 215 )), configured Receiving a first sensed signal and generating an output signal associated with demagnetization. The first sensed power change ride is related to a secondary winding, and the Wei winding has at least a disk = output f flow of the power converter In addition, the line includes a skew generator (eg, as shown by the combination of elements 2170, 2160, 2162, 2164, 2166, and 2172), which is set to receive the output signal and generate a ramp ( For example, as indicated by the "health" and the first = communicator (eg, as indicated by JAP 2182) is configured to receive the ramp signal and the first threshold U tiger (eg, as shown in city 2183) and at least The information of the cascaded slope and the threshold signal of the second threshold signal produces a first comparison signal. Further, the system includes a second comparator (eg, as shown by element 2180) configured to receive the second sensed signal (eg, as And the second signal and generating a second taste signal. The second sensing signal and the external signal include a second signal generator (for example, as shown by the component), configured to = receive The first-comparison signal and the second comparison signal are generated and an adjustment signal is generated (e.g., as indicated by 78 201236345 signal 2191); and an inter-driver (e.g., as an element plus (e.g., as shown by the currency). The ^^ union.峨 靡 靡 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The converter = power-down = related, t is associated with 'and the secondary winding is at least with the power converter: the method comprises at least based on being associated with the first-sensing signal t ί = The provincial method includes generating a ramp signal based on information associated with the output signal; a ramp signal and a first-listening signal; processing and ramping signals and the first inter-value based on the ramp signal and The __inter-value signal is associated with a wide number, f 7 /. Further, the method includes receiving the second sensing signal and the second threshold first sensing signal and flowing through the power converter The first current of the secondary winding is associated with a first current. In addition, the method includes processing information associated with the second sensing signal and the first threshold signal; at least based on the second sensing signal And the j-th letter information information generates a second comparison pro; receiving the first Comparing the signal and the second comparison signal; processing the information product 2 associated with the first comparison signal and the second comparison signal, ie, the comparison signal and the second comparison signal. Additionally, the method includes receiving the adjustment signal; at least based on information associated with the adjustment W, an open signal to affect a current flowing through the primary winding. The output signal and demagnetization duration Correspondingly, and the driving signal switching period is flanked. The ratio of the demagnetization continuation to the affiliation is constant; according to the embodiment - a system for adjusting the power converter (for example, As shown in FIG. 24, including a first-signal generator (for example, as shown in the element 52 or the component shown), the output signal is at least received and at least generated with the __, and the incoming signal is at least Transforming the wheel of the n (four) flow phase _. In addition, the age includes the first device (eg 'as shown by element 542 or as a combination of elements 251 〇, 252 〇, 262 〇 and sink %) 79 201236345
1 叫且*Λ«王,,接收 至少產生調節信號。此外,該系 ^且从王少接收所述時鐘信號和所述第二控制信號,並且 號此外,S亥系統包括閘驅動器(例如,如元件546或元 1 於ϋϋ t置以至少接收所述瓣信號並且向關至少輸出驅動信 ^.iLn己以衫響流經所述初級繞組的所述第一電流。所述輸出信 ’退磁持猶間(例如,TDemag)相襲,並且所述驅動信號與開關週 、=例如’ Ts)相_。齡統還配置以使所述退磁持射_所述開關 週期之比保持恒定,並錄所述第—感;聰號的峰值在大小上保持恒定。 根據又—實施例’―種用於調整電源變換器的方法(例如,如圖7或 圖24實現一的)包括:至少接收輸入信號,並且至少基於與所述輸入信號 相關聯的資絲至)產生輸出信號。所述輸人信號至少與電源變換器的輸 出電流有^ ’並且所述輸出信號與退磁有I另外,該方法包括至少接收 所述輸號;處理與所述輸出信號相關聯的資訊;至少基於與所述輸出 信號相關聯的資訊來至少產生時鐘信號。此外,該方法包括接收感測信號 和閾值信號。所述感測信號與流經所述電源鶴騎她繞組的第一電流 ^關聯。此外’妨法包域理與所述制紐和所述雖信號相關聯的 : 至>、基於與所述感測彳^號和所述閾值信號相關聯的資訊產生控制信 號;^少接收所述時鐘#號和所述控制信號;處理與所述時鐘1 言號和所^ 控制信號相襲的資訊;至少基於與所述_信號和所龍制信^目關聯 的資絲至J產生調節信號。另外,該方法包括至少接收所述調節信號; 至少基於與所述瓣資訊糊聯的f訊_關至少輸出驅動信號,以影響 流經所述初級繞組的所述第一電流。所述輸出信號與退磁“; 聯,並且所述驅動信號與開關週期相關聯。使所述退磁持續時間與所述開 201236345 ^週期之比保持恒定,並且使所述第—感測信號的峰值在大小上保持恒 式J^f-又""實施例,—種用於調整電源變換11的系統(例如,如圖28 1笛-二,丄包括第一信號產生器(例如,如元件2850所示),配置以接 號與搞號並且產生與退磁細聯的第-輸出信號。所述第一感測信 第—_關,壯所述次級繞組至 Ls 原變換盗的輸出電流相關聯。另外,該系統包括第一斜坡信號 ^ ^ 2860'2862'2864'2866'2870 2872 於2865 所述第—輸出信號並且產生第—斜坡信號(例如’如信 第°-钭破Γ比㈣(例如,如元件2882所示),配置以接收所述 閾健號(例如,如信號2883所示),並且至少基於 r/二""斜?,號和所述第—閾值信號相關聯的資訊產生第-比較信、 i件號2885所示 > 此外,該祕包括峰值檢測11 (例如,如 不配置以接收驅動信號(例如,如信號2893所示)和第’ 信號(例如,如信號2847所示)並且產生峰值錢(例如,如信 \ 7所7F )。賴L聽賴流雜合酬 、 :=^^,電流相義。此外,«統包括放大器(C = 件2834 —)’配置以接收所述峰健號和第二·信號(例如,如作號 2835所不)並且通過電容器產生第二輸出信號(例如,如信號〗咖所矛: 所述電容器被麵合到所述放大器;第二比較器(例如,如元件2咖 配置以接收所述第二輸出信號和第二斜坡信號(例如,如信號加 並且產生第二比較信號(例如,如信號膽所示)。另外,該 二信號產生器(例如,如元件厕所示),配置以至少接收所述第一比較 信號和所述第二比較信號,並且產生調節信號(例如,如信號289 以及閘驅動器(例如,如元件纖所示),配置以接收所 並且 ::==:r一。所述開關配置-響流經所 根據又-實施例’-種用於調整電源變換器的方法(例如 或圖32實現的)包括接《im雜號。所述第—感測錢 源變換器的次級繞_第-繞組相_,並且所述次級敝至少與。所述電 201236345 軸關聯^出電"有關。另外,該方法包括至少基於與所述第—感測信 二產生第—輸出信號;接收所述第—輸出信號;至少基於與 广第一輸出信號相關聯的資訊產生第一斜坡信號。所述第一輸出信 =有關。此外’該方法包括接收所述第-斜坡信號和第-閾值信i Γ處 理與所述第-斜坡信號和所述第一間值信號相關聯的資訊;至少基於 和一間值信號相關聯的資訊產生第-比較信_ 破和第二感測信號。所述第二感測信號與流_合到所述電 繞組的初級繞組的第-電流相關聯。此外,該方法包括處理與 :述駆動域和所述第二感測信號相關聯的資訊;至少基於與所述驅動_ ΐ It第二感測信號相關聯的f訊產生峰值信號;接收所述峰值信“ 號;處理與所述軸信號和所述第二閾值信號相關聯的資訊; ι基於/、所树值信號和所述第二閾值信號相關聯的資訊產生第 ==另Γ該方法包括接收所述第二輸出信號和第二斜坡信^處理 第-輸出域和所述第二斜坡信號相關聯的資訊產生第二比較信號。2 夕第接收所述第—比較信號和所述第二比較信號;處理與所述 第-比較μ和所述第二比較信號相關聯的資訊;至少基於與所述第一比 和所述第二比較信號相關聯的資訊產生調節信號。此外,該方法包 ==調節ϊί;以及至少基於與所述調節信號相關聯的資訊輸出所 述驅動l號,以衫響流經所述初級繞組的所述第一電流。 又—Λ施例,—種餘調整電源變換11的系統(例如,如圖28 或圖包括第一信號產生器(例如,如元件2850所示),配置以 並f產生與退磁相關聯的輸出信號(例如,如信號2851 與柄合到電源變換器的次級繞組的第一繞組相 嫩電議___。另外, 该系統包括峰值檢廳(例如,如元件聰所示), 和第二感測信號並且產生峰值信號(例如,如信號細所示) 感測信號錢_合到職魏㈣魏繞 一 流相關聯爾,該系統包括第二信號產生器(例如,如元干電), 配置以至讀理與所述輸出信號(例如,如信號則所示)和所述峰^ 82 201236345 信號(例如’如信號2837所示)相關聯的資訊,並且產生調節信號(例 如二如信號2891所示)。此外,該系統包括閘驅動器(例如,如元件邛% 所示)’配置以接收所述調節信號並且向所述峰值檢測器和開關輸出所述 驅動彳5號。所述開關配置以影響流經所述初級繞組的所述第一電流。所述 輸出信號與退磁持續時間(例如,TDemag)相關聯,並且所述驅動信號與 開關週期(例如,Ts)相關聯。該系統還配置以使所述退磁持續時^與所 述開關週期之比保持恒定;以及使所述峰值信號的平均大小在第一持續時 間(例如,T)期間保持恒定。 根據又一實施例,一種用於調整電源變換器的方法(例如,如圖28 或32。實現的)包括接收第信號。所述第—感測信號触合到電源 變換器的次級敝料_繞_關聯,並且所述次輯組至少與所述電源 變換器的輸出電流有關。另外,該方法包括至少基於與所述第二感測信號 相關聯的資產生輸出仏號:接收驅動信號和第二感測信號;並且處理與 驅動L號和第—感測信號相關聯的資訊。第—感測信號與退磁相關聯,並 且所述第二感測信號與流經轉合到所述電源變換器的次級繞組的初級繞 ,的,-電流相關聯。此外,該方法包括至少基於與所述驅動信號和所述 測錢相關聯的資訊產生峰值信號;至少處理與所述輸出信號和所 抖值域相Μ的資訊;至少躲無雜則讓和所料值信號 聯的資訊產生調節信號。此外,該方法包括接收所述調節信號;至少基於 與所述調節親相關聯的資訊向酬輸麟述驅動錢,以至少影響流經 所述初級繞_所述第—電流。所述輸出魏與退磁持續時間(例如, τ〇^)相關聯’並且所述驅動信號與開關週期(例如,Ts) _聯 之比騎恒定;以錢所料值信號的平 均大小在第一持續時間(例如,T)期間保持恒定。 旧ϋ又—實關’―姻於赃電源變鋪的紐(例如,如圖33、1 Call and *Λ«王,, receive at least produce an adjustment signal. In addition, the system receives the clock signal and the second control signal from Wang Shao, and in addition, the S-system includes a gate driver (eg, such as element 546 or element 1 is set to receive at least the The flap signal and the at least output drive signal ^.iLn the first current flowing through the primary winding. The output signal 'demagnetization" (eg, TDemag) strikes, and the drive The signal is phased with the switch cycle, = for example 'Ts'. The age is also configured such that the ratio of the demagnetization holdings to the switching period is kept constant, and the first sense is recorded; the peak of the cling is kept constant in size. According to yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 7 or FIG. 24) includes receiving at least an input signal and based at least on a wire associated with the input signal ) produces an output signal. The input signal has at least an output current of the power converter and the output signal and the demagnetization have a further method, the method comprising receiving at least the input signal; processing information associated with the output signal; Information associated with the output signal to generate at least a clock signal. Additionally, the method includes receiving a sense signal and a threshold signal. The sensed signal is associated with a first current ^ flowing through the power supply crane on her windings. Further, the method of generating a control signal is associated with the information associated with the signal and the threshold signal; and generating less control signals based on information associated with the sensing signal and the threshold signal; The clock # and the control signal; processing information related to the clock 1 and the control signal; at least based on the semaphore to J associated with the _ signal and the dragon system Adjust the signal. Additionally, the method includes receiving at least the adjustment signal; at least outputting a drive signal based on at least a signal associated with the scalar information to affect the first current flowing through the primary winding. The output signal is associated with demagnetization, and the drive signal is associated with a switching period. Keeping the ratio of the demagnetization duration to the on 201236345^ period constant, and causing the peak of the first sense signal Maintaining a constant J^f-and "" embodiment, a system for adjusting the power conversion 11 (e.g., as shown in Figure 28, flute-two, includes a first signal generator (e.g., such as The component 2850 is configured to be configured with a number and a number and generate a first output signal that is thinned out with the demagnetization. The first sensing signal is -_off, and the output of the secondary winding to the Ls original is stolen. In addition, the system includes a first ramp signal ^^ 2860'2862'2864'2866'2870 2872 at the first output signal as described in 2865 and generates a first-ramp signal (eg, 'letter letter °-钭 Γ Γ Ratio (d) (e.g., as indicated by element 2882), configured to receive the threshold health (e.g., as indicated by signal 2883), and based at least on r/two"" oblique, and the first threshold The information associated with the signal produces a first-comparison letter, i-piece number 2885 > In addition, the secret includes peak detection 11 (e.g., if not configured to receive a drive signal (e.g., as indicated by signal 2893) and a 'signal (e.g., as indicated by signal 2847) and generate peak money (e.g., as Letter \ 7 7F ). Lai L listens to the confession, :=^^, the current is different. In addition, the «including the amplifier (C = piece 2834 -)' is configured to receive the peak health and the second a signal (e.g., as number 2835) and a second output signal generated by the capacitor (e.g., as a signal: the capacitor is faceted to the amplifier; the second comparator (e.g., component) 2 café configured to receive the second output signal and the second ramp signal (eg, as the signal is added and a second comparison signal is generated (eg, as indicated by the signal biliary). Additionally, the two signal generators (eg, such as components) The toilet is configured to receive at least the first comparison signal and the second comparison signal and to generate an adjustment signal (eg, as signal 289 and a gate driver (eg, as shown by the component fiber) configured to receive and ::==:r The switch configuration - according to the embodiment - a method for adjusting a power converter (such as or implemented in FIG. 32) includes "im". The first-sensing money source transform a secondary winding _ first winding phase _, and the secondary 敝 is related to at least the electrical 201236345 axis associated with the power out. Additionally, the method includes generating at least based on the first sensing data a first output signal; receiving the first output signal; generating a first ramp signal based on at least information associated with the wide first output signal. The first output signal = related. Further, the method includes receiving the first The ramp signal and the first-threshold signal Γ processing information associated with the first-ramp signal and the first inter-value signal; generating a first-comparison letter _ break and at least based on information associated with a value signal Two sensing signals. The second sensed signal is associated with a current-current that is coupled to the primary winding of the electrical winding. Additionally, the method includes processing information associated with: the second sensing signal; generating a peak signal based on at least an information associated with the driving _ ΐ It second sensing signal; receiving the a peak signal "number; processing information associated with the axis signal and the second threshold signal; ι generating information based on /, the tree value signal and the second threshold signal associated with the == alternative method Receiving, by receiving the second output signal and the information associated with the second ramp signal processing the first output field and the second ramp signal, generating a second comparison signal. 2 receiving the first comparison signal and the first Comparing signals; processing information associated with said first comparison μ and said second comparison signal; generating an adjustment signal based at least on information associated with said first ratio and said second comparison signal. a method packet == adjusting ϊ; and outputting the driving number 1 based on at least information associated with the conditioning signal to illuminate the first current flowing through the primary winding. I adjust the power conversion 11 (e.g., as shown in Figure 28 or including a first signal generator (e.g., as shown by element 2850), configured to generate an output signal associated with demagnetization (e.g., such as signal 2851 and shank to power converter) The first winding of the secondary winding is ___. In addition, the system includes a peak inspection hall (for example, as shown by the component Cong), and a second sensing signal and generates a peak signal (for example, as a signal detail) Show) the signal _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Then, the information associated with the peaks, such as the signal 2837, is generated and the adjustment signal is generated (eg, as indicated by signal 2891). Additionally, the system includes a gate driver (eg, </ RTI> configured to receive the adjustment signal and output the drive 彳 No. 5 to the peak detector and switch. The switch is configured to affect the first current flowing through the primary winding The output signal is associated with a demagnetization duration (eg, TDemag), and the drive signal is associated with a switching period (eg, Ts). The system is further configured to cause the demagnetization duration and the switching period The ratio remains constant; and the average magnitude of the peak signal remains constant during a first duration (eg, T). According to yet another embodiment, a method for adjusting a power converter (eg, as shown in FIG. 28 or 32. Implemented) comprising receiving a first signal, wherein the first sensing signal is coupled to a secondary buffer of the power converter, and the secondary burst is at least related to an output current of the power converter Additionally, the method includes generating an output nickname based on at least a resource associated with the second sensed signal: a receive drive signal and a second sensed signal; and processing associated with driving the L number and the first sense signal News. The first sense signal is associated with demagnetization, and the second sense signal is associated with a current flowing through the primary winding of the secondary winding of the power converter. Additionally, the method includes generating a peak signal based on at least information associated with the drive signal and the money measurement; processing at least information corresponding to the output signal and the jitter value field; The information associated with the value signal produces an adjustment signal. Moreover, the method includes receiving the adjustment signal; driving the money to the reward based at least on information associated with the adjustment to affect at least the flow through the primary winding. The output Wei is associated with a demagnetization duration (eg, τ〇^) and the drive signal is constant with a switching period (eg, Ts) _; the average size of the signal of the money is at the first The duration (eg, T) remains constant during the duration. The old ϋ — 实 实 ― ― ― ― 姻 姻 姻 姻 姻 姻 姻 姻 姻 姻 姻 姻 姻
Li /"所不i包括第一信號產生器(例如,如元件3350所示),配 感,·則H她餘且產生與退磁相襲㈣—輪⑽號。所述第— Π ί 換器的次級繞組的第—繞組有關,並且所述次級 繞,且至^與所述電源變換器的輸出電流相關聯 測器(例如,如猶遍㈣),配妙触_輯(例mm 83 201236345 所不)^第二感測信號(例如,如信號B47戶斤示)並且產生峰值信號(例 如’如信號3337戶斤示)。所述第二感測信號與流經耗合到所述電源變換器 的,級繞級的初級繞組的第一電流相關聯。此外,該系統包括第二信號產 生益(例如’如元件337〇所示),配置以接收所述驅動信號、所述 出錄和所述峰值信號,並且產生第二_請(例如,如信號抑所』 :),放大盗(例如,如元件3334所示),配置以接收所述第二輸出 口閾值城(例如’如信號3335所示)並且通過電容器產生第三輸广 如信號3381所示)’所述電容器被柄合到所述放大器一。此外' j統〇括比較器(例如,如元件搬所示),配置以接收所述第 二例Γ如信號遍所扑並且產蝴信號(例二’ 第三信號產生器(例如,如元件3366和汹()的Μ 7 —以至少接收所述比較信號和時鐘信號(例如,如元件3362 (例如,如元件3368所示)。另外== 述峰值檢測丄所t件,所,配置以接收所述靖信號並且向所 配置以影響流經所述初出所述驅動信號。所述開關 圖39^3=二«換騎方法(例如,如圖33、 到電源變換器的次第—感測親與輕合 ====:::繞= 於與所述驅動信號和所述第二咸\ —感測域相關聯的資訊;至少基 外,該方法包括接收所聯==值信號。此 處理與所述驅動芦號、所汗楚一私,$弟輸出抬唬和所述峰值信號; 號。此 至少基於__錢、’所料資訊’· 訊產生第二輪出信號。另外,該〜y'、id^值域相關聯的資 號;處理與所述第二輸出信號二信號和閾值信 所述第二輸一 _信號相少基於與 84 201236345 外’該方法包括接收所述第三輸出信號和斜坡信號;處理與所述第三輸出 信號和所述斜坡信號相Μ的資訊;至少基於與所述第三輸出信‘所 斜坡信號相關聯的資訊產生比較信號。此外,該方法包括接收所述^較信 號和時鐘舰;處理與所述比較域和所述時鐘信號細聯的資訊丨至 基於無述比較減和所料鐘信號相__訊產蝴奸號。另外, 該方法包括魏所賴節«;以及至少基讀所義節信號侧聯的資 λ輸出所述驅動彳§號’以m經所述初級繞組的所述第一電流。 根據又一實施例’一種用於調整電源變換器的系,统(例如,L如圖41 或43所不)包括第-城產生器(例如,如元件415〇所示),配置以接 收第-感測信號(例如,如信號4143所示)並且產生與退磁相關聯的第 2=號ί信號4151所示)。所述第—感測信號與柄合到電源 變換^次峨_第-繞_關聯,並且所述她繞組至少與所述電源 變換Is的輸出電流有關。另外,該系統包括峰值檢測器(例如,如耕4136 ^示),配置叫妾收驅動信號(例如,如信號侧所示)和第二感測信號 列如如4147所不)並且產生峰值信號(例如,如信號仍?所示)。 2第二感測信號與流經麵合到所述電源變換器的次級繞組的初級繞组 ^第-電流相關聯,並且第二信號產生器(例如,如元件糊所示)配 =至Γί收所述驅動信號、所述第一輸出信號和所述峰值信號,並且產 如號(例如,如信號4172所示)。此外,該系統包減大器(例 如H:4134所不)’配置以接收所述第二輸出信號和閾值信號(例如, 並且通過電容器產生第三輸出信號(例如,如信號· 一 第4號產生器(例如,如元件侧所示),配置以接收所述第 第—輸入信號(例如,如信號4183所示)並且產生第四輸 例如’如信號4185所示),述電容器被齡到所述放大器,所 號與由所述初級繞組接收的第二輸入信號(例如,如信號 詩r)成比例。此外’該系統包括比較器(例如,如元件搬所示), 信細信號和第二感測信號並產生比較信號(例如,如 Τ,第叫5號產生器(例如’如元件4〗66和4丨9。的組合所 :且比較信號和時鐘信號(例如,如信號4162所示) 產生調即W (例如’如信號棚所示)。另外,該系統包括閉驅動 85 201236345 如:如信號4192所示)’配置以接收所述調節信號並且向所述峰值 影響产經產生器和開關輸出所述驅動信號。所述開關配置以 〜等如·經所述初級繞組的所述第一電流。 ^又-實施例於調整電源變換器的方法(例如,如㈣ L參的)包括接收第一感測信號。所述第一感測信號_合到電源 第—繞_關聯’並且所述次級繞組至少與所述電源 信號有關。另外,該方法包括產生與退磁相關聯的第一輸出 ^電㈣』城和第二感測信號。所述第二感測信號與流經麵合到所 繞組的初級繞組的第—電流相關聯。此外,該方法包 動$料:斤述:動6號和第二感測信號相關聯的資訊;至少基於與所述驅 =4述第二感測信號相關聯的資訊產生峰值信號。此外,該方法 信號、所述第—輸紐號和峰值魏;處理與所述驅 輸出信號和所述峰值信號相關聯的資訊;至少基於與所 #u、所述第—輸出信號和所述峰值信號相關聯 、 =號該方法包括接收所述第二輸出信號和閾值信號;處j忒 l號和所述閾值信號細聯的資訊;至少基於與所述第二輸出 所述閾值信號相關聯的資訊產生第三輸出信號,·接收所述第 輸入信號。所述第一輸入信號與由所述初級繞組接收的—第: 。Γ,該方法包括處理與所述第三輸出信號和所述 2 W相Μ的資訊;至少基於與所述第三輸紐號和所述第 號目,=貝訊產生第四輸出信號;接收所述第四輸出信號和第二感測信 所述第四輸出信號和所述第二感測信號相關聯的資訊;至少; ^與所述第四輸出信號和所述第二感測信號相關聯的資訊產生比土 ,。此外,該方法包括至少接收所述比較信號和時鐘信號;處- 關聯的f訊;至少基於與所述比較信號和所述時 紅说相關聯的貢錢生調節信號。另外,該方法包 吁 ===基=職調節信號相關聯的資訊來輸出所述驅以 衫響机經所述初級繞組的所述第一電流β Μ 二據又、一,施例’一種用於調整電源變換器的系統(例如,如圖44 或45所不)包括··第一信號產生器(例如,如元件獅所示),配圖置以 86 201236345 f收第-感測信號(例如,如信號所示)並且產生與退磁相關聯的 第了輸出信號(例如,如信號4451所示)。所述第—感測信號與麵合 源變換器的次級繞組的第-繞_關聯,並且所述次級繞組至少愈所述電 源變換器的輸出電流有關。另外,該系統包括峰值檢測器(例如',如元件 =36所不)’配置以接收驅動信號(例如,如信號侧所示) 信號(例如’如信號4447所示)並且產生峰值信號(例如,如信號彻 所不)。所述第二感測信號與流經粞合到所述電源變換^且 級=的第-電流相關聯。此外,該系統包括第二信號產生器的: ’配砂至地_轉舰、所料—細信號和所 'σ ;,並且產生第二輸出信號(例如,如信號4472所示)·放大 ^例^如元件4434户斤示),配置以接收所述第二輸出信號和間值練例 35所不)並且通過電容器產生第三輸出信號(例如,仲 咖合到所繼器。此外,該系統包括& i t, 6 ’4428和4484的組合所示),配置以接 出信號(例如,_鄕麻);繼(例如,如元件441所干)輸 :己置= 妾收所述第四輸出信號和所述第二感測信號 '另 卜^系統包括第四信號產生器(例如,如元件娜和侧m干另 配置以至少接麟耻較信號和時鐘織(例如,如錢桃 ,產,節信號(例如’如信號4468所示);閘驅動器(例如,如元丄 配置以接收所述構信號並且向所述峰值檢測器、所述苐二信號 產生益、所述第二信號產生器和開關輸出所述驅動信號,所述門關配' 影響流經所述初級繞組的所述第一電流。 所这開關配置以 根據又-實_,—種難魏變換⑽ 相==級繞組至少與所述電源 述電源變換器的次級的合到所 括處理與聽咖綱:她 87 201236345 所述第二感測信號相義的資訊產生峰值㈣4外,該方法包 叙#缺述驅動仏號、所述第一輸出信號和所述峰值信號;處理與所述驅 述第—輸*信號和所述峰值信號相關賴資訊;至少基於與所 ° %~述第_輸出信號和所述峰值信號相關聯的資訊產生第二輸 ;’該方法包括接收所述第二輸出信號和閾值信號;處理與所 二二 域和所述閾值信號相關聯的資訊;至少基於與所述第二輪出 二閾值信號相關聯的Λ產生第三輸出信號15此外,該方法包括 、+·楚一二:感測號、所述第三輸出信號和所述驅動信號;處理與所 龜號、所述第三輸出信號和所述驅動信號相關聯的資訊;至少 述第—感測信號、所述第三輸出信號和所述驅動信號相關聯的資 號。另外’該方法包括接收所述第四輸出信號和所述第 —’:· 處理與所述第四輸出信號和所述第二感測信號相 關聯的資 土於與所述第四輸出信號和所述第二感測信號相關聯的資訊產生 所、外該方法包括至少接收所耻歸號和時鐘減;處理與 讲+:主乂 和所述時鐘信號相關聯的資訊;至少基於與所述比較信號和 職。此外,财咖接收所述調 二於與所述調節信號相關聯的資訊來輸出所述驅動信 唬,以衫響流經所述初級繞組的所述第一電浐。 .3r:r:r:33' ,.-_圖44或圖45所示)包括第一信號產生器(例 70所不)’配置以接收第一感測信號並且產生與退磁相關聯 ,出信號。所述第-感測信號_合到電源變換 = ΓΓ^ΐ;Γ"^ ° Ϊ 外,该系統包括峰值檢測器(例如,如、 乃 信號和第二感測信號並且產生峰值彳 :㈣收驅動 二感測信號與流經耦合到所述電_換器的次級繞組的初級繞二这 -電流相關聯。此外’該系統包括第二信號產生器(例如,如元件^ 2 3390驗合卿),配以至少處軸所麟出 戶f)和所述峰值信號(例如,如信號3337所示)相關 產生調雜號(例如,如信號3368所示);以及閘驅動器(例如,如元件 88 201236345 遍所示)=置以接收所述_域並且至少向所述峰值檢測器和開關 輸出所述驅動錢。所述開關配置以影響流經所述初級繞組的所述第 流:所述骑餓與關週期(例如,Ts)蝴聯,並且所述輸出 退磁持續賴⑼如’ TDemag)相_。所舰磁制咖在大小上與、 述峰值信號械後等於退磁峰值。該系統還配置以 持 定,使所述退磁峰值的平均大小在第—持續時如 定,並且使所述輸出電流保持恒定。 根據又-實施例’ -整電源變換器的方 圖39、圖40、圖41、圖43、㈣或圖45實現的)包括接收第一: 號。所述第-感測信號與_源變換器的次級繞組的第一 述次級繞組至少與所述電源變換器的輸㈣流有關。另外^ 二,號與流_合到所述電源變換器的次級丄 測信號相關聯的資訊,·至少基於與所述驅動信號二=== 處理與所述輸出親和所述峰值信 土;、述輸幻s號和所述峰值信號相關聯的資訊產生調節信 相關包括接收所述調節信號;並且至少基於與所述調節信號 t關^胃讀麟述驅騎號,以雜流經輯初 述峰值? 1 i TDemag)相_。所述退__間在大小上與所 峰值的===於退磁峰值。使所述開關週期保持恒定,使所述退磁 持續時間(例如’”期_恒定,並且使所述 白,了本發明的特定實施例,然而熟知該項技術領域之人將明 所示實施例等同的其它實施例。因此’將明白,本發明不受 、,疋實關的_,而是僅由雌巾請專概_齡來限定。 【圖式簡單說明】 89 201236345 統示=是用於具有次級側控制的開_式返驰式電源變換系統的簡化傳 統示=是示出返驰式電源變換系統的輸出籠和輸㈣流特性的簡化傳 4專統示圖· 、 :'、° 式電源變換系統的簡化 式電源變換系統的另一 圖4是具有初級側感測和調節的開關模式返馳 簡化傳統示圖; 式電源變換系統的又一 圖5是具有初級側感測和調節的開關模式返驰 簡化傳統示圖; 圖6是示出返馳式電源變換系統的傳統操作機制的簡化示圖; 換系==一實施例具有初級側 圖巧根據本發明實施例之由作為開關模式電源變換系統—部分的元 件執行的彳§號採樣和保持的簡化時序圖; 圖9是示出根據本發明實施例用於開關模式電源變換系統的輸出電壓 調整的某些元件的簡化示圖; _圖10是示出作為根據本發明實施例之開難式電源變換系統一部分 的兀件之麟產生仏卿信號的某些設備的簡化示圖; 圖11疋示出作為根據本發明實施例之開關模式電源變換系統一部分 的7G件之用Θ於產生信號的某些設備的簡化示圖; _圖12是示出作為根據本發明實施例之開關模式電源變換系統一部分 的70件之用於產生&7_吨—c从信號的簡化時序圖; 圖13是根據本發明另—實施例之開關模式電源變換祕的簡化時序 圖; 圖14 (a)是示出作為根據本發明實施例之開關模式電源變換系統的 部分的元件和誤差放大H的某些設備的簡化示圖; 一圖14 (b)是示出作為根據本發明實施例之開關模式電源變換系統中 元件的-部分的電流源的某些設備的簡化示圖; 201236345 圖】5 U)是示出作為根據本發明另一實施例之開關模式電源變換系 .统的部分的7L件和誤差放大器的某些設備的簡化示圖; 圖〗5 (b)是示出作為根據本發明實施例之開關模式電源變換系統中 元件的-部β分的電流源的某些設備的簡化示圖; ffi 16是π ίίι作為根據本Μ實關之腳狱電源變齡統的部分 的元件和^放大II的CMOS實現_化示圖; ® 17是不出作為猶本發明實施例之關模式電源變齡統的一部 分的元件的某些設備的簡化示圖: 圖18疋不出作為根據本發明實施例之開關模式電源變換系統的一部 分的用於恒^輸出電流(cc)鋪的元件的某些設備的簡化示圖; 圖19是用於由作為根據本發明實施例之關模式電源變換系統的一 部分的脈麟貞電路產生D2C信號的簡化時序圖; 圖20是不出作為根據本發明實施例之開關模式電源變換系統的 -部分之匕於電流感測(cs)學值調整的元件的某些設備的簡化示圖; 圖21疋根據本發明又__實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖; 、 圖22是作為根據本發明實施例之開關模式電源變換系統一部分的退 磁檢測元件的簡化示圖; 圖23是根據本發明實蘭包括如圖21和圖22所示的退磁檢測元件 的開關模式電源變換系統的簡化時序圖; 圖24疋根據本發明另一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖; 、 圖25是示出作為根據本發明實施例之開關模式電源變換系統的一部 分的用於電域測(CS)峰值調整的元件的某些設備的簡化示圖; 圖26是根據本發明實施例之_模式電源變齡統賴化時序圖; 圖27是根據本發明某些實關分別作為關模式電源變換系統一部 分的用於電流感測(CS)峰值調整的元件的簡化時序圖; 圖28是根據本發明又一實施例具有初級側感測和調 源變換系統的簡化示圖; 圖29是根據本發明實施例之開關模式電源變換系統的簡化時序圖; 201236345 ^ ρΓ1作為根據本發明實施例之電源變換系統一部分的逐週期峰值 檢測器的簡化示圖; & 圖31是作為根據本發明實施例之電源變換系統一部分的逐週期 險測器的簡化時序圖; 圖32疋根據本發明又一實施例具有初級側感測和調整的開關模式雷 源變換系統的簡化示圖; 圖33是根據本發明又一實施例具有初級側感測和調整的開關模式雷 .變換系統的簡化示圖; 圖34 •7ΓΤ 1^1 圖μ疋作為根據本發明實施例之電源變換系統一部分的積分器的簡 圖35是根據本發明實施例包括如圖33和圖34所示的積分器的開關 模式電源變換彡統㈣彳化時序圖; 圖36是作為根據本發明實施例之電源變換系統一部分的振盪器的簡 化示圖; 圖37是根據本發明實施例之開關模式電源變換系統的簡化時序圖; 圖38是根據本發明實施例之開關模式電源變換系統的某些電流的簡 化時序圖; 圖39是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖; 圖40是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統的簡化示圖; 圖41是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖; 圖42是根據本發明實施例之開關模式電源變換系統的簡化時序圖; 圖43是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統的簡化示圖; 圖44是根據本發明又一實施例具有初級側感測和調整的開關模式電 源變換系統的簡化示圖;以及 圖45是根據本發明又一實施例用於向發光二極體供電的開關模式電 源變換系統的簡化示圖。 92 201236345 【主要元件符號說明】 110 PWM控制器 500 開關模式電源變換系統 502 初級繞組 504 次級繞組 506 輔助繞組 508、514、528 輸出信號 510、512、580 電阻器 516、530、552、566 端子 520、522、532、534、538、540、542、546、568 元件 524 誤差放大器 526 電容器 532 負載補償的元件 536、556、564、570、572、574 信號 544、558、592 控制信號 548 驅動信號 550 開關 554 二極體 560 時鐘信號 562 振盪器 582 電流 590 晶片 592 控制信號 610、620、630、640、650、660 波形 910、920電容器 912、922 節點 930 單穩態器件 1010、1020、1030、1040、1050、1060、1070 波形 1110、1120、1130、1140、1150 波形 93 201236345 1210、1260、1310、1520 元件 1220 跨導放大器 1230 電流源 1240 電壓到電流轉換器 1250 定流源 1320 跨導放大器 1330 電流槽 1340 電壓到電流轉換器 1350、1360電阻器 1510 電壓到電流轉換器 1512、1522、1534 信號 1530 鎖相環 1532、1612、1614 時鐘信號 1610 時鐘分頻器 1620 脈衝拷貝電路 1622 NAND (反及)閘 1624、1626 MOS 電晶體 1628 電容器 1629、1634、1636 信號 1630 相位檢測器 1632 D觸發器 1640 電荷泵 1642 電容器 1644 電流信號 1650 自校準電路 1654 電流 1660 時鐘信號 1710、1720、1730、1740、1750 波形 1810 高速比較器 1812 比較信號 94 201236345 1820 電荷泵 1822 RS鎖存器 1824 電容器 1826 電壓信號 1830 動態閾值產生器 1832 動態電流信號 1834 動態電阻器 1835 電壓信號 1836 線性電阻器 1838、1839電晶體 1840 OCP比較器 2000 電源變換系統 2010 初級繞組 2012 次級繞組 2014 輔助繞組 2020 電源開關 2030 電流感測電阻器 2040 輸出電纜的等效電阻器 2050、2052電阻器 2054 節點 2060、2062整流二極體 2100 電源變換系統 2110 初級繞組 2111 電流 2112 次級繞組 2114 輔助繞組 2120、2122、2124 電阻器 2130 開關 2142、2144、2146 端子 2143 回饋信號 95 201236345 2147 2150 2151 2160 2162 2164 2165 2170 2171 2172 2180 2181 2185 2187 2190 2191 2192 2193 2210 2220 2230 2240 2310 2400 2414 2416 2420 2448 2462 2490 感測信號 退磁檢測元件 信號 電流源 電流槽 2166開關 斜坡信號 NOT閘 信號 電容器 2182 比較器 2183、2211閾值信號 控制信號 比較信號 觸發器元件 調節信號 驅動器元件 驅動信號 比較器 2222 觸發器元件 2232 NOT 閘 AND閘 2320、2330、2340、2350、2360 波形 開關模式電源變換系統 2444、2448、2460、2464、2474 信號 、2452、2466 端子 、2422、2438、2440、2446 元件 信號 振盪器 晶片 96 201236345 2510 電壓到電流轉換器 2512、2522、2612、2614、2629、2644、2660 信號 2520 元件 2610 時鐘分頻器 2620 脈衝拷貝電路 2635 相位檢測器和電荷系 2680、2682、2684、2686、2688 波形 2710 比較器 2712、2726 信號 2722 邏輯控制元件 2724 電荷泵 2730 動態閾值產生器 2735 調節信號 2740 OCP比較器 2780、2782、2784、2786、2790、2792、2794、2796 波形 2800 電源變換系統 2810 初級繞組 2811 電流 2812 次級繞組 2813 輸入信號 2814 輔助繞組 2815 AC輸入信號 2820、2822、2824 電阻器 2830 開關 2832 斜坡產生器 2833 斜坡信號 2834 跨導放大器 2835 參考信號 2836 逐週期峰值檢測器 2837 峰值信號 97 201236345 2838 上升邊緣遮沒元件 2840 晶片 2842、2844、2846、2848 端子 2843 回饋信號 2847 感測信號 2850 退磁檢測元件 2851 Demag 信號 2858、2872電容器 2860 電流源 2862 電流槽 2864、2866 開關 2865 斜坡信號 2870 NOT 閘 2871、2874、2881 信號 2880、2882比較器 2883 閾值信號 2885 控制信號 2887 比較信號 2890 觸發器元件 2891 調節信號 2892 驅動元件 2893 驅動信號 2910、2920、2922、2930、2940、 2950、2960、2970、2980、2990 波形 3010 比較器 3020、3022、3024 開關 3023、3031 信號 3030 緩衝器 3040、3042電容器 3050 電流源 98 201236345 3060 單穩態產生器 3062、3064 信號 波形 3110、3120、3130、3140、3150、3160、3170 3200 電源變換系統 3210 電容器 3213 DC輸入信號 3215 AC輸入信號 3220 電容器 3230 電阻器 3240 電感器 3300 電源變換系統 3310 初級繞組 3311 電流 3312 次級繞組 3313 輸入信號 3314 輔助繞組 3315 AC輸入信號 3317 輸入電流 3320、3322、3324 電阻器 3330 開關 3334 跨導放大器 3335 參考信號 3336 逐週期峰值檢測器 3337 峰值信號 3338 上升邊緣遮沒元件 3340 晶片 3342、3344、3346、3348 端子 3343 回饋信號 3347 感測信號 3350 退磁檢測元件 99 201236345 3351 信號 3358 電容器 3360 振盪器 3362 時鐘信號 3364 斜坡信號 3366 AND 閘 3368 . 調節信號 3370 積分器 3372 信號 3381 電壓信號 3382 比較器 3385 比較信號 3390 觸發器元件 3391 信號 3392 驅動元件 3393 驅動信號 3420、3422、3424 開關 3423、3431 信號 3430 緩衝器 3440、3442 電容器 3450、3452、3454 電晶體 3460 放大器 3461、3463 信號 3462 單穩態產生器 3470 電阻器 3510、3520、3530、3540、3550、3560、3570、3580 波形 3610、3620、3630 參考信號 3640 電阻器 3650 電容器 3710、3720、3730、3740、3742、3750、 100 201236345 3760、3770、3780、3810、3820 波形 3900 電源變換系統 3910、3920 電容器 3913 DC輸入信號 3915 AC輸入信號 3930 電阻器 3940 電感器 .4010 發光二極體 4100 電源變換系統 4110 初級繞組 4111 電流 4112 次級繞組 4113 輸入信號 4114 輔助繞組 4115 AC輸入信號 4117 電流 4120、4122、4124、4126、4128 電阻器 4130 開關 4134 跨導放大器 4135 參考信號 4136 逐週期峰值檢測器 4137 峰值信號 4138 上升邊緣遮沒元件 4140 晶片 4142、4144、4146、4148、4149 端子 4143 回饋信號 4147 感測信號 4150 退磁檢測元件 4151 Demag 信號 4158 電容器 101 201236345 4160 振盪器 4162 時鐘信號 4166 AND 閘 4168 調節信號 4170 積分器 4172 輸出信號 4181 電壓信號 4182 比較器 4183 信號 4184 乘法器 4185、4187、4191 信號 4190 觸發器元件 4192 驅動元件 4193 驅動信號 4210、4220、4230、4240、4242、 4250、4260、4262、4270、4280 波形 4310 發光二極體 4400 電源變換系統 4410 初級繞組 4412 次級繞組 4413 輸入電壓 4414 輔助繞組 4415 AC輸入信號 4419 輔助電壓 4420、4422、4424 電阻器 4426、4430 開關 4428 放大器 4434 跨導放大器 4435、4437、4447 信號 4436 逐週期峰值檢測器 102 201236345 4438 上升邊緣遮沒元件 4440 晶片 4442 、4444、4446、4448 端子 4443 回饋信號 4450 退磁檢測元件 4451 、4462、4468、4472 信號 4458 電容器 4460 振盪器 4466 AND閘 4470 積分器 4481 電壓信號 4482 比較器 4483 電流信號 4484 乘法器 4485 輸出信號 4490 觸發器元件 4492 驅動元件 4493 驅動信號 4510 發光二極體 103Li /" does not include the first signal generator (e.g., as shown by element 3350), the sensation, and then H and the occurrence of demagnetization (4) - wheel (10) number. The first winding of the secondary winding of the first converter is associated with, and the secondary winding is coupled to the output current of the power converter (eg, such as Judah (4)), With the wonderful touch _ series (for example, mm 83 201236345 does not) ^ the second sensing signal (for example, as signal B47 shows) and produces a peak signal (such as 'as signal 3337 shows). The second sense signal is associated with a first current flowing through a primary winding of the stage winding of the power converter. Additionally, the system includes a second signal generating benefit (e.g., as shown by element 337A) configured to receive the drive signal, the utterance, and the peak signal, and to generate a second _ please (eg, as a signal) Suppressed (eg, as indicated by element 3334), configured to receive the second output threshold (eg, as indicated by signal 3335) and to generate a third transmission through the capacitor, such as signal 3381. The capacitor is shank-fitted to the amplifier one. In addition, a comparator (for example, as shown by the component) is configured to receive the second example, such as a signal puncturing and generating a signal (eg, a second third signal generator (eg, such as a component) 3366 and 汹() of the 汹() to receive at least the comparison signal and the clock signal (e.g., as element 3362 (e.g., as shown by element 3368). Additionally == the peak detection t, the configuration is Receiving the signal and configuring to affect the driving signal through the first exit. The switch diagram 39^3=two «calling method (eg, as shown in FIG. 33, to the power converter) Affinity and lightness ====::: wrap = information associated with the drive signal and the second salty-sensing domain; at least outside, the method includes receiving a coupled == value signal. The processing is related to the driving reed, the sweating, the output of the $ and the peak signal; the number is generated based on at least the __money, the 'informed information'. , the y', the ID number associated with the id^ value field; processing the second output signal and the threshold signal Transmitting a _signal phase based on the same as 84 201236345 'The method includes receiving the third output signal and the ramp signal; processing information corresponding to the third output signal and the ramp signal; at least based on The information associated with the ramp signal of the three output signal generates a comparison signal. In addition, the method includes receiving the signal and the clock ship; processing the information that is finely associated with the comparison field and the clock signal to Comparing and subtracting the signal signal of the clock signal. In addition, the method includes the Wei Rilai section «; and at least the base reading the signal of the branch section λ output the driving 彳§ number to m The first current through the primary winding. According to yet another embodiment, a system for adjusting a power converter (eg, L as shown in FIG. 41 or 43) includes a first-city generator (eg, As shown by element 415 ,, configured to receive a first sense signal (eg, as indicated by signal 4143) and to generate a second = ί signal 4151 associated with demagnetization.) the first sense signal With the handle to the power conversion ^ times 峨 _ first - winding _ associated, and said her winding is at least related to the output current of said power conversion Is. Additionally, the system includes a peak detector (e.g., as shown in Fig. 4136), the configuration is called a drive signal (e.g., as signal side Shown) and the second sensed signal column as in 4147 and produce a peak signal (eg, as indicated by the signal). 2 The second sensed signal is flow-crossed to the power converter. The primary winding of the stage winding is associated with a first current, and the second signal generator (eg, as indicated by the component paste) is configured to receive the drive signal, the first output signal, and the peak signal, And producing a number (eg, as indicated by signal 4172). Additionally, the system packet reducer (eg, H: 4134 does not) is configured to receive the second output signal and a threshold signal (eg, and generated by a capacitor) A third output signal (eg, such as a signal, a fourth generator (eg, as shown on the component side), configured to receive the first-input signal (eg, as indicated by signal 4183) and to generate a fourth input For example, 'Letter 4185 shown), said capacitor is aged to the amplifier, and a second number of the input signal (e.g., a signal such as poetry r) received by the primary winding is proportional. In addition, the system includes a comparator (for example, as shown by the component), a signal and a second sensing signal and generates a comparison signal (for example, as Τ, the first is called a generator 5 (for example, 'such as component 4〗 66 And a combination of 4:9: and compare the signal and the clock signal (for example, as shown by signal 4162) to generate a tone (ie, as shown in the signal shed). In addition, the system includes a closed drive 85 201236345 Signal 4192 is shown 'configured to receive the adjustment signal and output the drive signal to the peak influence generator and switch. The switch is configured to wait for the first of the primary windings The current method. The method of adjusting the power converter (for example, as in (4) the L parameter) comprises receiving the first sensing signal. The first sensing signal is coupled to the power supply first-winding_association and Said secondary winding is associated with at least said power supply signal. Additionally, the method includes generating a first output electrical power associated with the demagnetization and a second sensed signal. The second sensed signal is coupled to the flow path. To the first winding of the winding - The method is related to the current. In addition, the method includes: information associated with the second sensing signal; and generating a peak based on at least the information associated with the second sensing signal. In addition, the method signal, the first-to-input number and the peak value; processing information associated with the drive output signal and the peak signal; based at least on the #u, the first-output signal and The peak signal is associated with a = sign. The method includes receiving the second output signal and a threshold signal; information of the serial number of the threshold signal and the threshold signal; at least based on the threshold signal with the second output The associated information produces a third output signal, receiving the first input signal, the first input signal and a first: received by the primary winding, the method comprising processing and the third output signal The 2 W phase information; at least based on the third button number and the number, the second output signal is generated; the fourth output signal and the second sensing signal are received a fourth output signal and the second sensing signal Associated information; at least; ^ information associated with the fourth output signal and the second sensed signal produces a specific soil. Further, the method includes receiving at least the comparison signal and a clock signal; And at least based on the tributary adjustment signal associated with the comparison signal and the time red saying. In addition, the method includes the information associated with the === base = job adjustment signal to output the drive The first current β Μ of the first winding of the shirting machine is again, and a system for adjusting the power converter (for example, as shown in FIG. 44 or 45) includes first A signal generator (eg, as shown by the component lion), with a map set to 86 201236345 f receives a first-sensing signal (eg, as indicated by the signal) and produces a first output signal associated with the demagnetization (eg, such as a signal) 4451)). The first sense signal is associated with a first-window of the secondary winding of the surface-to-source converter, and the secondary winding is related at least to the output current of the power converter. Additionally, the system includes a peak detector (eg, 'if element=36 is not) configured to receive a drive signal (eg, as shown on the signal side) signal (eg, as shown by signal 4447) and generate a peak signal (eg, If the signal is not complete). The second sensed signal is associated with a first current flowing through the power conversion and level =. In addition, the system includes a second signal generator: 'sand to ground_transship, feed-fine signal and 'σ; and generate a second output signal (eg, as indicated by signal 4472). For example, the component 4434 is configured to receive the second output signal and the inter-valued example 35 does not) and generates a third output signal through the capacitor (eg, the secondary consumer is coupled to the relay. Further, the The system includes & it, shown in the combination of 6 '4428 and 4484), configured to take out the signal (eg, _ ramie); followed by (eg, as component 441 does) input: set = 妾 所述The four output signals and the second sensed signal 'other system' include a fourth signal generator (eg, such as component na and side m dry are additionally configured to at least singularly signal and clock weave (eg, such as money peach) a signal (eg, as shown by signal 4468); a gate driver (eg, such as a meta-configuration configured to receive the configuration signal and generate benefits to the peak detector, the second signal, the second a signal generator and a switch output the drive signal, the gate is associated with an 'affected flow The first current of the primary winding. The switch is configured to be included in accordance with a re-transformation (10) phase == stage winding at least with the secondary of the power supply converter Processing and listening to the coffee program: she 87 201236345 The second sensing signal is equivalent to the information generated peak (four) 4, the method includes the missing drive nickname, the first output signal and the peak signal; Transmitting the first-transmission* signal and the peak signal-related information; generating a second input based on at least information associated with the _th output signal and the peak signal; 'the method includes receiving Decoding a second output signal and a threshold signal; processing information associated with the second domain and the threshold signal; generating a third output signal 15 based at least on a chirp associated with the second round-two threshold signal The method includes, +, Chu: a sensing number, the third output signal, and the driving signal; processing information associated with the turtle number, the third output signal, and the driving signal; - sensing signal, said third And a signal associated with the drive signal. In addition, the method includes receiving the fourth output signal and the first:: processing is associated with the fourth output signal and the second sensing signal The method of generating the information associated with the fourth output signal and the second sensing signal includes: receiving at least the shameful attribution and the clock subtraction; processing and speaking +: the main and the And the information associated with the clock signal; at least based on the comparison signal and the job. Further, the café receives the information associated with the adjustment signal to output the drive signal, and the shirt sounds through The first electric enthalpy of the primary winding. . .rr:r:r:33', .-_ FIG. 44 or FIG. 45) includes a first signal generator (none of the example 70) configured to receive the first A sense signal is generated and associated with demagnetization, the signal is output. The first sensing signal is coupled to a power conversion = ΓΓ^ΐ; Γ "^ ° Ϊ, the system includes a peak detector (eg, a signal and a second sensing signal and produces a peak 彳: (4) Driving the second sense signal is associated with a primary winding that is coupled to the secondary winding of the electrical converter. In addition, the system includes a second signal generator (eg, such as component ^ 2 3390) And a gate signal f) and the peak signal (eg, as indicated by signal 3337) are associated with the generation of a tuning number (eg, as indicated by signal 3368); and a gate driver (eg, such as Element 88 201236345 is shown) = set to receive the _ field and output the drive money to at least the peak detector and switch. The switch is configured to affect the first flow through the primary winding: the hunt-and-off cycle (e.g., Ts), and the output demagnetization continues (9) as in the 'TDemag' phase. The ship's magnetic coffee is equal to the demagnetization peak after the size and the peak signal. The system is also configured to hold such that the average magnitude of the demagnetization peak is as long as the first duration, and the output current is held constant. According to yet another embodiment, the embodiment of the entire power converter, as shown in Fig. 39, Fig. 40, Fig. 41, Fig. 43, (four) or Fig. 45, includes receiving the first: number. The first sensed signal and the first secondary winding of the secondary winding of the -source converter are associated with at least the input (four) current of the power converter. In addition, the information associated with the secondary detection signal of the power converter is coupled to the peak information of the output signal by the second === processing and the output; And the information associated with the peak signal and the peak signal generating the adjustment signal correlation includes receiving the adjustment signal; and based at least on the control signal t and the stomach reading the driving number, to the flow stream The initial peak? 1 i TDemag) phase _. The retreat__ is in the magnitude and the peak value === at the demagnetization peak. Keeping the switching period constant, causing the demagnetization duration (eg, ''period' to be constant, and making the white, a particular embodiment of the present invention, but those skilled in the art will be able to illustrate the embodiment Equivalent to other embodiments. Therefore, it will be understood that the present invention is not limited to, but is only limited by the age of the female towel. [Simplified illustration] 89 201236345 The simplified conventional display of the open-type flyback power conversion system with secondary side control is a simplified transmission of the output cage and the output (four) flow characteristics of the flyback power conversion system. Another Figure 4 of the simplified power conversion system of the type power conversion system is a simplified conventional diagram of switch mode flyback with primary side sensing and regulation; yet another Figure 5 of the power conversion system has primary side sensing And the adjusted switch mode flyback simplifies the conventional diagram; FIG. 6 is a simplified diagram showing the conventional operation mechanism of the flyback power conversion system; Powered by as a switch mode Source conversion system - a simplified timing diagram of the sampling and holding of the components performed by the components; Figure 9 is a simplified diagram showing certain elements of the output voltage adjustment for the switched mode power conversion system in accordance with an embodiment of the present invention; FIG. 10 is a simplified diagram showing certain apparatus for generating a 仏 信号 signal as a part of an open power conversion system according to an embodiment of the present invention; FIG. 11A is shown as an embodiment of the present invention. A simplified diagram of a portion of a 7G piece of a switched mode power conversion system for generating signals; FIG. 12 is a diagram showing 70 pieces of a portion of a switched mode power conversion system in accordance with an embodiment of the present invention. FIG. 13 is a simplified timing diagram of a switch mode power supply conversion according to another embodiment of the present invention; FIG. 14(a) is shown as an embodiment in accordance with the present invention. A simplified diagram of some of the components of the switched mode power conversion system and certain devices of error amplification H; Figure 14 (b) is a diagram showing a switching mode power conversion system as an embodiment in accordance with the present invention. A simplified diagram of some of the devices of the current source of the component - part; 201236345 Figure 5 U) is a 7L piece and error amplifier showing part of a switched mode power conversion system in accordance with another embodiment of the present invention A simplified diagram of some of the devices; Figure 5(b) is a simplified diagram showing certain devices as a current source for the -part beta of the components in the switched mode power conversion system in accordance with an embodiment of the present invention; 16 is π ίίι as a part of the power supply system based on the actual power of the prisoner and the CMOS implementation of the amplification II _ display; ® 17 is not the same as the embodiment of the invention mode power supply age Simplified view of certain devices of a portion of the components: Figure 18 illustrates certain devices for constant current output (cc) spreading as part of a switched mode power conversion system in accordance with an embodiment of the present invention. 19 is a simplified timing diagram for generating a D2C signal by a pulsar circuit as part of an off-mode power conversion system in accordance with an embodiment of the present invention; FIG. 20 is not shown as an embodiment in accordance with the present invention. switch A simplified diagram of some of the devices of the mode power conversion system that are part of the current sensing (cs) learned value adjustment; FIG. 21 is a switch with primary side sensing and adjustment in accordance with the present invention. A simplified diagram of a mode power conversion system; FIG. 22 is a simplified diagram of a demagnetization detecting element as part of a switched mode power conversion system in accordance with an embodiment of the present invention; FIG. 23 is a diagram including FIG. 21 and FIG. 22 according to the present invention. A simplified timing diagram of a switched mode power conversion system of the illustrated demagnetization detecting element; FIG. 24 is a simplified diagram of a switched mode power conversion system having primary side sensing and adjustment in accordance with another embodiment of the present invention; A simplified diagram of certain devices for electrical domain measurement (CS) peak adjustment components as part of a switched mode power conversion system in accordance with an embodiment of the present invention; FIG. 26 is a diagram of a power supply change in accordance with an embodiment of the present invention. Age-dependent refinement timing diagram; Figure 27 is an illustration of current sensing (CS) peak adjustment components as part of an off-mode power conversion system, respectively, in accordance with the present invention. Figure 28 is a simplified diagram of a primary side sensing and source switching system in accordance with yet another embodiment of the present invention; Figure 29 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention; 201236345^ Γ1 is a simplified diagram of a cycle-by-cycle peak detector as part of a power conversion system in accordance with an embodiment of the present invention; <FIG. 31 is a simplified timing diagram of a cycle-by-cycle detector as part of a power conversion system in accordance with an embodiment of the present invention; 32 is a simplified diagram of a switch mode lightning source conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention; FIG. 33 is a switch mode mine with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 34 is a simplified diagram of an integrator as part of a power conversion system in accordance with an embodiment of the present invention, including FIG. 33 and FIG. 34, in accordance with an embodiment of the present invention. Switching mode power conversion system of the integrator shown (four) morphing timing diagram; Fig. 36 is an oscillation of a part of the power conversion system according to an embodiment of the present invention BRIEF DESCRIPTION OF THE DRAWINGS Figure 37 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention; Figure 38 is a simplified timing diagram of certain currents of a switched mode power conversion system in accordance with an embodiment of the present invention; Is a simplified diagram of a switched mode power conversion system having primary side sensing and adjustment in accordance with yet another embodiment of the present invention; FIG. 40 is a switch mode power conversion system for powering a light emitting diode in accordance with yet another embodiment of the present invention. FIG. 41 is a simplified diagram of a switched mode power conversion system having primary side sensing and adjustment in accordance with yet another embodiment of the present invention; FIG. 42 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention. Figure 43 is a simplified diagram of a switched mode power conversion system for powering a light emitting diode in accordance with yet another embodiment of the present invention; and Figure 44 is a switch with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. A simplified diagram of a mode power conversion system; and FIG. 45 is a switch mode power supply for powering a light emitting diode according to still another embodiment of the present invention. Simplified diagram showing conversion system. 92 201236345 [Key component symbol description] 110 PWM controller 500 Switch mode power conversion system 502 primary winding 504 secondary winding 506 auxiliary winding 508, 514, 528 output signal 510, 512, 580 resistor 516, 530, 552, 566 terminal 520, 522, 532, 534, 538, 540, 542, 546, 568 component 524 error amplifier 526 capacitor 532 load-compensated component 536, 556, 564, 570, 572, 574 signal 544, 558, 592 control signal 548 drive signal 550 switch 554 diode 560 clock signal 562 oscillator 582 current 590 wafer 592 control signal 610, 620, 630, 640, 650, 660 waveform 910, 920 capacitor 912, 922 node 930 monostable device 1010, 1020, 1030, 1040, 1050, 1060, 1070 Waveforms 1110, 1120, 1130, 1140, 1150 Waveforms 93 201236345 1210, 1260, 1310, 1520 Component 1220 Transconductance Amplifier 1230 Current Source 1240 Voltage to Current Converter 1250 Current Source 1320 Transconductance Amplifier 1330 Current Slot 1340 Voltage to Current Converter 1350, 1360 Resistor 1510 Voltage to Current Converter 1512, 1522, 1534 Signal 1530 Phase Loop 1532, 1612, 1614 Clock Signal 1610 Clock Divider 1620 Pulse Copy Circuit 1622 NAND (Reverse) Gate 1624, 1626 MOS Transistor 1628 Capacitor 1629, 1634, 1636 Signal 1630 Phase Detector 1632 D Trigger 1640 Charge Pump 1642 Capacitor 1644 Current Signal 1650 Self-Calibration Circuit 1654 Current 1660 Clock Signal 1710, 1720, 1730, 1740, 1750 Waveform 1810 High Speed Comparator 1812 Compare Signal 94 201236345 1820 Charge Pump 1822 RS Latch 1824 Capacitor 1826 Voltage Signal 1830 Dynamic Threshold Generation 1832 dynamic current signal 1834 dynamic resistor 1835 voltage signal 1836 linear resistor 1838, 1839 transistor 1840 OCP comparator 2000 power conversion system 2010 primary winding 2012 secondary winding 2014 auxiliary winding 2020 power switch 2030 current sensing resistor 2040 output Cable equivalent resistor 2050, 2052 resistor 2054 node 2060, 2062 rectifier diode 2100 power conversion system 2110 primary winding 2111 current 2112 secondary winding 2114 auxiliary winding 2120, 2122, 2124 resistor 2130 switch 2142, 2144, 2146 Terminal 2143 Feedback signal 95 201236345 2147 2150 2151 2160 2162 2164 2165 2170 2171 2172 2180 2181 2185 2187 2190 2191 2192 2193 2210 2220 2230 2240 2310 2400 2414 2416 2420 2448 2462 2490 Sensing signal demagnetization detecting element signal current source current slot 2166 switching ramp signal NOT Gate Signal Capacitor 2182 Comparator 2183, 2211 Threshold Signal Control Signal Comparison Signal Trigger Element Adjustment Signal Driver Element Drive Signal Comparator 2222 Trigger Element 2232 NOT Gate AND Gate 2320, 2330, 2340, 2350, 2360 Waveform Switch Mode Power Conversion System 2444, 2448, 2460, 2464, 2474 signal, 2452, 2466 terminal, 2422, 2438, 2440, 2446 component signal oscillator chip 96 201236345 2510 voltage to current converter 2512, 2522, 2612, 2614, 2629, 2644, 2660 signal 2520 component 2610 clock divider 2620 pulse copy circuit 2635 phase detector and charge system 2680, 2682, 2684, 2686, 2688 waveform 2710 comparator 2712, 2726 signal 2722 logic control element 2724 charge pump 2730 dynamic threshold generator 2735 adjustment signal 2740 OCP Comparator 2780, 2782, 2784, 2786, 2790, 2792, 2794, 2796 Waveform 2800 Power Conversion System 2810 Primary Winding 2811 Current 2812 Secondary Winding 2813 Input Signal 2814 Auxiliary Winding 2815 AC Input Signal 2820, 2822, 2824 Resistor 2830 Switch 2832 Ramp Generator 2833 Ramp Signal 2834 Transconductance Amplifier 2835 Reference Signal 2836 Cycle-by-Cycle Peak Detector 2837 Peak Signal 97 201236345 2838 Rising Edge Masking Element 2840 Wafer 2842, 2844, 2846, 2848 Terminal 2843 Feedback Signal 2847 Sensing Signal 2850 Demagnetization Detection Element 2851 Demag Signal 2858, 2872 Capacitor 2860 Current Source 2862 Current Slot 2864, 2866 Switch 2865 Ramp Signal 2870 NOT Gate 2871, 2874, 2881 Signal 2880, 2882 Comparator 2883 Threshold Signal 2885 Control Signal 2887 Comparison Signal 2890 Trigger Element 2891 Adjustment Signal 2892 Drive Element 2893 Drive Signals 2910, 2920, 2922, 2930, 2940, 2950, 2960, 2970, 2980, 2990 Waveform 3010 Comparator 3020, 3022, 3024 Switch 3023, 3031 Signal 3030 Buffer 3040, 3042 Capacitor 3050 Current source 9 8 201236345 3060 monostable generator 3062, 3064 signal waveform 3110, 3120, 3130, 3140, 3150, 3160, 3170 3200 power conversion system 3210 capacitor 3213 DC input signal 3215 AC input signal 3220 capacitor 3230 resistor 3240 inductor 3300 power supply Conversion System 3310 Primary Winding 3311 Current 3312 Secondary Winding 3313 Input Signal 3314 Auxiliary Winding 3315 AC Input Signal 3317 Input Current 3320, 3322, 3324 Resistor 3330 Switch 3334 Transconductance Amplifier 3335 Reference Signal 3336 Cycle-by-Cycle Peak Detector 3337 Peak Signal 3338 Rising edge blanking element 3340 Wafer 3342, 3344, 3346, 3348 Terminal 3343 Feedback signal 3347 Sensing signal 3350 Demagnetization detecting element 99 201236345 3351 Signal 3358 Capacitor 3360 Oscillator 3362 Clock signal 3364 Ramp signal 3366 AND Gate 3368 . Adjusting signal 3370 Integration 3372 signal 3381 voltage signal 3382 comparator 3385 comparison signal 3390 flip-flop element 3391 signal 3392 drive element 3393 drive signal 3420, 3422, 3424 switch 3423, 3431 signal 3430 buffer 3440, 3442 capacitor 345 0, 3452, 3454 Transistor 3460 Amplifier 3461, 3463 Signal 3462 Monostable Generator 3470 Resistors 3510, 3520, 3530, 3540, 3550, 3560, 3570, 3580 Waveforms 3610, 3620, 3630 Reference Signal 3640 Resistor 3650 Capacitor 3710, 3720, 3730, 3740, 3742, 3750, 100 201236345 3760, 3770, 3780, 3810, 3820 Waveform 3900 Power Conversion System 3910, 3920 Capacitor 3913 DC Input Signal 3915 AC Input Signal 3930 Resistor 3940 Inductor .4010 Illuminated II Pole body 4100 Power conversion system 4110 Primary winding 4111 Current 4112 Secondary winding 4113 Input signal 4114 Auxiliary winding 4115 AC input signal 4117 Current 4120, 4122, 4124, 4126, 4128 Resistor 4130 Switch 4134 Transconductance amplifier 4135 Reference signal 4136 Cycle by cycle Peak detector 4137 peak signal 4138 rising edge blanking element 4140 wafer 4142, 4144, 4146, 4148, 4149 terminal 4143 feedback signal 4147 sensing signal 4150 demagnetization detecting element 4151 Demag signal 4158 capacitor 101 201236345 4160 oscillator 4162 clock signal 4166 AND Gate 4168 adjustment signal 4170 product Divider 4172 output signal 4181 voltage signal 4182 comparator 4183 signal 4184 multiplier 4185, 4187, 4191 signal 4190 flip-flop element 4192 drive element 4193 drive signal 4210, 4220, 4230, 4240, 4242, 4250, 4260, 4262, 4270, 4280 Waveform 4310 Light Emitting Diode 4400 Power Conversion System 4410 Primary Winding 4412 Secondary Winding 4413 Input Voltage 4414 Auxiliary Winding 4415 AC Input Signal 4419 Auxiliary Voltage 4420, 4422, 4424 Resistor 4426, 4430 Switch 4428 Amplifier 4434 Transconductance Amplifier 4435, 4437, 4447 Signal 4436 Cycle-by-Cycle Peak Detector 102 201236345 4438 Rising Edge Masking Element 4440 Wafer 4442, 4444, 4446, 4448 Terminal 4443 Feedback Signal 4450 Demagnetization Detection Element 4451, 4462, 4468, 4472 Signal 4458 Capacitor 4460 Oscillator 4466 AND Gate 4470 Integrator 4481 Voltage Signal 4482 Comparator 4484 Current Signal 4484 Multiplier 4485 Output Signal 4490 Trigger Element 4492 Drive Element 4493 Drive Signal 4510 Light Emitting Diode 103
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CN102651613B (en) | 2014-06-25 |
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TWI448060B (en) | 2014-08-01 |
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