201228000 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種薄膜太陽能電池之元件結構，特 別是關於一種高效率碲化鎘（CdTe)薄膜太陽能電池之 元件結構。 【先前技術】 目前已達到或接近量產階段的半導體薄膜太陽能電 池材料主要有非晶矽、碲化鎘（CdTe)及銅銦鎵硒 Cu(In，Ga)Se2 (簡稱CIGS )等三種，其中非晶石夕是最先 製成太陽能電池模組量產者；而CdTe及CIGS太陽能 電池小面積元件之能源轉換效率已分別達到165%與 20.3%以上，兩者均已有大面積模組之産品問世。. 就現有的碲化锅（CdTe)薄膜太陽能電池而言，在此 係以柯達(Kodak)公司於1980年6月10號公告之美國 公告第4,207，119號發明專利所揭露之一多晶薄膜硫化 鶴/碌化録太陽能電池（P〇lyCrystalline thin film CdS/CdTe photovoltaic cell)為例，請參照第 1 圖所示， 一薄膜太陽能電池之元件結構10依序包含：一玻璃基 板11; 一透光導電膜12,包含高摻雜氧化銦(InO)材料； 一 η-型緩衝層13，包含硫化鎘(CdS)材料；一 p_型主吸 收層14，包含碲化鎘(CdTe)材料；一背電極15，例如 為金(Au)鍍層；以及數個電極焊點16,分別結合在該透 光導電膜12及背電極15上。 201228000 如第1圖所示，該p-型主吸收層14只包含有碲化鎘 單一材料，其鍍製方法有蒸鍍（evaporation)、近距揮發 (close spaced sublimation)、藏鑛(sputtering)或電化學沉 積（electro-deposition)等。此外，完成鐘製的p-型主吸 收層14另需要額外實施一道在氯化鎘(CdCl2)氣氛下的 熱處理程序，以便促進碲化鎘晶粒成長以及降低碲化録 和該η-型緩衝層13之硫化鎘的兩種材料層之間因為晶 格不匹配所形成的介面缺陷密度。目前此結構小面積元 件效率已可達16.5%，大面積模組的轉換效率亦有ip/。 左右。 然而，上述薄膜太陽能電池之元件結構10的問題在 於該元件結構10有著製作該背電極15上的技術障礙， 也就是由於該Ρ-型主吸收層14的碲化鎘功函數高達 5.7eV，因此難以找到合適、穩定且成本較低的金屬材 料來做爲該背電極15與該p_型主吸收層14形成理想的 歐姆接觸。故，仍有必要進一步提供一種高效率碲化編 薄膜太陽能電池之元件結構，以解決上述現有技術所存 在的問題。 【發明内容】 本發明之主要目的在於提供一種高效率碲化鎘薄模 太陽能電池之元件結構，其中P型主吸收層依序包含崎 化鎘層及Cu-IIIA-VIA類之半導體化合物層，其利用 Cu-IIIA-VIA類之半導體化合物層來與金屬陽極層（背 201228000 電極）形成理想的歐姆接觸，藉此金屬陽極層將可使用 一般銅銦鎵硒(CIGS)薄膜太陽能電池元件慣用、穩定且 成本較低的鉬(Mo)電極材料，以避免發生現有碲化鎘薄 膜太陽能電池元件難以製作適合背電極的技術課題，因 此有利於提高元件結構之可靠性。再者，該Cu-ΐπA-VIA 類之半導體化合物層如Cuinse2其能隙低至i.〇ev，對 長波長區段的光吸收能力優於碲化鎘，可彌補碲化鎘層 在此波長區段不足的光吸收，以提升電池效率。 本發明之次要目的在於提供一種高效率碲化鎘薄臈 太陽能電池之元件結構，其係在p型主吸收層的 Cu-IIIA-VIA類之半導體化合物層中加入另一 ΙΠΑ或 VIA元素形成四元或五元化合物得以獲致適當設計的 月&隙組成梯度，而在背電極附近產生電場，有助於減少 電子與電洞的復合’進而提升電池發電效率。 本發明之另一目的在於提供一種高效率碲化鎘薄膜 太％此電池之元件結構，其中受光面之透光導電氧化物 層使用咼掺雜N型氧化鋅(ZnO)，並輔以高電阻值的氧 化鋅(ZnO)做為尚阻值層，以適當阻隔透光導電氧化物 層對於p-n接面性質的影響，因氧化鋅的光穿透率高於 現有碲化鎘薄膜太陽能電池之高摻雜氧化銦（In〇)的透 光導電氧化物層’有利於增加光吸收率並進一步提升元 件的能量轉換效率。 為達上述之目的，本發明提供一種高效率碲化鎘薄 膜太陽能電池之元件結構，其包含： 201228000 一透光基板； =光導電氧化物層，形成於該透光基板上； 回阻值層，形成在該透光導電氧化物層上，該高 阻值層包含高電阻值之氧化鋅； Ν型緩衝層’形成在該高阻值層及透光導電氧化 物層上； Ρ型主吸收層，形成在該Ν型緩衝層上，該ρ型 主吸收層依序包含—碌化録層及-Cu-IIIA-VIΑ類之半 導體化合物層； 人—金屬陽極層，形成在該P型主吸收層之半導體化 &物層上，該金屬陽極層包含鉬元素；以及 _ 一金屬陰極層，另形成在該透光導電氧化物層設置 該高阻值層之外的表面位置上。 在本發明之一實施例中’該透光基板選自硬式基板 或可撓式基板，其中該硬式基板選自玻璃基板，例如為 =明破璃、鈉玻璃或導電玻璃；及該可撓式基板選自高 刀子聚合物基板，例如為聚醯亞胺(polyimide，PI)等。 _在本發明之一實施例中，該透光導電氧化物層包含 同捧雜之N型氧化鋅’且摻雜有鋁(A1)及鎵(Ga)元素中 的至少一種。 在本發明之一實施例中，該透光導電氧化物層包含 氧化锡（Sn〇2)、氧化銦錫(In2〇3_Sn〇2，IT〇)、氧化鋁鋅 (Al2〇3-ZnO，ΑΖΟ)、氧化銦辞(Ιη2〇3_Ζη〇，ΙΖ〇)、氧化 鋼鎮（MgO-In2〇3)、摻氣氧化錫（Fiuorine_d〇ped Sn02， 201228000 FTO)、氧化錫銻（Sn(VSb2〇3)、氧化辞鎵(Ga2〇3_Zn〇)、 氧化銦録辞（In2〇3_Ga2〇3-ZnO，IGZO)、氧化絡銅 (CuCr02)、氧化鹤銅（srCu202)及二氧化銅鋁（CuA102) 中的至少一種。 在本發明之一實施例中，該N型緩衝層選自硫化鎘 (CdS)、硫化鋅(ZnS)及氧化鋅鎂（ZnxMghO，0<χ<1)中 的至少一種。 在本發明之一實施例中，該Cu，IIIA-VIA類之半導 體化合物層較佳爲Cu-IIIA-Se2類之半導體化合物層， 其中第IIIA族元素選自銦(in)、鎵(Ga)及鋁(Ai)中的至 少一種；例如，該Cu-IIIA-VIA類之半導體化合物層選 自二砸化銅銦（CuInSe2，簡稱CIS)、二砸化銅錮鎵 (CuInxGakSez，簡稱 CIGS，0<χ<1)及二硒化銅銦鋁 (CuCInxAUSes，簡稱 CIAS，0<χ<1)中的至少一種。 在本發明之一實施例中，該Cu-IIIA-VIA類之半導 體化合物層中另加入第ΙΠΑ族或第VIA族元素成為四 元或五元化合物以形成組成梯度，其中第ΠΙΑ族元素 選自銦(In)、鎵(Ga)及鋁(Α1)中的至少一種，第VIA族 元素選自硒及硫中的至少一種。 在本發明之一實施例中，該金屬陰極層包含鋁或其 合金。 【實施方式】 爲了讓本發明之上述及其他目的、特徵、優點能更 201228000 Z易懂，下文將特舉本發明較佳實施例，幷配合所附 圖式，作詳細說明如下。再者’本發明所提到的方向用 每’例如「上」、「下」、「前「後 厂 仗」.左」、右」、「内」、 卜」或側面」等，僅是參考附加圖式的方向。因此， 使用的方_語是用以朗及理解本發明，㈣用以限 制本發明。201228000 VI. Description of the Invention: [Technical Field] The present invention relates to a component structure of a thin film solar cell, and more particularly to a component structure of a high efficiency cadmium telluride (CdTe) thin film solar cell. [Prior Art] At present, semiconductor thin film solar cell materials which have reached or are close to the mass production stage mainly include amorphous germanium, cadmium telluride (CdTe) and copper indium gallium selenide Cu(In,Ga)Se2 (referred to as CIGS), among which Amorphous Shixi is the first producer of solar cell modules; while the energy conversion efficiency of small-area components of CdTe and CIGS solar cells has reached 165% and 20.3% respectively, both of which have large-area modules. The product is available. In the case of the existing bismuth (CdTe) thin-film solar cell, a polycrystalline film disclosed in U.S. Patent No. 4,207,119 issued to Kodak, issued Jun. 10, 1980. For example, the P〇lyCrystalline thin film CdS/CdTe photovoltaic cell is shown in FIG. 1 . The component structure 10 of a thin film solar cell sequentially includes: a glass substrate 11; The photoconductive film 12 comprises a highly doped indium oxide (InO) material; an n-type buffer layer 13 comprising a cadmium sulfide (CdS) material; and a p_ type main absorption layer 14 comprising a cadmium telluride (CdTe) material; A back electrode 15 is, for example, a gold (Au) plating layer; and a plurality of electrode pads 16 are bonded to the light-transmitting conductive film 12 and the back electrode 15, respectively. 201228000 As shown in Fig. 1, the p-type main absorption layer 14 contains only a single material of cadmium telluride, and the plating method includes evaporation, close spaced sublimation, and sputtering. Or electro-deposition or the like. In addition, the completion of the clock-shaped p-type main absorbing layer 14 requires an additional heat treatment procedure in a cadmium chloride (CdCl 2 ) atmosphere to promote the growth of cadmium telluride grains and reduce the ruthenium and the η-type buffer. The interface defect density formed between the two material layers of cadmium sulfide of layer 13 due to lattice mismatch. At present, the efficiency of small-area components of this structure has reached 16.5%, and the conversion efficiency of large-area modules is also ip/. about. However, the problem with the element structure 10 of the above thin film solar cell is that the element structure 10 has a technical obstacle in fabricating the back electrode 15, that is, since the cadmium telluride work function of the Ρ-type main absorbing layer 14 is as high as 5.7 eV, It is difficult to find a suitable, stable, and low cost metal material as the back electrode 15 forms a desired ohmic contact with the p-type main absorbing layer 14. Therefore, it is still necessary to further provide a component structure of a high-efficiency tantalum-modified thin film solar cell to solve the problems of the prior art described above. SUMMARY OF THE INVENTION The main object of the present invention is to provide a high efficiency cadmium thin film solar cell component structure, wherein the P-type main absorber layer sequentially comprises a cadmium layer and a Cu-IIIA-VIA semiconductor compound layer. It utilizes a semiconductor compound layer of the Cu-IIIA-VIA type to form a desired ohmic contact with the metal anode layer (back 201228000 electrode), whereby the metal anode layer can be used with conventional copper indium gallium selenide (CIGS) thin film solar cell elements. The stable and low-cost molybdenum (Mo) electrode material can avoid the technical problem that the existing cadmium telluride thin film solar cell element is difficult to fabricate the back electrode, and thus is beneficial to improve the reliability of the component structure. Furthermore, the Cu-ΐπA-VIA semiconductor compound layer such as Cuinse2 has an energy gap as low as i.〇ev, and the light absorption capacity for the long wavelength section is superior to that of cadmium telluride, which can compensate for the cadmium telluride layer at this wavelength. Insufficient light absorption in the section to improve battery efficiency. A secondary object of the present invention is to provide an element structure of a high-efficiency cadmium telluride thin tantalum solar cell by adding another ruthenium or VIA element to a Cu-IIIA-VIA semiconductor compound layer of a p-type main absorbing layer. The quaternary or pentad compound is able to achieve a properly designed monthly & amp composition gradient, while generating an electric field near the back electrode helps to reduce the recombination of electrons and holes, thereby increasing battery power generation efficiency. Another object of the present invention is to provide a high-efficiency cadmium telluride film which is too much of the element structure of the battery, wherein the light-transmitting conductive oxide layer of the light-receiving surface is doped with N-type zinc oxide (ZnO) and supplemented with high resistance. The value of zinc oxide (ZnO) is used as a resistive layer to properly block the effect of the transparent conductive oxide layer on the properties of the pn junction, because the light transmittance of zinc oxide is higher than that of the existing cadmium telluride thin film solar cell. The light-transmissive conductive oxide layer doped with indium oxide (In〇) is advantageous for increasing the light absorption rate and further improving the energy conversion efficiency of the element. In order to achieve the above object, the present invention provides a component structure of a high-efficiency cadmium telluride thin film solar cell, comprising: 201228000 a transparent substrate; a photoconductive oxide layer formed on the transparent substrate; a resistor layer Formed on the light-transmissive conductive oxide layer, the high-resistance layer comprises a high-resistance zinc oxide; a buffer layer is formed on the high-resistance layer and the light-transmitting conductive oxide layer; a layer formed on the buffer layer, the p-type main absorption layer sequentially includes a semiconductor layer of a -chemical layer and a -Cu-IIIA-VIΑ; a human-metal anode layer formed on the P-type On the semiconductor layer of the absorption layer, the metal anode layer comprises a molybdenum element; and a metal cathode layer is formed on a surface position other than the high-resistance layer of the light-transmitting conductive oxide layer. In an embodiment of the invention, the light transmissive substrate is selected from a hard substrate or a flexible substrate, wherein the hard substrate is selected from a glass substrate, such as a glass, a soda glass, or a conductive glass; and the flexible The substrate is selected from a high knife polymer substrate, such as polyimide (PI) or the like. In one embodiment of the invention, the light-transmitting conductive oxide layer comprises the same type of N-type zinc oxide and is doped with at least one of aluminum (A1) and gallium (Ga) elements. In an embodiment of the invention, the light-transmitting conductive oxide layer comprises tin oxide (Sn〇2), indium tin oxide (In2〇3_Sn〇2, IT〇), aluminum oxide zinc (Al2〇3-ZnO, germanium) ), indium oxide (Ιη2〇3_Ζη〇,ΙΖ〇), oxidized steel town (MgO-In2〇3), aerated tin oxide (Fiuorine_d〇ped Sn02, 201228000 FTO), tin oxide bismuth (Sn(VSb2〇3) , oxidized gallium (Ga2〇3_Zn〇), indium oxide (In2〇3_Ga2〇3-ZnO, IGZO), copper oxide (CuCr02), oxidized crane copper (srCu202) and copper aluminide (CuA102) In one embodiment of the present invention, the N-type buffer layer is at least one selected from the group consisting of cadmium sulfide (CdS), zinc sulfide (ZnS), and zinc magnesium oxide (ZnxMghO, 0 < χ <1). In one embodiment of the invention, the Cu, IIIA-VIA semiconductor compound layer is preferably a Cu-IIIA-Se2 semiconductor compound layer, wherein the Group IIIA element is selected from the group consisting of indium (in), gallium (Ga), and aluminum. At least one of (Ai); for example, the Cu-IIIA-VIA semiconductor compound layer is selected from the group consisting of copper indium bismuth (CuInSe2, CIS for short) and copper bismuth bismuth (CuInxGakSez). CIGS, 0 < χ < 1) and at least one of CuCInxAUSes (CIAS, 0 < 1 < 1). In one embodiment of the invention, the Cu-IIIA-VIA semiconductor Further adding a lanthanum or group VIA element to the quaternary or pentad compound to form a composition gradient, wherein the lanthanum element is selected from at least one of indium (In), gallium (Ga), and aluminum (Α1). The Group VIA element is selected from at least one of selenium and sulfur. In one embodiment of the invention, the metal cathode layer comprises aluminum or an alloy thereof. [Embodiment] The above and other objects, features, and features of the present invention are provided. Advantages can be further understood by 201228000 Z. The preferred embodiments of the present invention will be specifically described below, and will be described in detail below with reference to the drawings. Further, the directions mentioned in the present invention are used for each such as "upper" and " "下", "前前后后仗". Left", right", "内", 卜" or "lateral", etc., only refer to the direction of the additional schema. Therefore, the use of the _ language is used to understand and understand The present invention (4) is intended to limit the present invention.
=參照第2 ®所示’本發明較佳實施例之高效率蹄 化鑛薄膜太陽能電池之元件結構2G主要包含· 一透光 基板21、一透光導電氧化物層22、一高阻值層23、一 N型緩衝層24、— p型主吸收層25、一金屬陽極層％ =及-金屬陰極層27，其中該透光導電氧化物層仏 =值層23、:^型緩衝層24、P型主吸收層25及金屬 蛋層26係依序堆疊於該透光基板21上，該金屬陰極 曰27另形成在該透光導電氧化物層22設置該高阻值層 23之外的其餘表面的適當位置上。再者，該P型主吸 ，曰依序包含一碲化録層51及一 Cu-IIIA-VIA類之 半導體化合物層52 ’此兩者構成該P型主吸收層5，以 做為該疋件結構1G之主吸收層。另外，該透光基板21 =外表面（下表面）係可做為該元件結構20接收陽光之 广光面，而該金屬陽極層26及金屬陰極層27分別做為 該疋件結構20之陽極(正極)與陰極（負極），以便在該元 件結構2 G將光能轉換為電能之後分別用以輸出正電及 負電，以供驅動一負載(如電燈）或將電能儲存於-電池 201228000 睛再參照第2圖所示，本發明較佳實施例之透光基 板21係可選自各種硬式基板或可撓式丨幻基板， 其中硬式基板又可選自玻璃基板，例如為透明玻璃、納 玻璃、導電玻璃或其他種類之玻璃，同時可撓式基板則 可選自各種南分子聚合物基板，例如聚醯亞胺 (polyimide ’ PI)等。通常’該透光基板21之厚度介於 0.05至0.5cm(公分）之間，例如〇 2cm，但並不限於此。 请再參照第2圖所示，本發明較佳實施例之透光導 電氧化物（transparent conductive oxide，TCO)層 22 包含 高摻雜之N型氧化鋅(Zn〇)，其可利用溶.膠-凝膠(s〇1_gel) 法、水熱法、化學浴沉積法或濺鍍法等適當製程來塗佈 或鑛於該透光基板21之一表面上，以形成該透光導電 氧化物層22。該透光導電氧化物層22之高摻雜之^^型 氧化鋅係摻雜有鋁(A1)及鎵(Ga)等元素中的至少一種， 以增加其導電性質。該透光導電氧化物層22之厚度較 佳介於200至1500奈米（nm)之間，例如為5〇〇nm，但 並不限於此。 值得注意的是，在本發明其他實施方式中，該透光 導電氧化物層22除了使用高摻雜之n型氧化鋅之外， 亦可使用及選自氧化錫（Sn02)、氧化銦錫(In2〇3_Sn〇2， ITO)、氧化銘鋅（Al2〇3-ZnO，AZO)、氧化銦鋅 (In2〇3_ZnO，IZO)、氧化銦鎂（Mg〇-In2〇3)、摻氟氧化錫 (Fluorine-doped Sn02，FTO)、氧化錫銻（Sn〇2_Sb2〇3)、 氧化鋅鎵(GaA-ZnO)、氧化銦鎵鋅(In2〇3_Ga2〇3_Zn〇， 201228000 IGZO)、氧化鉻銅(CuCr〇2)、氧化锶銅（8心2〇2)及二 化銅紹（CuA102)中#至少一種透光導電氧化物材料。 請再參照第2圖所示，本發明較佳實施例之高随值 層23係包含高電阻值之氧化辞(Zn〇)，其電阻值約 為lOOOOhm, μ上），其中高電阻值之氧化辞可利用 溶膠-凝膠*、水減、化學浴沉積法或舰法等適當 製程來塗佈或鍍於該透光導電氧化物層22之一表: 上，以形成該高阻值層23。該高阻值層23之厚度較佳 介於10至200奈米（nm)之間，例如為1〇〇nm，但並 限於此。 請再參照第2圖所示，本發明較佳實施例之N型緩 衝層24較佳係選自硫化鎘(Cds)、硫化鋅(ZnS)及氧化 鋅鎂（ZnxMgl-x0，0<x<1)中的至少一種，例如硫化鎘， 該些材料係可利用旋塗法搭配熱蒸鍍法、共蒸鍍法、溶 >凝膠法水熱法、化學浴沉積法或減錢法等適當製 程來塗佈或鍍於該高阻值層23及透光導電氧化物層22 上，以做為該N型緩衝層24。該1ST型緩衝層24之厚度 較佳介於10至500奈米（nm)之間，例如為15〇nm，但 並不限於此。 凊再參照第2圖所示，本發明較佳實施例之p型主 吸收層25形成在該n型緩衝層24上’且該P型主吸 收層25由下而上依序包含一碲化鎘層251及一 UIIIA-VIA類之半導體化合物層252’此兩材料層係 可分別利用熱蒸鍍法、濺鍍法、溶膠_凝膠法、水熱法、 11 201228000 化學浴沉積法製備CdTe薄膜，而以旋塗硒化法、共蒸 鍍法、硒化法、溶膠_凝膠法、水熱法、化學浴沉積法 或濺鍍法等適當製程來製備Cu-IIIA-VIA類之半導體化 合物層依序鍍於該N型緩衝層24上，其中該 Cu-IIIA-VIA類之半導體化合物層252較佳爲 Cu_IIIA-Se2類之半導體化合物層，且第πια族元素較 佳選自銦(In)、鎵(Ga)及鋁(Α1)中的至少一種。例如，在 本實施例中，該Cu-IIIA-VIA類之半導體化合物層係可 選自二硒化銅銦（CuInSe2，簡稱CIS)、二硒化銅銦鎵 (CuInxGai-xSe】’簡稱CIGS，0<χ<1)及二石西化銅銦銘 (CuQnxAUSe】，簡稱CIAS ’ 0<χ<1)中的至少一種，其 中較佳選自二硒化銅銦(CIS)。再者，該碲化鎘層251 之厚度較佳介於100至1500奈米（nm)之間，例如為 150nm，但並不限於此。同時，該Cu_IIIA_VIA類之半 導體化合物層252之厚度較佳介於1〇〇至15〇〇奈米（nm) 之間，例如為150nm，但亦不限於此。 請再參照第2圖所示，本發明較佳實施例之金屬陽 極層26即為一背電極，其形成在該p型主吸收層％之 半導體化合物層252上，該金屬陽極層％包含鉬(M〇) 元素’其可利用電ϋ4鍍或濺鍍等適當製程來鍛於該 半導體化合物層252上。該金屬陽極層％之厚度較佳 介於500至2000奈米（nm)之間，例如為1〇〇〇職，但亦 不限於此。 請再參照第2圖㈣’本發明較佳實_之金屬陰 12 201228000 :== 表面的適當仇置上，並且通常 ΠΓΓ:Γ3之鄰近位置處，例如位於該高阻值 金，其可利用電鍍、印刷=;:27包:銘或其合 佈或鍵於該透光導電氧化物層2'2’錢等適當製程來塗 化之该金屬陰極層27。該金屬陰極::二::: 於200至2500奈米㈣之間 27之厚度較佳介 限於此。 例如為15〇〇nm，但亦不 如上所述，相較於現有薄 常因P_型主吸收層的碲化鎘功函數：電：：疋件結構 本：高===觸等技術問題，第叉之 係使該二 c~類之半導體化合Referring to the second embodiment, the component structure 2G of the high-efficiency hoofed ore thin film solar cell of the preferred embodiment of the present invention mainly includes a transparent substrate 21, a light-transmitting conductive oxide layer 22, and a high-resistance layer. 23, an N-type buffer layer 24, a p-type main absorption layer 25, a metal anode layer % = and - a metal cathode layer 27, wherein the light-transmitting conductive oxide layer 仏 = value layer 23, : type buffer layer 24 The P-type main absorbing layer 25 and the metal egg layer 26 are sequentially stacked on the transparent substrate 21, and the metal cathode yoke 27 is further formed on the transparent conductive oxide layer 22 except the high-resistance layer 23. The rest of the surface is in place. Furthermore, the P-type main absorption includes a recording layer 51 and a Cu-IIIA-VIA semiconductor compound layer 52', which constitute the P-type main absorption layer 5 as the crucible. The main absorption layer of the structure 1G. In addition, the transparent substrate 21 = outer surface (lower surface) can be used as the wide surface of the component structure 20 for receiving sunlight, and the metal anode layer 26 and the metal cathode layer 27 are respectively used as anodes of the element structure 20 (positive electrode) and cathode (negative electrode) for outputting positive and negative power respectively after the element structure 2 G converts light energy into electrical energy for driving a load (such as an electric lamp) or storing electric energy in the battery - 201228000 Referring to FIG. 2 again, the transparent substrate 21 of the preferred embodiment of the present invention may be selected from various hard substrates or flexible phantom substrates, wherein the hard substrate may be selected from a glass substrate, such as a transparent glass or a nano glass. Glass, conductive glass or other kinds of glass, while the flexible substrate can be selected from various southern molecular polymer substrates, such as polyimide 'PI'. Usually, the thickness of the light-transmitting substrate 21 is between 0.05 and 0.5 cm (cm), for example, 〇 2 cm, but is not limited thereto. Referring to FIG. 2 again, the transparent conductive oxide (TCO) layer 22 of the preferred embodiment of the present invention comprises a highly doped N-type zinc oxide (Zn〇), which can utilize the solvent. a suitable process such as a gel (s〇1_gel) method, hydrothermal method, chemical bath deposition method or sputtering method to coat or mineralize on one surface of the light-transmitting substrate 21 to form the light-transmitting conductive oxide layer twenty two. The highly doped zinc oxide of the light-transmitting conductive oxide layer 22 is doped with at least one of elements such as aluminum (A1) and gallium (Ga) to increase its conductive properties. The thickness of the light-transmitting conductive oxide layer 22 is preferably between 200 and 1500 nanometers (nm), for example, 5 Å, but is not limited thereto. It should be noted that in other embodiments of the present invention, the light-transmitting conductive oxide layer 22 may be used in addition to the highly doped n-type zinc oxide, and may be selected from the group consisting of tin oxide (Sn02) and indium tin oxide ( In2〇3_Sn〇2, ITO), oxidized zinc (Al2〇3-ZnO, AZO), indium zinc oxide (In2〇3_ZnO, IZO), indium magnesium oxide (Mg〇-In2〇3), fluorine-doped tin oxide ( Fluorine-doped Sn02, FTO), tin antimony oxide (Sn〇2_Sb2〇3), zinc gallium oxide (GaA-ZnO), indium gallium zinc oxide (In2〇3_Ga2〇3_Zn〇, 201228000 IGZO), chromium oxide copper (CuCr〇) 2) at least one light-transmitting conductive oxide material of yttrium copper oxide (8 core 2 〇 2) and copper bismuth (CuA102). Referring to FIG. 2 again, the high-value layer 23 of the preferred embodiment of the present invention includes a high resistance value (Zn〇) having a resistance value of about 1000 ohm, μ), wherein the high resistance value is The oxidized word may be coated or plated on one of the transparent conductive oxide layers 22 by a suitable process such as sol-gel*, water reduction, chemical bath deposition or ship method to form the high resistance layer. twenty three. The thickness of the high resistance layer 23 is preferably between 10 and 200 nanometers (nm), for example, 1 〇〇 nm, but is not limited thereto. Referring to FIG. 2 again, the N-type buffer layer 24 of the preferred embodiment of the present invention is preferably selected from the group consisting of cadmium sulfide (Cds), zinc sulfide (ZnS), and zinc magnesium oxide (ZnxMgl-x0, 0; x < At least one of 1), for example, cadmium sulfide, which may be subjected to spin coating, thermal evaporation, co-evaporation, dissolution, gel hydrothermal, chemical bath deposition, or money reduction. The high-resistance layer 23 and the light-transmitting conductive oxide layer 22 are coated or plated by a suitable process to serve as the N-type buffer layer 24. The thickness of the 1ST type buffer layer 24 is preferably between 10 and 500 nanometers (nm), for example, 15 Å, but is not limited thereto. Referring again to FIG. 2, a p-type main absorbing layer 25 of the preferred embodiment of the present invention is formed on the n-type buffer layer 24' and the P-type main absorbing layer 25 is sequentially contained from bottom to top. Cadmium layer 251 and a UIIIA-VIA type semiconductor compound layer 252'. The two material layers can be prepared by thermal evaporation, sputtering, sol-gel method, hydrothermal method, 11 201228000 chemical bath deposition method. a thin film, and a Cu-IIIA-VIA semiconductor is prepared by a spin coating selenization method, a co-evaporation method, a selenization method, a sol-gel method, a hydrothermal method, a chemical bath deposition method, or a sputtering method. The compound layer is sequentially plated on the N-type buffer layer 24, wherein the Cu-IIIA-VIA type semiconductor compound layer 252 is preferably a Cu_IIIA-Se2 type semiconductor compound layer, and the πια group element is preferably selected from the group consisting of indium ( At least one of In), gallium (Ga), and aluminum (Α1). For example, in this embodiment, the Cu-IIIA-VIA semiconductor compound layer may be selected from copper indium diselenide (CuInSe2, CIS for short), and copper indium gallium diselide (CuInxGai-xSe) 'CIGS for short. 0< χ <1) and at least one of CuQnxAUSe, abbreviated as CIAS '0<χ<1), preferably selected from copper indium diselenide (CIS). Further, the thickness of the cadmium telluride layer 251 is preferably between 100 and 1,500 nanometers (nm), for example, 150 nm, but is not limited thereto. Meanwhile, the thickness of the semiconductor compound layer 252 of the Cu_IIIA_VIA type is preferably between 1 Å and 15 Å nanometers (nm), for example, 150 nm, but is not limited thereto. Referring to FIG. 2 again, the metal anode layer 26 of the preferred embodiment of the present invention is a back electrode formed on the semiconductor compound layer 252 of the p-type main absorption layer, and the metal anode layer contains molybdenum. (M〇) The element 'which can be forged onto the semiconductor compound layer 252 by a suitable process such as electroplating or sputtering. The thickness of the metal anode layer is preferably between 500 and 2000 nanometers (nm), for example, one job, but is not limited thereto. Please refer to FIG. 2 (4) 'The preferred embodiment of the invention _ metal yin 12 201228000 :== appropriate embedding of the surface, and usually ΠΓΓ: 邻近3 adjacent position, for example, located in the high resistance gold, which can be utilized Electroplating, printing =;: 27 packets: the metal cathode layer 27 coated by a suitable process such as the light-transmissive conductive oxide layer 2'2'. The thickness of the metal cathode::2::: between 200 and 2500 nm (four) 27 is preferably limited thereto. For example, it is 15 〇〇 nm, but it is not as described above. Compared with the existing thin cadmium telluride work function of the P_ type main absorbing layer: electricity:: 疋 结构 本 :: high === touch and other technical problems , the second fork system makes the semiconductor combination of the two c~
Cu-mA_VIA類之半導體化合物層252來與該金屬用陽= 層（背電極)26形成理想的歐姆接觸，藉此該金屬陽極声 26將可選擇使用一般銅銦鎵硒(CIGS)薄祺太t ^層 ::慣用、穩定且成本較低的_0)電桎材料， 發生現有碲化鎘薄臈太陽能電池元件難以製作嘀人3 電極的技術課題，因此有利於提高該元件結構2〇 13彦 靠性。 之可 再者，在本發明之高效率碲化鎘薄膜太陽铲電 13 201228000 元件結構2”，由於該p型主吸收層a中的 cw類之半導體化合物層252如咖 隙低至U)eV，其在長波長區段的光吸收能力優於該蹄 化鎘層251，故可補足該碲化鎘層251纟此長波長區段 較為不足的光吸收率，因此有利於提高該？型 25之整體光吸收率。 只曰The semiconductor compound layer 252 of the Cu-mA_VIA type forms a desired ohmic contact with the metal with a positive layer (back electrode) 26, whereby the metal anode acoustic 26 will optionally use a general copper indium gallium selenide (CIGS) thin layer too t ^ layer:: conventional, stable and low-cost _0) electro-hydraulic material, the existing technical problem of the cadmium telluride thin solar cell element is difficult to make the deaf 3 electrode, so it is beneficial to improve the structure of the element 2〇13 Yan relies on sex. Further, in the present invention, the high-efficiency cadmium telluride film solar shovel 13 201228000 element structure 2", since the cw-type semiconductor compound layer 252 in the p-type main absorbing layer a is as low as U) eV The light absorption capability in the long wavelength section is superior to that of the cadmium cadmium layer 251, so that the cadmium telluride layer 251 can be supplemented with insufficient light absorption rate of the long wavelength section, thereby facilitating the improvement of the type 25 The overall light absorption rate.
_另外，在本發明之高效率碲化録薄膜太陽能電池之 70件結構2G中’受光面之透光導電氧化物層22使用高 摻雜Ν型氧化鋅(ΖηΟ)’並輔以高電阻值的氧化辞(Ζη〇) 做為該高阻值層23,以適當阻隔該透光導電氧化物層 22對於ρ-η接面性質的影響，且高電阻值之氧化鋅的二 穿透率亦高於現有碲化鎘薄膜太陽能電池之高摻雜氧 化銦（InO)的透光導電氧化物層，因此亦有利於增加光 吸收率並進一步提高整體元件能量轉換效率。In addition, in the 70-piece structure 2G of the high-efficiency tantalum film solar cell of the present invention, the light-transmitting conductive oxide layer 22 of the light-receiving surface is highly doped with zinc oxide (ΖηΟ) and is supplemented with a high resistance value. The oxidation word (Ζη〇) is used as the high resistance layer 23 to appropriately block the influence of the light-transmitting conductive oxide layer 22 on the properties of the p-η junction, and the two-transmission ratio of the high-resistance zinc oxide is also The light-transmissive conductive oxide layer of the highly doped indium oxide (InO) which is higher than the existing cadmium telluride thin film solar cell is also advantageous for increasing the light absorption rate and further improving the energy conversion efficiency of the overall element.
此外，在本發明之高效率蹄化録薄膜太陽能電池之 元件結構20中，於該Ρ型主吸收層25的Cu-IIIA-VIA 類之半導體化合物層252中也可選擇性額外加入第IIIA 族元素(例如銦(In)、鎵(Ga)及铭(A1)中的至少一種）或第 VIA族元素(例如硒（Se)及硫(S)中的至少一種），以成為 四元或五元化合物’其可以獲致適當設計的能隙組成梯 度，因而在該半導體化合物層252及金屬陽極層（背電 極)26之間造成適當電場來減少載子復合機率，因此有 利于進一步提高整體元件之電池發電效率。 雖然本發明已以較佳實施例揭露’然其並非用以限 14 201228000 制本發明，任何熟習此項技藝之人士，在不脫離本發明 ' 之精神和範圍内，當可作各種更動與修飾，因此本發明 _ 之保護圍當視後附之申請專利範圍所界定者爲準。 【圖式簡單說明】 第1圖：現有碲化鎘薄膜太陽能電池之元件結構之 組合剖視圖。 第2圖：本發明較佳實施例之高效率碲化鎘薄膜太 • 陽能電池之元件結構之組合剖視圖。 【主要元件符號說明】 10 元件結構 11 玻璃基板 12 透光導電膜 13 η-型緩衝層 14 p-型主吸收層 15 背電極 16 電極焊點 20 元件結構 21 透光基板 22 透光導電氧化物層 23 高阻值層 24 Ν型緩衝層 25 P型主吸收層 251 蹄化錫層 252 半導體化合物層 26 金屬陽極層 27 金屬陰極層 15Further, in the element structure 20 of the high-efficiency hoof film solar cell of the present invention, the IIIA family may be optionally additionally added to the Cu-IIIA-VIA type semiconductor compound layer 252 of the 主-type main absorbing layer 25. An element (for example, at least one of indium (In), gallium (Ga), and Ming (A1)) or a Group VIA element (for example, at least one of selenium (Se) and sulfur (S)) to become quaternary or five The meta-compound 'which can achieve a properly designed energy gap composition gradient, thereby causing an appropriate electric field between the semiconductor compound layer 252 and the metal anode layer (back electrode) 26 to reduce the carrier complex probability, thereby facilitating further improvement of the overall component Battery power generation efficiency. While the present invention has been described in its preferred embodiments, it is intended that the invention is not limited to the details of the present invention, and that various modifications and changes can be made without departing from the spirit and scope of the invention. Therefore, the protection of the present invention is defined by the scope of the patent application. [Simple description of the drawing] Fig. 1 is a sectional view showing the combination of the components of the conventional cadmium telluride thin film solar cell. Fig. 2 is a sectional view showing the combination of the component structure of the high-efficiency cadmium telluride film of the preferred embodiment of the present invention. [Main component symbol description] 10 Component structure 11 Glass substrate 12 Light-transmissive conductive film 13 η-type buffer layer 14 p-type main absorption layer 15 Back electrode 16 Electrode pad 20 Component structure 21 Transmissive substrate 22 Light-transmitting conductive oxide Layer 23 High resistance layer 24 Ν type buffer layer 25 P type main absorbing layer 251 hoof tin layer 252 Semiconductor compound layer 26 Metal anode layer 27 Metal cathode layer 15