TW201142054A - Deposition method - Google Patents

Deposition method Download PDF

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Publication number
TW201142054A
TW201142054A TW100114149A TW100114149A TW201142054A TW 201142054 A TW201142054 A TW 201142054A TW 100114149 A TW100114149 A TW 100114149A TW 100114149 A TW100114149 A TW 100114149A TW 201142054 A TW201142054 A TW 201142054A
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TW
Taiwan
Prior art keywords
film
target
film forming
atoms
sputtering
Prior art date
Application number
TW100114149A
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Chinese (zh)
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TWI525205B (en
Inventor
Mami Nishimura
Shigekazu Tomai
Koki Yano
Masashi Kasami
Masayuki Itose
Shigeo Matsuzaki
Kazuaki Ebata
Original Assignee
Idemitsu Kosan Co
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Publication of TW201142054A publication Critical patent/TW201142054A/en
Application granted granted Critical
Publication of TWI525205B publication Critical patent/TWI525205B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021—Reactive sputtering or evaporation
    • C23C14/0036—Reactive sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/086—Oxides of zinc, germanium, cadmium, indium, tin, thallium or bismuth
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
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    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
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    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
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    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

In the disclosed deposition method, a target comprising a metal oxide is sputtered and a thin film is deposited on a substrate in a gaseous environment containing rare gas atoms and water molecules, wherein the content of the aforementioned water molecules is 0.1-10% of the aforementioned rare gas atoms by partial pressure ratio.

Description

201142054 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種成膜方法。 【先前技術】201142054 VI. Description of the Invention: [Technical Field to Which the Invention Is Ascribed] The present invention relates to a film forming method. [Prior Art]

場效型電晶體作為半導體記憶體積體電路之單元電子元 件、南頻信號放大元件、液晶驅動用元件等而得到廣泛使 用，係目前實際使用得最多之電子器件。其中，隨著近年 來顯示裝置之發展’不僅於液晶顯示裝置（LCj))中，於電 致發光顯示裝置（EL)、場發射顯示器（FED)等各種顯示裝 置中，亦較多地使用薄膜電晶體（TFT)作為對顯示元件施 加驅動電廢而驅動顯示裝置之開關元件。 先前，大型液晶顯示裝置之液晶驅動用電晶體中一直使 用非晶矽系半導體薄膜。然而，隨著近年來進一步之大型 化、高清晰度化之要求’由於非晶矽之遷移率不足，故而 圖像之寫人越來越跟不上。又，有機電致發光（有機el)顯 不器之大型化技術亦正㈣發展，對於背板亦要求先前以 上之大面積及均勻且高遷移率之材料。 因此#為如非晶梦系半導體薄膜般可大面積化，且遷 移率較高僅次於晶詩之材料，包含金屬氧化物之透明半 導體薄膜，尤其是包含氧化銦、氧化辞、氧化鎵之氧化物 半導體薄臈受到關注。 肖於TFT活性層之氧化物半導體膜為控制膜之電 I ^麽通常係於導入有氧氣之環境中成膜。然而，存在 小之偏差即會？丨起财之載子濃度發生較大變 154091.doc 201142054 化，導致半導體特性變動之問題。 J乍為解決該問題之方法，已知藉由將濺鍍成膜時之功率 搶度設為較高，可減小膜中之载子濃度之氧分壓依存性 (專利文獻1)。 至佤畀性 然而，於將功率密度設為較高之情形時，成膜速度變 快’ ^供給速度㈣變得賴，因此财之載子濃度達到 ㈣上，存在作為TFT時無法獲得良好 問題。 何丨王< 為解決上述問題，需要使載子濃度為1018 cm-3以下，為 此必需將氧分廢設為較高。若將氧分壓S為較高，則存在 成膜速度變慢，生產性變差之其他問題。因此，要於將減 鑛成膜時之㈣密度設為較高，將成料度設為較快之狀 態下’製作使用氧化物半導體的良好之薄膜電晶體較為困 難。 專利文獻2揭示-種頂閘極型之薄膜電晶體，其係使用 導入水蒸氣分壓而形成之原+比In:Ga:Zn=〇98:i〇2:4之半 導體膜’且通道層之厚度為45 nm者。又專利文獻3中揭 不種含有In、Zn之至少—種元素及氫之非晶氧化物半導 體。 二而’該等均為適用於4英吋以下之靶材之技術，對於 計劃實際生產之高速成膜而言尚存在改良之餘地。 非專利文獻3揭示一種薄膜電晶體，其係於1〇_2以以上 之水蒸氣为壓下’形成原子比In:Ga:Znm3 :i 〇之半導 體膜’通道層之膜厚為30 nm且具有底閘極構成且底接觸 154091.doc 201142054 構成者。 然而，導入水蒸氣分壓而成膜之薄膜電晶體的電場遷移 率為3 cm2/Vs左右，特性較導入氧之時低，要用於大面積 且高清晰之顯示裝置中則特性不足。 除上述問題以外，液晶顯示器等平面顯示器之製造時之 ' 基板之大小由於顯示器之大型化及激烈之降低成本之競爭 而逐年變大，近來需要使用3 m見方以上之玻璃基板來製 造液晶面板。然而，若基板尺寸變大，則存在難以使通道 層（半導體層）之膜厚及膜質均勻而成膜，由膜厚或膜質之 不均勻性所致之特性不均增大的另一問題。 例如’右將通道層之膜厚增厚，則膜厚及膜質之均句性 上升，但於以IGZO(In-Ga_Zn_〇)為代表之氧化物半導體 中，存在隨著膜厚增厚遷移率下降、臨界電壓向負方向變 大等問題（非專利文獻D。尤其是製作製造成本較低之通道 ㈣型電晶體時，通道層（半導體層）暴露於㈣液中，因 〇 &將基板大型化時之不均勾性之問題較為顯著（非專利文 獻2)。 因此至7為止使用氧化物半導體之薄膜電晶體中，通 -常料層係以5G⑽以下之較薄膜厚製作（非專利文獻3)， 業界謀求-種通道層之厚膜較厚（例如Μ⑽以上，進 而 60 nm以上、70 L、 nm以上），遷移率、臨界電壓等特性良 好之薄膜電晶體。 專利文獻4、5中，揭示有使用AC(alternating current， 交流）賤鍍裝置製造大面積咖㈣咖如⑽⑷，氧化姻 154091.doc 201142054 錫）之製造例。然而，於氧化物半導體之情形時，氧空位 之控制更為重要，半導體之載子濃度如何影響功率或頻率 並不清楚。 先前技術文獻 專利文獻 專利文獻1 :國際公開第2009/084537號小冊子 專利文獻2 :日本專利特開2〇〇7-73697號公報 專利文獻3 :日本專利特開2010-80936號公報 專利文獻4 :日本專利特開2005-290550號公報 專利文獻5 :曰本專利特開2007-031 816號公報 非專利文獻 非專利文獻 1 : Kyoung-Seok等人，SID 08 DIGEST, p633 非專利文獻 2 : Je-hun Lee等人，SID 08 DIGEST, p625 非專利文獻3 : Takafumi Aoi等人，Thin Solid Films 518 (2010) 【發明内容】 本發明之目的在於提供一種即便於濺鍍成膜時之功率密 度較高之狀態下亦無需降低成膜速度，且可將膜中之载子 遭度抑制為1〇18 cm_3以下的氧化物半導體膜之成膜方法。 又’本發明之其他目的在於提供一種即便通道層（半導 體層）之膜厚較厚，遷移率等電晶體特性亦良好之薄膜電 晶體。 本發明者等人專心研究之結果發現，藉由於濺鍍成膜時 適當導入水蒸氣而代替導入氧，則即便於濺鍍成膜時之功 154091.doc 201142054 率密度較高之狀態下，亦無需降低成膜速度而可使膜中之 載子濃度為1〇18 cm-3以下。 又，藉由使用上述成膜方法，本發明者等人發現—種製 造時間不會延長且可穩定地製造半導體膜之製造方法。 ' 根據本發明，可提供以下之成膜方法等。 - L一種成膜方法，其係於含有稀有氣體原子及水分子，且 上述水分子之含量相對於上述稀有氣體原子以分壓比計為 ο·1〜10%的氣體環境中，濺鍍包含金屬氧化物之靶材而於 U 基板上形成薄膜。 2.如1之成膜方法，其中上述氣體之壓力為〇 〇pa。 3 _如1或2之成膜方法，其中上述濺鍍為直流濺鍍。 4. 如1或2之成膜方法，其中上述濺鍍為交流濺鍍。 5. 如3之成膜方法，其中直流功率密度為丨〜5切^⑺2。 6. 如4之成膜方法，其係向於真空腔室内隔開特定間隔而 並列設置之3個以上之靶材的對向位置依序搬送基板，且 〇 自交流電源對上述各靶材交替地施加負電位與正電位而 於上述粗材上產生電漿，從而於上述基板表面上形成薄膜 者， 之輸出之至少之一，在 ’—面切換施加於前述 上述成膜係於將來自於交流電源 刀支而連接的2個以上之乾材之間 乾材之電位一面進行成膜。 其中交流功率密度為5〜20 W/cm2。 7.如4或6之成膜方法， 其中上述交流電源之 8.如4、6及7中任一項之成臈方法， 頻率為10 kHz〜1 MHz » 154091.doc 201142054 9. 如1至8中任一項之成膜方法，其中相對於基板之成膜面 之垂直方向的成膜速度為1〜100 nm/min。 10. 如1至9中任一項之成膜方法，其中上述靶材與基板間 之距離於相對於基板之成膜面之垂直方向上為cm。 11. 如1至10中任一項之成膜方法，其中上述環境之磁場強 度為300〜1000高斯。 12·如1至11中任一項之成膜方法，其中上述金屬氧化物含 有選自由鎵元素（Ga)、鋅元素（Zn)及錫元素（Sn)所組成之 群中之1種以上之元素與銦元素（In)，且 靶材中之銦元素之含量滿足下述原子比： 〇. 2 $ [In]/全部金屬原子$〇. 8 (式中’ [In]為靶材中之銦元素之原子數； 全部金屬原子係指托材中所含之全部金屬原子之原子 數）。 13.如1至11中任一項之成膜方法，其中上述金屬氧化物含 有銦元素（In)、鎵元素（Ga)及辞元素（Zn)，且 乾材中之銦元素、鎵元素及鋅元素之含量滿足下述原子 比： 0<[In]/[Ga]<0.5 0.2<[In]/([In] + [Ga] + [Zn])<0.9 (式中’ [In]為靶材中之銦元素之原子數，[Ga]為乾材中之 鎵元素之原子數，[Zn]為靶材中之鋅元素之原子數）。 14.如1至11中任一項之成膜方法，其中上述金屬氧化物含 有銦元素（In)、錫元素（Sn)及鋅元素（Zn)，且 154091.doc 201142054 耙材中之銦元素、錫元素及鋅元素之含量滿足下述原子 比： 〇.2<[In]/([In] + [Sn] + [Zn])<〇.9 〇<[Sn]/([In] + [Sn] + [Zn])<〇.5 (式中，[In]為乾材中之銦元素之原子數，[Sn]為乾材中之 錫元素之原子數’ [Zn]為靶材中之鋅元素之原子數）。 15.種氡化物半導體薄膜之製造方法，其係於150〜4〇〇。〇 Ο Ο 下對藉由如1至14中任一項之成膜方法而獲得之薄膜進行 5〜120分鐘退火處理。 16·如15之氧化物半導體薄膜之製造方法，其中係於含有 至夕氧之環境下進行上述退火處理。 1/.一種場效型薄膜電晶體元件，其包含藉由如15或16之 薄膜之製造方法而獲得之氧化物半導體薄膜。 如1 7之％效型薄膜電晶體元件，其中上述氧化物半導 體薄膜為通道層。 2 7或18之場效型薄膜電晶體元件，其中遷移率為1〇 cm /Vs以上，臨界電壓為_5〜5 v。 根據本發明，可提供一種即便於濺鍍成膜時之功率密度 較高之狀態下，亦無需降低成膜速度，且將膜中之載子濃 度控制為Μ em_3以下的氧化物半導體膜之成膜方法。 又，根據本發明’可提供一種即便通道層（半導體層)之 膜厚較厚，遷移率等電晶體特性亦良好之薄膜電晶體。 【實施方式】 本發明之成膜方法係於含有稀有氣體原子及水分子，且 154091.doc 201142054 水分子之含量相對於稀有氣體原子以分壓比計為0.H〇% 的氣體環境中，賤鍍包含金屬氧化物之乾材而於基板上形 成薄膜。 / 再者，水分子相對於稀有氣體原子之分壓比係以 _]/(_] +[稀有氣體原子])表示，[H2〇]為氣體環境中 之水分子之分壓，[稀有氣體原子]為氣體環境中之稀有氣 體原子之分壓。 ” 若使用本發明之成膜方法，則藉由導人少量之水分子而 於膜中取得OH基，與導入氧而成膜之情形相比較可更有 效地避免氧空位之生成（载子之產生）。又，由於導入之水 刀子之量為少量’故而可不降低濺鑛速度而形成例如 體膜。 滅鍍時之氣體環境係含有稀有氣體原子及水分子，且水 分子之含量相對於稀有氣體原子以分廢比計為〇1〜嶋， 較佳為0.5〜7%，進而妨任或！ λ 而較佳為^〜5°/。，特佳為1.0〜3.0%。 減鑛時之水之分壓較佳為 3 3 权佳為5χ1〇〜5x10-1 Pa。於未達 5x10匕之情形時，臈中取得之〇11其 " 于<ϋΗ基之量減少，因此薄 m度不足’載子濃度容易增加。若超過Pa， 則膜中取得大量OH基，故而惫 . 虱化仵到促進，載子濃度與 遷移率下降。因此，有作 期望之值之虞。 乍為m兀件時場效遷移率低於所 =適备之水分屢根捸放電之功率密度或μ距離等各種 濺鍍之條件而變化。例如於 夕味π 士 汉電之功率密度為2.5 W/cm2 之情形時’水分壓較佳為 3 ° PhUxiO-2 Pa，於放電 15409I.doc -10. 201142054 之功率密度為5.0 W/cm2之情形時，水分壓較佳為ΐχΐ〇·2 Pa〜lxlO-i Pa，於放電之功率密度為74 w/cm2之情形時， 水分壓較佳為2.0><10-21^〜3.5><10-21^之範圍内。藉由將水 分壓设為該等之範圍内，可使所獲得之薄膜之載子濃度為 1017 cm·3級後半，作為TFT元件時可獲得1〇 cm2/Vs以上之 高場效遷移率。 於水分子之含量相對於稀有氣體原子以分壓比計未達 0.1%之情形時，由於膜中未取得充分之〇H基，故有無法 獲付抑制氧空位生成之效果，無法充分降低膜中之載子濃 度之虞。另-方面，於水分子之含量相對於稀有氣體原子 以为壓比計超過10〇/〇之情形時，膜中取得過剩之〇H基而過 度氧化，因此有載子濃度、遷移率下降，所獲得之TFT元 件之遷移率下降之虞。 再者，稀有氣體原子並無特別限定，較佳為氬原子。 又除稀有氣體原子及水以外，亦可於不對tft元件產生 影響之範圍内含有氧及氮。 氣體環境之壓力（濺鍍壓力）只要在電漿可穩定地放電之 範圍内則無特別限定，較佳為0.1〜5.0 pa。 再者，所謂濺鍍壓力，係指導入氬、水、氧等後開始濺 鑛時系統内之全壓。 濺鍍之成膜速度於相對於基板之成膜面之垂直方向上通 常為1〜250 nm/min，較佳為卜1〇〇 nm/min，進而較佳為 80 nm/min ’ 特佳為 3〇〜6〇 nm/min。 於成膜速度未達1 nm/min之情形時，成膜速度緩慢，故 154091 .doc 201142054 而有生產性變差之虞β $ 一方面，於成膜速度超過250 η—"1之情形時，成膜速度過快，故而有膜厚之控制性變 f :且無法於膜中均勻地取得基，特性之面内均句性 二才貝之虞。並且，若成膜速度過快，動於膜中未取得充 分之OH基而有需要在濺鑛成膜時導人過剩之水分子之 ㈣與基板間之距㈣相對於基板之成膜面之垂直方向 上較佳為，更佳為5〜15cm，進而較佳為4〜“爪。 於該距離未達i cm之情形時，到達至基板的乾材構成元 素之粒子之運動能量較大，不僅有無法獲得良好之膜特性 之虞，而且亦有膜厚及電氣特性產生面内分佈之虞。另— 方面，於乾材與基板之間隔超過15 cm之情料，、到達至 基板之靶材構成元素之粒子之運動能量變得過小， 獲得細密之膜，無法獲得良好之膜特性之虞。 ‘、、w 較理想的是於磁場強度為3⑻〜_高斯之環境中進 鑛。 w 於磁場強度未達300高斯之情形時’電激密度下降 而於高電阻之濺㈣材之情形時，有無法淹鍍之虞。另: 方面，於超過1〇〇〇高斯之情形時’有膜厚及膜中之 Z 性之控制性變差之虞。 乳特 錢鑛之方法並無特別限定，可為電焚活性較低 DC(direct current,直流）濺鍍及頻率ι〇 MHz以下之高;之 鑛中之任-種。又，濺鍍亦可為脈衝濺I 口讀濺 此處，所謂DCM，係指施加直流電源 <機鍍 154091.doc 201142054 方法（直流濺鍍），所謂高頻濺鍍（RF濺鍍），係指施加交流 電源（交流濺艘）而進行之濺鑛。又，所謂脈衝濺鍵，係指 施加脈衝電壓而進行之濺鑛。 RF滅鍵與DC賤鑛相比電聚密度較高、放電電壓下降， 故而晶格之混亂等減少’可提高載子遷移率。又，一般而 言’ RF濺鍍較容易獲得面内均勻性良好之膜。 因此，期待藉由RF濺鍍而獲得之膜作為11；***件時之場The field effect type transistor is widely used as a unit electronic component of a semiconductor memory bulk circuit, a south frequency signal amplifying element, a liquid crystal driving element, etc., and is an electronic device which is currently most used. Among them, with the development of display devices in recent years, not only in liquid crystal display devices (LCj), but also in various display devices such as electroluminescence display devices (EL) and field emission displays (FED) A transistor (TFT) serves as a switching element for driving a display device by applying a driving electric waste to the display element. Conventionally, an amorphous germanium-based semiconductor thin film has been used in a liquid crystal driving transistor for a large liquid crystal display device. However, with the demand for further enlargement and high definition in recent years, the image writers have become increasingly inaccessible due to insufficient mobility of amorphous ruthenium. In addition, the large-scale technology of organic electroluminescence (organic el) displays is also being developed. For the backsheet, materials having a large area and uniform and high mobility have been required. Therefore, # is a large-area semiconductor film such as an amorphous dream semiconductor film, and has a higher mobility than the material of the crystal poetry, and a transparent semiconductor film containing a metal oxide, particularly including indium oxide, oxidized words, gallium oxide. Oxide semiconductor thin films are attracting attention. The oxide semiconductor film which is in the TFT active layer is a film for controlling the film, and is usually formed in an environment in which oxygen is introduced. However, is there a small deviation? The concentration of the carrier has changed greatly, which has led to the problem of changes in semiconductor characteristics. In order to solve this problem, it is known that the oxygen partial pressure dependence of the carrier concentration in the film can be reduced by setting the power rush degree at the time of sputtering film formation to be high (Patent Document 1). However, when the power density is set to be high, the film formation speed becomes faster, and the supply speed (4) becomes too high. Therefore, the carrier concentration of the product reaches (4), and there is no good problem when it is used as a TFT. . He Yuwang< In order to solve the above problem, it is necessary to make the carrier concentration 1018 cm-3 or less, and it is necessary to set the oxygen waste to be high. When the oxygen partial pressure S is high, there is another problem that the film formation rate is slow and the productivity is deteriorated. Therefore, it is difficult to produce a good thin film transistor using an oxide semiconductor when the density of the (4) density is set to be high and the degree of materialization is set to be faster. Patent Document 2 discloses a thin film transistor of a top gate type which is formed by introducing a water vapor partial pressure to form a semiconductor film of a ratio of In:Ga:Zn=〇98:i〇2:4 and a channel layer. The thickness is 45 nm. Further, Patent Document 3 discloses an amorphous oxide semiconductor containing at least one element of In and Zn and hydrogen. 2. These are all technologies that are suitable for targets below 4 miles, and there is room for improvement in the high-speed film formation planned for actual production. Non-Patent Document 3 discloses a thin film transistor in which a film thickness of a channel layer of a semiconductor film having an atomic ratio of In:Ga:Znm3 :i 压 is reduced by 30 nm under a pressure of 1 〇 2 or more. It has a bottom gate and a bottom contact 154091.doc 201142054. However, the electric field mobility of the thin film transistor which is formed by partial pressure of water vapor is about 3 cm 2 /Vs, which is lower than that when oxygen is introduced, and is insufficient for use in a large-area and high-definition display device. In addition to the above-mentioned problems, the size of the substrate at the time of manufacture of a flat panel display such as a liquid crystal display has been increasing year by year due to the increase in size of the display and the fierce cost reduction. Recently, it is necessary to use a glass substrate of 3 m square or more to manufacture a liquid crystal panel. However, when the size of the substrate is increased, it is difficult to form a film of the channel layer (semiconductor layer) and the film quality is uniform, and the problem of unevenness in characteristics due to unevenness in film thickness or film quality is increased. For example, when the film thickness of the channel layer is thickened, the film thickness and the uniformity of the film quality are increased. However, in the oxide semiconductor represented by IGZO (In-Ga_Zn_〇), the film thickness increases and the migration increases. The rate is decreased, and the threshold voltage is increased in the negative direction (Non-Patent Document D. Especially when manufacturing a channel (four) type transistor having a lower manufacturing cost, the channel layer (semiconductor layer) is exposed to the (iv) liquid, because 〇 & The problem of unevenness in the enlargement of the substrate is remarkable (Non-Patent Document 2). Therefore, in the thin film transistor using an oxide semiconductor up to the seventh, the through-constant layer is made of a film thickness of 5 G (10) or less (non- Patent Document 3) is a thin film transistor in which a thick film of a channel layer is thick (for example, Μ(10) or more, further 60 nm or more, 70 L or more), and has excellent characteristics such as mobility and critical voltage. Patent Document 4 In 5, a manufacturing example in which a large-area coffee (4) coffee (10) (4), oxidized marriage 154091.doc 201142054 tin) is manufactured using an alternating current (AC) plating apparatus is disclosed. However, in the case of an oxide semiconductor, the control of oxygen vacancies is more important, and it is not clear how the carrier concentration of the semiconductor affects the power or frequency. PRIOR ART DOCUMENT PATENT DOCUMENT Patent Document 1 : International Publication No. 2009/084537 Patent Document 2: Japanese Patent Laid-Open Publication No. Hei. No. Hei. No. Hei. Japanese Patent Laid-Open Publication No. Hei. No. 2005-290550 Patent Document 5: Japanese Patent Laid-Open No. 2007-031 No. 816 Non-Patent Document Non-Patent Document 1: Kyoung-Seok et al., SID 08 DIGEST, p633 Non-Patent Document 2: Je- Hun Lee et al., SID 08 DIGEST, p625 Non-Patent Document 3: Takafumi Aoi et al., Thin Solid Films 518 (2010) SUMMARY OF THE INVENTION It is an object of the present invention to provide a higher power density even when sputtered into a film. In the state of the film, it is not necessary to reduce the film formation rate, and it is possible to suppress the degree of carrier in the film to a film formation method of an oxide semiconductor film of 1 〇 18 cm 3 or less. Further, another object of the present invention is to provide a thin film transistor having excellent transistor characteristics such as mobility even when the thickness of the channel layer (semiconductor layer) is thick. As a result of intensive studies by the inventors of the present invention, it has been found that, by introducing water vapor as appropriate during sputtering film formation, instead of introducing oxygen, even when the sputtering film is formed, the work density is high. The carrier concentration in the film can be made 1 to 18 cm-3 or less without lowering the film formation rate. Moreover, the inventors of the present invention have found that the manufacturing method of the semiconductor film can be stably produced without prolonging the production time. According to the present invention, the following film forming methods and the like can be provided. - L is a film forming method in which a rare earth atom and a water molecule are contained, and the content of the water molecule is ο·1 to 10% in terms of a partial pressure ratio with respect to the rare gas atom, and sputtering includes A target of a metal oxide forms a thin film on the U substrate. 2. The film forming method according to 1, wherein the pressure of the gas is 〇 〇 pa. 3 _ a film forming method such as 1 or 2, wherein the sputtering is DC sputtering. 4. A film forming method according to 1 or 2, wherein the sputtering is an alternating current sputtering. 5. A film forming method such as 3, wherein the DC power density is 丨~5 cut^(7)2. 6. The film forming method according to 4, wherein the substrate is sequentially transferred to the opposite positions of the three or more targets arranged in parallel in the vacuum chamber at a predetermined interval, and the alternating current source alternates the respective targets. Applying a negative potential and a positive potential to generate a plasma on the above-mentioned thick material to form a film on the surface of the substrate, at least one of which is applied to the film forming system The potential of the dry material between the two or more dry materials connected by the AC power supply knife is formed. The AC power density is 5~20 W/cm2. 7. The film forming method according to 4 or 6, wherein the above-mentioned alternating current power source is 8. The method of forming a method according to any one of 4, 6 and 7 at a frequency of 10 kHz to 1 MHz » 154091.doc 201142054 9. The film forming method according to any one of the preceding claims, wherein a film forming speed in a direction perpendicular to a film forming surface of the substrate is 1 to 100 nm/min. 10. The film forming method according to any one of 1 to 9, wherein a distance between the target and the substrate is cm in a direction perpendicular to a film formation surface of the substrate. 11. The film forming method according to any one of 1 to 10, wherein the magnetic field strength of the above environment is 300 to 1000 gauss. The film forming method according to any one of 1 to 11, wherein the metal oxide contains one or more selected from the group consisting of a gallium element (Ga), a zinc element (Zn), and a tin element (Sn). The element and the indium element (In), and the content of the indium element in the target satisfies the following atomic ratio: 〇. 2 $ [In] / all metal atoms $ 〇. 8 (wherein [In] is in the target The number of atoms of indium; all metal atoms refer to the number of atoms of all metal atoms contained in the carrier. The film forming method according to any one of 1 to 11, wherein the metal oxide contains an indium element (In), a gallium element (Ga), and an element (Zn), and the indium element, the gallium element in the dry material, and The content of the zinc element satisfies the following atomic ratio: 0 < [In] / [Ga] < 0.5 0.2 < [In] / ([In] + [Ga] + [Zn]) < 0.9 (wherein [ In] is the number of atoms of the indium element in the target, [Ga] is the number of atoms of the gallium element in the dry material, and [Zn] is the number of atoms of the zinc element in the target). The film forming method according to any one of 1 to 11, wherein the metal oxide contains indium (In), tin (Sn) and zinc (Zn), and 154091.doc 201142054 indium in the coffin The content of tin element and zinc element satisfies the following atomic ratio: 〇.2<[In]/([In] + [Sn] + [Zn])<〇.9 〇<[Sn]/([In ] + [Sn] + [Zn]) <〇.5 (wherein [In] is the atomic number of the indium element in the dry material, and [Sn] is the atomic number of the tin element in the dry material' [Zn] The number of atoms of the zinc element in the target). A method for producing a germanide semiconductor thin film, which is 150 to 4 Å. The film obtained by the film forming method according to any one of 1 to 14 is annealed for 5 to 120 minutes. 16. The method for producing an oxide semiconductor thin film according to 15, wherein the annealing treatment is carried out in an atmosphere containing oxygen. 1) A field effect type thin film transistor element comprising an oxide semiconductor film obtained by a method for producing a film of 15 or 16. For example, a 17% thin film transistor device in which the above oxide semiconductor film is a channel layer. 2 7 or 18 field effect type thin film transistor device, wherein the mobility is 1 〇 cm /Vs or more, and the threshold voltage is _5 〜 5 v. According to the present invention, it is possible to provide an oxide semiconductor film having a carrier concentration in the film of Μ em_3 or less without lowering the deposition rate even in a state where the power density at the time of sputtering film formation is high. Membrane method. Further, according to the present invention, it is possible to provide a thin film transistor having excellent dielectric characteristics such as mobility even when the thickness of the channel layer (semiconductor layer) is thick. [Embodiment] The film forming method of the present invention is in a gas atmosphere containing a rare gas atom and water molecules, and the content of water molecules of 154091.doc 201142054 is 0.1% by weight relative to a rare gas atom. The ruthenium plated a dry material containing a metal oxide to form a thin film on the substrate. / Furthermore, the partial pressure ratio of water molecules to rare gas atoms is expressed as _]/(_] + [rare gas atoms], and [H2〇] is the partial pressure of water molecules in a gaseous environment, [rare gas An atom] is the partial pressure of a rare gas atom in a gaseous environment. When the film formation method of the present invention is used, the OH group is obtained in the film by introducing a small amount of water molecules, and the generation of oxygen vacancies can be more effectively prevented as compared with the case of introducing oxygen into a film (carrier) In addition, since the amount of the water knife introduced is a small amount, it is possible to form, for example, a body film without lowering the splashing speed. The gas atmosphere during the deplating contains rare gas atoms and water molecules, and the content of water molecules is relatively rare. The gas atom is 〇1 to 嶋, preferably 0.5 to 7%, and further preferably λ and preferably 〜5°/., particularly preferably 1.0 to 3.0%. The partial pressure of water is preferably 3 3 and the weight is 5χ1〇~5x10-1 Pa. In the case of less than 5x10匕, the amount obtained in 臈11 is reduced by the amount of < If the degree is insufficient, the concentration of the carrier is likely to increase. If it exceeds Pa, a large amount of OH groups are obtained in the film, so that the concentration of the carrier and the mobility are lowered. Therefore, there is a desired value. The field effect mobility is lower than the power density or μ of the water It varies from various sputtering conditions. For example, when the power density of XI Shishi is 2.5 W/cm2, the water pressure is preferably 3 ° PhUxiO-2 Pa, and the discharge is 15409I.doc -10. When the power density of 201142054 is 5.0 W/cm2, the water pressure is preferably ΐχΐ〇·2 Pa~lxlO-i Pa, and when the power density of the discharge is 74 w/cm 2 , the water pressure is preferably 2.0 gt. ; <10-21^~3.5><10-21^. By setting the water pressure within the range, the carrier concentration of the obtained film can be made 1017 cm·3 In the latter half, when the TFT element is used, a high field-effect mobility of 1 〇cm 2 /Vs or more can be obtained. When the content of the water molecule is less than 0.1% with respect to the rare gas atom, the film is not sufficiently obtained. After the H-based group, the effect of suppressing the generation of oxygen vacancies cannot be obtained, and the concentration of the carrier in the film cannot be sufficiently reduced. On the other hand, the content of the water molecule is more than 10 相对 with respect to the rare gas atom. In the case of 〇, the excess 〇H group is obtained in the film and is excessively oxidized, so there is carrier concentration and mobility. The mobility of the obtained TFT element is lowered. Further, the rare gas atom is not particularly limited, and is preferably an argon atom. In addition to the rare gas atom and water, it is also possible to have no influence on the tft element. Oxygen and nitrogen are contained. The pressure of the gas atmosphere (sputtering pressure) is not particularly limited as long as the plasma can be stably discharged, and is preferably 0.1 to 5.0 Pa. Further, the sputtering pressure is directed to argon. After water, oxygen, etc., the total pressure in the system begins to splash. The film formation rate of the sputtering is usually 1 to 250 nm/min in the vertical direction with respect to the film formation surface of the substrate, preferably 1 nm/min, and more preferably 80 nm/min. 3〇~6〇nm/min. When the film formation rate is less than 1 nm/min, the film formation rate is slow, so 154091 .doc 201142054 and the production deterioration 虞β $ on the one hand, the film formation speed exceeds 250 η—"1 In the case where the film formation rate is too fast, the film thickness is controlled to be f: and the base cannot be uniformly obtained in the film, and the in-plane properties of the properties are uniform. Further, if the film formation rate is too fast, a sufficient OH group is not obtained in the film, and there is a need to introduce excess water molecules during sputtering film formation (4) distance from the substrate (4) with respect to the film formation surface of the substrate. Preferably, the vertical direction is preferably 5 to 15 cm, and more preferably 4 to "claw." When the distance is less than i cm, the movement energy of the particles of the dry constituent elements reaching the substrate is large. It is not only impossible to obtain good film properties, but also has the effect of in-plane distribution of film thickness and electrical properties. On the other hand, the distance between the dry material and the substrate exceeds 15 cm, and the target reaches the substrate. The kinetic energy of the particles of the constituent elements of the material becomes too small, and a fine film is obtained, and good film properties cannot be obtained. ', w is desirable to enter the ore in an environment with a magnetic field strength of 3 (8) to _ Gauss. When the magnetic field strength is less than 300 Gauss, when the electric shock density drops and the high-resistance splash (four) material, there is no possibility of flooding. On the other hand, in the case of more than 1 〇〇〇 Gauss, there is a film. Thickness and the controllability of Z in the film The method of the milk special money mine is not particularly limited, and may be a direct current (DC) sputtering with a low electro-burning activity and a frequency of less than or equal to the frequency ι〇MHz; any of the minerals in the mine. For the pulse splash I port is splashed here, the so-called DCM refers to the application of DC power supply < machine plating 154091.doc 201142054 method (DC sputtering), so-called high frequency sputtering (RF sputtering), refers to the application of AC power ( Splashing is carried out by alternating splashing. In addition, the so-called pulse splashing refers to the sputtering caused by applying a pulse voltage. The RF de-bonding has higher electropolymer density and lower discharge voltage than DC antimony ore, so the lattice The reduction of chaos and the like can increase the carrier mobility. In addition, generally, RF sputtering is easier to obtain a film having good in-plane uniformity. Therefore, a film obtained by RF sputtering is expected to be 11; Field

效遷移率亦提高。然而，通常RF濺鍍較DC濺鍍而言成膜 緩慢，故工業上一直採用DC濺鍍。 DC濺鍍成膜時施加於靶材上之功率密度較佳為卜⑺ W/cm2,進而較佳為2〜5 w/cm2。特佳為25〜5 w/cm2。 於功率密度未達1 W/cm2之情形時，不僅有成膜速度變 慢、生產性變差之虞，而且有放電亦不穩定之虞。另一方 面’於濺鑛功率密度超過1G黯心情形時，有成膜速度 變得過快，料之㈣性及特性之均勻性變差之虞。 作為適合之交流濺鑛，有以下之方法。 向於真空腔室内隔開特定間隔而並列設置之3個以上之 乾材的對向位置依序搬送基板，1自交流電源對上述各乾 材交替地施加負電位與正電位而於Μ上產生電漿，從而 於上述基板表面上成膜。 =時’於將來自於交流電源之輸出之至少之—分支而連 :個以上之靶材之間，一面切換施加電位之靶材一面 八订、媒。即’將來自於上述交流電源之輸出之至少之一 支而連接於2個以上之靶材，一面對相鄰之靶材施加不 154091.doc 201142054 同之電位一面進行成膜。 作為可用於該濺鍍之裝置，例如可列舉於專利文獻3中 s己載之大面積生產用iAC(交流）濺鍍裝置。藉由使用該裝 置，可更高速地成膜，並且可再現性良好地使膜載子濃度 為特定之值。 a 上述AC濺鍍裝置具體而言包括：真空槽、配置於真空 槽内。P之基板座、g己置於與該基板座相對向之位置之機錢 源。濺鍍源之要部示於圖1中。 濺鍍源具有複數個濺鍍部，且分別具有板狀之靶材 100a〜l00f，若將各乾材1〇〇a〜i〇〇f之受到濺鑛之面設為賤 鍍面’則各靶材係以濺鍍面位於同一平面上之方式而配 各靶材100a〜l00f形成為具有長度方向之細長之長方 體’各乾材為同-形狀，且以崎面之長度方向之邊緣部 分（側面）相互隔開特定間隔之方式平行配χ。因此，鄰接 之材100a〜l〇〇f之側面平行。 於真空槽之外部配置有交流電源3 0 0 a〜3 0 〇 c，該等交流 «上分別連接有2個對應之電極。各交流電源則 刀二具有之2個端子中，—個端子連接於鄰接之2個電極中 之者，另一個端子連接於另一個電極。 電源雇〜條之2個端子輸出正負之不同極性之 之2個密接於電極而安裝，因此，於鄰接 10()3〜而上’自交流電源〜3GG(^加有極 性相互不同之交流電壓。因此，當相互鄰接之乾材 154091.doc -14- 201142054 100a~100f中的一者上施加有正電位時，另一者為施加有 負電位之狀態。 於電極之與乾材100a〜100f為相反側之面上，配置有磁 場形成機構200a〜200f。各磁場形成機構2〇0a〜2〇〇f分別包 ' 含：外周與靶材100a〜10听之外周為大致相等大小的細長 ‘ 之環狀磁石’及長度較環狀磁石短之棒狀磁石。 各環狀磁石係於對應之1個靶材l〇〇a〜1〇〇f之正背後位 〇 置，相對於靶材1〇0卜10时之長度方向平行地配置。如上 所述，由於靶材100a〜l〇〇f係隔開特定間隔而平行配置， 故而環狀磁石亦係隔開與靶材1〇〇a〜1〇〇f相同之間隔而配 置。 於使用上述裝置之情形時，功率密度較佳為3〜 W/cm2。於未達3 W/em2之情形時’成膜速度較慢，生產上 並不經濟。若超過20 W/cm2則存在靶材破損之情形。功率 密度更佳為5~20 W/cm2，進而較佳為4〜1〇 w/cm2。 〇 AC濺鍍之頻率較佳為在1〇 kHz〜i MHZ2範圍内。若未 達10 mz’則有產㈣音問題之虞。若超過i MHz，則由 於電㈣度擴散而存在於所期望之乾材位置以外進行滅 鍍均勻丨生受損之情況。更佳之AC濺鍍之頻率為20 - kHz〜500 kHz。 又於使用上述裝置之情形時，成膜速度較佳為〜25〇 nm/min，更佳為 1〇〇〜2〇〇nm/min。 用於本發明之成琪方法之乾材只要為包含金屬氧化物之 乾材，則無特別限定，較佳為以下之第i〜第3乾材。 154091.doc -15- 201142054 可適用於本發明之成膜方法的第1乾材係包含金屬氧化 物者，該金屬氧化物含有選自由鎵元素（Ga)、辞元素（Zn) 及錫兀素（Sn)所組成之群中之丨種以上之元素與銦元素 (In)，靶材中之銦元素之含量滿足下述原子比： 〇·2$[Ιη]/全部金屬原子$〇 8 (式中’ [In]為靶材中之銦元素之原子數。 全部金屬原子係指靶材中所含之全部金屬原子之原子 數）。 上述原子比較佳為0·25$[Ιη]/全部金屬原子75，進 而較佳為0.3 $ [In]/全部金屬原子$ 〇 7。 於[In]/全部金屬原子（原子比）未達〇2之情形時，有載子 濃度低於半導體區域之虞。另—方面，於[In]/全部金屬原 子（原子比）超過0,8之情形時，濺鍍之薄膜容易結晶化，於 大面積成膜之情形時，有面内之電氣特性變得不均勻之 虞。 可適用於本發明之成膜方法的第2靶材係包含金屬氧化 物者，該金屬氧化物含有銦元素（In)、鎵元素（Ga)及鋅元 素（Zn)，靶材中之銦元素、鎵元素及鋅元素之含量滿足下 述原子比： 〇&lt;[In]/[Ga]&lt;0.5 〇.2&lt;[In]/([In] + [Ga] + [Zn])&lt;0.9 (式中’ [In]為靶材中之銦元素之原子數，[Ga]為靶材中之 鎵元素之原子數，[Zn]為靶材中之鋅元素之原子數）。 第2靶材之金屬氧化物較佳為滿足下述原子比： 154091.doc -16· 201142054 0&lt;[In]/[Ga]&lt;0.45 0.3&lt;[In]/([In] + [Ga] + [Zn])&lt;0.9。 第2靶材之金屬氧化物更佳為滿足下述原子比： 0&lt;[In]/[Ga]&lt;0.35 0.4&lt;[In]/([In] + [Ga] + [Zn])&lt;0.9。 ' 雖然苐2把材之金屬乳化物無論在怎樣之組成範圍中， 均可獲得導入水分子而進行滅鍵之效果，但於[In]/[Ga]為 ❹ 〇·5以上之情形時，於導入氧分子而成膜之情形時氧化效 果亦較大，因此載子濃度過度下降，將所獲得之薄膜用於 TFT元件時’僅可獲得2 cm2/Vs左右之場效遷移率。於 [In]/([In] + [Ga] + [Zn])為0.2以下之情形時，靶材之電阻成 為高電阻’因此有無法進行DC濺鍍及AC濺鍍之虞。又， 於[In]/([In] + [Ga] + [Zn])為0.9以上之情形時，所獲得之薄 膜容易結晶化，於大面積成膜之情形時，有面内之電氣特 性變得不均勻之虞。 Q 於第2靶材中’藉由降低鎵元素之比例，增加銦元素之 比例，可提局載子濃度及載子遷移率，獲得高場效遷移 率。 '第2靶材之組成比例如為〇&lt;[In]/[Ga]&lt;〇 45且〇 3〈口卟 - ([In] + [Ga] + [Zn])&lt;0.9時，可使場效遷移率為 5〜1〇em2/Vs; 為〇&lt;[Ιη]/^]&lt;〇.35且時，可 使場效遷移率為1〇 cm2/Vs以上故較為理想。 可適用於本發明之成膜方法的第3靶材係包含金屬氧化 物者，該金屬氧化物含有銦元素（In)、錫元素（Sn)及辞元 154091.doc •17- 201142054 素（Zn)，靶材中之銦元素、錫元素及鋅元素之含量滿足下 述原子比： 0.2&lt;[In]/([In] + [Sn] + [Zn])&lt;0.9 0&lt;[Sn]/([In] + [Sn] + [Zn])&lt;0.5 (式中’ [In]為把材中之銦元素之原子數，[Sn]為靶材中之 锡元素之原子數，[Zn]為把材中之辞元素之原子數）。 第3靶材之金屬氧化物較佳為滿足下述原子比： 0.2&lt;[In]/(fIn] + [Sn] + [Zn])&lt;0.9 0&lt;[Sn]/([In] + [Sn] + [Zn])&lt;0.35。 第3靶材之金屬氧化物更佳為滿足下述原子比： 〇.3&lt;[In]/([In] + [Sn] + [Zn])&lt;0.9 〇&lt;[Sn]/([In] + [Sn] + [Zn])&lt;〇 2。 於第3乾材之金屬氧化物之中，當[[…/(办卜[叫+网) 為0.2以下之情形肖，靶材之電阻成為高電阻，因此有無 法進行DC濺鍍或AC賤鍍之虞。又，於[in]/([in] + [sn] + 叫）為0.9以上之情形時，所獲得之薄膜容易結晶化，於 大面積成膜之情形時，有面内之電氣特性變得不均勾之 由於錫元素成為載子散射源，故於[Sn]/([In] + [Sn] + [Zn])為 〇·5 以上之 肖$盼，載子遷移率變低，有將所 獲得之薄膜用於打*** 〒—％效遷移率為5 cm2/Vs以下之 虞。 於第3靶材之中， 之比例，可控制載子率。 藉由降低錫元素之比例，增加銦元素 展度及栽子遷移率，獲得高場效遷移 154091.doc 201142054 第3歡材之組成比例如為〇.2&lt;[ln]/([In] + [Sn] + [Zn])&lt;0.9且 〇&lt;[Sn]/([In] + [Sn] + [Zn])&lt;0_35時，可使場效遷移率為 5〜1〇 cm2/Vs ’ 為 〇.3&lt;[In]/([In] + [Sn] + [Zn])&lt;〇.9且 0&lt;[Sn]/([In] + [Sn] + [Zn])&lt;0.2時’可使場效遷移率為1〇 cm2/Vs以上。 於非專利文獻3中，為控制載子濃度，靶材含有仏元 _ 素，且Ga元素相對於靶材之全部金屬元素之原子數比為 0.33。 〇 然而，於^元素之含量相對於靶材之全部金屬元素以原 子數比計超過0.33之情形時，Ga成為散射源’有使用所獲 得之薄膜作為半導體層的TFT元件之遷移率下降之虞。另 一方面，若Ga元素之含量相對於靶材之全部金屬元素以原 子數比計未達0.33，則成為散射源2Ga為少量，具有可期 待較间之遷移率之優點，但另一方面，存在難以將載子濃 度控制於1018 cm·3以下之問題。 於本發明之成膜方法中，使用（^元素之含量相對於銦元 〇 素以原子數比計未達〇·5之第2靶材、或不含Ga元素之第3 靶材而成膜之情形時，亦可獲得較佳之”***件。尤其是 於使用第3把材之情形時，可提高财化學品性，故即便不 - 形成蝕刻終止層，亦可藉由濕式蝕刻形成源極/汲極電 - 極’進而可製作可良好地卫作之TFTit#，可降低製造成 〇 -第1靶材之金屬氧化物較佳為實質上或僅由銦元素、鋅 兀素構成之氧化物，同樣，第2乾材之金屬氧化物較佳為 實質上或僅由銦元素、鎵元素及鋅元素構成之氧化物，第 154091.doc •19· 201142054 3靶材之金屬氧化物較佳為實質上或僅 及辞元素構成之氧化物。 第1〜第冰材可於不損害本發明之效果之範圍内含有例 如選自 Mg、Ca、Sr、Ba、Ti、Zr、Hf、 由麵元素、錫元素Effective mobility has also increased. However, RF sputtering is generally slower than DC sputtering, so DC sputtering has been used in the industry. The power density applied to the target at the time of DC sputtering film formation is preferably (7) W/cm 2 , and more preferably 2 to 5 w/cm 2 . Very good is 25~5 w/cm2. When the power density is less than 1 W/cm2, not only the film formation speed is slowed down, the productivity is deteriorated, but also the discharge is unstable. On the other hand, when the power density of the sputtering is more than 1 G, the film formation speed becomes too fast, and the uniformity of the material and the uniformity of the characteristics deteriorate. As a suitable AC splash, there are the following methods. The substrate is sequentially transported to the opposite positions of the three or more dry materials arranged in parallel at a predetermined interval in the vacuum chamber, and a negative potential and a positive potential are alternately applied to the respective dry materials from the AC power source to generate a defect on the crucible. Plasma to form a film on the surface of the above substrate. When the time is at least - the branch from the output of the AC power source is connected between the targets of more than one of the targets, and the target to which the potential is applied is switched. That is, at least one of the outputs from the above-mentioned AC power source is connected to two or more targets, and a film is formed while applying an electric potential to the adjacent target at a potential of 154091.doc 201142054. As a device which can be used for the sputtering, for example, an iAC (alternating current) sputtering apparatus for large-area production, which is described in Patent Document 3, can be cited. By using this device, film formation can be performed at a higher speed, and the film carrier concentration can be made to have a specific value with good reproducibility. a The above AC sputtering apparatus specifically includes a vacuum chamber and is disposed in the vacuum chamber. The substrate holder of P is placed at a position opposite to the substrate holder. The main part of the sputtering source is shown in Figure 1. The sputtering source has a plurality of sputtering portions, and each has a plate-shaped target 100a to 100f, and each of the dry materials 1〇〇a to i〇〇f is subjected to a sputtering surface as a ruthenium plating surface. The targets are formed such that the respective targets 100a to 100f are formed into a long rectangular parallelepiped having a longitudinal direction in which the sputtering surfaces are located on the same plane, and the respective dry materials are in the same shape, and are edge portions in the longitudinal direction of the surface ( Sides are arranged in parallel with each other at a specific interval. Therefore, the sides of the adjacent materials 100a to 100f are parallel. An AC power supply of 3 0 0 a~3 0 〇 c is disposed outside the vacuum chamber, and the two alternating electrodes are connected to the alternating currents. Each of the two AC power supplies has two terminals, one of which is connected to one of the two adjacent electrodes, and the other of which is connected to the other of the two electrodes. Two of the two terminals of the power supply are connected to the positive and negative polarities and are mounted in close contact with the electrodes. Therefore, adjacent to 10 () 3 ~ and 'from the AC power supply ~ 3GG (^ plus alternating voltages of different polarities Therefore, when a positive potential is applied to one of the adjacent dry materials 154091.doc -14 - 201142054 100a - 100f, the other is a state in which a negative potential is applied. The electrode and the dry material 100a - 100f On the opposite side, magnetic field forming mechanisms 200a to 200f are disposed. Each of the magnetic field forming mechanisms 2〇0a to 2〇〇f includes 'slim: the outer circumference and the targets 100a to 10 are substantially equal in size to the outer circumference of the target 100a to 10'. The annular magnet 'and the rod magnet having a shorter length than the annular magnet. Each of the annular magnets is placed behind the corresponding target l〇〇a~1〇〇f, relative to the target 1 The longitudinal direction of the 卜0⁄10 is arranged in parallel. As described above, since the targets 100a to 100f are arranged in parallel at a predetermined interval, the annular magnet is also spaced apart from the target 1a~ 1〇〇f is configured at the same interval. Power density when using the above device It is preferably 3 to W/cm2. When the temperature is less than 3 W/em2, the film formation speed is slow, and it is not economical to produce. If it exceeds 20 W/cm2, the target is damaged. The power density is better. It is 5~20 W/cm2, and further preferably 4~1〇w/cm2. The frequency of 〇AC sputtering is preferably in the range of 1 〇 kHz to i MHZ2. If it is less than 10 mz', there is a production (four) sound. The problem is that if it exceeds i MHz, it will be damaged evenly due to the spread of electricity (four degrees) outside the desired dry material position. More preferably, the frequency of AC sputtering is 20 - kHz~500 kHz. Further, in the case of using the above device, the film formation speed is preferably 〜25 〇nm/min, more preferably 1 〇〇2 〇〇nm/min. The dry material used in the method of the present invention is only The dry material containing a metal oxide is not particularly limited, and is preferably the following i-th to third dry materials. 154091.doc -15- 201142054 The first dry material which can be applied to the film forming method of the present invention contains metal In the case of an oxide, the metal oxide contains an element selected from the group consisting of gallium (Ga), element (Zn), and tin bismuth (Sn). The element (In), the content of the indium element in the target satisfies the following atomic ratio: 〇·2$[Ιη]/all metal atoms $〇8 (wherein [In] is the number of atoms of the indium element in the target All metal atoms refer to the number of atoms of all metal atoms contained in the target. The above atoms are preferably 0.25$[Ιη]/all metal atoms 75, and more preferably 0.3 $ [In]/all metals Atom $ 〇 7. When [In]/all metal atoms (atomic ratio) are less than 〇2, the carrier concentration is lower than that of the semiconductor region. On the other hand, when [In]/all metal atoms (atomic ratio) exceeds 0, 8, the film to be sputtered is easily crystallized, and in the case of film formation over a large area, the in-plane electrical characteristics become not Evenly. The second target material applicable to the film formation method of the present invention includes a metal oxide containing indium (In), gallium (Ga), and zinc (Zn), and indium in the target. The content of the gallium element and the zinc element satisfies the following atomic ratio: 〇 &lt;[In]/[Ga]&lt;0.5 〇.2&lt;[In]/([In] + [Ga] + [Zn])&lt; 0.9 (wherein [In] is the number of atoms of the indium element in the target, [Ga] is the number of atoms of the gallium element in the target, and [Zn] is the number of atoms of the zinc element in the target). The metal oxide of the second target preferably satisfies the following atomic ratio: 154091.doc -16· 201142054 0&lt;[In]/[Ga]&lt;0.45 0.3&lt;[In]/([In] + [Ga ] + [Zn]) &lt; 0.9. The metal oxide of the second target is more preferably satisfying the following atomic ratio: 0 &lt; [In] / [Ga] &lt; 0.35 0.4 &lt; [In] / ([In] + [Ga] + [Zn]) &lt;;0.9. 'While the metal emulsion of the 苐2 material can be obtained by introducing water molecules regardless of the composition range, when [In]/[Ga] is ❹ 〇·5 or more, When the oxygen molecules are formed into a film, the oxidation effect is also large, so that the carrier concentration is excessively lowered, and when the obtained film is used for a TFT element, only field effect mobility of about 2 cm 2 /Vs can be obtained. When [In]/([In] + [Ga] + [Zn]) is 0.2 or less, the resistance of the target becomes high resistance. Therefore, there is a possibility that DC sputtering and AC sputtering cannot be performed. Further, when [In]/([In] + [Ga] + [Zn]) is 0.9 or more, the obtained film is easily crystallized, and in the case of large-area film formation, there is in-plane electrical properties. Become uneven. Q In the second target, by increasing the ratio of gallium elements and increasing the ratio of indium elements, the carrier concentration and carrier mobility can be increased to obtain high field-effect mobility. The composition ratio of the second target is, for example, 〇&lt;[In]/[Ga]&lt;〇45 and 〇3<口卟-([In] + [Ga] + [Zn])&lt;0.9 The field effect mobility is 5 to 1 〇em2/Vs; and when 〇&lt;[Ιη]/^]&lt;〇.35, the field effect mobility is preferably 1 〇cm 2 /Vs or more. The third target which can be applied to the film forming method of the present invention contains a metal oxide containing indium (In), tin (Sn) and 154091.doc • 17- 201142054 (Zn) The content of the indium element, the tin element and the zinc element in the target satisfies the following atomic ratio: 0.2 &lt; [In] / ([In] + [Sn] + [Zn]) &lt; 0.9 0&lt; [Sn] /([In] + [Sn] + [Zn])&lt;0.5 (wherein [In] is the number of atoms of the indium element in the material, and [Sn] is the number of atoms of the tin element in the target, [ Zn] is the atomic number of the element in the material). The metal oxide of the third target preferably satisfies the following atomic ratio: 0.2 &lt; [In] / (fIn] + [Sn] + [Zn]) &lt; 0.9 0&lt; [Sn] / ([In] + [Sn] + [Zn]) &lt; 0.35. The metal oxide of the third target is more preferably satisfying the following atomic ratio: 〇.3 &lt; [In] / ([In] + [Sn] + [Zn]) &lt; 0.9 〇 &lt; [Sn] / ([ In] + [Sn] + [Zn]) &lt;〇2. Among the metal oxides of the third dry material, when the [[.../((+)) is 0.2 or less, the resistance of the target becomes high resistance, so DC sputtering or AC贱 cannot be performed. Plated enamel. Further, when [in]/([in] + [sn] + is called) is 0.9 or more, the obtained film is easily crystallized, and in the case of film formation over a large area, the in-plane electrical properties become Since the tin element becomes a carrier scattering source, the [Sn]/([In] + [Sn] + [Zn]) is 肖·5 or more, and the carrier mobility becomes low. The obtained film was used for the 打 〒 〒 - the % effect mobility was 5 cm 2 /Vs or less. The ratio of the third target can control the carrier rate. By reducing the proportion of tin elements, increasing the indium element spread and the plant mobility, high field effect migration is obtained. 154091.doc 201142054 The composition ratio of the third material is, for example, 〇.2&lt;[ln]/([In] + [Sn] + [Zn]) &lt; 0.9 and 〇 &lt; [Sn] / ([In] + [Sn] + [Zn]) &lt; 0_35, the field effect mobility can be 5~1〇cm2/ Vs ' is 〇.3&lt;[In]/([In] + [Sn] + [Zn])&lt;〇.9 and 0 &lt;[Sn]/([In] + [Sn] + [Zn])&lt; At 0.2 o', the field effect mobility can be 1 〇 cm 2 /Vs or more. In Non-Patent Document 3, in order to control the carrier concentration, the target contains an element, and the atomic ratio of the Ga element to all the metal elements of the target is 0.33. However, when the content of the element is more than 0.33 in terms of the atomic ratio of all the metal elements of the target, Ga becomes a scattering source, and the mobility of the TFT element having the film obtained as a semiconductor layer is lowered. . On the other hand, when the content of the Ga element is less than 0.33 in terms of the atomic ratio of all the metal elements of the target, the scattering source 2Ga is a small amount, and there is an advantage that a relatively high mobility can be expected. There is a problem that it is difficult to control the carrier concentration to 1018 cm·3 or less. In the film formation method of the present invention, a film is formed using a second target having a content of the elemental element in an atomic ratio of not more than 5, or a third target having no Ga element. In the case of the case, a preferred "d-component" can be obtained. Especially in the case of using the third material, the chemical property can be improved, so that the source can be formed by wet etching even if the etching stop layer is not formed. The electrode/pole-electrode-pole can further produce a TFTit# which can be well-developed, and the metal oxide which can be manufactured into a ruthenium-first target is preferably substantially or only composed of indium element or zinc bismuth. The oxide, the metal oxide of the second dry material is preferably an oxide consisting essentially or exclusively of indium, gallium and zinc, and the metal oxide of the target is 154091.doc •19·201142054 It is preferable that the first to the first ice materials contain, for example, Mg, Ca, Sr, Ba, Ti, Zr, Hf, and the like, within a range that does not impair the effects of the present invention. Surface element, tin element

Co、Fe、Ni、Mo及稀土元素 素0 A1 、 Ge 、 Cu 鑭系元素之1種以上之元 藉由對本發明之成膜方法而獲得之薄膜進行退火處 理’可使薄臈中所取得之OH基作為〇而進入至氧空位中， 從而可降低載子濃度。退火處理條件較佳為於Μ㈣帆 下進行5〜120分鐘之退火處理。 ，於退火溫度未達15rc之情形時，财所取得之〇h基無 法製作充分之氧結合，因此難以獲得使载子濃度下降之效 果，於超過400T；之情形時，有進行結晶化之虞。關於處 理時間亦同樣。 上述退火處理只要在150。〇〜4〇〇亡之溫度範圍内，則不 特別地受環境之限制，但較佳為於含有至少氧之環境下進 行。藉由於含有氧之環境下進行，可抑制將經退火處理之 薄膜作為TFT時之特性不均。 =利用本發明之成膜方法而獲得之薄膜進行退火處理後 獲得之氧化物半導體（以下，有時簡稱為本發明之氧化物 半導體）可較佳地用作薄膜電晶體之半導體薄膜。 ^包含本發明之氧化物半導體之場效型電晶體係場效遷移 率及開關比較高’顯示常閉（n〇mal 〇ff)且爽止。巾 明瞭之電晶體。又，由於包含本發明之氧化物半導體之場 154091.doc -20- 201142054 =型電晶體可於低溫下使氧化物半導體讀，故可構成於 無驗玻璃等耐熱溫度有限制之基板上。 本發明之氧化物半導體通常用於_區域中，但亦可愈p 型Μ半導體、P型氧化物半導體、p财機半導體等各種 P型半導體組合而用於PN接合型電晶體等各種半導體器件 令。又，TFT亦可使用於邏輯電路、記憶電路、差動放大 電路等各種積體電路甲。進而，除場效型電晶體以外，亦 ΟOne or more elements of Co, Fe, Ni, Mo, and rare earth elemental elements 0 A1 , Ge , and Cu lanthanides are annealed by the film obtained by the film forming method of the present invention. The OH group enters into the oxygen vacancies as helium, thereby reducing the carrier concentration. The annealing treatment condition is preferably an annealing treatment for 5 to 120 minutes under a crucible. When the annealing temperature is less than 15 cc, the 〇h group obtained by the financial company cannot produce sufficient oxygen bonding, so it is difficult to obtain the effect of lowering the carrier concentration. In the case of exceeding 400 T, there is a possibility of crystallization. . The same is true for processing time. The above annealing treatment is as long as 150. The temperature range of 〇~4 〇〇 is not particularly limited by the environment, but it is preferably carried out in an environment containing at least oxygen. By carrying out in an oxygen-containing atmosphere, unevenness in characteristics when the annealed film is used as a TFT can be suppressed. The oxide semiconductor obtained by annealing the film obtained by the film forming method of the present invention (hereinafter sometimes referred to simply as the oxide semiconductor of the present invention) can be preferably used as a semiconductor film of a thin film transistor. ^ Field effect type electromechanical system containing the oxide semiconductor of the present invention has a field effect mobility and a relatively high switch 'shows normally closed (n〇mal 〇 ff) and is cool. The crystal of the towel. Further, since the field containing the oxide semiconductor of the present invention is 154091.doc -20- 201142054 = the type of transistor can read the oxide semiconductor at a low temperature, it can be formed on a substrate having a heat-resistant temperature such as a glass-free glass. The oxide semiconductor of the present invention is generally used in a region, but may be used in various semiconductor devices such as a PN junction type transistor, such as a p-type semiconductor, a P-type oxide semiconductor, or a p-type semiconductor semiconductor. make. Further, the TFT can be used for various integrated circuits such as a logic circuit, a memory circuit, and a differential amplifier circuit. Furthermore, in addition to field-effect transistors,

可應用於靜電感應型電晶體、宵特基能障型電晶體、宵特 基一極體（Schottkydiode)、電阻元件。 電晶體之構成可無限制地利用底閑極、頂閑極 觸、頂接料公知之構成。尤其是底雜構成可獲得較非 晶石夕或ZnO之TFT高之性能，故而有利。底間極構成容易 削減製造時之掩模個數’容易降低大型顯示器等用途之製 造成本，故較佳。 對於大面積之顯示器用途而言，特佳為通道蝕刻型之底 閘極構成之薄膜電晶體。通道蝕刻型之底閘極構成之薄膜 電晶體於光微影步驟時之光罩數量較少，可低成本地製造 顯示器用面板。其中，通道蝕刻型之底閘極構成且頂接觸 結構之薄膜電晶體之遷移率等特性良好，容易工業化，故 而特佳。 包含本發明之氧化物半導體之場效型電晶體於先前難以 獲知良好之特性的5〇 nm以上、進而6〇 nm以上、7〇 nm&amp; 上之半導體膜膜厚下，亦可良好地工作。又，包含本發明 之氧化物半導體之場效型電晶體具有合適之遷移率、開關 154091.doc 21 · 201142054 比及S值（subthreshold swing value，次臨限擺動值）〇 再者，半導體膜之膜厚之上限例如為1〇〇nm。 包含本發明之氧化物半導體之場效型電晶體之s值較佳 為1 V/decade以下，進而較佳為〇 7 v/decade以下，特佳為 0.5 V/decade以下。若s值之值超過！ v/decade，則有電晶 體無法顯示良好之開關特性之虞，例如驅動電壓變高等。 包含本發明之氧化物半導體之場效型電晶體之臨界電壓 更佳為-1 .〇〜1 .〇 則有驅動電壓增 則有消耗電力增 通常為-5.0~5.0 V ’較佳為〜2.〇 v V’進而較佳為〇〜1〇 v。若大於5 V, 大、消耗電力增大等之虞，若小於巧V 大之虞。 包含本發明之氧化物半導體之場效型電晶體之通道長度 只要為通常所使用之範圍内則無特別限定，通常為1〇〜7〇 μιη，較佳為20〜50 μπι。 、包含本發明之氧化物半導體之場效型電晶體之通道寬度 通常為10〜100 μιη，較佳為2〇〜7〇 μιη。 為實現顯示器之高精細化，TFT必需微小。於此情形 時’為獲得所期望之通態電流，用於咖通道層之半導體 膜必需具有高遷移率。 3本表月之氧化物半導體之場效型電晶體具有高遷移 率’故而可期待其於1〜10 _之範圍、進而2〜8 _之範圍 中亦可較佳地使用。又，關於福.皆官盘 關欠通道寬度，包含本發明之氧 化物半導體之場效型雷a 电曰日體了期待於1〜10 μιη之範圍、進 而2〜8 μηι之範圍中亦可較佳地使用。 154091.doc -22- 201142054 圖2係表示包含本發明之氧化物半導體之薄膜電晶體之 一貫施形態的概略剖面圖。 作為場效型電晶體之薄膜電晶體丨為底閘極型，其於玻 璃基板60上形成有閘極電極3〇，於閘極電極30上形成有閘 . 極絕緣膜50。於閘極絕緣膜50上形成有氧化物半導體膜 ' ，進而於氧化物半導體膜40上相隔而形成有汲極電極1〇 與源極電極20。 〇 形成汲極電極1(&gt;、源極電極20及閘極電極30之各電極的 材料並無特別限定，可任意選擇通常所使用之材料。 例如，可使用IT〇、IZ〇、Zn〇、Sn〇2等之透明電極，或 A卜 Ag、Cu、Cr、Ni、Mo、Au、Ti、Ta等之金屬電極， 或者含有該等之合金之金屬電極。 沒極電極10、源極電極20及閘極電極30之各電極亦可形 成為積層2層以上之不同導電層之多層結構，例如於圖3 中’各電極10、20及3〇分別包含第i導電層31、21、u， Q 及第2導電層32、22、12。尤其是源極·汲極電極對低電 阻配線之要求較強，因此有時以Ti或Mo等密接性優異之金 屬將A1或Cu等良導體製成夾層而使用。 形成閘極絕緣膜5〇之材料並無特別限定，可任意選擇通 ， 常所使用之材料。 作為閘極絕緣膜50之材料，例如可使用Si02、SiNx、 A1203、Ta205、Ti〇2、Mg〇、Zr〇2、Ce〇2、κ2〇、Li2〇、It can be applied to electrostatic induction type transistors, 宵-based barrier type transistors, Schottky diodes, and resistive elements. The construction of the transistor can be made without limitation using a known structure of the bottom idler, the top idle touch, and the top feed. In particular, the bottom heterostructure is advantageous in that it can obtain higher performance than a non-Crystal or ZnO TFT. It is preferable that the bottom electrode structure is easy to reduce the number of masks at the time of manufacture, and it is easy to reduce the number of applications such as large-sized displays. For large-area display applications, a thin-film transistor composed of a channel-etched bottom gate is particularly preferred. The thin film transistor formed by the bottom electrode of the channel etching type has a small number of masks in the photolithography step, and the display panel can be manufactured at low cost. Among them, the bottom etching of the channel etching type and the thin film transistor of the top contact structure have good characteristics such as mobility and are easy to industrialize, so that it is particularly preferable. The field effect type transistor including the oxide semiconductor of the present invention can also work well under the semiconductor film thickness of 5 Å nm or more, further 6 〇 nm or more, 7 〇 nm &amp; which is difficult to obtain good characteristics. Further, the field effect type transistor including the oxide semiconductor of the present invention has a suitable mobility, a switch 154091.doc 21 · 201142054 ratio, and a subthreshold swing value, and a semiconductor film The upper limit of the film thickness is, for example, 1 〇〇 nm. The field-effect type transistor including the oxide semiconductor of the present invention preferably has an s value of 1 V/decade or less, more preferably 〇 7 v/decade or less, and particularly preferably 0.5 V/decade or less. If the value of s exceeds! In v/decade, there is a problem that the transistor cannot display good switching characteristics, such as a high driving voltage. The threshold voltage of the field effect type transistor including the oxide semiconductor of the present invention is more preferably -1. 〇~1. 〇, the driving voltage is increased, and the power consumption is increased by -5.0 to 5.0 V, preferably ~2. 〇v V' is further preferably 〇~1〇v. If it is larger than 5 V, it will be larger than the power consumption, and if it is less than the size of V. The channel length of the field effect type transistor including the oxide semiconductor of the present invention is not particularly limited as long as it is within the range generally used, and is usually 1 to 7 μm, preferably 20 to 50 μm. The channel width of the field effect type transistor including the oxide semiconductor of the present invention is usually 10 to 100 μm, preferably 2 to 7 μm. In order to achieve high definition of the display, the TFT must be small. In this case, in order to obtain the desired on-state current, the semiconductor film for the coffee channel layer must have high mobility. The field-effect transistor of the oxide semiconductor of the present invention has a high mobility, and it is expected to be preferably used in the range of 1 to 10 Å and further in the range of 2 to 8 Å. Moreover, regarding the width of the channel, the field-effect type of the oxide semiconductor including the oxide semiconductor of the present invention is expected to be in the range of 1 to 10 μηη, and further in the range of 2 to 8 μηι. It is preferably used. 154091.doc -22- 201142054 Fig. 2 is a schematic cross-sectional view showing a conventional embodiment of a thin film transistor including an oxide semiconductor of the present invention. The thin film transistor of the field effect type transistor is a bottom gate type in which a gate electrode 3 is formed on a glass substrate 60, and a gate insulating film 50 is formed on the gate electrode 30. An oxide semiconductor film ' is formed on the gate insulating film 50, and a drain electrode 1'' and a source electrode 20 are formed on the oxide semiconductor film 40. The material for forming the electrodes of the drain electrode 1 (&gt;, the source electrode 20, and the gate electrode 30) is not particularly limited, and a material which is usually used can be arbitrarily selected. For example, IT〇, IZ〇, Zn〇 can be used. a transparent electrode such as Sn 〇 2 or a metal electrode such as Ag, Cu, Cr, Ni, Mo, Au, Ti, Ta, or the like, or a metal electrode containing the alloy. The electrode 10 and the source electrode 20 and each of the electrodes of the gate electrode 30 may be formed as a multilayer structure in which two or more layers of different conductive layers are laminated. For example, in FIG. 3, each of the electrodes 10, 20, and 3 includes an ith conductive layer 31, 21, and u, respectively. , Q and the second conductive layers 32, 22, and 12. In particular, the source/drain electrodes have a strong requirement for low-resistance wiring. Therefore, a good conductor such as A1 or Cu may be used as a metal having excellent adhesion such as Ti or Mo. The material for forming the gate insulating film 5 is not particularly limited, and can be arbitrarily selected and used. As the material of the gate insulating film 50, for example, SiO 2 , SiN x , A 120 3 , and Ta 205 can be used. , Ti〇2, Mg〇, Zr〇2, Ce〇2, κ2〇, Li2〇,

Na20、Rb2〇、Sc2〇3、γ2〇3、Hf〇3 CaHf〇3、外叫、 BaTa2%、Sm〇3、A1N等化合物。該等之中，較佳為 154091.doc •23- 201142054Na20, Rb2〇, Sc2〇3, γ2〇3, Hf〇3 CaHf〇3, externally called, BaTa2%, Sm〇3, A1N and the like. Among these, preferably 154091.doc •23- 201142054

Al2〇3、γ2〇3、Hf〇3、caHf〇3，更佳為 Y2〇3 ' Hf〇3 . CaHf〇3 〇Al2〇3, γ2〇3, Hf〇3, caHf〇3, more preferably Y2〇3 'Hf〇3 . CaHf〇3 〇

Si〇2、SiNxSi〇2, SiNx

Si〇2、SiNx、 再者’上述氧化物羞 物之氧數亦可不必與化學計量比一致 (例如，可為ς i n . J 兩 ί&gt;ι02，亦可為 Si〇x)。 、絕緣膜50亦可為積層2層以上之不同絕緣膜之結 Μ極絕緣膜5G可為晶質、多晶質、非晶質之任一 一仁較佺為工業上容易製造之多晶質或非晶質。 氧化物半導體膜4G為藉由本發明之成膜方法 化物半導體。 氧化物半導體膜40通常以霍耳量測(Hall measur_nt)所 求得之載子密度未達，em.3，較佳為未達5xiq17 &lt;， 更佳為未達lx10” cm·、於載子密度為ι〇18上之情 形時，有漏電流增大之虞。 再者’載子密度之下限亦根據包含氧化物半導體膜之 兀件之用途而不同，但例如較佳為1〇IS cm_3以上。 關於氧化物半導體膜40之比電阻，以四端子法所求得之 值通常為10-1〜1〇8 Qcm，較佳為1〇1〜1〇7卩⑽，更佳為 1 02〜1 〇6 Qcm 〇 於比電阻未達10 ] Qcm之情形時，有電容易流失，無法 作為半導體薄膜而發揮作用之虞。另一方面，於比電阻超 過1〇8 Qcm之情形時，有若不施加較強電場則無法作為半 導體而發揮作用之虞。 氧化物半導體膜40之膜厚可根據氧化物半導體4〇本身之 比電阻而適宜選定最適合之值，就均勻性之觀點而t^ 154091.doc -24 - 201142054 佳為膜厚較厚，就成膜時間（步^ t &amp; &amp; 言，較佳為膜厚較薄。^驟之即拍時間）之觀點而 氧化物半導體膜40之膜厚通常 5n 1 cn # 馬 20〜5〇〇 nm，較佳 Λ 50〜150 nm，更佳為6〇〜】4〇⑽ 較佳為 為70〜110nm。 尤佳為70〜130 nm，特佳 :氧化物半導體之膜厚未達2Qnm之情料，有由 面積成臈時之膜厚之{ 性變得不均勻之虞另方得所製作仰^ 於膜厚超過500 nm之情开） 時：有成膜時間變長而無法於工業中採用之虞。 薄媒電晶體1之場效遷移率通常為i cm2，Vs以上，較佳 為5 cm2/Vs以上，更往主】Λ 2, 更佳為10 Cm/Vs以上，進而較佳為18 m s以上’特佳為30 cmVVs以上，最佳為5〇 cm2/Vs以 上0 於場效遷移率未達i cm2/Vk情形時，有開關速度變慢 之虞。又，場效遷移率之上限例如為5〇〇cm2/Vs。 薄膜電晶體丄之開關比通常為1〇3以上，較佳為1〇4以上， 更佳為1〇5以上，進而較佳為1〇6以上，特佳為1〇7以上。 又就低/肖耗電力之觀點而言，薄膜電晶體i較佳為臨 界電壓(vth)為正且常閉。若臨界電壓(vth)為負且常開 (normally on),則有消耗電力增大之虞。 對於包含本發明之氧化物半導體之場效型電晶體之製造 方法’例如可藉由以下之方法製造。 首先，於絕緣性基板上形成金屬膜，而形成閘極電極。 作為金屬膜，適宜使用Mo、A卜Cr及以該等為主成分之 154091.doc -25- 201142054 合金。亦可使用該等金屬膜之積層膜β 於閘極電極及絕緣性基板上，藉由f||CVE^(ehemicai vapor deposition，化學氣相沈積法）形成閘極絕緣膜。其 次，藉由濺鍍法，形成成為通道之半導體層。其次，經光 微影步驟及蝕刻步驟，使成為TFT之區域之半導體層形成 為島狀。繼而，使用以形成源極電極、汲極電極之第2金 屬膜成膜。該第2金屬膜與閘極電極同樣，可使用八丨、&amp; 或Mo、含有該等之合金等材料。該第2金屬膜亦可由積層 膜構成。 藉由光微影步驟、蝕刻步驟，使所形成之第2金屬膜獲 得所期望之形狀之源極電極、汲極電極之圖案，藉此獲得 電晶體。 實施例 實施例1〜30 於磁控濺鍍裝置中安裝具有表所示之靶材組成的2英 忖之乾材，並分別安裝厚度為1〇〇 nm之附有熱氧化膜之矽 b曰圓作為基板A1，及載玻片（Corning公司製造之#1737)作 為基板B 1。 將基板搬送至腔室内後，達到特定之到達壓力後，導入 表1〜3所示之分壓比之Ar氣體及H2〇氣體，以表i〜3所示之 激鍍條件，分別於基板A1及基板B1上形成膜厚5〇 nm之非 晶質膜。 以表1〜3所示之退火條件，於烘箱中對所獲得之薄膜進 行退火處理，而獲得積層於基板A1及基板B1上之氧化物 154091.doc -26- 201142054 半導體。 將具備加熱處理後之氧化物半導體之基板B1切割為ι cm，於四角安裝Au電極。藉由銀漿將^^電極與銅線黏接 而獲得霍爾效應測定用元件B1，評價載子濃度。將結果示 於表1〜3中。 再者’載子濃度之測定係藉由於室溫下使用ResiTest 8300型（TOYO Corporation製造）進行霍爾效應測定而求出 載子濃度。 將具備加熱處理後之氧化物半導體之基板Ai再次安裝於 2英吋陰極之磁控濺鍍裝置中，於陰極上安裝Au靶材，使 用專用之金屬掩模’以W/L = 1000/200 μηι之方式而成膜Au 電極，藉此製造TFT元件A1。 將所獲得之TFT元件A1設置於keithley 4200SCS中，以 没極電壓Vds=10 V及閘極電壓Vgs=-20〜20 V之條件評價傳 導特性。將結果示於表1〜3中。 比較例1〜12及參考例1〜2 使用具有表4及5所示之乾材組成之粗材，導入表4及5所 示之分壓比之Ar氣體及H20氣體（比較例5〜6及參考例1〜2) 或Ar氣體及〇2氣體（比較例1〜4，7〜12)，以表4及5所示之 條件進行非晶質膜之成膜及退火處理，除此以外與實施例 1〜30同樣地製造氧化物半導體，與實施例卜30同樣地製造 霍爾效應測定用元件B 1而評價載子濃度，以及製造TFT元 件A1而評價傳導特性。將結果示於表4及5中。 154091.doc -27·The oxygen number of Si 〇 2, SiNx, and the above oxide oxide may not necessarily coincide with the stoichiometric ratio (for example, ς i n . J 2 ί &gt; ι 02 may also be Si 〇 x). The insulating film 50 may be a junction of two or more layers of different insulating films. The insulating film 5G may be crystalline, polycrystalline or amorphous, and is more industrially easy to manufacture. Or amorphous. The oxide semiconductor film 4G is a semiconductor compound by the film formation method of the present invention. The oxide semiconductor film 40 generally has a carrier density as determined by Hall measur_nt, and em.3, preferably less than 5xiq17 &lt;RTIgt;, more preferably less than lx10" cm·, When the sub-density is ι 〇 18, the leakage current increases. Further, the lower limit of the carrier density differs depending on the use of the element including the oxide semiconductor film, but for example, it is preferably 1 〇 IS. The specific resistance of the oxide semiconductor film 40 is usually 10-1 to 1 〇 8 Qcm, preferably 1 〇 1 to 1 〇 7 卩 (10), more preferably 1 by the four-terminal method. 02~1 〇6 Qcm When the specific resistance is less than 10] Qcm, electricity is easily lost and cannot function as a semiconductor film. On the other hand, when the specific resistance exceeds 1〇8 Qcm, It is not possible to function as a semiconductor unless a strong electric field is applied. The film thickness of the oxide semiconductor film 40 can be appropriately selected according to the specific resistance of the oxide semiconductor 4 itself, and the uniformity is considered. T^ 154091.doc -24 - 201142054 Good film thickness is thick, filming time (step ^ t & The film thickness of the oxide semiconductor film 40 is usually 5n 1 cn #马20〜5〇〇nm, preferably Λ 50~, which is preferably a thin film thickness. 150 nm, more preferably 6〇~] 4〇(10) is preferably 70~110nm. Especially preferably 70~130nm, especially good: the thickness of the oxide semiconductor is less than 2Qnm, and the area is 臈In the case of the film thickness, the thickness of the film becomes uneven. When the film thickness exceeds 500 nm, the film formation time becomes long and cannot be used in the industry. The field effect mobility of the crystal 1 is usually i cm2, Vs or more, preferably 5 cm 2 /Vs or more, more preferably Λ 2, more preferably 10 Cm/Vs or more, and further preferably 18 ms or more. It is 30 cmVVs or more, preferably 5 〇cm2/Vs or more. 0 When the field effect mobility is less than i cm2/Vk, the switching speed is slow. Also, the upper limit of the field effect mobility is 5 〇〇. Cm2/Vs. The switching ratio of the thin film transistor is usually 1〇3 or more, preferably 1〇4 or more, more preferably 1〇5 or more, further preferably 1〇6 or more, and particularly preferably 1〇7 or more. And low / From the viewpoint of power consumption, the thin film transistor i preferably has a positive threshold voltage (vth) and is normally closed. If the threshold voltage (vth) is negative and normally on, there is a problem that power consumption increases. The method for producing a field effect type transistor including the oxide semiconductor of the present invention can be produced, for example, by the following method. First, a metal film is formed on an insulating substrate to form a gate electrode. As the metal film, Mo, A, Cr, and 154091.doc -25-201142054 alloy containing these as a main component are suitably used. The gate insulating film of the metal film can be formed on the gate electrode and the insulating substrate by f||CVE^(ehemicai vapor deposition). Next, a semiconductor layer to be a via is formed by sputtering. Next, the semiconductor layer which is a region of the TFT is formed into an island shape by the photolithography step and the etching step. Then, a second metal film formed by forming a source electrode and a drain electrode is used for film formation. Similarly to the gate electrode, the second metal film may be made of barium, &amp; or Mo, or an alloy containing the same. The second metal film may be composed of a laminate film. The formed second metal film is patterned by a photolithography step and an etching step to obtain a pattern of a source electrode and a drain electrode of a desired shape, thereby obtaining a crystal. EXAMPLES Examples 1 to 30 A 2 inch dry material having a target composition as shown in the table was mounted in a magnetron sputtering apparatus, and a thermal oxide film having a thickness of 1 〇〇 nm was attached, respectively. The circle was used as the substrate A1, and a slide glass (#1737 manufactured by Corning Corporation) was used as the substrate B1. After the substrate is transferred into the chamber, after reaching a specific reaching pressure, the partial pressure ratios Ar gas and H2 gas shown in Tables 1 to 3 are introduced, and the plating conditions shown in Tables i to 3 are respectively applied to the substrate A1. An amorphous film having a film thickness of 5 Å was formed on the substrate B1. The obtained film was annealed in an oven under the annealing conditions shown in Tables 1 to 3 to obtain an oxide 154091.doc -26-201142054 semiconductor laminated on the substrate A1 and the substrate B1. The substrate B1 having the heat-treated oxide semiconductor was cut into ι cm, and an Au electrode was attached to the four corners. The Hall effect measuring element B1 was obtained by bonding the electrode to the copper wire by silver paste, and the carrier concentration was evaluated. The results are shown in Tables 1 to 3. Further, the measurement of the carrier concentration was carried out by measuring the Hall effect by using a ResiTest Model 8300 (manufactured by TOYO Corporation) at room temperature. The substrate Ai having the heat-treated oxide semiconductor is again mounted in a magnetron sputtering device of 2 inches of cathode, and an Au target is mounted on the cathode, using a dedicated metal mask 'W/L = 1000/200 The Au electrode was formed by a method of μηι, whereby the TFT element A1 was produced. The obtained TFT element A1 was placed in a keithley 4200SCS, and the conduction characteristics were evaluated under the conditions of a gate voltage Vds = 10 V and a gate voltage Vgs = -20 to 20 V. The results are shown in Tables 1 to 3. Comparative Examples 1 to 12 and Reference Examples 1 to 2 Using the crude materials having the dry materials shown in Tables 4 and 5, the partial pressure ratios of Ar gas and H20 gas shown in Tables 4 and 5 were introduced (Comparative Examples 5 to 6). And Reference Examples 1 to 2) or Ar gas and 〇2 gas (Comparative Examples 1 to 4, 7 to 12), and film formation and annealing treatment of the amorphous film were carried out under the conditions shown in Tables 4 and 5, and An oxide semiconductor was produced in the same manner as in the examples 1 to 30, and the Hall effect measuring element B1 was produced in the same manner as in the example 30, and the carrier concentration was evaluated, and the TFT element A1 was produced to evaluate the conduction characteristics. The results are shown in Tables 4 and 5. 154091.doc -27·

20【一 ϊ ;IGZ0(Iii.T- η=50:10.^υ； ι 0.50 1 o.io 1 1 0.40 1 : 2&gt;&lt;1〇4 | i 0.65 | m 1 | 2.0E-02 1 1 u Q fS \r&gt; u*&gt; &lt;N O m 1 300 1 s 大氣 ι j 1.18Ε+16 1 _!5·2 1 — 卜 ο 實施例9 1 j ITZO(In:Sn: Zn=36:15:49) 0.36 1 • Γ___ois Π 1 0.49 1 ； IxlQ-4 | | 0.65 | ro 1 | 2.0E-02 Π 1 Vi (N XTi Vi «Ν o (N 1 300 」 § 1 大氣^ 「 9.38Ε+16 1 | 17.3 1 〇 '•Ο 實施例8 | ITZ0(In;Sn; Zn=36:15:49) 0.36 1 • , 0.15 Π 1 0.49 Π 1 2ΧΗΤ4 | in 1 | 1.5E-01 Π t 〇 itj (S ΚΓί (N | 300 I | 300 s 1 λΐ π | 8.23Ε+17 I | 14.5 ! 〇 Vi 實施例7 | | ITZ0(In:Sn: Zn=36:15:49) !____1 1 1_0^5__Ί 1 0.49 1 [ 2Χ10·4 | ο m | 3.0E-03 I 1 u (N «η fS o | 300 ! s ι 大氣 ι | 1.20Ε+17 Π 〇 〇 οο ο 實施例6 | I ITZO(In:Sn:Zn =36:15:49) 0.36 1 1 1__Ι 1 0.49 1 ί 2Χ10*4 | ί 0.65 1 • | 2.0E-02 | 1 u fS V) cs o 1__300_, s 1 大氣 | 1.52Ε+17 | 13.9 W1 〇 \ο 實施例5 | | ITZO(In:Sn:Zn =36:15:49)_ 0.36 1 1 1___015_I 1 0.49 1 [ 2Χ10·4 I 1 0.65 J m 1 | 2.0E-02 | t υ Q »Λ» (S cs | 300 〇\ L 300_______, s 1 大氣 ι | 6.52Ε+17 | 00 ι ο ο 實施例4 I ITZ0(In:Sn: Zn=36:15:49) 0,36 1 1 0.15 1 I 0.49 1 2Χ10-4 I 0-65 I m 1 ! 2.0E-02 | 1 u Q ♦Τ) &lt;N o 〇\ | _—300 , s 1 大氣 1 I 7.36Ε+17 i 00 σΐ in Ο οο ο 實施例3 I | ITZ0(In:Sn: ! Zn=36:15:49) ί 0.36 1 1 1 0.15 —」 I 0.49 I I 2xl〇-4 1 I 0.65 I 1 | 2.0E-02 | 1 u Q - &lt;N o yri I 300 1 § 大氣 I 5.31Ε+17 I 1 16.8 S Ο '•Ο 實施例2 I 1 ITZ0(In:Sn: ；Zn=36:15:49) j 0.36 I 1 0.15 1 I 0.49 I I 2X10*4 1 1 0.65 I 〇 1 1 6.5E-02 I 1 u (N (N 1 300 1 I 300 — s | 大氣 I 3.04Ε+17 I 11.5 &lt;N ο ο 實施例1 | 1 ITZ0(In:Sn: Zn-36:15:49) 0.36 I - 0.15 1 I 0.49 I ! 2X10-4 1 j 0.65 1 1 6.5E-03 1 o (N Vi fS o m &lt;N 1 300 s 大氣 I 3.43Ε+17 I 14.8 原子比 [In]/全部金屬原子1 [Ga]/全部金屬原子j i [Sn]/全部金屬原子1 i [Ζη]/全部金屬原子| 到違壓力[Pa] 濺鍍壓力[Pa] 1 [Η20]/([Η20]+[Αγ]) [%] t〇J/([〇2]+[Ar]) [%3 水分壓[Pa] I | 氧分壓Pa] I 濺鍍方式 银 T-S 距離[cml | 膜厚[nm] I | 基板溫度[°c] I 磁場強度[高斯] 成膜速度[nm/min] | 退火溫度rc] ; 退火時間[min] | 環境 | | 載子濃度[cnv3] I 1 Λ &gt; S;值[V/dec] 靶材組成 濺鍍條件 退火條件 TFT元件特性 -28- 154091.doc 20114205420[一ϊ;IGZ0(Iii.T- η=50:10.^υ; ι 0.50 1 o.io 1 1 0.40 1 : 2&gt;&lt;1〇4 | i 0.65 | m 1 | 2.0E-02 1 1 u Q fS \r&gt;u*&gt;&lt;NO m 1 300 1 s Atmosphere ι j 1.18Ε+16 1 _!5·2 1 — 卜 ο Example 9 1 j ITZO(In:Sn: Zn=36 :15:49) 0.36 1 • Γ___ois Π 1 0.49 1 ; IxlQ-4 | | 0.65 | ro 1 | 2.0E-02 Π 1 Vi (N XTi Vi «Ν o (N 1 300 § 1 atmosphere ^ " 9.38Ε +16 1 | 17.3 1 〇'•Ο Example 8 | ITZ0(In;Sn; Zn=36:15:49) 0.36 1 • , 0.15 Π 1 0.49 Π 1 2ΧΗΤ4 | in 1 | 1.5E-01 Π t 〇 Itj (S ΚΓί (N | 300 I | 300 s 1 λΐ π | 8.23Ε+17 I | 14.5 ! 〇Vi Example 7 | | ITZ0(In:Sn: Zn=36:15:49) !____1 1 1_0^ 5__Ί 1 0.49 1 [ 2Χ10·4 | ο m | 3.0E-03 I 1 u (N «η fS o | 300 ! s ι ι ι | 1.20Ε+17 Π 〇〇οο ο Example 6 | I ITZO(In :Sn:Zn =36:15:49) 0.36 1 1 1__Ι 1 0.49 1 ί 2Χ10*4 | ί 0.65 1 • | 2.0E-02 | 1 u fS V) cs o 1__300_, s 1 Atmosphere | 1.52Ε+17 | 13.9 W1 〇\ο Example 5 | | ITZO(In:Sn:Zn =36:15:49)_ 0.36 1 1 1___015_I 1 0.49 1 [ 2Χ10·4 I 1 0.65 J m 1 | 2.0E-02 | t υ Q »Λ» (S cs | 300 〇\ L 300_______, s 1 atmosphere ι | 6.52Ε+17 | 00 ι ο ο Example 4 I ITZ0 (In:Sn: Zn=36:15:49) 0,36 1 1 0.15 1 I 0.49 1 2Χ10-4 I 0-65 I m 1 ! 2.0E-02 | 1 u Q ♦Τ) &lt;N o 〇 \ | _—300 , s 1 Atmosphere 1 I 7.36Ε+17 i 00 σΐ in Ο οο ο Example 3 I | ITZ0(In:Sn: ! Zn=36:15:49) ί 0.36 1 1 1 0.15 — I 0.49 II 2xl〇-4 1 I 0.65 I 1 | 2.0E-02 | 1 u Q - &lt;N o yri I 300 1 § Atmospheric I 5.31Ε+17 I 1 16.8 S Ο '•Ο Example 2 I 1 ITZ0(In:Sn: ;Zn=36:15:49) j 0.36 I 1 0.15 1 I 0.49 II 2X10*4 1 1 0.65 I 〇1 1 6.5E-02 I 1 u (N (N 1 300 1 I 300 — s | Atmospheric I 3.04Ε+17 I 11.5 &lt;N ο ο Example 1 | 1 ITZ0(In:Sn: Zn-36:15:49) 0.36 I - 0.15 1 I 0.49 I ! 2X10-4 1 j 0.65 1 1 6.5E-03 1 o (N Vi fS om &lt;N 1 300 s Atmosphere I 3.43Ε+17 I 14.8 Atomic ratio [In]/All metal atoms 1 [Ga]/All metal atoms ji [Sn]/All Metal atom 1 i [Ζη] / all metal atoms | to the pressure [Pa] sputtering pressure [Pa] 1 [Η20] / ([Η20]+[Αγ]) [%] t〇J/([〇2]+[Ar]) [%3 Moisture pressure [Pa] I | Oxygen partial pressure Pa] I Sputtering method Silver TS distance [cml Film Thickness [nm] I | Substrate Temperature [°c] I Magnetic Field Strength [Gauss] Film Formation Velocity [nm/min] | Annealing Temperature rc] ; Annealing Time [min] | Environment | | Carrier Concentration [cnv3] I 1 Λ &gt;S; value [V/dec] target composition sputtering condition annealing condition TFT element characteristics -28- 154091.doc 201142054

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OS οοε 00寸 οοε 09 -+30006 86 9Ό 屮噼i^^^/tus】 屮噼 f^-^/【u2】 【Bd】^哟？Fi-i 【％】 (【JV】+【qK】)/【qHl (【呈+【6】)/【6】 【£】鲥令^ 【'-Q/M】1^183^^ 【Ul3】elis-1 【I】畸琏 =1】靶^瑤噠 【Ξε】Εφ¥^ 【e-εο】1^1^屮琪 【SA^iy^f? J-'p/A】lisls ~【Λ】ΜίΛ~ -29· 20 420 【ε&lt;】 1ΤΖΟ(Ι,·.^^ 11=36:15.竹；ι 0.36 1 * __ 1 0.49 1 1 2考 j | 0.65 1 ro 1 | 2.0E-02 1 1 〇 &lt;N V) g »n cs O r4 O m § l 大氣 ι 丨 3.76E+17 I 〇〇 ΓΟ &lt;N 實施例29 ITZO(In:Sn:Z n=36:15:49) 0.36 1 I 0.15 1 0.49 1 2XUT4 1 i 0.65 1 1 | 2.0E-02 I t Q fS m g &lt;N o m ΓΊ VJ o § 1 大氣 ι | 3.76E+17 1 〇\ 〇 (N 〇 實施例28 | ITZO(In:Sn:Z n=36:15:49) 0.36 1 嘗 ：__I 1 0.49 1 1 2x1ο*4 1 1 0.65 1 m 1 | 2.0H-02 | 1 〇 u-ϊ &lt;N g &lt;N | 300 I r-i Vi | 300 1 § 1 大氣 1 | 3.76E+17 I ο fN 〇 實施例27 | ITZO(In:Sn:Zn= 36:15:49) 0.36 1 i 0.15 1 0.49 1 1 2x1ο-4 1 1 0.65 1 1 | 2.0E-02 | 1 U Q (S •Ti o &lt;N o m (N o 1 大氣 | 3.71E+17 丨 | 19.3 iri 實施例26 | ITZO(In:Sn:Zn =36:15:49) _ _I ' L_—_ι 1 0.49 1 1 2Χ10·4 1 1 0.65 1 m 1 | 2.0E-02 | 1 U irj &lt;N •λ o &lt;N o &lt;N g § I 大氣 | | 3.66E+17 ! | 18.7 ! *n yrt 實施例25 | ITZO(In:Sn:Zn =36:15:49) 0.36 I &gt; 0.15 I 0 49________I I 2Χ10-4 I 1 0.65 1 t I 2.0E-02 I 1 U Q (N s fN o m &lt;N I 300 1 § I 大氣 I 3.13E+17 I 16.8 〇 實施例24 | j ITZO(In:Sn:Zn ! -36:15:49) L_—— —0.36 I 1 ——0.15 I 1 0.49 1 I 2Χ10-4 I 1_0.65 1 m 1 I 2.0E-02 I 1 U V*) ίΝ o &lt;N y/~) o § 1 大氣 1 1 3.02E+17 I 1 16.4 *n 卜 實施例23 | ITZO(In:Sn:Zn ι =36:15:49) ! 0.36 I 1 0.15 . — ! 1 0.49 1 1 2ΧΗΓ4 I 1 0.65 1 I I 2.0E-02 , U Q V) (N *Ti m fS I looo i &lt;N On 1 300 § | 大氣 I 7.46E+17 I 11.9 in o Ό 〇 實施例22 | ITZO(In:Sn:Zn i =36:15:49) 0.36 I 1 0.15 I 1 0.49 I I 2Χ10·4 I 1 0.65 1 I 6.5E-03 I U Q &lt;N V~i s yn &lt;N I 300 I (S o (N § | 大氣 1 | 2.97E+17 I 14.7 Vi 實施例21 I ITZO(In:Sn:Zn =36:15:49) 0.36 I ' 0.15 I 0.49 I 1 2x10'4 I 0.65 — • I 6.5E-03 I 〇 (N «η &lt;N o m (N 〇 I 大氣 6.94E+17 00 κή oo o 原子比 [In]/全部金屬原子 [Ga]/全部金屬原子 [Sn]/全部金屬原子 j :[Zn]/全部金屬原子 到達壓力[Pa] I 1濺鍍壓力[Pa] I [H20]/([H20]+[Ar]) [%] [〇J/([〇2]+[Ar]) [%] 水分壓[Pa] |氧分壓pa] 濺鍍方式 梯 T-S 距離[cm] |膜厚[nm] |基板溫度[°c] I |磁場強度[高斯] ι 成膜速度[nm/min] |退火溫度[°c] I |退火時間[min] I環境 I Η' m 1 跻 染 粮1 &gt; S 值[V/dec] 靶材組成 濺鍍條件 退火條件 η -1 TFT元件特性1 -30- 154091.doc 2 c c 【寸&lt;】 比較彳私 ΙΤΖΟ(Ιη^ιι.〇 I n=36:15:49) 0.36 1 0.15 0.49 2χ\0Α 0.65 1 Ο 1 1 4.6Ε-01 1 U Q «ο &lt;N o &lt;s O 0.57 〇 m | 大氣 I 1.12E+19 I 1 -20以下 cs o 比較例9 ITZO(In:Sn: Zn=36:15:49) 1 0.36 1 1 1 0.15 1 1 0.49 1 2χ1〇-4 0.65 1 Ο 1 丨 4.6Ε-01 1 〇 »〇 &lt;N O fS 300 1 L 0-57 一1 ο i 大氣 I 1.05E+19 I 1 -20以下 1 比較例8 ITZO(In:Sn: Zn=36:15:49) L— — 0.36 I 1 1 0.15 1 1 0.49 1 1 2χ1〇4 1 | 0.65 1 1 Ο _ 1 4.6E-01 1 u Q «Λ (N o ΓΟ (N 300 丨 0.57 | ο m 1 大氣 | 8.83E+18 | rn m rs 比較例7 ITZO(In;Sn;Zn= 36:15:49) 1_0^6_! 1 1__j 1 0.49 1 1 2x1ο*4 1 | 0.65 | t Ο 1 1 4.6E-01 1 o Q W) (N &lt;N 1 300 1 1__1 ο 沄 m 大氣 「 8.07E+18 | !__1 o 比較例6 ITZO(In:Sn;Zn -36:15:49) I__I 1 i__1 1 0.49 1 1 2Χ10*4 1 | 0.65 ] 0.05 ' 1 3.3Ε-04 1 t U Q CN Vi «Λ CS ο 〇 ο m s i 大氣 | 5.97E+19 | 1 -20以下 1 比較例5 ITZO(In:Sn:Zn =36:15:49) _«6__] 1 __ 1 0.49 1 1 2x1ο*4 1 | 0.65 | «Λ 1 9.8Ε-02 1 1 U Q (N to «/*&gt; (N 300 1 5 ο § ! 大氣 1.17E+19 1 1 -20以下 1 比較例4 IGZO(In:Ga:Zn =20:20:10) | 0.40 1 1 0.40 ] t 1 0.20 1 1 2x1ο·4 1 | 0.65 | I t 1 9.8E-02 1 U IT) (N V) s fS ο cn | 0.92 I ο s | 大氣 [ 2.25E+17 1 〇 m 00 o 比較例3 IGZO(In:Ga:Zn =50:10:40) | 0.50 1 丨 o.io 1 1 1 0.40 1 1 2Χ10-4 1 | 0.65 | t S 1 1 3.9E-01 1 U &lt;N v&gt; s W) fS [ 300 1 1_2^9_1 1 300 1 § 大氣 | 4.70E+18 1 On -13.5 比較例2 IGZO(In:Ga:Zn =37:13:50) | 0.37 1 1 0.13 1 垂 1 0.50 1 1 2Χ10·4 1 | 0.65 | 1 1 1 2.0E-01 1 u Q IT) iN u-» CS ο ! 0.86 1 300 1 s | 大氣 [ 9.46E+17 | m fS «Λ Ο 00 o 比較例1 ITZO(In:Sn:Zn =36:15:49) | 0.36 1 _^_ 1 0.49 1 1 2x1ο*4 1 | 0.65 | 1 Ο 1 1 4.6E-01 1 〇 Q (N «η fN 1 300 1 1_M2_1 ο s | 大氣 | 9.07E+18 | VO m v〇 原子比 | [In]/全部金屬原子1 1 [Ga]/全部金屬原子1 | [Sn]/全部金屬原子1 1 [Zn]/全部金屬原子1 1 到達壓力[Pa] 1 | 濺鍍壓力[Pa] | ί [02]/([02]+[Αγ]) _[%3_ 1 水分壓[Pa] 1 1 氧分壓[Pa] 1 I 濺鍍方式 1 |功率密度[W/cm2] I | T-S 距離[cm] 1 棋厚[nm] 1 基板溫度[°c] | 1 磁場強度[高斯]| 成膜速度[nm/min] 1 退火溫度[°c] i 退火時間[min] I 環境 1 載子濃度[cnf3] | | 遷移率[cm2/Vs] 1 Vth[V] | S值[V/dec] I 靶材組成 濺鍍條件 退火 I TFT -31- 154091.doc 201142054 [表5] 比較例11 參考例1 參考例2 比較例12 靶材組成 原子比 ITZO(In:Sn:Zn -36:15:49) ITZO(In:Sn:Zn -36:15:49) ITZO(In:Sn:Zn =36:15:49) ITZO(In:Sn:Zn -36:15:49) [In]/全部金屬原子 0.36 0.36 0.36 0.36 [Ga]/全部金屬原子 - - - - [Sn]/全部金屬原子 0.15 0.15 0.15 0.15 [Zn]/全部金屬原子 0.49 0.49 0.49 0.49 濺鍍條件 到達壓力[Pa] 2x1ο·4 2χ1〇·4 2x1 O'4 2χ1〇·4 濺鑛壓力[Pa] 0.65 0.65 0.65 0.65 [H20]/([H20]+[Ar]) Γ%] - 1 1 - [〇2]/([〇2]+[Ar]) [%] 1 - - 70 水分壓[Pa] - 6.5Ε-03 6.5E-03 - 氧分壓[Pa] 6.5Ε-03 - - 4.6Ε-01 濺鍍方式 DC DC DC DC 功率密度[W/cm2] 2.5 2.5 2.5 2.5 T-S 距離[cm] 5 5 5 5 膜厚[nm] 50 50 50 70 基板溫度[°C] 25 25 25 25 磁場強度[向斯] 300 300 300 300 成膜速度[nm/min] 52 52 52 0.57 退火 退火溫度[°c] 300 180 300 300 退火時間[min] 3 60 3 60 環境 大氣 大氣 大氣 大氣 薄膜 載子濃度[enT3] 1.03E+20 5.63E+18 6.21E+18 2.08E+19 TFT 遷移率[cm2/Vs] - - - 麵 Vth[V] -20以下 -15 -16 -20以下 S 值[V/dec] - - - - 根據實施例及比較例之結果，將氧濃度或氫濃度與所獲 得之薄膜之載子濃度之關係示於圖4中。 實施例3 1 製作底閘極結構且頂接觸構成之場效電晶體。 將原子比In:Sn:Zn=36:15:49之ITZO濺鍍靶材安裝於DC 磁控濺鍍成膜裝置中進行濺鍍，於附有熱氧化膜（1〇〇 nm) 之矽基板上使半導體層（膜厚80 nm)成膜。 154091.doc -32· 201142054 錢鐘條件為：到達壓力為2xlG_4pa，濺鍍m力為〇65 ’分壓比[糊躺印㈣),m陶她]+ _=〇%，功㈣度為5_G WW，T_S距離為5啦，成膜 速度為95 nm/min。OS οοε 00 inch οοε 09 -+30006 86 9Ό 屮噼i^^^/tus】 屮噼 f^-^/[u2] [Bd]^哟? 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J-'p / A] lisls ~ [ Λ】ΜίΛ~ -29· 20 420 [ε&lt;] 1ΤΖΟ(Ι,·.^^ 11=36:15.竹;ι 0.36 1 * __ 1 0.49 1 1 2 test j | 0.65 1 ro 1 | 2.0E- 02 1 1 〇&lt;NV) g »n cs O r4 O m § l Atmosphere ι 丨 3.76E+17 I 〇〇ΓΟ &lt;N Example 29 ITZO(In:Sn:Z n=36:15:49) 0.36 1 I 0.15 1 0.49 1 2XUT4 1 i 0.65 1 1 | 2.0E-02 I t Q fS mg &lt;N om ΓΊ VJ o § 1 atmosphere ι | 3.76E+17 1 〇\ 〇(N 〇Example 28 | ITZO(In:Sn:Z n=36:15:49) 0.36 1 Taste:__I 1 0.49 1 1 2x1ο*4 1 1 0.65 1 m 1 | 2.0H-02 | 1 〇u-ϊ &lt;N g &lt; N | 300 I ri Vi | 300 1 § 1 Atmosphere 1 | 3.76E+17 I ο fN 〇 Example 27 | ITZO(In:Sn:Zn= 36:15:49) 0.36 1 i 0.15 1 0.49 1 1 2x1ο- 4 1 1 0.65 1 1 | 2.0E-02 | 1 UQ (S • Ti o &lt;N om (N o 1 atmosphere | 3.71E+17 丨 | 19.3 iri Example 26 | ITZO(In:Sn:Zn =36 :15:49) _ _I ' L_—_ι 1 0.49 1 1 2Χ10·4 1 1 0.65 1 m 1 | 2.0E-02 | 1 U irj &lt;N •λ o &lt;N o &lt;N g § I Atmosphere | | 3.66E+17 ! | 18.7 ! *n yrt Example 25 | ITZO(In:Sn:Zn =36:15:49) 0.36 I &gt; 0.15 I 0 49________I I 2Χ10-4 I 1 0.65 1 t I 2.0E-02 I 1 UQ (N s fN om &lt;NI 300 1 § I Atmospheric I 3.13E+17 I 16.8 〇Example 24 | j ITZO(In:Sn:Zn ! -36:15:49) L_—— —0.36 I 1 —— 0.15 I 1 0.49 1 I 2Χ10-4 I 1_0.65 1 m 1 I 2.0E-02 I 1 UV*) ίΝ o &lt;N y/~) o § 1 Atmosphere 1 1 3.02E+17 I 1 16.4 *n Example 23 | ITZO(In:Sn:Zn ι =36:15:49) ! 0.36 I 1 0.15 . — ! 1 0.49 1 1 2ΧΗΓ4 I 1 0.65 1 II 2.0E-02 , UQV) (N *Ti m fS I looo i &lt;N On 1 300 § | Atmospheric I 7.46E+17 I 11.9 in o Ό 〇 Example 22 | ITZO(In:Sn:Zn i =36:15:49) 0.36 I 1 0.15 I 1 0.49 II 2Χ10·4 I 1 0.65 1 I 6.5E-03 IUQ &lt;NV~is yn &lt;NI 300 I (S o (N § | Atmosphere 1 | 2.97E+17 I 14.7 Vi Example 21 I ITZO(In: Sn:Zn =36:15:49) 0.36 I ' 0.15 I 0.49 I 1 2x10'4 I 0.65 — • I 6.5E-03 I (N «η &lt;N om (N 〇I atmosphere 6.94E+17 00 κή oo o atomic ratio [In] / all metal atoms [Ga] / all metal atoms [Sn] / all metal atoms j : [Zn] / All metal atoms reach pressure [Pa] I 1 Sputter pressure [Pa] I [H20]/([H20]+[Ar]) [%] [〇J/([〇2]+[Ar]) [%] Moisture pressure [Pa] | Oxygen partial pressure pa] Sputtering method TS distance [cm] | Film thickness [nm] | Substrate temperature [°c] I | Magnetic field strength [Gauss] ι Film formation speed [nm/min] | Annealing temperature [°c] I | Annealing time [min] I Environment I Η' m 1 跻 grain 1 &gt; S value [V/dec] Target composition sputtering conditions Annealing conditions η -1 TFT element characteristics 1 -30 - 154091.doc 2 cc [inch &lt;] Compare 彳 ΙΤΖΟ (ΙΤΖΟη^ιι.〇I n=36:15:49) 0.36 1 0.15 0.49 2χ\0Α 0.65 1 Ο 1 1 4.6Ε-01 1 UQ «ο &lt;N o &lt;s O 0.57 〇m | Atmospheric I 1.12E+19 I 1 -20 or less cs o Comparative Example 9 ITZO(In:Sn: Zn=36:15:49) 1 0.36 1 1 1 0.15 1 1 0.49 1 2χ1〇-4 0.65 1 Ο 1 丨4.6Ε-01 1 〇»〇&lt;NO fS 300 1 L 0-57 a 1 ο i Atmosphere I 1.05E+19 I 1 -20 or less 1 Comparative Example 8 ITZO( In:Sn: Zn=36:15:49) L—0.36 I 1 1 0.15 1 1 0.49 1 1 2χ1〇4 1 | 0.65 1 1 Ο _ 1 4.6E-01 1 u Q «Λ (N o ΓΟ (N 300 丨0.57 | ο m 1 atmosphere | 8.83E+18 | rn m Rs Comparative Example 7 ITZO(In;Sn;Zn= 36:15:49) 1_0^6_! 1 1__j 1 0.49 1 1 2x1ο*4 1 | 0.65 | t Ο 1 1 4.6E-01 1 o QW) (N &lt ;N 1 300 1 1__1 ο 沄m Atmosphere " 8.07E+18 | !__1 o Comparative Example 6 ITZO(In:Sn;Zn -36:15:49) I__I 1 i__1 1 0.49 1 1 2Χ10*4 1 | 0.65 ] 0.05 ' 1 3.3Ε-04 1 t UQ CN Vi «Λ CS ο 〇ο msi Atmosphere | 5.97E+19 | 1 -20 or less 1 Comparative Example 5 ITZO(In:Sn:Zn =36:15:49) _« 6__] 1 __ 1 0.49 1 1 2x1ο*4 1 | 0.65 | «Λ 1 9.8Ε-02 1 1 UQ (N to «/*&gt; (N 300 1 5 ο § ! Atmosphere 1.17E+19 1 1 -20 The following 1 Comparative Example 4 IGZO (In:Ga:Zn =20:20:10) | 0.40 1 1 0.40 ] t 1 0.20 1 1 2x1ο·4 1 | 0.65 | I t 1 9.8E-02 1 U IT) (NV s fS ο cn | 0.92 I ο s | Atmosphere [ 2.25E+17 1 〇m 00 o Comparative Example 3 IGZO(In:Ga:Zn =50:10:40) | 0.50 1 丨o.io 1 1 1 0.40 1 1 2Χ10-4 1 | 0.65 | t S 1 1 3.9E-01 1 U &lt;N v&gt; s W) fS [ 300 1 1_2^9_1 1 300 1 § Atmosphere | 4.70E+18 1 O n -13.5 Comparative Example 2 IGZO (In:Ga:Zn =37:13:50) | 0.37 1 1 0.13 1 垂1 0.50 1 1 2Χ10·4 1 | 0.65 | 1 1 1 2.0E-01 1 u Q IT) iN u-» CS ο ! 0.86 1 300 1 s | Atmosphere [ 9.46E+17 | m fS «Λ Ο 00 o Comparative Example 1 ITZO(In:Sn:Zn =36:15:49) | 0.36 1 _^_ 1 0.49 1 1 2x1ο*4 1 | 0.65 | 1 Ο 1 1 4.6E-01 1 〇Q (N «η fN 1 300 1 1_M2_1 ο s | Atmosphere | 9.07E+18 | VO mv〇 atomic ratio | [In] /All metal atoms 1 1 [Ga]/All metal atoms 1 | [Sn]/All metal atoms 1 1 [Zn]/All metal atoms 1 1 Arrival pressure [Pa] 1 | Sputtering pressure [Pa] | ί [02 ]/([02]+[Αγ]) _[%3_ 1 Moisture pressure [Pa] 1 1 Oxygen partial pressure [Pa] 1 I Sputtering method 1 | Power density [W/cm2] I | TS Distance [cm] 1 Chess thickness [nm] 1 Substrate temperature [°c] | 1 Magnetic field strength [Gauss]| Film formation speed [nm/min] 1 Annealing temperature [°c] i Annealing time [min] I Environment 1 Carrier concentration [cnf3 Mobility [cm2/Vs] 1 Vth[V] | S value [V/dec] I Target composition sputtering condition annealing I TFT -31- 154091.doc 201142054 [Table 5] Comparative Example 11 Reference Example 1 Reference Example 2 Comparative Example 12 Target composition atomic ratio ITZO (In: Sn:Zn -36:15:49) ITZO(In:Sn:Zn -36:15:49) ITZO(In:Sn:Zn =36:15:49) ITZO(In:Sn:Zn -36:15: 49) [In] / all metal atoms 0.36 0.36 0.36 0.36 [Ga] / all metal atoms - - - - [Sn] / all metal atoms 0.15 0.15 0.15 0.15 [Zn] / all metal atoms 0.49 0.49 0.49 0.49 Spilling conditions arrived Pressure [Pa] 2x1ο·4 2χ1〇·4 2x1 O'4 2χ1〇·4 Splashing pressure [Pa] 0.65 0.65 0.65 0.65 [H20]/([H20]+[Ar]) Γ%] - 1 1 - [ 〇2]/([〇2]+[Ar]) [%] 1 - - 70 Moisture pressure [Pa] - 6.5Ε-03 6.5E-03 - Oxygen partial pressure [Pa] 6.5Ε-03 - - 4.6Ε -01 Sputtering method DC DC DC DC Power density [W/cm2] 2.5 2.5 2.5 2.5 TS Distance [cm] 5 5 5 5 Film thickness [nm] 50 50 50 70 Substrate temperature [°C] 25 25 25 25 Magnetic field strength [Zhesi] 300 300 300 300 Film formation speed [nm/min] 52 52 52 0.57 Annealing annealing temperature [°c] 300 180 300 300 Annealing time [min] 3 60 3 60 Ambient atmosphere atmospheric atmospheric film carrier concentration [ enT3] 1.03E+20 5.63E+18 6.21E+18 2.08E+19 TFT mobility [cm2/Vs] - - - Surface Vth[V] -20 or less -15 -16 -20 or less S value [V/dec ] - - - - According to the implementation And the results of Comparative Example, the relationship of the carrier film to give the oxygen concentration or the hydrogen concentration and the concentrations obtained are shown in FIG. 4. Example 3 1 A field effect transistor composed of a bottom gate structure and a top contact was formed. The ITZO sputtering target having an atomic ratio of In:Sn:Zn=36:15:49 is mounted in a DC magnetron sputtering film forming apparatus for sputtering on a germanium substrate with a thermal oxide film (1 nm) The semiconductor layer (film thickness: 80 nm) was formed into a film. 154091.doc -32· 201142054 The money clock condition is: the arrival pressure is 2xlG_4pa, the sputtering m force is 〇65 'partial pressure ratio [paste lying (four)), m Tao her]+ _=〇%, work (four) degree is 5_G WW, T_S distance is 5, and the film formation speed is 95 nm/min.

對所獲得之半導體層進行光微影飯刻，構成半導體區域 (所謂之島），於大氣下以綱。c進行1小時熱處理。形成光 阻膜後’利用DC減鐘形Mi/Au/Ti之積層金屬膜，藉由剝 離使其圖案化而分別形成源極電極及汲極電極。其後，於 大氣下以3 0 0 C進行1小時熱處理。 其次，藉&amp;電聚CVD以Si〇jSiNx之順序成膜，分別形 成第1保護層、第2保護層。形成接觸孔，而與外部配線連 接。其後，於大氣下以3〇〇它進行1小時熱處理，製造 W=20 μπι及L=20 μηι，以8丨基板作為閘極電極之底間極構 成且頂接觸構成之場效型電晶體。 評價所獲得之場效型電晶體之特性。 其結果’場效遷移率為21 cm2/Vs，開關比為1〇8以上， 臨界電壓為0.3 V ’ S值為0.2 V/decade。 上述評價係使用半導體參數分析儀（keithley 42〇〇)，於 大氣壓之乾燥氮氣環境下、室溫、遮光環境下進行評價。 比較例13 除將半導體層成膜時之水蒸氣分壓及氧分壓分別設為分 壓比[H2O]/([H2〇] + [Ar])=0%、分壓比[〇2]/a〇2] + [Ar])= 10。/。以外’與實施例3 1同樣地製造場效型電晶體並進行評 價。 154091.doc -33- 201142054 其結果，所獲得之場效型電晶體為臨界電壓為_2〇 V以 下之常開狀態。確認於氧分壓控制下難以製作通道層為80 nm之薄膜電晶體。 實施例32 除源極電極及汲極電極使用Mo，用填酸系濕式蚀刻液 對通道層上之Mo電極進行濕式蝕刻，藉此製造通道餘刻 型之底閘極構成且頂接觸構成之場效型電晶體以外，與實 施例3 1同樣地製作場效型電晶體並進行評價。 其結果’所獲得之場效型電晶體之場效遷移率為i 9 cm2/Vs，開關比為ι〇8以上’臨界電壓為〇 3 v，s值為〇 2 V/decade 。 實施例33 於室溫下在玻璃基板上進行即濺鍍，而將鉬金屬積層 200 nm後’以乾式蝕刻使其圖案化而製作閘極電極。蝕刻 後閘極電極成為正錐形。於積層有閘極電極之基板上，藉 由電漿辅助化學氣相沈積裝置（PECVD)以SiNx、Si02之順 序成膜’將積層膜作為閘極絕緣膜。 將與實施例31相同之濺鍍靶材安裝於dc磁控濺鍍成膜 裝置中’以與實施例3丨相同之條件進行濺鍍，而於閘極絕 緣膜上形成半導體層（膜厚8〇 nm)。其後，以3〇(rc進行 時熱處理。 藉由PECVD使Si〇x成膜，形成si〇x薄膜。繼而，形成光 阻膜而進行圖案化。以乾式蝕刻（RIE(Reactive !⑽ Etching，反應性離子蝕刻使薄膜圖案化而形成第丨保護 154091.doc -34- 201142054The obtained semiconductor layer is subjected to photolithography to form a semiconductor region (so-called island), which is under the atmosphere. c was heat treated for 1 hour. After the formation of the photoresist film, the laminated metal film of the reduced-shape Mi/Au/Ti by DC is patterned by peeling to form the source electrode and the drain electrode, respectively. Thereafter, heat treatment was performed at 300 ° C for 1 hour under the atmosphere. Next, a film is formed by the electro-chemical CVD in the order of Si〇jSiNx, and the first protective layer and the second protective layer are formed, respectively. A contact hole is formed to be connected to the external wiring. Thereafter, it was heat-treated at 3 Torr for 1 hour in the atmosphere to produce W=20 μm and L=20 μηι, and the 8-inch substrate was used as the bottom electrode of the gate electrode and the top-effect contact was formed. . The characteristics of the field effect type transistor obtained were evaluated. As a result, the field effect mobility was 21 cm 2 /Vs, the switching ratio was 1 〇 8 or more, and the threshold voltage was 0.3 V ′ S value was 0.2 V/decade. The above evaluation was carried out using a semiconductor parameter analyzer (keithley 42®) under a dry nitrogen atmosphere at atmospheric pressure, at room temperature, and in a light-shielded environment. Comparative Example 13 The water vapor partial pressure and the oxygen partial pressure at the time of film formation of the semiconductor layer were respectively set to a partial pressure ratio [H2O] / ([H2 〇] + [Ar]) = 0%, and a partial pressure ratio [〇 2] /a〇2] + [Ar])= 10. /. In the same manner as in Example 31, a field effect transistor was produced and evaluated. 154091.doc -33- 201142054 As a result, the field-effect transistor obtained has a normally open state with a threshold voltage of _2 〇 V or less. It was confirmed that it is difficult to form a thin film transistor having a channel layer of 80 nm under the control of oxygen partial pressure. [Example 32] In place of the source electrode and the drain electrode, Mo was used, and the Mo electrode on the channel layer was wet-etched with an acid-based wet etching solution, thereby fabricating a channel-type bottom gate structure and a top contact structure. A field effect transistor was produced and evaluated in the same manner as in Example 31 except for the field effect transistor. As a result, the field effect mobility of the field effect type transistor obtained was i 9 cm 2 /Vs, and the switching ratio was ι 8 or more. The threshold voltage was 〇 3 v, and the s value was 〇 2 V/decade . Example 33 A gate electrode was formed by performing sputtering on a glass substrate at room temperature, and depositing a molybdenum metal layer 200 nm later by patterning by dry etching. After etching, the gate electrode becomes a forward taper. On the substrate on which the gate electrode is laminated, a film is formed as a gate insulating film by a plasma-assisted chemical vapor deposition apparatus (PECVD) in the order of SiNx and SiO2. The same sputtering target as in Example 31 was mounted in a dc magnetron sputtering film forming apparatus to perform sputtering under the same conditions as in Example 3, and a semiconductor layer was formed on the gate insulating film (film thickness 8). 〇nm). Thereafter, heat treatment was performed at 3 Å (rc). Si〇x was formed into a film by PECVD to form a Si〇x film. Then, a photoresist film was formed and patterned. Dry etching (RIE (Reactive! (10) Etching, Reactive ion etching patterns the film to form a third protection 154091.doc -34- 201142054

SiNx:H)使SiNx成膜而作為第2保護層。形成接觸孔，而與 於大氣下以300。(：進行1小時熱處 -〇 μπι之底閘極結構之姓刻終止層 外部配線連接。其後，於 理’製造W=20 μιη、L=20 型場效型電晶體。 與實施例3 1同樣地對所獲得之場效型電晶體進行評價 開關比為1〇8以上，SiNx: H) SiNx is formed into a film to serve as a second protective layer. A contact hole is formed, and is 300 in the atmosphere. (: 1 hour heat - 〇μπι bottom gate structure of the last inscribed layer external wiring connection. Thereafter, Yu Li 'manufactured W = 20 μιη, L = 20 type field effect transistor. And Example 3 1 Similarly, the obtained field-effect type transistor is evaluated to have a switching ratio of 1 〇 8 or more.

其結果，場效遷移率為18 cm2/V 臨界電壓為0·3 V，S值為0.2 V/decade。 實施例34 使用圖1之成膜裝置’不對寬度為1100mm，長度為125〇 mm，厚度為〇·7 mm之玻璃基板加熱，而以表6之條件進行 濺鍍。 此處，使用In:Sn:Zn(原子比）=36:15:49 ’寬度為2〇〇 〇 mm，長度為1700 mm，厚度為10 mm之6個靶材l〇〇a〜 10〇f，將各靶材100a〜l〇〇f配置為與基板之寬度方向平行， 且乾材間之距離為2 mm。將磁場形成機構2〇〇a〜2〇〇f之寬 度設為與靶材100a〜100f相同之2〇〇 nm。 '自氣體供給系統將濺鍍氣體之Ar與HsO分別以99:1之流 量比導入至系統内。此時之成膜環境為0.5 Pa。將交流電 源之功率設為3 W/cm2(=10.2 kW/3400 cm2)，頻率設為10 kHz。 以上述之條件進行8秒成膜’測定所獲得之ITZ〇之膜 154091.doc -35- 201142054 厚，結果為15 nm。成膜速度為112 5 nm/min之高速，適合 量產。 又，將如此獲得之附有ITZ〇之玻璃基板放入至電爐 中，於空耽中、400。(：、1 5分鐘之條件進行熱處理後，切 割成1 cm2之尺寸，利用4探針法進行霍耳量測。其結果， 載子濃度為2.5\1〇16(：111-3，確認半導體化充分。 實施例35〜實施例39 除將靶材組成與濺鍍條件變更為如表6所示以外，與實 施例34同樣地獲得半導體薄膜。又，與實施例则樣地進 β熱處理I it 4霍耳量測’確認該半導體薄膜全部半導 體化。 另外’於實施例38之㈣中，為提㈣藥品性及降低把 材電阻，係'將實施例10之211令之i討％替換成Sn。 比較例14 除將濺鑛條件變—兔β _ 變更為如表6所示以外，與實施例34同樣 地獲得半導體薄膜。導演 導入虱體中不使用水，而導入氬與氧 使謂成膜。霍耳量測之結果，載子濃度為2·5χΐ〇ΐ7 —， ，半導，化’但成膜速率為較慢之。認為對於 量產而言，該成膜速率尚存在問題。 比較例15 至20 W/cm2而進行高速 nm/min。然而，載子濃 於比杈例14中，使輸出功率增加 成膜。藉此，成膜速率上升為90 度為7.5x10ucm-3，未半導體化。 比較例16 154091.doc • 36 - 201142054 除將濺鍍條件變更為如表6所示以外， 地獲得半導體薄膜。載子濃度為5.5X101' 化0 與比較例14同樣 cnT3，未半導體As a result, the field effect mobility was 18 cm2/V, the threshold voltage was 0·3 V, and the S value was 0.2 V/decade. Example 34 Using the film forming apparatus of Fig. 1 , a glass substrate having a width of 1,100 mm, a length of 125 mm, and a thickness of 〇·7 mm was not heated, and sputtering was carried out under the conditions of Table 6. Here, use In:Sn:Zn (atomic ratio) = 36:15:49 '6 targets with a width of 2 mm, a length of 1700 mm, and a thickness of 10 mm l〇〇a~ 10〇f The targets 100a to 100f are arranged in parallel with the width direction of the substrate, and the distance between the dry materials is 2 mm. The width of the magnetic field forming mechanisms 2aa to 2〇〇f is set to be 2 〇〇 nm which is the same as the targets 100a to 100f. From the gas supply system, Ar and HsO of the sputtering gas were introduced into the system at a flow ratio of 99:1. The film formation environment at this time was 0.5 Pa. Set the AC power to 3 W/cm2 (=10.2 kW/3400 cm2) and the frequency to 10 kHz. The film of the ITZ film obtained by the measurement under the above conditions was measured to be 154091.doc -35 - 201142054 thick, and the result was 15 nm. The film formation speed is 112 5 nm/min, which is suitable for mass production. Further, the thus obtained glass substrate with ITZ crucible was placed in an electric furnace in an open space of 400. (:, after heat treatment for 15 minutes, cut into a size of 1 cm2, and measure the Hall by the 4-probe method. As a result, the carrier concentration was 2.5\1〇16 (:111-3, confirming the semiconductor Example 35 to Example 39 A semiconductor thin film was obtained in the same manner as in Example 34 except that the target composition and the sputtering conditions were changed as shown in Table 6. Further, the example was subjected to the β heat treatment I. It 4 Hall measurement 'confirmed that the semiconductor film was fully semiconductorized. In addition, in (4) of Example 38, in order to improve (4) the chemical properties and reduce the resistance of the material, the 211 of Example 10 was replaced by Comparative Example 14 A semiconductor thin film was obtained in the same manner as in Example 34 except that the sputtering condition was changed to the rabbit β _ as shown in Table 6. The director introduced the hydrazine and introduced argon and oxygen without using water. Membrane formation. The results of Hall measurement, the carrier concentration is 2·5χΐ〇ΐ7 —, , semi-conducting, but the film formation rate is slower. It is considered that for mass production, the film formation rate still exists. Problem. Comparative Example 15 to 20 W/cm2 and high speed nm/min. However, the carrier was thick. In Comparative Example 14, the output power was increased to form a film, whereby the film formation rate was increased to 90 degrees to 7.5 x 10 ucm -3, which was not semiconductorized. Comparative Example 16 154091.doc • 36 - 201142054 In addition to changing the sputtering condition to A semiconductor thin film was obtained as shown in Table 6. The carrier concentration was 5.5×101′, which was the same as that of Comparative Example 14, cnT3, and no semiconductor.

154091.doc -37- 201142054 比較例16 1 ιτζο Π In:Sn:Zn= 36:15:49 200x1700x10 1.0Ε-04 fN 〇 OS o «ο 1 0.0Ε+00 1 __Ί s ο wo 1 400t&gt;15 分鐘 ^ 5.5Ε+19 i χ(載子濃度大）I 比較例15 ； Γ ιτζο 1 ln:Sn:Zn= 36:15:49 200x1700x10 SO 1.0Ε-04 CN 〇 o Ο Γ 0.0Ε+00 1 Γ_l〇k__I 沄 § Γ^〇〇0〇15分鐘] 7.5Ε+18 «Λ ΓΛ 1 χ(載子濃度大）| 比較例14 [ ΓΓΖΟ 1 In:Sn:Zn= 36:15:49 | 200x1700x10 Ό 1.0E-04 o ο i 0.0Ε+00 1 1 10k ] '«O % 1 400°〇15分鐘] 2.5Ε+17 Ό (S χ(成膜速度較慢）1 實施例39 | IGZO 1 ln:Ga:Zn= 45:20:35 200x1700x10 '«Ο 1.0E-04 寸 »〇 ο 1 2.0Ε-01 1 「50k ] s ο o 〇 1 400°015分鐘 Π 6.0Ε+17 00 &lt;Ν 〇 實施例38 [IGZO+Sn 1 In:Ga:Zn:Sn= 50:10:39:1 200x1700x10 VO 1.0E-04 ON ο 1 2.0Ε-01 1 1 50k I VO ο g 1 400°C&gt;&lt;15分鐘 | 2.0Ε+17 OO cs 〇 實施例37 1 IZHfO 1 In:Zn:Hf- 45:45:10 200x1700x10 ν〇 1.0E-04 (N V) OS ο Γ 1.0Ε-01 ] 1 500 k | o S 1 400t&gt;15分鐘 | | 4.5Ε+16 σ\ 〇 實施例36 1 IZZO 1 In:Zn:Zr= 45:45:10 200x1700x10 Ό 1.0E-04 — o ON — ο 1 l.DE-02 1 | 20 k | 寸 V&quot;! g 1 400°〇15 分鐘 | 7.5Ε+16 (N fN 〇 實施例35 1 IGZO 1 In:Ga:Zn= 37:13:50 200x1700x10 Ό 1.0E-04 〇 § o ο 1 6.0Ε-02 J S Ο § 40(Γ〇15 分鐘 | 1.2Ε+17 1_ &lt;N 〇 | 實施例34 1 ΙΤΖΟ J In:Sn:Zn= 36:15:49 200x1700x10 'Ό 1.0E-04 o 〇\ — ο 1 5.0Ε-03 1 10k_ 」 Vi oo 112.5 ;400°〇15 分鐘 | 2.5Ε+16 〇 1 把材組成(at%) ί 1 靶材使用個數 1 到達壓力(Pa) 濺鍍壓力(Pa) 導入氣體Ar(%) 導入氣體压0(%) 1 導入氣體〇2(%) I 水分壓(Pa) AC頻率(Hz) S 脊 1 膜厚(nm) I 成膜時間⑻ 速率(nm/min) 大氣退火條件 平均載子濃度(cm， s 染 m 評價 -38-154091.doc -37- 201142054 Comparative Example 16 1 ιτζο Π In:Sn:Zn= 36:15:49 200x1700x10 1.0Ε-04 fN 〇OS o «ο 1 0.0Ε+00 1 __Ί s ο wo 1 400t&gt;15 minutes ^ 5.5Ε+19 i χ (large carrier concentration) I Comparative Example 15; Γ ιτζο 1 ln:Sn:Zn= 36:15:49 200x1700x10 SO 1.0Ε-04 CN 〇o Ο Γ 0.0Ε+00 1 Γ_l〇 k__I 沄§ Γ^〇〇0〇15 minutes] 7.5Ε+18 «Λ χ 1 χ (large carrier concentration) | Comparative Example 14 [ ΓΓΖΟ 1 In:Sn:Zn= 36:15:49 | 200x1700x10 Ό 1.0E -04 o ο i 0.0Ε+00 1 1 10k ] '«O % 1 400°〇15 minutes] 2.5Ε+17 Ό (S χ (slow film formation speed) 1 Example 39 | IGZO 1 ln:Ga: Zn= 45:20:35 200x1700x10 '«Ο 1.0E-04 inch»〇ο 1 2.0Ε-01 1 "50k ] s ο o 〇1 400°015 minutes Π 6.0Ε+17 00 &lt;Ν 〇Example 38 [IGZO+Sn 1 In:Ga:Zn:Sn= 50:10:39:1 200x1700x10 VO 1.0E-04 ON ο 1 2.0Ε-01 1 1 50k I VO ο g 1 400°C&gt;&lt;15 minutes| 2.0Ε+17 OO cs 〇Example 37 1 IZHfO 1 In:Zn:Hf- 45:45:10 200x1700x10 ν〇1.0E-04 (NV) OS ο Γ 1.0Ε-01 ] 1 500 k | o S 1 400t&gt ;15 minutes| | 4. 5Ε+16 σ\ 〇Example 36 1 IZZO 1 In:Zn:Zr= 45:45:10 200x1700x10 Ό 1.0E-04 — o ON — ο 1 l.DE-02 1 | 20 k | inch V&quot;! g 1 400°〇15 minutes | 7.5Ε+16 (N fN 〇Example 35 1 IGZO 1 In:Ga:Zn= 37:13:50 200x1700x10 Ό 1.0E-04 〇§ o ο 1 6.0Ε-02 JS Ο § 40 (Γ〇15 minutes| 1.2Ε+17 1_ &lt;N 〇| Example 34 1 ΙΤΖΟ J In:Sn:Zn= 36:15:49 200x1700x10 'Ό 1.0E-04 o 〇\ — ο 1 5.0Ε- 03 1 10k_ ” Vi oo 112.5 ;400°〇15 minutes | 2.5Ε+16 〇1 Composition of the material (at%) ί 1 Number of targets used 1 Pressure reached (Pa) Sputter pressure (Pa) Introduced gas Ar ( %) Inlet gas pressure 0 (%) 1 Induced gas 〇 2 (%) I Moisture pressure (Pa) AC frequency (Hz) S Ridge 1 Film thickness (nm) I Film formation time (8) Rate (nm/min) Atmospheric annealing conditions Average carrier concentration (cm, s dyed m evaluation -38-

154091.doc 201142054 實施例40〜46 於磁控濺鍍裝置中，安裝具有表7所示之靶材組成之2英 吋之靶材，且分別安裝厚度為100 nm之附有熱氧化膜之矽 晶圓作為基板A1，及載玻片（Corning公司製造之#1737)作 為基板B1。 , 將基板搬送至腔室内後，達到規定之到達壓力後，導入 表7所示分壓比之Ar氣體及H20氣體，以表7所示之濺鍍條 件，分別於基板A1及基板B1上形成膜厚為50 nm之非晶質 〇 膜。 將所獲得之薄膜以表7所示之退火條件於烘箱中進行退 火處理，獲得積層於基板A1及基板B1上之氧化物半導 體。 將具備加熱處理後之氧化物半導體之基板B 1切割為1 cm2，於四角安裝Au電極。藉由銀漿將Au電極與銅線黏接 而作為霍爾效應測定用元件B 1，評價載子濃度。將結果示 於表7中。 〇 再者，載子濃度之測定係藉由於室溫下使用ResiTest 8300型（TOYO Corporation製造）進行霍爾效應測定而求得 • 載子濃度。 ，將具備加熱處理後之氧化物半導體之基板A1再次安裝於 2英吋陰極之磁控濺鍍裝置中，於陰極上安裝Au靶材，使 用專用之金屬掩模，以W/L=1000/200 μιη之方式成膜Au電 極，藉此製造TFT元件A1。 將所獲得之TFT元件A1設置於keithley 4200SCS中，以 154091.doc -39- 201142054 汲極電壓Vds=l〇 V及閘極電壓Vgs== ^ 2 〇 〜2 〇 導特性。將結果示於表7中。 條件評價傳 實施例47〜51 使用具有表8所示之靶材組成之把材 壓比之Ar氣體及H2〇氣體，以表 導入表8所示之分 双δ所不之條件進行非晶 膜之成膜及退火處理，除此以外靼 ’丨兴貫施例40〜46同樣地製 造氧化物半導體，且與實施例4〇〜46同樣地製造霍爾效應 測定用元件Β 1而評價載子濃度，以及製造tft元件a 1而評 價傳導特性。將結果示於表8中。 154091.doc 40- 201142054154091.doc 201142054 Embodiments 40 to 46 In a magnetron sputtering apparatus, a target of 2 inches having a target composition shown in Table 7 was mounted, and a thermal oxide film with a thickness of 100 nm was attached, respectively. The wafer was used as the substrate A1, and a slide glass (#1737 manufactured by Corning Corporation) was used as the substrate B1. After the substrate is transferred into the chamber and the predetermined reaching pressure is reached, the Ar gas and H20 gas having the partial pressure ratios shown in Table 7 are introduced, and are formed on the substrate A1 and the substrate B1 under the sputtering conditions shown in Table 7, respectively. An amorphous ruthenium film with a film thickness of 50 nm. The obtained film was annealed in an oven under the annealing conditions shown in Table 7, and an oxide semiconductor laminated on the substrate A1 and the substrate B1 was obtained. The substrate B 1 having the heat-treated oxide semiconductor was cut into 1 cm 2 , and an Au electrode was attached to the four corners. The Au electrode and the copper wire were bonded by a silver paste to evaluate the carrier concentration as the Hall effect measuring element B1. The results are shown in Table 7. Further, the carrier concentration was determined by measuring the Hall effect by using a ResiTest Model 8300 (manufactured by TOYO Corporation) at room temperature. The substrate A1 having the heat-treated oxide semiconductor is again mounted on a 2 inch cathode magnetron sputtering apparatus, and an Au target is mounted on the cathode, and a dedicated metal mask is used, and W/L=1000/ The Au electrode was formed in a manner of 200 μm, whereby the TFT element A1 was fabricated. The obtained TFT element A1 was set in the keithley 4200SCS to have a drain voltage Vds = l 〇 V and a gate voltage Vgs == ^ 2 〇 〜 2 〇 特性 characteristics of 154091.doc -39 - 201142054. The results are shown in Table 7. Conditions Evaluation Transfer Examples 47 to 51 Using an Ar gas and a H 2 〇 gas having a target pressure ratio of the target composition shown in Table 8, the amorphous film was subjected to the conditions shown in Table 8 as shown in Table 8. The oxide semiconductor was produced in the same manner as in the above-described examples 40 to 46, and the Hall effect measuring element Β 1 was produced in the same manner as in Examples 4 to 46, and the carrier was evaluated. The conductivity, as well as the manufacture of the tft element a 1 , evaluated the conduction characteristics. The results are shown in Table 8. 154091.doc 40- 201142054

o Q 【卜嵴】 154091.doc 實施例46 ITZO(In:Sn:Zn= 49:15:37) α； 卜 2χ1〇·4 0.65 1 2.0E-02 1 u P 寸 卜· CN 300 300 s 大氣 9.67E+17 28.7 -0.5 I — 實施例45 IGZO(In:Ga:Zn= 70:10:20) ο 〇 'S' X &lt;N 0.65 | m 1 2.0E-02 1 u Q \n CN •η cs 300 μ 300 s 大氣 9.86E+17 1 33.5 CN 實施例44 IGZO(In:Ga:Zn= 60:20:20) 2χ1 (T4 0.65 1 6.5E-03 1 U Q (N m CN 300 «〇 fN ! 300 s 大氣 9.59E+17 31.9 〇 實施例43 IGZO(In:Ga:Zn= 50.0:16.7:33.3) 50.0 16.7 33.3 2x1ο·4 0.65 1 6.5E-03 1 U Q &lt;N •ο »r&gt; &lt;N o ro Ο 300 s 大氣 5.67E+17 16.9 -0.5 | &lt;N 實施例42 ITZO(In:Sn:Zn= 36.0:33.2:30.7) 36.0 33.2 30.7 2χ1〇·4 0.65 ! 1 6.5E-03 1 U Q CN 300 CO ΓΛ 300 s 大氣 1.21E+17 11.3 實施例41 ITZO(In:Sn:Zn= 75:15:10) jn 〇 2ΧΗΤ4 0.65 cn 1 2.0E-02 1 U Q in (N fS o CO m tn 300 § 大氣 9.78E+17 33.2 -0.5 | 實施例40 ITZOilniSniZn^ 33.7:23.3:43.1) 33.7 23.3 2x1ο·4 _I 0.65 t 6.5E-03 1 U Q »n &lt;N &lt;N 300 300 § 大氣 1.73E+17 13.4 原子比 [In]/全部金屬原子 [Ga]/全部金屬原子 [Sn]/全部金屬原子 [Zn]/全部金屬原子 到達壓力[Pa] 濺鍍壓力[Pa] [H20]/([H20]+[Ar]) _m_ [〇2]/([〇d+[Ar]) Γ%1 水分壓[Pa] 氧分壓[Pa] 濺鍍方式 锲 T-S 距離[cm] :膜厚[nm] 基板溫度[°c] 磁場強度[南斯] 成度[nm/min] 退火溫度[°c] 退火時間[min] 環境 cf1 &gt; JZ &gt; S 值[V/dec] 靶材組成 _1 濺鍍條件 退火條件 被 TFT元件特性 •41- 201142054 [表8] 實施例47 實施例48 實施例49 實施例50 實施例51 原子比 ITZO(In:Sn:Zn= 20:40:40) ITZO(In:Sn:Zn- 20:20:60) IGZO(In:Ga:Zn= 45:20:35) IGZO(In:Ga:Zn= 50:30:20) ITZO(In:Sn:Zn= 20:60:20) 把材組成 [In]/全部金屬原子 20 20 45 50 20 [Ga]/全部金屬原子 20 30 [Sn]/全部金屬原子 40 20 60 [Zn]/全部金屬原子 40 60 35 20 20 到達壓力[Pa] 2χ10-4 2^10-4 2χ1 O'4 2χ1〇·4 2x1ο·4 濺鍍壓力[Pa] 0.65 0.65 0.65 0.65 0.65 [Η20]/([Η20]+[Αι]) f%1 1 1 1 3 1 [02]/([02]+[Ar]) r%i - - - - - 水分壓[Pa] 6.5E-03 6.5E-03 6.5Ε-03 2.0Ε-02 6.5Ε-03 濺鍍條件 氧分壓[Pa] - - - - - 濺鍍方式 DC DC DC DC DC 功率密度[W/cm2] 2.5 2.5 2.5 2.5 2.5 T-S 距離[cm] 5 5 5 5 5 I 膜厚[nm] 50 50 50 50 50 基板溫度rc] 25 25 25 25 25 磁場強度[高斯] 300 300 300 300 300 成膜速度[nm/min] 49 36 28 39 24 退火溫度[°c] 300 300 300 300 300 退火條件 退火時間[min] 60 60 60 60 60 環境 大氣 大氣 大氣 大氣 大氣 薄膜 載子濃度[cm_3] 9.97E+16 8.79E+16 2.13E+17 3.11E+17 9.24E+16 TFT 元件特性 遷移率[cm2/Vs] 7.1 8.2 9.7 9.3 1.2 VthrVl 2 1.5 -0.5 3 1 S 值[V/dec] 1.2 1.2 1.2 1.1 1 產業上之可利用性 藉由本發明之氧化物半導體之製造方法而獲得之氧化物 半導體，可作為薄膜電晶體等場效型電晶體之半導體薄膜 而廣泛利用。 上述中詳細地說明了本發明之幾種實施形態及/或實施 例，但業者可於實質上不脫離本發明之新穎之指示及效果 之情況下，對該等作為示例之實施形態及/或實施例進行 多種變更。因此，該等多種變更係包含於本發明之範圍 内。 本說明書所記載之文獻之内容全部援用於本文中。 -42- 154091.doc 201142054 【圖式簡單說明】 圖1係表示滅鑛裝置之— 夏心例之要部的圖； 圖2係表不包含本發明+ $ 月之乳化物半導體之薄膜電晶體之 一實施形態的概略剖面圖； 圖3係包含本發明之A # 乳化物+導體之薄膜電晶體之其他 實施形態的概略剖面圖；及 圖4係表不氧濃度或氫濃度與所獲得的薄膜之載子濃度 之關係的圖。o Q [卜嵴] 154091.doc Example 46 ITZO(In:Sn:Zn= 49:15:37) α; Bu 2χ1〇·4 0.65 1 2.0E-02 1 u P Inch · CN 300 300 s Atmosphere 9.67E+17 28.7 -0.5 I - Example 45 IGZO(In:Ga:Zn= 70:10:20) ο 〇'S' X &lt;N 0.65 | m 1 2.0E-02 1 u Q \n CN •η Cs 300 μ 300 s atmosphere 9.86E+17 1 33.5 CN Example 44 IGZO (In:Ga:Zn= 60:20:20) 2χ1 (T4 0.65 1 6.5E-03 1 UQ (N m CN 300 «〇fN ! 300 s atmosphere 9.59E+17 31.9 〇 Example 43 IGZO (In:Ga:Zn= 50.0:16.7:33.3) 50.0 16.7 33.3 2x1ο·4 0.65 1 6.5E-03 1 UQ &lt;N •ο »r&gt;&lt; N o ro Ο 300 s atmosphere 5.67E+17 16.9 -0.5 | &lt;N Example 42 ITZO(In:Sn:Zn= 36.0:33.2:30.7) 36.0 33.2 30.7 2χ1〇·4 0.65 ! 1 6.5E-03 1 UQ CN 300 CO ΓΛ 300 s Atmosphere 1.21E+17 11.3 Example 41 ITZO(In:Sn:Zn= 75:15:10) jn 〇2ΧΗΤ4 0.65 cn 1 2.0E-02 1 UQ in (N fS o CO m tn 300 § Atmosphere 9.78E+17 33.2 -0.5 | Example 40 ITZOilniSniZn^ 33.7:23.3:43.1) 33.7 23.3 2x1ο·4 _I 0.65 t 6.5E-03 1 UQ »n &lt;N &lt;N 300 300 § Atmosphere 1.73E+17 13.4 Atomic ratio [In] / All metal atoms [Ga] / All metal atoms [Sn] / All metal atoms [Zn] / All metal atoms reach pressure [Pa] Sputter pressure [Pa] [H20 ]/([H20]+[Ar]) _m_ [〇2]/([〇d+[Ar]) Γ%1 Moisture pressure [Pa] Oxygen partial pressure [Pa] Sputtering method 锲TS Distance [cm] : Membrane Thickness [nm] substrate temperature [°c] magnetic field strength [nans] degree of formation [nm/min] annealing temperature [°c] annealing time [min] environment cf1 &gt; JZ &gt; S value [V/dec] target Composition_1 Sputtering Condition Annealing Condition by TFT Element Characteristics•41-201142054 [Table 8] Example 47 Example 48 Example 49 Example 50 Example 51 Atomic Ratio ITZO (In:Sn:Zn= 20:40:40 ITZO(In:Sn:Zn-20:20:60) IGZO(In:Ga:Zn= 45:20:35) IGZO(In:Ga:Zn= 50:30:20) ITZO(In:Sn:Zn = 20:60:20) Composition of the material [In] / all metal atoms 20 20 45 50 20 [Ga] / all metal atoms 20 30 [Sn] / all metal atoms 40 20 60 [Zn] / all metal atoms 40 60 35 20 20 Arrival pressure [Pa] 2χ10-4 2^10-4 2χ1 O'4 2χ1〇·4 2x1ο·4 Sputtering pressure [Pa] 0.65 0.65 0.65 0.65 0.65 [Η20]/([Η20]+[Αι] ) f%1 1 1 1 3 1 [02]/([02]+[Ar]) r%i - - - - - Moisture pressure [Pa] 6.5E-03 6.5E-03 6.5Ε-03 2.0Ε-02 6.5Ε- 03 Sputtering conditions Oxygen partial pressure [Pa] - - - - - Sputtering method DC DC DC DC DC Power density [W/cm2] 2.5 2.5 2.5 2.5 2.5 TS Distance [cm] 5 5 5 5 5 I Film thickness [nm ] 50 50 50 50 50 Substrate temperature rc] 25 25 25 25 25 Magnetic field strength [Gauss] 300 300 300 300 300 Film formation rate [nm/min] 49 36 28 39 24 Annealing temperature [°c] 300 300 300 300 300 Annealing Conditional Annealing Time [min] 60 60 60 60 60 Ambient Atmosphere Atmosphere Atmospheric Atmospheric Thin Film Carrier Concentration [cm_3] 9.97E+16 8.79E+16 2.13E+17 3.11E+17 9.24E+16 TFT Component Characteristic Mobility [ Cm2/Vs] 7.1 8.2 9.7 9.3 1.2 VthrVl 2 1.5 -0.5 3 1 S value [V/dec] 1.2 1.2 1.2 1.1 1 Industrial Applicability Oxide semiconductor obtained by the method for producing an oxide semiconductor of the present invention It can be widely used as a semiconductor thin film of a field effect type transistor such as a thin film transistor. The embodiments and/or the embodiments of the present invention are described in detail above, but the embodiments and/or embodiments of the present invention may be practiced without departing from the novel embodiments and/or The embodiment is subject to various modifications. Accordingly, such various modifications are intended to be included within the scope of the present invention. The contents of the documents described in this specification are all incorporated herein by reference. -42- 154091.doc 201142054 [Simplified description of the drawings] Fig. 1 is a view showing the main part of the Xiaxin example of the ore-eliminating device; and Figure 2 is a film transistor not including the emulsion semiconductor of the present invention + $ BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a schematic cross-sectional view showing another embodiment of a thin film transistor including an A# emulsion + conductor of the present invention; and FIG. 4 is a graph showing an oxygen concentration or a hydrogen concentration and obtained. A plot of the relationship of the carrier concentration of the film.

【主要元件符號說明】 1 薄膜電晶體 10 汲極電極 11 、 21 、 31 第1導電層 12 ' 22 ' 32 第2導電層 20 源極電極 30 閘極電極 40 氧化物半導體膜 50 閘極絕緣膜 60 玻璃基板 100a〜100f 靶材 200a〜200f 磁場形成機構 300a〜300c 交流電源 154091.doc -43-[Description of main component symbols] 1 Thin film transistor 10 Bipolar electrode 11, 21, 31 First conductive layer 12 ' 22 ' 32 Second conductive layer 20 Source electrode 30 Gate electrode 40 Oxide semiconductor film 50 Gate insulating film 60 glass substrates 100a to 100f targets 200a to 200f magnetic field forming mechanisms 300a to 300c AC power supply 154091.doc -43-

Claims (1)

201142054 七、申請專利範圍： 1. 一種成膜方法’其係於含有稀有氣體原子及水分子，且 上述水分子之含量相對於上述稀有氣體原子以分 為0.1〜⑽的氣體環境中，賤鍵包含金屬氧化物之起材 而於基板上形成薄膜。 2. 如請求項1之成膜方法， 再中上述氣體之壓力為0.1〜5 0 Pa ° · 3·如請求項1之成膜方法 4·如請求項1之成膜方法 5.如請求項3之成膜方 W/cm2 〇201142054 VII. Patent application scope: 1. A film forming method is used in a gas environment containing a rare gas atom and water molecules, and the content of the water molecule is 0.1 to 10 (10) with respect to the rare gas atom, A film comprising a metal oxide forms a film on the substrate. 2. The film forming method of claim 1, wherein the pressure of the gas is 0.1 to 50 Pa ° · 3. The film forming method of claim 1 is as follows: The film forming method of claim 1 is as claimed. 3 film formation side W/cm2 〇 其中上述濺鍍為直流濺鍍。 其中上述濺鍍為交流濺鍍。 法’其中直流功率密度為1〜5 ，其係向與隔開特定間隔並列設 以上之靶材相對向之位置依序搬 6.如請求項4之成膜方法 置於真空腔室内之3個 送基板，且The above sputtering is DC sputtering. The above sputtering is alternating current sputtering. The method has a DC power density of 1 to 5, which is sequentially moved to a position opposite to a target at a predetermined interval and spaced apart from each other. 6. The film forming method of claim 4 is placed in a vacuum chamber. Send the substrate, and 自交流電源對上述各靶材 而於上述輕材上產生電漿， 薄膜者， 交替地施加負電位 從而於上述基板表 與正電位 面上形成 之至少之一， 面切換施加於 上述成膜係於將來自於交流電源之輸出 在分支而連接的2個以上之靶材之間，— 上述靶材之電位一面進行成膜。 7. 如請求項4之成膜方法 W/cm2。 其令交流功率密度為5〜20 其中上述交流電源之頻率為1 0 8·如請求項4之成膜方法 kHz〜1 MHz。 154091.doc 201142054 9.如請求項1之成膜方法，其中相對於基板之成膜面之垂 直方^的成膜速度為1〜100 nm/min。 ίο.如請求項1之成膜方法，其中上述靶材與基板間之距離 於相對於基板之成膜面之垂直方向上為1〜15 cm。 11. 如請求項丨之成膜方法，其中上述環境之磁場強度為 300-1000高斯。 12. 如°月求項1至11中任一項之成膜方法，其中上述金屬氧 化物含有選自由鎵元素（Ga)、鋅元素（Zn)及錫元素（Sn) 所組成之群中之1種以上之元素與銦元素（In)，且 粗材中之銦元素之含量滿足下述原子比： 0·2各[In]/全部金屬原子$〇 8 (式中’ [In]為靶材中之銦元素之原子數； 全部金屬原子係指靶材中所含之全部金屬原子之原子 數）。 13. 如清求項丨至丨丨中任一項之成膜方法其中上述金屬氧 化物含有銦元素（In)、鎵元素（Ga)及辞元素（Zn)，且 鞋*材中之銦元素、鎵元素及鋅元素之含量滿足下述原 子比： 〇&lt;[In]/[Ga]&lt;0.5 〇.2&lt;[In]/([In] + [Ga] + [Zn])&lt;〇.9 (式中’ [In]為靶材中之銦元素之原子數，[Ga]為靶材中 之鎵元素之原子數，[Zn]為靶材中之鋅元素之原子數）。 14_如凊求項1至11中任一項之成膜方法’其中上述金屬氧 化物含有銦元素（In)、錫元素（Sn)及鋅元素（Zn)，且 154091.doc 201142054 靶材中之銦元素、錫元素及鋅元素之含量滿足下述原 子比： 0.2&lt;[In]/([In] + [Sn] + [Zn])&lt;0.9 Ο 〇 0&lt;[Sn]/([In] + [Sn] + [Zn])&lt;0.5 (式中’ [In]為靶材中之銦元素之原子數，[Sn;|為靶材中 之锡元素之原子數’ [Zn]為靶材中之鋅元素之原子數）。 15. —種氧化物半導體薄膜之製造方法，其係於15〇〜4〇〇。〇 下對藉由如請求項i至14中任一項之成膜方法而獲得之 薄膜進行5〜12〇分鐘退火處理。 16_如印求項15之氧化物半導體薄膜之製造方法，其中係於 至少^有氧之環境下進行上述退火處理。 17·種场效型溥膜電晶體元件，其包含藉由如請求項&quot;或 18 :::骐之製造方法而獲得之氧化物半導體薄膜。 1 8·如叫求項1 7之場 ^涛膜電晶體元件，盆中上述惫^你 半導體薄膜為通道層。 〃中上这乳化物 19.如請求項17 琢戏1溥膜電晶體元件，盆中 cm2/Vs 以 μ # 田 |丁 ” T 上，6&amp;界電壓為-5〜5 V。 遷移率為10 154091.docThe alternating current power source generates a plasma on the light material for each of the targets, and the film is alternately applied with a negative potential to form at least one of the substrate surface and the positive potential surface, and the surface is switched and applied to the film forming system. The potential of the target is formed while two or more targets connected from the output of the AC power source are branched. 7. The film formation method W/cm2 of claim 4. The AC power density is 5 to 20, wherein the frequency of the above AC power source is 1 0 8 · The film formation method of claim 4 is kHz~1 MHz. 154091.doc 201142054 9. The film forming method of claim 1, wherein a film forming speed of the film forming surface with respect to the substrate is 1 to 100 nm/min. </ RTI> The film forming method of claim 1, wherein the distance between the target and the substrate is 1 to 15 cm in a direction perpendicular to a film formation surface of the substrate. 11. The method of film forming according to claim 1, wherein the magnetic field strength of the above environment is 300-1000 Gauss. 12. The film forming method according to any one of items 1 to 11, wherein the metal oxide contains a group selected from the group consisting of gallium (Ga), zinc (Zn) and tin (Sn). One or more elements and indium elements (In), and the content of indium elements in the crude material satisfies the following atomic ratios: 0·2 each [In]/all metal atoms $〇8 (wherein [In] is a target The number of atoms of indium in the material; all metal atoms refer to the number of atoms of all metal atoms contained in the target). 13. The film forming method according to any one of the items of the present invention, wherein the metal oxide contains an indium element (In), a gallium element (Ga), and an element (Zn), and the indium element in the shoe material The content of the gallium element and the zinc element satisfies the following atomic ratio: 〇 &lt;[In]/[Ga]&lt;0.5 〇.2&lt;[In]/([In] + [Ga] + [Zn])&lt; 〇.9 (wherein [In] is the number of atoms of the indium element in the target, [Ga] is the number of atoms of the gallium element in the target, and [Zn] is the number of atoms of the zinc element in the target). The film forming method of any one of the items 1 to 11, wherein the metal oxide contains indium (In), tin (Sn), and zinc (Zn), and 154091.doc 201142054 target The content of indium, tin and zinc satisfies the following atomic ratio: 0.2 &lt; [In] / ([In] + [Sn] + [Zn]) &lt; 0.9 Ο 〇 0; [Sn] / ([ In] + [Sn] + [Zn]) &lt;0.5 (wherein [In] is the number of atoms of the indium element in the target, [Sn;| is the number of atoms of the tin element in the target' [Zn] The number of atoms of the zinc element in the target). 15. A method of producing an oxide semiconductor thin film, which is at 15 Å to 4 Å. The film obtained by the film forming method according to any one of claims 1 to 14 is subjected to an annealing treatment for 5 to 12 minutes. The method of producing an oxide semiconductor thin film according to claim 15, wherein the annealing treatment is carried out in an atmosphere of at least aerobic. 17. A field effect type ruthenium film transistor element comprising an oxide semiconductor film obtained by the method of manufacturing the article &quot; or 18::: 。. 1 8 · If the field of claim 1 7 ^ Tao film transistor components, the above-mentioned 惫 ^ you semiconductor film is the channel layer. This emulsion is obtained from the middle of the sputum. 19. As requested in Item 17 琢 溥 1 溥 电 电 电 , , cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm cm 10 154091.doc
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