TW201001679A - Phase change memory cell having top and bottom sidewall contacts - Google Patents
Phase change memory cell having top and bottom sidewall contacts Download PDFInfo
- Publication number
- TW201001679A TW201001679A TW097123947A TW97123947A TW201001679A TW 201001679 A TW201001679 A TW 201001679A TW 097123947 A TW097123947 A TW 097123947A TW 97123947 A TW97123947 A TW 97123947A TW 201001679 A TW201001679 A TW 201001679A
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- Prior art keywords
- electrode
- memory
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- forming
- dielectric
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
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- H—ELECTRICITY
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- H10N70/011—Manufacture or treatment of multistable switching devices
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
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- H10N70/20—Multistable switching devices, e.g. memristors
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/20—Multistable switching devices, e.g. memristors
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/801—Constructional details of multistable switching devices
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/801—Constructional details of multistable switching devices
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/881—Switching materials
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- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
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- Semiconductor Memories (AREA)
Description
201001679 九、發明說明: 【發明所屬之技術領域】 本發明係關於具有相變化記憶材料之高密度記憶裝置以及其 製造方法,其中相變化記憶材料可以是含有硫屬化物之材料以及 5 其他可程式化電阻式材料。 【先前技名好】 相變化記憶材料,像是含有硫屬化物的材料和其他類似的材 料/可在施加大小適用於積體電路的電流時產生相變化,並在結 晶態與非晶態之間變化。大致上非晶態的電阻一般而言會比大^ 上結晶態的電阻來的大,而此特性可用以表示資料。由於上述特 性,越來越多人開始研究如何將可程式化電阻式材料顧在可利 用隨機存取方式進行讀取與寫入之非揮發性記,_電路中。 15 由非晶態轉變至結晶態-般係為低電流步驟。從結晶 非晶態(此處稱為「重置」)一般則為高電流步驟,其包括^ 流破壞結晶結構’之後相變化材料會快速 理想狀態下,用來使相變倾料進行轉變 ^低重置所需的電流大小,可藉由縮小記憶胞中相變 成二ί尺找/或減少電極與相變化材料元件接觸之面積來達 料元件而達紐高的電流密度。I 相變化材 然而,由於接觸表面的減少會與某些故障情形有關,故縮小 201001679 獅^讀雜狀寸會對記憶胞 = 生不良的影響。而前述的故障情形包括了 紐^外杜製程上的不同’陣列中不同記憶胞之電極與相變 情於程5化特面的大小也會不同。而這些不同可能會造成記 “ ο拇的不同’包括不同記憶胞具有不同t阻的情形。 盖^提出—種記憶胞’其具魏重置電流,並可改 二二、°1、4_岐化材料元件接觸表面縮小所造成的問題。此 外’亦有必要提出-種製造方法,其 技術來製細味社綱之讀糊。 貝 【發明内容】 15 20 ,處觸示之峨裝置包括—雜 電極包括-環繞記憶元件之内表面,且第一電極:内=4 一 該記麟置尚包括相對於第—電極間隔 1份雜包括—雜織元狀内表面,且第 -電極之喊祕#二觸輯觸記憶元件。 揭和雜造峨裝置之綠包括於第—導電元件之 元ί ’該結構包括位於第—導€元件上之第一電極 ;-雜7〇件上之介電元件以及位於介 =。°該結構並包括一貫穿之介層孔’且記憶元件乃形成^ 魏麵之記髓t ’謂賴元制社祕域變得 非书小,触降_發機化萌需要㈣獻小。記憶元件之 25 201001679 f (於某些實施例中可以是直徑)係小於第一及第二電極之* 二且其較佳係小於用來製造記憶胞之製程(如微影製程)中之最: ^尺寸。藉由將寬度變窄,可使記憶元件之電絲度變大,進 而卜低在主動區域誘發相變化時所需要的電献小。第—及 介ifr用薄膜沉積製程來形成,此外,主動區域ί 、=和¥電兀件區隔開來’故記憶元件的其他部分可提供主動 雜度舰熱效果。除狀外,介電元件可包括低導埶性 ====,她—降低誘發相 且笛第二電極之内表面係與^*憶元件之外表面接觸, 情-—¥電(件係與記憶元件之下表面和上表面接觸,記 :胞之电子及結構穩定性,同時降低裝置的細電阻與電源消 15 20 電極可卿薄膜沉積製絲形成,故可精確 。此外’記憶元件可透過在介層孔中沉積記憶材料之 =介層孔則可採用能讓記憶胞陣列中各記憶元件之 二二又大致相同的製程來形成。藉由嚴格控制第一及第二電 寬度的絲’可提高織鱗列之記憶 辑接觸面積的-雜,並觀提高物操作上的一致性。 利範ί發明之其他目的及優點可參見圖式、實施方式以及申請專 【實施方式】 以下謹配合特定之實施例與方法進行說明。應注意的是,在 25 201001679 ^例情補各鄕徵僅為舉細,鱗肋 ^以下财之魄柯_其簡徵、树、方紐實施= 代,且較佳實施例亦僅用以說明本發明,而非限定本發明之 ,本發明之範嘴應由申請專利範圍所界定。本領域中具有通 韦知,者於參考說明書後應可了解本發明之各種均等變化。此 外’貫施例中相同之元件乃使用相同編號來代表。 第1圖為傳統”柱型”記憶胞100之剖面圖。記憶胞1〇〇包括被 介電質190環繞之下電極12〇、位於下 12〇上之柱狀記憶材料 130以及在柱狀記憶材料13〇上的上電極14〇。 10 15
20 於柱狀記憶材料130與上電極140外,且下_』之二= 係大於柱狀記憶材料13〇之寬度〗45。 、一於操作過程中,下電極120與上電極14〇間的電壓會使電流 流經柱狀記憶材料13〇,並由下電極12〇流向上電極14〇,或由上 電極140流向下電極120。 由於I度125和覓度145並不相同’電流密度會在柱狀記憶 材料130處集中’並糟此讓主動區域ho與上下電極140、120區 隔開來。 為使通過柱狀記憶材料13〇之較小的絕對電流值達到高電流 达度’可將柱狀記憶材料130之寬度145(於某些實施例中可以是 直徑)縮小。 欲形成柱狀記憶材料130與上電極140,可先依序形成一層記 憶材料和一層上電極材料,之後再進行钱刻。然而,受到底切蝕 刻與過度姓刻的影響,在製造寬度145較窄且具有較大深寬比之 裝置時常會產生問題,而這會造成程式化特性不一致的現象,包 括陣列中主動區域150的大小不一致,並進而使得不同記憶胞具 有不同電阻的情形。此外,由於用來製造柱狀記憶材料13〇之製 25 201001679 程亚不相同,陣财記憶胞之交界面142、122的接觸表面也會不 盡相同。 此外,若把寬度145、縮小,介於其中的較小接觸表面將會對 柱狀記憶材料!30與下電極12〇間交界面122的電子及結顧定 性產生不良影響’同時也會對柱狀記憶材料13〇與上電極i 界面142的穩定性產生不良影響。 、圖2A-2B分鹏本發明第一實施例之記憶胞之剖面圖與剖面 上視圖,該記憶胞可解決前述較小接觸表面所產生的問題,並 供較佳之穩定性。 圾 記憶胞200包括-具有内表面224之第一電極22〇以及一且 有内表面244之第二電極。舉例來說,第—電極22()與第二電 可包括氮化鈦或氮她。奴憶元件23〇包括呵容後詳 15 20 較佳係使醜化鈦’因為其與GST接觸良好,又是半導體 1程中常見的材料’且可在GST產 紅,,40可分別為鎢、氮化鶴、氮化紹鈦或氮化紹组,或分別包 象:-或多種選自以下成分所組成群組中的材料:經捧雜之 m、鍺、鉻、鈦、鶴、錮,、组、銅,、銥、鑭、 螺氮、氣、釕及前述元素之組合。 ^柱狀記憶材料之記憶元件MO係分別於第—與第二接觸 而電極220及第二電極240之内表面跡244形成接觸, 電極220電性祕至第二電極。記憶元件23〇可包括 ^疋-或多種選自以下成分所組成群組中的材料:辞、銘、錯、 ,、碲、硒、銦、鈦、鎵、鉍、錫、銅、鈀、鉛、銀、硫、矽、 乳、磷、砷、氮以及金。 夕電元件包括介於第一電極220與第二電極240之-或 夕層"電材料。介電元件26〇具有—内細撕,其與記憶元件 25 201001679 230在第一接觸表面形成接觸。介電元件可包括像是一或多種 選^以下成分所組成群組中的材料:石夕、鈦、銘、麵、氮、氧以 及叙’且於本實施例中介電元件26〇係包括氮化石夕。在某些實施 介電元件26〇可包括孔洞,進晰誠—纽結構以降低熱 傳導。 於本實施例中’第-電極22〇、第二電極240與介電元件26〇 形成了-環繞記憶元件23G之多層堆疊,且其各自之内表面從、 244、264係彼此對準而形成一介層孔。 一酋記憶元件230和第-電極22〇各自之下表面236、從係與第 電兀件280接觸,以將記憶胞勘输至下方的存取電_ 未不)。第-導電元件280可包括前述關於第一電極22〇和第 極:之材料中的任何一種材料。此外,第一導電元件也可 15 20 點導㈣件280可包括一纖存取裝置之端 第二導電树27〇係位於記憶树咖及第二電極施 ί=Γ ’其可包括一部分之位元線。舉例來說,其可包括 電極220和㈣極240之材料中的任何-衡 導電元件270省略,而此時一 雷;^中,第一導電树280與第二導電元件现間的 電監曰使電〜〜經第一電極220、記憶元件23〇 並由第-導電元件2陶二導電元細,或由 270流向第-導電树溯。 ㈣-導電tl件 含彬己憶元件230之主動區域290内,記憶材料可經靜 ^至少兩細態相間進行變化。無錢疑地,在本實施例$ 冓中’可將雜兀件23〇和主動區域29〇之結構作成非常微小,。 25 201001679 以降低誘發相變化時所需的電流大小。記憶元件23〇之寬度 ,些實施例中可以是直徑}係小於第—電極挪與第二電極2如之 寬^ ’也小於第一導電元件28〇與第二導電元件27〇之寬度,且 該寬度235較佳係小於用以形成記憶胞2〇〇 ^ 的最小特徵尺寸。較窄的寬度235可於記憶元件23〇 (中集^^ 進而降低在主動區域29〇中誘發相變化時所需要的電流大小 :電,22G、第二電極⑽以及介航件·可_ _沉積製程 來形成。.此外’於操作過程中,主動區域可和電極22〇、細 以及導電το件270、280區隔開來,故記憶元件23()的其他部分 提供主動區域29G -纽度的隔熱效果。除此之外,介電細 I包括低導熱性切料’以提供主舰域—定程度的隔敎效 果,進而降低誘發相變化時所需要的電流大小。 费與第二_240之内表面係接觸並環繞於 15 憶元件T之下表面236和上表面238接觸,記憶元^230 在寬度故變窄的情形下仍具有相對大的接觸表面,進而改善記 =。200之電子及結_定性,同時降低裝置的接觸電阻與^源 成極220與第4極240可_薄觀積製程來形 ^ ϋ度22卜241可被精確的控制。此外,記憶元件23〇可 ^過在介廣孔中利用化學氣相沉積方式沉積記憶材料之方式來形 成,而介層孔則可採用能讓記憶胞陣列中各記憶元件23 ( 讀靖錢齡形成。齡祕控制第二 if 240之厚度22刚的差異以及記憶元細 ^又^ ,可提高記聽_之記憶元件接觸面積的一 致性,並猎此提尚陣列操作上的一致性。 於本實施例中’第-電極22〇與第二電極㈣的内表面似、 11 25 201001679 有圓形剖面的開〇。然而,應注意的是,開口也可以 -電極長方形或其他不規卿狀,端視用來形成第 電=20與弟二電極24〇之内表面224、撕的製程而定。 辦^施2i記憶胞2〇0中的記憶元件⑽可包括有相變化 5=壬:^表巾观觀素㈣m相個元素 *其㈣^石瓜屬化物包括由硫族元素與正電性較強的元素或自 r 15 金化合物’硫屬化物合金包括硫屬化物以及像是過渡 j TVA料’硫屬化物合金通常包括一或多種化學元素週期 夕描、奴兀素,如鍺或錫。通常來說,韻化物合金包括一或 二的錄、鎵、銦及銀。此外,現有技術文獻巾也揭露了多種相 匕《己隐材料’包括如下之合金:鐵録、姻/録、姻/石西、録/蹄、 錯/碲’録/碲’/録/碲,石西/碲、錫·蹄、銦/銻/鍺、麵 •碲、鍺/錫/録/碲、鍺·西/碲、•鍺/録/硫。在錯雜碲這一類 合金中,可使用的組成範圍很廣,且其可用卿扮來表 示。曰有研究人員指出’最有用的合金係為在沈積材料中所包含 之平均碲,辰度係返低於7〇%,一般係低於約6〇%,並在一般型態 合金中的碲含量範圍從最低約23%至最高約58%,且最佳係介於 約48%至58%。錯的濃度係高於約5%,且其在材料中的平均範圍 係從隶低約8%至最高約30%,一般係低於約50%。於最佳情形 下,録的濃度範圍係介於約8%至約40%。在此成分中所剩下的主 要成分則為銻。上述百分比係為原子百分比,其為所有組成元素 加總為100% (參見Ovshinky之美國專利第5,687,112號,第1〇七 攔)。此外,也有研究人員提到其他的特殊合金,包括
Ge2Sb2Te5、GeSb2Te4 以及 GeSb4Te7 (參見 Noborn Yamada 所發表之論文,’Potential of Ge-Sb-Te Phase-change Optical Disks for High-Data-Rate Recording”,SI>IE v.3109, pp. 12 25 201001679 J 37(1997))。更廣泛地說,過渡金屬如鉻、鐵、錄、銳、 ’=、以及上述之混合物或合金,皆可與鍺/銻崎結合, =形成一具有可程式化電阻性質之相變化合金 Ovshmky之美國專利第5,687,112號中 用= 憶材料的幾個特定例子,而這些例子乃狀 种,為了調整具有經摻雜硫屬化物之記憶元件 f 15 20 之=、鋼、銀、金,: ,A之乳化物、纽之鼠化物、鈦、鈦之氧化物。 6,8嶋號w咖鳩公開號第 大致:曰=在!】憶胞之主動通道區域内依其位置順序於- :構^之間切換。相變化合金至少為雙貌態哺述「非 次叙結構,其較—單晶更無次雜,且帶有可 偏之特徵,像是比結晶相更高之電 完全結晶態盥完:非3常來說’相變化材料可在 妓甘、声曰曰心之間各種不同的可γ貞測狀態進行電性切 她由T電脈衝而從一種相_^^ 相狀…已知’施加時間較短且幅度較大的脈衝傾向於將相 13 25 201001679 ^化材料轉變成大致上非晶態。施加時間較長且幅度較小的脈衝 則傾向於將相變化材料轉變成大致上結晶態。在施加時間較短、 幅度較大之脈衝中,由於能量夠大,因此足以破壞結晶結構的鍵 同時’因為施加咖触’因此可猶止軒再次排列成結 曰曰L °在热須過度實驗的情形下,即可判斷特別適用於一特定相 變化合金的適當猶_分布。在本文的賴部分,相變化材料 乃以GST代稱,但應瞭解的是,其他類型之相變化材料亦可被採 用。在本文中,適合用在相變化隨機存取記憶體中之 Ge2Sb2Te5 〇 ▲於本刺之其他實施财,也可以_無可財化電阻式 記憶材料,紋氮氣雜GST、GCxSby$其他電阻會隨不同結晶 相改變的材料、PrxCayMn03、PrxSryMn03、ZiOx、WOx、Q〇x、 2〇x、NiOx或其他利用電脈衝來改變電阻之材料、7,7,8,8_四^基 苯醌二甲烧(7,7,8,8七11讯^311〇911111〇(11111地3^,冗^〇)、富勒烯衍生 物之6,6_苯基碳61- 丁酸甲酯(咖触〇驗rene 6 6 ρ1ι_ C61-butyric acid methyl ester, PCBM)、TCNQ-PCBM、Cu-TCNQ、
Ag—TCNQ、C60—TCNQ、摻雜其他金屬的TCNq或是其他任何 具有可藉電脈衝控制之雙穩態或多穩態電阻態之聚合物材料。 硫屬化物材料之形成,可以採用化學氣相沉積法,像是公開 號第 2006/0172067 號,發明名稱為,,Chemical Vap〇r Dep〇sitbn Qf
Chalcogenide Materials”之美國專利申請案中所記載者,且其内容係 列入本文作參考。 於沉積步驟後,可選擇性地進行在真空中或氮氣環境下的退 火處理’藉以增進硫屬化物材料之結晶態,而退火溫度通常介於 100°c到400°c之間,時間則少於30分鐘。 、 第2C-2D圖分別為本發明第二實施例記憶胞2〇〇的剖面圖與 上視圖’且該記憶胞200具有管狀相變化元件。 ’、 14 201001679 如第2C-2D圖所示,記憶元件23〇具有一内表面231,且内 表面231係界定-包括有填充材料232的内部空間。於本實施 中’填充材料232係為—電性絕緣之材料,且其材料之導熱 J低於記憶元件230所含材料。此外,填充材料232也可以包括 導電材料。 ⑽°己^ ^件230之内表面231和外表面234界定了記憶元件230 认衣形上表面238,且於本實施例巾’環形上表面现具有一圓形 她剖面。但應〉主意的是,獅上表自238的剖面也可以是正方形、 ίΓί、ί方形或其他不規則形狀,端視用來形成記憶元件230 /二私而疋此處所述之「環开)」並不僅限於圓开》,其也可以和 5己憶元件230之形狀相同。 簡化係用以說明—種製造本發明一實施例之記憶胞的 15 20 目所示者為第一步驟在第一導電元件280上形成結構 抽圖,其中結構3〇〇包括位於第一導電元件施上的第一 電〇、第一電極220上的介電元件260、介電元件施上的第 —電極240。 -处於實把例中’形成多層結構3G0的方法可包括在第一導電 二€_4'在第—電極材料上形成介電元件 極麻」丨電70件材料上形成第二電極材料。之後再將第一電 成結構細術瞧處理’以形 人f 1,、匕種實例中’弟一電極22G、第二電極240以及 介電7L件260界定了一堆疊。 雷貫施例中’形成多層結構300的方法可包括在第一導 〇 形成第一電極材料以及在第一電極材料上形成介電 理以二士妾者將第一電極材料以及介電元件材料進行圖案化處 以形成由弟-電極22〇與介電元件所界定之堆疊。之後, 15 25 201001679 乃將位元線材料形成並圖案化於堆疊之上,以形成第二電極24〇。 而在此種實施例中’第二電極240包括部分之位元線。 之後’再形成一貫穿第3A圖所示之結構300且具有側壁表面 252之介層孔250。以形成如第3B圖所示之結構。介層孔25〇可 利用第二電極240上的遮罩進行姓刻而形成,而其寬度235的大 小較佳為次微影等級。於本實施例中,介層孔25〇之側壁表面252 具有圓形之剖面。然而’應注意的是’其剖面也可以是正方形、 橢圓形、長方形或其他不規則形狀,端視用來形成介層孔25〇的 製程而定。 10 15 20 接著,乃將第3B圖所示之介層孔25〇用記憶材料填充,以形 成記憶元件230,如第3C圖所示。透過將記憶材料^:積於介層孔 250内並進行像是化學機械研磨之平坦化處理來形成記憶元件 230 ’可避免侧到相變化材料,並防止_損害及過度侧現 的發生。 在某些實施例中,第二導電元件27〇乃形成於第3C圖所示』 結構上,進而形成如第2A-2B圖所示之記憶胞。 #第3D-3E圖係用以說明在介層孔25〇 _成記憶元件23〇 ^ 弟j製程。於第3D圖中,記憶材料295乃沉積於第3β圖所$ 之"孔250内’其並於介層孔25〇内界定一内部空間。於^ 實施例中’兄憶材料295 73利用化學氣相沉積法形成。 加ί後,介電填充材料乃形成於第3D圖所示之結構上,以埴^ 。接著並進行平坦化處理,以形成-種在記憶元i 二表面所界定之内部空間中包括介電填充材料232之與 f形_£ _之結構上爾第 於形成貫穿第-電極22〇、第二電極mo與介電元件26〇之a 16 25 201001679 層孔250的製程中’可在第3A圖之結構3〇〇上形成一隔離層,並 在隔離層形成-犧牲層。之後,在犧牲層上形成具有一開口的遮 罩,其中開口的大小接近或等於用來形成該遮罩之製程最小特徵 尺寸且開口係覆蓋於結構3〇〇上。之後|虫刻犧牲層與隔離層, 5 膽犧牲層與隔離層中形成開口,並暴露出結構300的上表面。 在遮罩移除後’糊π上進行麵性之物侧,進而在侧隔 離層的同時,不影響到犧牲層與結構300。之後並在· 充材料,由於製程中使用了選擇性之底切蝕刻,其將可在開口中 ( 的填充材料内形成自我對準之孔隙。接著再對填充材料進行非等 1〇 祕_以打開孔隙,餘刻步驟一直持續到部分結構300之上表 面暴露於孔隙下調區域巾才停止,觀以形綱口巾包括填充 材料的間隔物。間_包括—纽上由⑽尺寸所決定之開口尺 ^因此其可以小於微影製程之最小特徵尺寸。之後,再把間隔 物作躲刻遮罩對結構姻,以形成寬度或直徑235小於最小特徵 15 尺寸之介層孔250。接著再把記憶材料形成於介層孔中,並進行平 坦化處理轉關曝賴牲層,祕成如帛3C騎示之結構。 第4圖為記憶體陣列400中部分交會點之示意圖,其中 《」 憶體陣列伽係採用包括本發明-實施例中與第-及 内表面接觸之記憶元件的記憶胞。 2〇 如第4圖所示,陣列400 t的每一個記憶胞均包括4體存 取裝置及記憶元件,其可被設稍複數個電阻態㈣ 藉此以儲存一或多個位元的資料。 ^ 陣列400包括複數條字元線與複數條位元線42 伽包括與第一方向平行延伸之字元線430a、430b、430c,位元 5 、線=則包括與第二方向平行延伸之位元線420a、420b、42〇c, 且第,方向係與第一方向垂直。陣列4〇〇之所以被稱為交又點 列,疋因為字瓜線43〇與位元線42〇的排列方式可使某特定字元 17 201001679 線430與某特定位疋線420彼此交會,但卻沒有 成交錯,同時記憶胞乃位於該些字元線43〇與位的= 點。 此處以記憶胞陣列400中的記憶胞勘進行說 字元線43〇b與位元線娜之交會點,並包括串聯敝沐^ 410與記憶元件230。 欲進行記憶胞2GG之讀取或寫人,可將適當之電細或電流 施加至補躺字猶43Gb触讀·b,觀崎發統流過 J定之記憶胞200。電壓纜流施加之時間與強度端視當時進行之 操作而定,像是讀取操作或寫入操作。 15 20 於具有記憶兀件230之記憶胞2〇〇的重置(或抹除)操作中,重 置脈衝施加樹目職财樣働触猶娜,使記憶元件 230之主動區域進行轉變而變成非晶相,藉此以將相變化材料之電 阻設定在触置態侧之電阻絲_。重置脈衝乃為一種能量 :對高的脈衝,其至少足以將記憶元件23G之主動區域的溫度提 升到尚於相變化材料產生相變(結晶)之溫度,且高於至何將主動 區域置於練狀態之,職溫度。之後膽重置脈触速終止,而 在主動區職耕溫到-低於產生機之溫度_時,形成一相 對紐暫的急速冷卻而使主祕域穩定至__非晶相。 ,在記憶胞200的設定(或程式化麟作巾,適當幅度的程式化脈 衝乃於-適當的時間崎加至姆應的字元線楊與位元線 420b ’ 電祕少足赠雜主祕域之溫度 升高到比產生相變之溫度還要高,使部分主動區域中產生由非晶 /變化為結晶相之相變化’進而降低記憶元件23〇之電阻,且將 °己憶胞200设定在一理想之狀態。 在儲存於記憶胞2〇〇内的資料值的讀取(或感應)操作中,適當 田度的δ貝取脈衝乃於一適當的時間内施加至相對應的字元線4遍 18 25 201001679 與位元線420b,以誘發不會讓記憶元件230產生電阻態變化之電 流。流經記憶胞200之電流乃由記憶元件23〇的電阻和儲存在記 憶胞200内的資料值決定。 第5A-5B圖為於交會點陣列4〇〇之一部分記憶胞(包括代表性 的記憶胞2〇0)的剖面圖,其_第5A圖乃沿著位元線42〇進行剖 面,第5B圖乃沿著字元線430進行剖面。具有一或多層介電材料 的介電質570乃環繞記憶胞並區隔開相鄰之字元線43〇盘相鄰之 位元線420。 /、 10 15 20 处,參考第5A及5B圖,其中記憶胞2〇〇包括具有第一導電φ 態之第-摻雜半導體區域522,以及具有與第一導電型態相反之第 -導電型祕帛二雜半導體區域524,其餘第—雜半導體區 域522之上。第—摻雜半導體區域522與第二摻雜半導體區域汹 之間界疋了 Ρη接面526,以界定二極體41〇。在第二摻雜半導 體區域524上的導電覆蓋層奶可包括像是鶴、氮化欽或石夕化物, 以於4虽體410與記憶元件23〇之間形成良好的歐姆接觸。 雜半導體區域522位於字元線4通,且字元線43〇b乃 圖的剖面。於本實施例中,字元線430包括經摻雜 沿磁:又夕雜之㈣)半導體材料,第—摻雜半導體區域522包 低度推雜之㈣半導體材料,而第二摻雜半導體 m ί經推雜之p+ (高度推雜之p型)半導體材料。於其他 化例中’弟一摻雜料體區域522可包括未推雜之半導體材料。 域524^41(1之第一捧雜半導體區域522與第二摻雜半導體區 二第可形成於單晶半導體或多晶半導體。舉例來 ^曰石夕體區域522與第二摻雜半導體區域524可包括 夕日日矽,而子兀線430可包括單晶矽或金屬。 1 430之父會點,以記憶胞200為例,其係排 19 25 201001679 列於位元線420b與字元線430b之交會點。此外,二極體41〇、第 一電極220、第二電極240以及介電元件260具有和字元線43〇 之寬度534大致相等之第一寬度(見第5A圖)。此外,二極體41〇、 第-極22G、第二電極240以及介電元件260亦具有和位元線 5 420之寬度524大致相等之第二寬度(見第5B圖),因此陣列4〇〇 之記憶胞的剖面面積是由位元線420與字元線430之尺寸所決 定,可提高陣列400之密度。 、 字元線430具有字元線寬534,且相鄰之字元線43〇彼此間之 f 距離為字元線間距533(見第5A圖)。位元線420具有位元線寬
10 524,且相鄰之位元線420彼此間之距離為位元線間距523(見第5B 圖)。於較佳實施例中,字元線寬534與字元線間距533之和等於 製造陣列400所使用製程之特徵尺寸F的兩倍,而位元線寬汹 與位元線間距523之和也等於特徵尺寸ρ的兩倍。此外,f較佳 係為形成位元線420與字元線430所使用製程(通常為微影製程) 15 之最小徵尺寸。據此,陣列400之記憶胞的剖面面積即為4F2。 第6圖為部分記憶胞陣列6〇〇之示意圖,其中該記憶胞陣列 600係採用包括本發明一實施例中和第一及第二電極之内表面接 I」 觸之記憶元件的記憶胞。 二=第6圖所示,陣列6〇〇之每一記憶胞均包括有存取電晶體 2〇 及記憶疋件。在第6圖中共有四個記憶胞,且各自具有記憶元件, 代表可包括數百萬個記憶胞的陣列之一小區段。 陣列600包括複數條字元線㈣與複數條位元線62〇,字元線 630包括與第-方向平行延伸之字元線63〇a、63〇b,位元線纪〇 則包括與第二方向平行延伸之位元線62〇a、62〇b,且第二方向 25 與第一方向垂直。 ’、 於本實施例中,四個存取電晶體各自的源極均連接至共同源 極線650a ’且該源極線65〇a之終端在於源極線終端電路,如接地 20 201001679 ,。於其他實施例中’存取裝置的源極線彼此並未電性連接,而 是可獨立控制。源'極線終端電路可包括偏壓電路(如電壓源與電流 源)以及用以將不同於接地之偏壓調整施加到源極線65〇a的 電路。 5 10 15 20 —為s兒明上的方便,陣列6〇〇的記憶胞乃以記憶胞2〇〇做代表。 字7G線f30a係搞接至記憶胞2〇〇之存取電晶體的閘極,而記憶元 件230第一電極mo與第二電極24〇乃排列於存取電晶體的没極 與位το線620a之間。抑或是記憶元件23〇、第一電極22〇與第二 電極240可位於存取電晶體的源極側。 、 欲進行§己憶胞200之讀取或寫入’可將適當之電壓及或電流 施加至字元線㈣a、位域撕舰極線65Qa ,以啟動記憶胞 2〇〇之電晶體’並誘發路徑_之電流由位元線62〇a流至源極線 650a ’或域極線65〇a流至位元線62加。電壓^^電流施加之時 時it行之齡岐,像是讀轉作錢入操作。 於圮憶胞200的重置(或抹除)操作中,重置脈衝乃施加於字元 630a與位兀線62〇a,以誘發流經記憶元件23〇之電流。該電流 可將記憶元件230之主動區域的溫度提升到高於相變化材料產生 相=(結晶)之溫度,且高於將主動區域置於液體狀態之炼融溫度。 之< 可透過終止位兀線62〇a與字元線63〇a之電壓脈衝來終止該 ^流’而在主動區域快着溫^^穩定至—高電阻之大致上非晶相 時形成-相對短暫的急速冷卻時間。重置操作亦可包括兩個以上 的脈衝,像是使用—對脈衝。 在^ 200的設定(或程式化)操作中,適當幅度的程式化脈 衝2一日铜魄辦樣働触元線働以誘發 生ΪΪ之ΐΐΪΪί至少,將部份主動區域之溫度升高到比產 曰;Ί ’使部分主祕域中產生由非晶機化為結 日日目‘’進而降低記憶元件230之電阻,且將記憶胞200 21 25 201001679 設定在一理想之狀態。 在儲存於記憶胞200内的資料值的讀取(或感應)操作中,適當 幅度的讀取脈衝乃於一適當的時間内施加至相對應的字元線6施 與位元線620b,以誘發不會讓記憶元件23〇產生電阻態變化之電 5 流。流經記憶胞200之電流乃由記憶元件230的電阻f儲存在記 憶胞200内的資料值決定。 ° 應注意的的是,記憶陣列_並不僅限於g 6圖所示之陣列 組態,本發明亦可使用其他的陣列組態。此外,除了使用金氧半 電晶體外’某些實施例中的存取裝置亦可使用雙極電晶體。 1〇 / 7圖為部分記憶胞陣列_(包括記憶胞2〇0)之剖面圖,其 中子元線63Ga乃延伸穿過第7圖的獅,且其係位祕材7〇〇之 上而形成記憶胞200之存取電晶體的閘極。 ,源極線650a與作為存取電晶體源極的換雜區域7〇4接觸,而 15 ‘電检塞71〇與作為存取電晶體:及極的摻雜區域702接觸。於某 些實施例中,源極線650a也可利用基材700中的摻雜區域來製作。 包括一或多層介電層的介電質720位於&才7〇〇之上,位元 、線620a位於介電質720之上,且藉由記憶元件230、第-電極220 I 與第二電極240電性耦接至導電栓塞71〇。 2〇 帛847圖係用以説明製造如帛7圖所示記憶胞之製程步驟。 第8圖為-記憶存取層800之剖面圖,係用以說明製造記憶 胞之第-步。其中’記憶存取層_具有上表面謝,而栓塞71〇 係延伸穿越介電質720到上表面謝。記憶存取層_可利用本領 域中的標準製程來製造,且其包括延伸穿過第8圖的剖面之字元 線 630。 之後,結構900乃形成於第8圖之記憶存取層8〇〇的上表面 8〇4上,以形成第9圖所示者。其中,結構9〇〇包括形成於記憶存 22 f . i 10 15 20 201001679 料9i〇 —電極材料910、形成於第-電極材 電極材料1 :===介電元件材獅上的第二 實施例,,苐一雷^-电極材料930上的犧牲材料940。於本 而介^件1= 910與第二電極材料930包括氮化鈦, ::件材科92〇與犧牲材料94〇則包括氮化矽。 的堆曼^ = 由姻方式形成一栓塞71〇上 二電細、第, i曰化!第10圖所示結構上形成介電填充1100,並進行平 可利用^所不之結構。於某些實施辦,介電填充1100 :====成,之後再進行化_ 之結^著’移除犧牲元件麵以形成開口 1200,如第12圖所示 第12圖所示之開口 1200内形成間隔物1300,以形 門ΐη ϊΐ不之結構。間隔物1300界定了一開口 1310,且該 ^ 口 0暴露出第二電極240的部份上表面。此外,於本實施例 中’間隔物1300包括氮化石夕或石夕。 娜勿1300,可先在第12圖所示之結構上形成共形間 ; 之後再對共形間隔物材料層進行非等向性姓刻。於 中’卩_1G將細繼錄鳴測之 接著,利用間隔物13〇〇做為餘刻遮罩對第二電極24〇、介電 το件260以及第-電極22〇進行蝴,以形成具有側壁表面252 之介層孔250,如第14圖所示者。於本實施例中,介層孔25〇的 侧壁表面252具有圓形之剖面。然應注意的是’於本發明的其他 23 25 201001679 實施例中’其剖面也可以是正方形、觀形、長方軸其他不規 則形狀’端視用來形成介層孔25〇的製程而定。 接著,記憶材料1500乃形成於第14圖中的介層孔25〇内, 形成如第15圖所示之結構。 之後再對第15圖所示之結構進行平坦化(如化學機械研磨), 以移除間隔物1300並形成記憶元件23(),如第16圖所示者。 接著,在第16圖所示結構上形成並圖案化位元線材料,以形 成位元線620a,如第17圖所示者。 15 20 第18圖為一積體電路181〇之簡化方塊圖,其包括了記憶體 $列1812 ’且其中的5己憶胞係具有記憶元件,且該記憶元件係與 第一及第二電極之内表面接觸。具有讀取、設定與重設模式之字 元線解碼1 1814 75無數條絲記鐘物觀制之字元線 1^16彼此耦接並電性相連。位元線(攔)解碼器1818乃與複數條沿 著陣列中之攔排列之位元線182〇電性相連,以讀取、設定與重設 陣列1812中的相變化記憶胞(圖未示)。位址乃透過匯流排丨奶提 供至字元線解碼器及驅動器1814與位元線解碼器1818。於方塊 1824中’包括_取、設定與重設模式所需之電壓^/或電流源的减 應,大器與資料輸入結構乃藉由資料匯流排職麵接至位元線解 碼器1818。藉由資料輸入線1828,資料乃由積體電路181〇上的 輸入/輪出埠或由積體電路1810内部或外部之其他資料源傳送至 方塊1824中的資料輸入結構。積體電路1810還可以包括其他電 路1830,像疋一般用途之處理器、特殊用途之應用電路或是可提 供陣列1812所支持之系統單晶片功能的模組或其組合。資料透過 資料輸出線1832由方塊1824之感應放大器傳送至積體電路18ω 上的輸入/輸出埠或其他積體電路1810内部或外部之資料目的地。 /於本實施例中,控制器1834係以偏壓調整狀態機構為例,i 係控制偏壓調整供應電壓與電流源1836 ’如讀取、程式化、抹除 24 25 201001679 抹除驗證以及程式化驗證賴職電流。此外 用技術領域中已知的特殊用途賴電路來實作。於 _可包括,途之處吨行_式來控= :細:作,而該處理器可以實作於相同的積體電路上。於 ===1834调細纖魏與,途之處 ,雖然本發明係已參照實施例來加以描述,然本發明創作並 其詳細描軸容。賴方叙修改樣式係已於先前描述中 所建礒,且其他替換方式及修改樣式將A熟習此項技蓺之人士 =1特殿,财斜實壯_财㈣之齡結合而達成 明實質上相同結果者,皆不脫離本發明之精神範缚。因此, 欲落在本發明於隨附申請專利 15 20 【圖式簡單說明】 第1圖為傳統”柱型”記憶胞之剖面圖。 第2A-2B目分別為具有相對大接觸表面之記憶胞的剖面圖與 剖面上視圖,其中該記憶胞具有較佳之穩定性。 、第2C-2D目分別為具有管狀相變化元件之記憶胞的剖面圖與 上視圖’其中該記憶胞之相變化體積較小。 、 第3A-3C圖係用以說明一種製造本發曰月一實施例之記憶胞的 簡化製程之步驟。 第3D-3E ®係用以說明一種製造具有介層孔之記憶胞的簡化 製程之步驟。 第4圖為記憶體陣列中部份交會點之示意圖,其中該記憶體 陣列係採用包括本發明-實施例中與第—及第二電極之内表面接 觸之§己憶元件的記憶胞。 25 25 201001679 =5A-5B si為部分於交會點陣列之—部分 圖為部分記憶_列之示意圖 :=剖面圖。 用包括本發日月—實施例中和第一極内fk胞陣列係採 元件的記憶胞。 之内表面接觸之記憶 圖為第6射部分記憶胞陣列之剖面圖。 第係用以說明製造如第7圖所示記憶胞之製程步驟。 憶體陣列中己憶斷列之積體電路簡化方塊圖,其中該記 黛n 己憶胞係具有記憶元件,且該記憶元件係與第一及 表面接觸。 【主 要凡件符號說明】 120 125 下電極 130 下電極寬度 140 記憶材料 145 上電極 150 枉狀記憶材料寬度 220 主動區域 221 第一電極 224 第一電極厚度 226 第一電極内表面 230 第一電極下表面 231 記憶元件 232 3己憶元件内表面 234 填充材料 235 δ己十思元件外表面 介層孔寬度 26 201001679 236 記憶元件下表面 238 記憶元件上表面 240 第二電極 241 第二電極厚度 244 第二電極内表面 248 第二電極上表面 250 介層孔 251 内部空間 252 I1 側壁表面 260 介電元件 264 介電元件内表面 270 第二導電元件 280 第一導電元件 290 主動區域 300 多層結構 410 二極體 522 第一摻雜半導體區域 524 1 ·; 第二摻雜半導體區域 k / 525 導電覆蓋層 526 pn接面 533 字元線間距 534 字元線寬 680 路徑 700 基材 710 導電栓塞 800 記憶存取層 804 記憶存取層上表面 27 201001679 i 900 結構 910 第一電極材料 920 介電元件材料 930 第二電極材料 940 犧牲材料 1000 堆疊 1010 犧牲元件 1100 介電填充 1300 間隔物 1810 積體電路 1814 字元線解碼器與驅動器 1818 位元線解碼器 1822 匯流排 1824 感應放大器/資料輸入結構 1826 資料匯流排 1828 資料輸入線 1830 其他電路 1832 資料輸出線 1834 控制器 1836 偏壓調整供應電壓與電流源 100 > 200 記憶胞 1200 、 1310 開口 122 、 142 交界面 1816、430a、430b、 430c、630a、630b 子元線 1820、420a、420b、 420c、620a、620b 位元線 28 201001679 295 ' 1500 記憶材料 400'600 ' 1812 陣列 570、160、190、720 介電質 650a 源極線 702'704 摻雜區域 29
Claims (1)
- 201001679 十、申請專利範圍: 1- 一種記憶裝置,包括: 一記憶元件; 内表面:第括一環繞該記憶元件之内表面,該第-電極之該 鬥衣面於一弟—接觸面接觸該記憶元件; 达竹ιίί極’係與該第—_分離而設S,該第二電極包括—環 :二之内表面’且該第二電極之該内表面於一第二接觸面接 2. 15 20 柱^^_ 1 _之繼置,其中該麻件包括一 3請專概邮1撕叙·裝置,射該總元件具有- 3^之纖置,其娜二電極包括一 Li申請專利麵第1項所述之記憶裝置,更包括一位於該第-電 之内,齡電元件包括—魏觀憶元件 件,其中令介=件之該内表面於一第三接觸面細該記憶元 1電凡件之该内表面係與該第-電極以及該$二電極對準。 項所述之記憶裝置.+導電元件 30 25 201001679 之下表==件與該第—電極各自包括—與該第一導電 之上表面 元件接觸 面。…^ / ' 口^弟導 電元件接觸 括一^6 繼,_料電元件包 8. 電性嫩,嫩料電元件係 ,種製造-§己憶裝置之方法,該方法包括: 形成一包括一内表面之第一電極; 15 内表電極分離而設置之第二電極,該第二電極包括一 第-Z 一記憶元件’該第一電極之該内表面環繞該記憶元件並於-==:=r極之該一記⑽ 20 10. 之記憶材料 :申請專植圍第9綱述之方法,其巾該記憶元件包括—柱狀 25 界定之一内部空間中。 12.如申請專利範圍第9項所述之方法,其中該第二電極包括 31 201001679 線之一部分。 广如申請專利細第9項所述之方法,更包括形成一位於該第一電 =^第極之_介電元件,齡電元件包括_環繞該記憶元件 件、中该,丨€元件之該内表面係與該帛一電極以及对二電極對準。 =f申^利細第9項所述之方法,更包括形成一第 與一第二導電元件,其中: ^域元件無第-電極各自包括-無第—導電元件接觸之 Γ衣卸,以及 上表面 該記憶元件與該第二電極各自包括—與該t 觸之 15 撕叙方法,料料二轉元件包括一 16.種製造一記憶裝置之方法,該方法包括: 第-上表面形成—結構,該結構包括-位於該 導屯7L件上之苐-電極元件、一錄該第 件、一位於該介電元件上之第二電極; 千上之"電7C 形成一貫穿該結構之介層孔;以及 於該介層孔内形成一記憶元件。 25 17.如 括: 申請專利細第16項所述之方法,其中形成該結構之步驟包 於4第-導電疋件之該上表面形成—第—電極材料、於該第—電 32 201001679 極材料上形成一介電元件好极 材料;以及 树、於該介電元件材料上形成-第二電极 進而形成一堆疊 餘刻以貫穿至該第一電極材料, ^如申請專利範圍第17項所述之方法,其中形成該堆疊之步驟包 上形至該第一電極材料之步驟前,先於該第二電極材料15包括如申5月專利祀圍第18項所述之方法,其中形成該介層孔之步驟 __,並断,條序以暴露出 移除該犧牲材料以形成一開口; 於該開口内形成一間隔物;以及 _______該堆疊’以形成該介層孔。 ^括如申請專利範圍第19項所述之方法,其中形成制隔物之步驟 於該開口内形成一介電間隔物材料;以及 非等向蝕刻該介電間隔物材料。 此立如申請專利細第I6項所述之方法,其中於該介層孔内形成該 元件之步驟包括: 於該介層孔内沉積一記憶材料以於該介層孔内界定一内部空 間;以及 於該介層孔之該内部空間内填充一填充材料。 33 25
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI757895B (zh) * | 2020-09-03 | 2022-03-11 | 旺宏電子股份有限公司 | 柱狀記憶胞及其製造方法、積體電路記憶體裝置 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2934711B1 (fr) * | 2008-07-29 | 2011-03-11 | Commissariat Energie Atomique | Dispositif memoire et memoire cbram a fiablilite amelioree. |
US8198124B2 (en) | 2010-01-05 | 2012-06-12 | Micron Technology, Inc. | Methods of self-aligned growth of chalcogenide memory access device |
US8048755B2 (en) * | 2010-02-08 | 2011-11-01 | Micron Technology, Inc. | Resistive memory and methods of processing resistive memory |
US9601692B1 (en) | 2010-07-13 | 2017-03-21 | Crossbar, Inc. | Hetero-switching layer in a RRAM device and method |
US8569172B1 (en) | 2012-08-14 | 2013-10-29 | Crossbar, Inc. | Noble metal/non-noble metal electrode for RRAM applications |
US8884261B2 (en) | 2010-08-23 | 2014-11-11 | Crossbar, Inc. | Device switching using layered device structure |
US8597974B2 (en) * | 2010-07-26 | 2013-12-03 | Micron Technology, Inc. | Confined resistance variable memory cells and methods |
US9620206B2 (en) | 2011-05-31 | 2017-04-11 | Crossbar, Inc. | Memory array architecture with two-terminal memory cells |
US9564587B1 (en) | 2011-06-30 | 2017-02-07 | Crossbar, Inc. | Three-dimensional two-terminal memory with enhanced electric field and segmented interconnects |
US9166163B2 (en) | 2011-06-30 | 2015-10-20 | Crossbar, Inc. | Sub-oxide interface layer for two-terminal memory |
US9685608B2 (en) | 2012-04-13 | 2017-06-20 | Crossbar, Inc. | Reduced diffusion in metal electrode for two-terminal memory |
US8658476B1 (en) | 2012-04-20 | 2014-02-25 | Crossbar, Inc. | Low temperature P+ polycrystalline silicon material for non-volatile memory device |
US10096653B2 (en) * | 2012-08-14 | 2018-10-09 | Crossbar, Inc. | Monolithically integrated resistive memory using integrated-circuit foundry compatible processes |
US9583701B1 (en) | 2012-08-14 | 2017-02-28 | Crossbar, Inc. | Methods for fabricating resistive memory device switching material using ion implantation |
US8890109B2 (en) * | 2012-12-20 | 2014-11-18 | Intermolecular, Inc. | Resistive random access memory access cells having thermally isolating structures |
US10290801B2 (en) * | 2014-02-07 | 2019-05-14 | Crossbar, Inc. | Scalable silicon based resistive memory device |
US9825093B2 (en) * | 2015-08-21 | 2017-11-21 | Globalfoundries Inc. | FinFET PCM access transistor having gate-wrapped source and drain regions |
US9583624B1 (en) | 2015-09-25 | 2017-02-28 | International Business Machines Corporation | Asymmetric finFET memory access transistor |
US11251370B1 (en) * | 2020-08-12 | 2022-02-15 | International Business Machines Corporation | Projected memory device with carbon-based projection component |
Family Cites Families (274)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3271591A (en) | 1963-09-20 | 1966-09-06 | Energy Conversion Devices Inc | Symmetrical current controlling device |
US3530441A (en) | 1969-01-15 | 1970-09-22 | Energy Conversion Devices Inc | Method and apparatus for storing and retrieving information |
IL61678A (en) | 1979-12-13 | 1984-04-30 | Energy Conversion Devices Inc | Programmable cell and programmable electronic arrays comprising such cells |
US4452592A (en) | 1982-06-01 | 1984-06-05 | General Motors Corporation | Cyclic phase change coupling |
JPS60137070A (ja) | 1983-12-26 | 1985-07-20 | Toshiba Corp | 半導体装置の製造方法 |
US4719594A (en) | 1984-11-01 | 1988-01-12 | Energy Conversion Devices, Inc. | Grooved optical data storage device including a chalcogenide memory layer |
US4876220A (en) | 1986-05-16 | 1989-10-24 | Actel Corporation | Method of making programmable low impedance interconnect diode element |
JP2685770B2 (ja) | 1987-12-28 | 1997-12-03 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2606857B2 (ja) | 1987-12-10 | 1997-05-07 | 株式会社日立製作所 | 半導体記憶装置の製造方法 |
US5166758A (en) | 1991-01-18 | 1992-11-24 | Energy Conversion Devices, Inc. | Electrically erasable phase change memory |
US5534712A (en) | 1991-01-18 | 1996-07-09 | Energy Conversion Devices, Inc. | Electrically erasable memory elements characterized by reduced current and improved thermal stability |
US5177567A (en) | 1991-07-19 | 1993-01-05 | Energy Conversion Devices, Inc. | Thin-film structure for chalcogenide electrical switching devices and process therefor |
JP2825031B2 (ja) | 1991-08-06 | 1998-11-18 | 日本電気株式会社 | 半導体メモリ装置 |
US5166096A (en) | 1991-10-29 | 1992-11-24 | International Business Machines Corporation | Process for fabricating self-aligned contact studs for semiconductor structures |
JPH05206394A (ja) | 1992-01-24 | 1993-08-13 | Mitsubishi Electric Corp | 電界効果トランジスタおよびその製造方法 |
US5958358A (en) | 1992-07-08 | 1999-09-28 | Yeda Research And Development Co., Ltd. | Oriented polycrystalline thin films of transition metal chalcogenides |
JP2884962B2 (ja) | 1992-10-30 | 1999-04-19 | 日本電気株式会社 | 半導体メモリ |
US5515488A (en) | 1994-08-30 | 1996-05-07 | Xerox Corporation | Method and apparatus for concurrent graphical visualization of a database search and its search history |
US5785828A (en) | 1994-12-13 | 1998-07-28 | Ricoh Company, Ltd. | Sputtering target for producing optical recording medium |
US6420725B1 (en) | 1995-06-07 | 2002-07-16 | Micron Technology, Inc. | Method and apparatus for forming an integrated circuit electrode having a reduced contact area |
US5831276A (en) | 1995-06-07 | 1998-11-03 | Micron Technology, Inc. | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5789758A (en) | 1995-06-07 | 1998-08-04 | Micron Technology, Inc. | Chalcogenide memory cell with a plurality of chalcogenide electrodes |
US5869843A (en) | 1995-06-07 | 1999-02-09 | Micron Technology, Inc. | Memory array having a multi-state element and method for forming such array or cells thereof |
US5879955A (en) | 1995-06-07 | 1999-03-09 | Micron Technology, Inc. | Method for fabricating an array of ultra-small pores for chalcogenide memory cells |
US5837564A (en) | 1995-11-01 | 1998-11-17 | Micron Technology, Inc. | Method for optimal crystallization to obtain high electrical performance from chalcogenides |
KR0182866B1 (ko) | 1995-12-27 | 1999-04-15 | 김주용 | 플래쉬 메모리 장치 |
US5687112A (en) | 1996-04-19 | 1997-11-11 | Energy Conversion Devices, Inc. | Multibit single cell memory element having tapered contact |
US6025220A (en) | 1996-06-18 | 2000-02-15 | Micron Technology, Inc. | Method of forming a polysilicon diode and devices incorporating such diode |
US5866928A (en) | 1996-07-16 | 1999-02-02 | Micron Technology, Inc. | Single digit line with cell contact interconnect |
US5789277A (en) | 1996-07-22 | 1998-08-04 | Micron Technology, Inc. | Method of making chalogenide memory device |
US5985698A (en) * | 1996-07-22 | 1999-11-16 | Micron Technology, Inc. | Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5814527A (en) | 1996-07-22 | 1998-09-29 | Micron Technology, Inc. | Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories |
US5998244A (en) | 1996-08-22 | 1999-12-07 | Micron Technology, Inc. | Memory cell incorporating a chalcogenide element and method of making same |
US5688713A (en) | 1996-08-26 | 1997-11-18 | Vanguard International Semiconductor Corporation | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers |
US6147395A (en) | 1996-10-02 | 2000-11-14 | Micron Technology, Inc. | Method for fabricating a small area of contact between electrodes |
US6087674A (en) | 1996-10-28 | 2000-07-11 | Energy Conversion Devices, Inc. | Memory element with memory material comprising phase-change material and dielectric material |
US5716883A (en) | 1996-11-06 | 1998-02-10 | Vanguard International Semiconductor Corporation | Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns |
US6015977A (en) | 1997-01-28 | 2000-01-18 | Micron Technology, Inc. | Integrated circuit memory cell having a small active area and method of forming same |
US5952671A (en) | 1997-05-09 | 1999-09-14 | Micron Technology, Inc. | Small electrode for a chalcogenide switching device and method for fabricating same |
US6031287A (en) | 1997-06-18 | 2000-02-29 | Micron Technology, Inc. | Contact structure and memory element incorporating the same |
US5933365A (en) | 1997-06-19 | 1999-08-03 | Energy Conversion Devices, Inc. | Memory element with energy control mechanism |
US5902704A (en) | 1997-07-02 | 1999-05-11 | Lsi Logic Corporation | Process for forming photoresist mask over integrated circuit structures with critical dimension control |
US6768165B1 (en) | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
US7023009B2 (en) | 1997-10-01 | 2006-04-04 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US6969866B1 (en) | 1997-10-01 | 2005-11-29 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US6617192B1 (en) | 1997-10-01 | 2003-09-09 | Ovonyx, Inc. | Electrically programmable memory element with multi-regioned contact |
FR2774209B1 (fr) | 1998-01-23 | 2001-09-14 | St Microelectronics Sa | Procede de controle du circuit de lecture d'un plan memoire et dispositif de memoire correspondant |
US6087269A (en) | 1998-04-20 | 2000-07-11 | Advanced Micro Devices, Inc. | Method of making an interconnect using a tungsten hard mask |
US6372651B1 (en) | 1998-07-17 | 2002-04-16 | Advanced Micro Devices, Inc. | Method for trimming a photoresist pattern line for memory gate etching |
US6141260A (en) | 1998-08-27 | 2000-10-31 | Micron Technology, Inc. | Single electron resistor memory device and method for use thereof |
US7157314B2 (en) | 1998-11-16 | 2007-01-02 | Sandisk Corporation | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6351406B1 (en) | 1998-11-16 | 2002-02-26 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6034882A (en) | 1998-11-16 | 2000-03-07 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
JP2000164830A (ja) | 1998-11-27 | 2000-06-16 | Mitsubishi Electric Corp | 半導体記憶装置の製造方法 |
US6291137B1 (en) | 1999-01-20 | 2001-09-18 | Advanced Micro Devices, Inc. | Sidewall formation for sidewall patterning of sub 100 nm structures |
US6245669B1 (en) | 1999-02-05 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company | High selectivity Si-rich SiON etch-stop layer |
US6943365B2 (en) | 1999-03-25 | 2005-09-13 | Ovonyx, Inc. | Electrically programmable memory element with reduced area of contact and method for making same |
US6750079B2 (en) | 1999-03-25 | 2004-06-15 | Ovonyx, Inc. | Method for making programmable resistance memory element |
WO2000057498A1 (en) | 1999-03-25 | 2000-09-28 | Energy Conversion Devices, Inc. | Electrically programmable memory element with improved contacts |
US6177317B1 (en) | 1999-04-14 | 2001-01-23 | Macronix International Co., Ltd. | Method of making nonvolatile memory devices having reduced resistance diffusion regions |
US6077674A (en) | 1999-10-27 | 2000-06-20 | Agilent Technologies Inc. | Method of producing oligonucleotide arrays with features of high purity |
US6326307B1 (en) | 1999-11-15 | 2001-12-04 | Appllied Materials, Inc. | Plasma pretreatment of photoresist in an oxide etch process |
US6314014B1 (en) | 1999-12-16 | 2001-11-06 | Ovonyx, Inc. | Programmable resistance memory arrays with reference cells |
US6576546B2 (en) | 1999-12-22 | 2003-06-10 | Texas Instruments Incorporated | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications |
TW586154B (en) | 2001-01-05 | 2004-05-01 | Macronix Int Co Ltd | Planarization method for semiconductor device |
US6444557B1 (en) | 2000-03-14 | 2002-09-03 | International Business Machines Corporation | Method of forming a damascene structure using a sacrificial conductive layer |
US6420216B1 (en) | 2000-03-14 | 2002-07-16 | International Business Machines Corporation | Fuse processing using dielectric planarization pillars |
US6888750B2 (en) | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
US6420215B1 (en) | 2000-04-28 | 2002-07-16 | Matrix Semiconductor, Inc. | Three-dimensional memory array and method of fabrication |
US6501111B1 (en) | 2000-06-30 | 2002-12-31 | Intel Corporation | Three-dimensional (3D) programmable device |
US6440837B1 (en) | 2000-07-14 | 2002-08-27 | Micron Technology, Inc. | Method of forming a contact structure in a semiconductor device |
US6563156B2 (en) | 2001-03-15 | 2003-05-13 | Micron Technology, Inc. | Memory elements and methods for making same |
JP3678637B2 (ja) * | 2000-09-01 | 2005-08-03 | ユニ・チャーム株式会社 | 連続フィラメントの開繊方法および開繊装置 |
US6555860B2 (en) | 2000-09-29 | 2003-04-29 | Intel Corporation | Compositionally modified resistive electrode |
US6567293B1 (en) | 2000-09-29 | 2003-05-20 | Ovonyx, Inc. | Single level metal memory cell using chalcogenide cladding |
US6339544B1 (en) | 2000-09-29 | 2002-01-15 | Intel Corporation | Method to enhance performance of thermal resistor device |
US6429064B1 (en) | 2000-09-29 | 2002-08-06 | Intel Corporation | Reduced contact area of sidewall conductor |
KR100382729B1 (ko) | 2000-12-09 | 2003-05-09 | 삼성전자주식회사 | 반도체 소자의 금속 컨택 구조체 및 그 형성방법 |
US6569705B2 (en) | 2000-12-21 | 2003-05-27 | Intel Corporation | Metal structure for a phase-change memory device |
US6271090B1 (en) | 2000-12-22 | 2001-08-07 | Macronix International Co., Ltd. | Method for manufacturing flash memory device with dual floating gates and two bits per cell |
US6627530B2 (en) | 2000-12-22 | 2003-09-30 | Matrix Semiconductor, Inc. | Patterning three dimensional structures |
TW490675B (en) | 2000-12-22 | 2002-06-11 | Macronix Int Co Ltd | Control method of multi-stated NROM |
US6534781B2 (en) | 2000-12-26 | 2003-03-18 | Ovonyx, Inc. | Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact |
WO2002061840A1 (fr) | 2001-01-30 | 2002-08-08 | Hitachi, Ltd. | Dispositif de circuit integre semi-conducteur et procede de production de ce dernier |
KR100400037B1 (ko) | 2001-02-22 | 2003-09-29 | 삼성전자주식회사 | 콘택 플러그를 구비하는 반도체 소자 및 그의 제조 방법 |
US6487114B2 (en) | 2001-02-28 | 2002-11-26 | Macronix International Co., Ltd. | Method of reading two-bit memories of NROM cell |
US6596589B2 (en) | 2001-04-30 | 2003-07-22 | Vanguard International Semiconductor Corporation | Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer |
US6730928B2 (en) | 2001-05-09 | 2004-05-04 | Science Applications International Corporation | Phase change switches and circuits coupling to electromagnetic waves containing phase change switches |
US6514788B2 (en) | 2001-05-29 | 2003-02-04 | Bae Systems Information And Electronic Systems Integration Inc. | Method for manufacturing contacts for a Chalcogenide memory device |
DE10128482A1 (de) | 2001-06-12 | 2003-01-02 | Infineon Technologies Ag | Halbleiterspeichereinrichtung sowie Verfahren zu deren Herstellung |
US6613604B2 (en) | 2001-08-02 | 2003-09-02 | Ovonyx, Inc. | Method for making small pore for use in programmable resistance memory element |
US6774387B2 (en) | 2001-06-26 | 2004-08-10 | Ovonyx, Inc. | Programmable resistance memory element |
US6589714B2 (en) | 2001-06-26 | 2003-07-08 | Ovonyx, Inc. | Method for making programmable resistance memory element using silylated photoresist |
US6605527B2 (en) | 2001-06-30 | 2003-08-12 | Intel Corporation | Reduced area intersection between electrode and programming element |
US6511867B2 (en) | 2001-06-30 | 2003-01-28 | Ovonyx, Inc. | Utilizing atomic layer deposition for programmable device |
US6673700B2 (en) | 2001-06-30 | 2004-01-06 | Ovonyx, Inc. | Reduced area intersection between electrode and programming element |
US6643165B2 (en) | 2001-07-25 | 2003-11-04 | Nantero, Inc. | Electromechanical memory having cell selection circuitry constructed with nanotube technology |
US6737312B2 (en) | 2001-08-27 | 2004-05-18 | Micron Technology, Inc. | Method of fabricating dual PCRAM cells sharing a common electrode |
US6709958B2 (en) | 2001-08-30 | 2004-03-23 | Micron Technology, Inc. | Integrated circuit device and fabrication using metal-doped chalcogenide materials |
US6507061B1 (en) | 2001-08-31 | 2003-01-14 | Intel Corporation | Multiple layer phase-change memory |
US6586761B2 (en) | 2001-09-07 | 2003-07-01 | Intel Corporation | Phase change material memory device |
US6861267B2 (en) | 2001-09-17 | 2005-03-01 | Intel Corporation | Reducing shunts in memories with phase-change material |
US7045383B2 (en) | 2001-09-19 | 2006-05-16 | BAE Systems Information and Ovonyx, Inc | Method for making tapered opening for programmable resistance memory element |
US6566700B2 (en) | 2001-10-11 | 2003-05-20 | Ovonyx, Inc. | Carbon-containing interfacial layer for phase-change memory |
US6800563B2 (en) | 2001-10-11 | 2004-10-05 | Ovonyx, Inc. | Forming tapered lower electrode phase-change memories |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US6545903B1 (en) | 2001-12-17 | 2003-04-08 | Texas Instruments Incorporated | Self-aligned resistive plugs for forming memory cell with phase change material |
US6512241B1 (en) | 2001-12-31 | 2003-01-28 | Intel Corporation | Phase change material memory device |
US6867638B2 (en) | 2002-01-10 | 2005-03-15 | Silicon Storage Technology, Inc. | High voltage generation and regulation system for digital multilevel nonvolatile memory |
JP3948292B2 (ja) | 2002-02-01 | 2007-07-25 | 株式会社日立製作所 | 半導体記憶装置及びその製造方法 |
US6972430B2 (en) | 2002-02-20 | 2005-12-06 | Stmicroelectronics S.R.L. | Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof |
US7122281B2 (en) | 2002-02-26 | 2006-10-17 | Synopsys, Inc. | Critical dimension control using full phase and trim masks |
JP3796457B2 (ja) | 2002-02-28 | 2006-07-12 | 富士通株式会社 | 不揮発性半導体記憶装置 |
AU2003233406A1 (en) | 2002-03-15 | 2003-09-29 | Axon Technologies Corporation | Programmable structure, an array including the structure, and methods of forming the same |
US6579760B1 (en) | 2002-03-28 | 2003-06-17 | Macronix International Co., Ltd. | Self-aligned, programmable phase change memory |
CN1639868A (zh) | 2002-04-09 | 2005-07-13 | 松下电器产业株式会社 | 非易失性存储器及其制造方法 |
US6864500B2 (en) | 2002-04-10 | 2005-03-08 | Micron Technology, Inc. | Programmable conductor memory cell structure |
US6605821B1 (en) | 2002-05-10 | 2003-08-12 | Hewlett-Packard Development Company, L.P. | Phase change material electronic memory structure and method for forming |
US6864503B2 (en) | 2002-08-09 | 2005-03-08 | Macronix International Co., Ltd. | Spacer chalcogenide memory method and device |
US6850432B2 (en) | 2002-08-20 | 2005-02-01 | Macronix International Co., Ltd. | Laser programmable electrically readable phase-change memory method and device |
JP4133141B2 (ja) | 2002-09-10 | 2008-08-13 | 株式会社エンプラス | 電気部品用ソケット |
JP4190238B2 (ja) | 2002-09-13 | 2008-12-03 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
AU2003259447A1 (en) | 2002-10-11 | 2004-05-04 | Koninklijke Philips Electronics N.V. | Electric device comprising phase change material |
US6992932B2 (en) | 2002-10-29 | 2006-01-31 | Saifun Semiconductors Ltd | Method circuit and system for read error detection in a non-volatile memory array |
JP4928045B2 (ja) | 2002-10-31 | 2012-05-09 | 大日本印刷株式会社 | 相変化型メモリ素子およびその製造方法 |
US6940744B2 (en) | 2002-10-31 | 2005-09-06 | Unity Semiconductor Corporation | Adaptive programming technique for a re-writable conductive memory device |
US6744088B1 (en) | 2002-12-13 | 2004-06-01 | Intel Corporation | Phase change memory device on a planar composite layer |
US7589343B2 (en) | 2002-12-13 | 2009-09-15 | Intel Corporation | Memory and access device and method therefor |
US6791102B2 (en) | 2002-12-13 | 2004-09-14 | Intel Corporation | Phase change memory |
US6815266B2 (en) | 2002-12-30 | 2004-11-09 | Bae Systems Information And Electronic Systems Integration, Inc. | Method for manufacturing sidewall contacts for a chalcogenide memory device |
EP1439583B1 (en) | 2003-01-15 | 2013-04-10 | STMicroelectronics Srl | Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof |
JP4932471B2 (ja) | 2003-01-31 | 2012-05-16 | エヌエックスピー ビー ヴィ | 低消費電力且つ高選択度のためのmramアーキテクチャ |
US7115927B2 (en) | 2003-02-24 | 2006-10-03 | Samsung Electronics Co., Ltd. | Phase changeable memory devices |
KR100486306B1 (ko) | 2003-02-24 | 2005-04-29 | 삼성전자주식회사 | 셀프 히터 구조를 가지는 상변화 메모리 소자 |
US6936544B2 (en) | 2003-03-11 | 2005-08-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of removing metal etching residues following a metal etchback process to improve a CMP process |
KR100504698B1 (ko) | 2003-04-02 | 2005-08-02 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
KR100979710B1 (ko) | 2003-05-23 | 2010-09-02 | 삼성전자주식회사 | 반도체 메모리 소자 및 제조방법 |
US20060006472A1 (en) | 2003-06-03 | 2006-01-12 | Hai Jiang | Phase change memory with extra-small resistors |
US7067865B2 (en) | 2003-06-06 | 2006-06-27 | Macronix International Co., Ltd. | High density chalcogenide memory cells |
US6838692B1 (en) | 2003-06-23 | 2005-01-04 | Macronix International Co., Ltd. | Chalcogenide memory device with multiple bits per cell |
US7132350B2 (en) | 2003-07-21 | 2006-11-07 | Macronix International Co., Ltd. | Method for manufacturing a programmable eraseless memory |
US20050018526A1 (en) | 2003-07-21 | 2005-01-27 | Heon Lee | Phase-change memory device and manufacturing method thereof |
KR100615586B1 (ko) | 2003-07-23 | 2006-08-25 | 삼성전자주식회사 | 다공성 유전막 내에 국부적인 상전이 영역을 구비하는상전이 메모리 소자 및 그 제조 방법 |
US7893419B2 (en) | 2003-08-04 | 2011-02-22 | Intel Corporation | Processing phase change material to improve programming speed |
US6815704B1 (en) | 2003-09-04 | 2004-11-09 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids |
US6927410B2 (en) | 2003-09-04 | 2005-08-09 | Silicon Storage Technology, Inc. | Memory device with discrete layers of phase change memory material |
US20050062087A1 (en) | 2003-09-19 | 2005-03-24 | Yi-Chou Chen | Chalcogenide phase-change non-volatile memory, memory device and method for fabricating the same |
DE10345455A1 (de) | 2003-09-30 | 2005-05-04 | Infineon Technologies Ag | Verfahren zum Erzeugen einer Hartmaske und Hartmasken-Anordnung |
US6910907B2 (en) | 2003-11-18 | 2005-06-28 | Agere Systems Inc. | Contact for use in an integrated circuit and a method of manufacture therefor |
KR100558548B1 (ko) | 2003-11-27 | 2006-03-10 | 삼성전자주식회사 | 상변화 메모리 소자에서의 라이트 드라이버 회로 및라이트 전류 인가방법 |
US6937507B2 (en) * | 2003-12-05 | 2005-08-30 | Silicon Storage Technology, Inc. | Memory device and method of operating same |
US7928420B2 (en) | 2003-12-10 | 2011-04-19 | International Business Machines Corporation | Phase change tip storage cell |
US7291556B2 (en) | 2003-12-12 | 2007-11-06 | Samsung Electronics Co., Ltd. | Method for forming small features in microelectronic devices using sacrificial layers |
US7265050B2 (en) | 2003-12-12 | 2007-09-04 | Samsung Electronics Co., Ltd. | Methods for fabricating memory devices using sacrificial layers |
KR100569549B1 (ko) | 2003-12-13 | 2006-04-10 | 주식회사 하이닉스반도체 | 상 변화 저항 셀 및 이를 이용한 불휘발성 메모리 장치 |
US7038230B2 (en) | 2004-01-06 | 2006-05-02 | Macronix Internation Co., Ltd. | Horizontal chalcogenide element defined by a pad for use in solid-state memories |
JP4124743B2 (ja) | 2004-01-21 | 2008-07-23 | 株式会社ルネサステクノロジ | 相変化メモリ |
KR100564608B1 (ko) | 2004-01-29 | 2006-03-28 | 삼성전자주식회사 | 상변화 메모리 소자 |
US6936840B2 (en) | 2004-01-30 | 2005-08-30 | International Business Machines Corporation | Phase-change memory cell and method of fabricating the phase-change memory cell |
US7858980B2 (en) | 2004-03-01 | 2010-12-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reduced active area in a phase change memory structure |
JP4529493B2 (ja) | 2004-03-12 | 2010-08-25 | 株式会社日立製作所 | 半導体装置 |
KR100598100B1 (ko) | 2004-03-19 | 2006-07-07 | 삼성전자주식회사 | 상변환 기억 소자의 제조방법 |
DE102004014487A1 (de) | 2004-03-24 | 2005-11-17 | Infineon Technologies Ag | Speicherbauelement mit in isolierendes Material eingebettetem, aktiven Material |
KR100532509B1 (ko) | 2004-03-26 | 2005-11-30 | 삼성전자주식회사 | SiGe를 이용한 트렌치 커패시터 및 그 형성방법 |
US7482616B2 (en) | 2004-05-27 | 2009-01-27 | Samsung Electronics Co., Ltd. | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same |
US7009694B2 (en) | 2004-05-28 | 2006-03-07 | International Business Machines Corporation | Indirect switching and sensing of phase change memory cells |
US6977181B1 (en) | 2004-06-17 | 2005-12-20 | Infincon Technologies Ag | MTJ stack with crystallization inhibiting layer |
KR100639206B1 (ko) | 2004-06-30 | 2006-10-30 | 주식회사 하이닉스반도체 | 상변환 기억 소자 및 그 제조방법 |
US7359231B2 (en) | 2004-06-30 | 2008-04-15 | Intel Corporation | Providing current for phase change memories |
KR100657897B1 (ko) | 2004-08-21 | 2006-12-14 | 삼성전자주식회사 | 전압 제어층을 포함하는 메모리 소자 |
US7365385B2 (en) | 2004-08-30 | 2008-04-29 | Micron Technology, Inc. | DRAM layout with vertical FETs and method of formation |
KR100610014B1 (ko) | 2004-09-06 | 2006-08-09 | 삼성전자주식회사 | 리키지 전류 보상 가능한 반도체 메모리 장치 |
US7443062B2 (en) | 2004-09-30 | 2008-10-28 | Reliance Electric Technologies Llc | Motor rotor cooling with rotation heat pipes |
TWI277207B (en) | 2004-10-08 | 2007-03-21 | Ind Tech Res Inst | Multilevel phase-change memory, operating method and manufacture method thereof |
KR100626388B1 (ko) | 2004-10-19 | 2006-09-20 | 삼성전자주식회사 | 상변환 메모리 소자 및 그 형성 방법 |
DE102004052611A1 (de) | 2004-10-29 | 2006-05-04 | Infineon Technologies Ag | Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle |
US7364935B2 (en) | 2004-10-29 | 2008-04-29 | Macronix International Co., Ltd. | Common word line edge contact phase-change memory |
US7238959B2 (en) | 2004-11-01 | 2007-07-03 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same |
US20060108667A1 (en) | 2004-11-22 | 2006-05-25 | Macronix International Co., Ltd. | Method for manufacturing a small pin on integrated circuits or other devices |
US7202493B2 (en) | 2004-11-30 | 2007-04-10 | Macronix International Co., Inc. | Chalcogenide memory having a small active region |
JP2006156886A (ja) | 2004-12-01 | 2006-06-15 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
KR100827653B1 (ko) | 2004-12-06 | 2008-05-07 | 삼성전자주식회사 | 상변화 기억 셀들 및 그 제조방법들 |
US7220983B2 (en) | 2004-12-09 | 2007-05-22 | Macronix International Co., Ltd. | Self-aligned small contact phase-change memory method and device |
TWI260764B (en) | 2004-12-10 | 2006-08-21 | Macronix Int Co Ltd | Non-volatile memory cell and operating method thereof |
US20060131555A1 (en) | 2004-12-22 | 2006-06-22 | Micron Technology, Inc. | Resistance variable devices with controllable channels |
US20060138467A1 (en) | 2004-12-29 | 2006-06-29 | Hsiang-Lan Lung | Method of forming a small contact in phase-change memory and a memory cell produced by the method |
JP4646634B2 (ja) | 2005-01-05 | 2011-03-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7419771B2 (en) | 2005-01-11 | 2008-09-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a finely patterned resist |
US20060172067A1 (en) | 2005-01-28 | 2006-08-03 | Energy Conversion Devices, Inc | Chemical vapor deposition of chalcogenide materials |
US7214958B2 (en) | 2005-02-10 | 2007-05-08 | Infineon Technologies Ag | Phase change memory cell with high read margin at low power operation |
US7099180B1 (en) | 2005-02-15 | 2006-08-29 | Intel Corporation | Phase change memory bits reset through a series of pulses of increasing amplitude |
US7229883B2 (en) | 2005-02-23 | 2007-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Phase change memory device and method of manufacture thereof |
JP2006244561A (ja) | 2005-03-01 | 2006-09-14 | Renesas Technology Corp | 半導体装置 |
US7154774B2 (en) | 2005-03-30 | 2006-12-26 | Ovonyx, Inc. | Detecting switching of access elements of phase change memory cells |
US7488967B2 (en) | 2005-04-06 | 2009-02-10 | International Business Machines Corporation | Structure for confining the switching current in phase memory (PCM) cells |
US7166533B2 (en) | 2005-04-08 | 2007-01-23 | Infineon Technologies, Ag | Phase change memory cell defined by a pattern shrink material process |
KR100675279B1 (ko) | 2005-04-20 | 2007-01-26 | 삼성전자주식회사 | 셀 다이오드들을 채택하는 상변이 기억소자들 및 그제조방법들 |
KR100682946B1 (ko) | 2005-05-31 | 2007-02-15 | 삼성전자주식회사 | 상전이 램 및 그 동작 방법 |
KR100668846B1 (ko) | 2005-06-10 | 2007-01-16 | 주식회사 하이닉스반도체 | 상변환 기억 소자의 제조방법 |
US7598512B2 (en) | 2005-06-17 | 2009-10-06 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation layer and manufacturing method |
US7514367B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Method for manufacturing a narrow structure on an integrated circuit |
US7514288B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Manufacturing methods for thin film fuse phase change ram |
US8237140B2 (en) | 2005-06-17 | 2012-08-07 | Macronix International Co., Ltd. | Self-aligned, embedded phase change RAM |
US7238994B2 (en) | 2005-06-17 | 2007-07-03 | Macronix International Co., Ltd. | Thin film plate phase change ram circuit and manufacturing method |
US7534647B2 (en) | 2005-06-17 | 2009-05-19 | Macronix International Co., Ltd. | Damascene phase change RAM and manufacturing method |
US7321130B2 (en) | 2005-06-17 | 2008-01-22 | Macronix International Co., Ltd. | Thin film fuse phase change RAM and manufacturing method |
US7696503B2 (en) | 2005-06-17 | 2010-04-13 | Macronix International Co., Ltd. | Multi-level memory cell having phase change element and asymmetrical thermal boundary |
US20060289848A1 (en) | 2005-06-28 | 2006-12-28 | Dennison Charles H | Reducing oxidation of phase change memory electrodes |
KR100669854B1 (ko) | 2005-07-05 | 2007-01-16 | 삼성전자주식회사 | 단위 셀 구조물과 그 제조 방법 및 이를 갖는 비휘발성메모리 소자 및 그 제조 방법 |
US7309630B2 (en) | 2005-07-08 | 2007-12-18 | Nanochip, Inc. | Method for forming patterned media for a high density data storage device |
US7345907B2 (en) | 2005-07-11 | 2008-03-18 | Sandisk 3D Llc | Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements |
US20070037101A1 (en) | 2005-08-15 | 2007-02-15 | Fujitsu Limited | Manufacture method for micro structure |
US20070045606A1 (en) | 2005-08-30 | 2007-03-01 | Michele Magistretti | Shaping a phase change layer in a phase change memory cell |
KR100655443B1 (ko) | 2005-09-05 | 2006-12-08 | 삼성전자주식회사 | 상변화 메모리 장치 및 그 동작 방법 |
US7615770B2 (en) | 2005-10-27 | 2009-11-10 | Infineon Technologies Ag | Integrated circuit having an insulated memory |
US7417245B2 (en) | 2005-11-02 | 2008-08-26 | Infineon Technologies Ag | Phase change memory having multilayer thermal insulation |
US7397060B2 (en) | 2005-11-14 | 2008-07-08 | Macronix International Co., Ltd. | Pipe shaped phase change memory |
US20070111429A1 (en) | 2005-11-14 | 2007-05-17 | Macronix International Co., Ltd. | Method of manufacturing a pipe shaped phase change memory |
US7786460B2 (en) | 2005-11-15 | 2010-08-31 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7394088B2 (en) | 2005-11-15 | 2008-07-01 | Macronix International Co., Ltd. | Thermally contained/insulated phase change memory device and method (combined) |
US7635855B2 (en) | 2005-11-15 | 2009-12-22 | Macronix International Co., Ltd. | I-shaped phase change memory cell |
US7450411B2 (en) | 2005-11-15 | 2008-11-11 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7414258B2 (en) | 2005-11-16 | 2008-08-19 | Macronix International Co., Ltd. | Spacer electrode small pin phase change memory RAM and manufacturing method |
US7479649B2 (en) | 2005-11-21 | 2009-01-20 | Macronix International Co., Ltd. | Vacuum jacketed electrode for phase change memory element |
US7449710B2 (en) | 2005-11-21 | 2008-11-11 | Macronix International Co., Ltd. | Vacuum jacket for phase change memory element |
US7507986B2 (en) | 2005-11-21 | 2009-03-24 | Macronix International Co., Ltd. | Thermal isolation for an active-sidewall phase change memory cell |
US7829876B2 (en) | 2005-11-21 | 2010-11-09 | Macronix International Co., Ltd. | Vacuum cell thermal isolation for a phase change memory device |
US7599217B2 (en) | 2005-11-22 | 2009-10-06 | Macronix International Co., Ltd. | Memory cell device and manufacturing method |
US7688619B2 (en) | 2005-11-28 | 2010-03-30 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7459717B2 (en) | 2005-11-28 | 2008-12-02 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7605079B2 (en) | 2005-12-05 | 2009-10-20 | Macronix International Co., Ltd. | Manufacturing method for phase change RAM with electrode layer process |
US7642539B2 (en) | 2005-12-13 | 2010-01-05 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation pad and manufacturing method |
US7531825B2 (en) | 2005-12-27 | 2009-05-12 | Macronix International Co., Ltd. | Method for forming self-aligned thermal isolation cell for a variable resistance memory array |
CN100514663C (zh) * | 2005-12-30 | 2009-07-15 | 财团法人工业技术研究院 | 半导体存储元件、相变存储元件及其制造方法 |
US8062833B2 (en) | 2005-12-30 | 2011-11-22 | Macronix International Co., Ltd. | Chalcogenide layer etching method |
US7292466B2 (en) | 2006-01-03 | 2007-11-06 | Infineon Technologies Ag | Integrated circuit having a resistive memory |
KR100763908B1 (ko) | 2006-01-05 | 2007-10-05 | 삼성전자주식회사 | 상전이 물질, 이를 포함하는 상전이 메모리와 이의 동작방법 |
US7595218B2 (en) | 2006-01-09 | 2009-09-29 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7741636B2 (en) | 2006-01-09 | 2010-06-22 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7560337B2 (en) | 2006-01-09 | 2009-07-14 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US20070158632A1 (en) | 2006-01-09 | 2007-07-12 | Macronix International Co., Ltd. | Method for Fabricating a Pillar-Shaped Phase Change Memory Element |
US7825396B2 (en) | 2006-01-11 | 2010-11-02 | Macronix International Co., Ltd. | Self-align planerized bottom electrode phase change memory and manufacturing method |
US7351648B2 (en) | 2006-01-19 | 2008-04-01 | International Business Machines Corporation | Methods for forming uniform lithographic features |
US7432206B2 (en) | 2006-01-24 | 2008-10-07 | Macronix International Co., Ltd. | Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram |
US7456421B2 (en) | 2006-01-30 | 2008-11-25 | Macronix International Co., Ltd. | Vertical side wall active pin structures in a phase change memory and manufacturing methods |
US7956358B2 (en) | 2006-02-07 | 2011-06-07 | Macronix International Co., Ltd. | I-shaped phase change memory cell with thermal isolation |
US7426134B2 (en) | 2006-02-24 | 2008-09-16 | Infineon Technologies North America | Sense circuit for resistive memory |
US7910907B2 (en) | 2006-03-15 | 2011-03-22 | Macronix International Co., Ltd. | Manufacturing method for pipe-shaped electrode phase change memory |
US20070235811A1 (en) | 2006-04-07 | 2007-10-11 | International Business Machines Corporation | Simultaneous conditioning of a plurality of memory cells through series resistors |
US8896045B2 (en) | 2006-04-19 | 2014-11-25 | Infineon Technologies Ag | Integrated circuit including sidewall spacer |
US7928421B2 (en) | 2006-04-21 | 2011-04-19 | Macronix International Co., Ltd. | Phase change memory cell with vacuum spacer |
US20070249090A1 (en) | 2006-04-24 | 2007-10-25 | Philipp Jan B | Phase-change memory cell adapted to prevent over-etching or under-etching |
US8129706B2 (en) | 2006-05-05 | 2012-03-06 | Macronix International Co., Ltd. | Structures and methods of a bistable resistive random access memory |
US7608848B2 (en) | 2006-05-09 | 2009-10-27 | Macronix International Co., Ltd. | Bridge resistance random access memory device with a singular contact structure |
US7423300B2 (en) | 2006-05-24 | 2008-09-09 | Macronix International Co., Ltd. | Single-mask phase change memory element |
US7696506B2 (en) | 2006-06-27 | 2010-04-13 | Macronix International Co., Ltd. | Memory cell with memory material insulation and manufacturing method |
US7663909B2 (en) | 2006-07-10 | 2010-02-16 | Qimonda North America Corp. | Integrated circuit having a phase change memory cell including a narrow active region width |
US7785920B2 (en) | 2006-07-12 | 2010-08-31 | Macronix International Co., Ltd. | Method for making a pillar-type phase change memory element |
US7542338B2 (en) | 2006-07-31 | 2009-06-02 | Sandisk 3D Llc | Method for reading a multi-level passive element memory cell array |
US7394089B2 (en) * | 2006-08-25 | 2008-07-01 | International Business Machines Corporation | Heat-shielded low power PCM-based reprogrammable EFUSE device |
US7684225B2 (en) | 2006-10-13 | 2010-03-23 | Ovonyx, Inc. | Sequential and video access for non-volatile memory arrays |
US20080225489A1 (en) | 2006-10-23 | 2008-09-18 | Teledyne Licensing, Llc | Heat spreader with high heat flux and high thermal conductivity |
US20080101110A1 (en) | 2006-10-25 | 2008-05-01 | Thomas Happ | Combined read/write circuit for memory |
US20080137400A1 (en) | 2006-12-06 | 2008-06-12 | Macronix International Co., Ltd. | Phase Change Memory Cell with Thermal Barrier and Method for Fabricating the Same |
US20080165569A1 (en) | 2007-01-04 | 2008-07-10 | Chieh-Fang Chen | Resistance Limited Phase Change Memory Material |
US7515461B2 (en) | 2007-01-05 | 2009-04-07 | Macronix International Co., Ltd. | Current compliant sensing architecture for multilevel phase change memory |
US20080164453A1 (en) | 2007-01-07 | 2008-07-10 | Breitwisch Matthew J | Uniform critical dimension size pore for pcram application |
US7440315B2 (en) | 2007-01-09 | 2008-10-21 | Macronix International Co., Ltd. | Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell |
US7456460B2 (en) | 2007-01-29 | 2008-11-25 | International Business Machines Corporation | Phase change memory element and method of making the same |
US7535756B2 (en) | 2007-01-31 | 2009-05-19 | Macronix International Co., Ltd. | Method to tighten set distribution for PCRAM |
US7701759B2 (en) | 2007-02-05 | 2010-04-20 | Macronix International Co., Ltd. | Memory cell device and programming methods |
US7463512B2 (en) | 2007-02-08 | 2008-12-09 | Macronix International Co., Ltd. | Memory element with reduced-current phase change element |
US8138028B2 (en) | 2007-02-12 | 2012-03-20 | Macronix International Co., Ltd | Method for manufacturing a phase change memory device with pillar bottom electrode |
US8008643B2 (en) | 2007-02-21 | 2011-08-30 | Macronix International Co., Ltd. | Phase change memory cell with heater and method for fabricating the same |
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2008
- 2008-06-12 US US12/138,311 patent/US8415651B2/en active Active
- 2008-06-26 TW TW097123947A patent/TWI427773B/zh active
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2009
- 2009-01-07 CN CN2009100013443A patent/CN101604729B/zh active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI757895B (zh) * | 2020-09-03 | 2022-03-11 | 旺宏電子股份有限公司 | 柱狀記憶胞及其製造方法、積體電路記憶體裝置 |
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Publication number | Publication date |
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US20090309087A1 (en) | 2009-12-17 |
CN101604729B (zh) | 2011-07-27 |
US8415651B2 (en) | 2013-04-09 |
CN101604729A (zh) | 2009-12-16 |
TWI427773B (zh) | 2014-02-21 |
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