200921937 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種固態發光元件（solid-state light emitting device)的製作方法，特別是指一種高信賴性之固態 發光元件的製作方法。 【先前技術】 隨著發光二極體（light emitting diode，以下簡稱LED) 在一般日常生活中與工業應用中所扮演的角色日趨重要， 其需求量亦隨著其重要性的提昇而日漸增加。 以目前LED相關領域中待解決的問題觀之，常見者有 諸如：因藍寶石（sapphire)基板散熱不足而影響LED本身的 發光效率、因 GaN系蟲晶膜内部差排密度（dislocation density)過高而降低内部量子效率（internal quantum efficiency)，或者因不良的製作方法所導致的信賴性不足等 問題。 LED相關領域者皆知，為解決因藍寶石基板散熱不足 的問題，在常見的解決方法中，主要是利用晶圓鍵合（wafer bonding)的技術手段，利用金屬鍵合層（bonding layer)將 GaN系屋晶膜與熱傳性（thermal conductivity)高且具導電性 的基板予以鍵合；其中，磊製有GaN系磊晶膜的磊晶基板（ 如，低熱傳性的藍寶石）則是利用此技術領域所知悉的雷射 剝離（laser lift-off，以下簡稱LLO)技術，對形成於藍寶石 基板與GaN系磊晶膜之間的GaN緩衝層進行光裂解反應， 以使得GaN緩衝層中的Ga與N產生分離進而移除藍寶石 200921937 基板。 雖然上述晶圓鍵合技術與LLO技術可將GaN系蟲晶膜 轉貼到散熱性佳的基板並移除低熱傳性的藍寶石基板，以 解決LED的散熱問題；然而，由於實施在GaN緩衝層的光 裂解反應疋屬於***反應（explosion reaction)，其於剝離過 程中將增加差排延伸的機率；因此，LED在長期使用之下 ’亦將於此延伸的缺陷中形成漏電路徑，並造成信賴性品 質上的缺失。 參閱圖 1，Seong-Jin Kim 於 Phy_ Stat. Sol.⑷ 203,BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of fabricating a solid-state light emitting device, and more particularly to a method for fabricating a highly reliable solid-state light-emitting device. [Prior Art] With the increasing role of light emitting diodes (LEDs) in general daily life and industrial applications, the demand for them has increased with the increase of its importance. In view of the problems to be solved in the current LED related fields, common ones are, for example, due to insufficient heat dissipation of the sapphire substrate, which affects the luminous efficiency of the LED itself, and the internal dislocation density of the GaN-based insect film is too high. It reduces the internal quantum efficiency or the lack of reliability due to poor manufacturing methods. LED related fields are known. In order to solve the problem of insufficient heat dissipation due to sapphire substrates, in common solutions, wafer bonding is used to bond GaN using a metal bonding layer. The base film is bonded to a substrate having high thermal conductivity and conductivity; wherein an epitaxial substrate having a GaN epitaxial film (for example, a low heat transfer sapphire) is used. A laser lift-off (LLO) technique known in the art performs a photocleavage reaction on a GaN buffer layer formed between a sapphire substrate and a GaN-based epitaxial film to cause Ga in the GaN buffer layer. Separated from N to remove the sapphire 200921937 substrate. Although the above wafer bonding technology and LLO technology can transfer the GaN-based insect film to the heat-dissipating substrate and remove the low-heat-transfer sapphire substrate to solve the heat dissipation problem of the LED; however, due to implementation in the GaN buffer layer The photolysis reaction 疋 belongs to the explosion reaction, which increases the probability of the extension of the diffusion during the stripping process; therefore, the LED will form a leakage path in the defect of this extension under long-term use, and cause reliability. The lack of quality. See Figure 1, Seong-Jin Kim at Phy_ Stat. Sol. (4) 203,
No.5, 997-1004 (2006)中揭露一種利用濕式蝕刻法製作垂直 導通（vertical-electrode)的發光二極體i。該垂直導通的發光 二極體1，包含：一 p-電極U、一厚度約5 μηι並具有一環 形開口 121的藍寶石基板12、一夾置於該ρ_電極u與該藍 寶石基板12之間的GaN系磊晶膜13、一夾置於該ρ_電極 11與5玄GaN系蟲晶膜13之間的共晶金屬（eutectic metai)14 、及一夾置於該p-電極11與該共晶金屬14之間且厚度約 100 μηι的Si基板15，一填置於該環形開口 121並與該No. 5, 997-1004 (2006) discloses a vertical-electrode LED i which is formed by wet etching. The vertically-conducting LED 1 comprises: a p-electrode U, a sapphire substrate 12 having a thickness of about 5 μm and having an annular opening 121, and a sandwich between the p-electrode u and the sapphire substrate 12 a GaN-based epitaxial film 13 , a eutectic metai 14 sandwiched between the ρ_electrode 11 and the 5 GaN GaN-based lithographic film 13 , and a p-electrode 11 interposed therebetween A Si substrate 15 between the eutectic metals 14 and having a thickness of about 100 μm is filled in the annular opening 121 and
GaN系蟲晶膜13歐姆接觸（ohmic contact)的η-電極16。 該垂直導通的發光二極體1的製作方法主要是使用晶 圓鍵合的技術並配合使用濕式蝕刻法所完成。由於Se〇ng_ Jin Kim僅於前揭文章中揭示出最終的元件圖式；因此，以 下是在未配合元件製作流程圖式的情況下，僅配合參閱圖】 來說明Seong-JinKim於前揭文章中所揭示的製作方法。GaN-based crystallization film 13 ohmic contact η-electrode 16. The method of fabricating the vertically-conducting light-emitting diode 1 is mainly carried out by using a technique of crystal round bonding in combination with a wet etching method. Since Se〇ng_ Jin Kim only reveals the final component schema in the previous article; therefore, the following is a description of the Seong-JinKim article in the case where the flow chart is not matched with the component. The production method disclosed in the above.
Seong-Jin Kim主要是先將磊製有該GaN系磊晶膜13 200921937 的藍寶石基板12預先研磨達約8〇 μιη的厚度；進一步地， 利用該共晶金屬(Pt/Au/Ti/Pt/Au) i 4透過晶圓鍵合技術以將 該Si基板15與該GaN系磊晶膜13予以鍵合。 接續’利用混合有H2S〇4# h3P〇4的濕式㈣劑對該 該藍寶石基板12施予32GX：的濕式#刻以將該藍寶石基板 12敍刻達趨近5 μπι的厚度；進—步地，於該藍寶石基板 12上形成一具有一環形開口的si〇2遮罩（mask)，並利用 25(TC之ΗΑ〇4濕式蝕刻劑以3〇 nm/min之蝕刻速率移除該 環形開口處的藍寶；5，進而形成該藍寶石基板12的環形開 口 121。在完成該環形開口 121後，於該環形開口 ΐ2ι内填 置入該η-電極16。 最後，研磨該Si基板15達趨近1〇〇 μηι的厚度，並於 該Si基板15形成該ρ-電極u以完成該垂直導通的發光二 極體1。Seong-Jin Kim mainly pre-polished the sapphire substrate 12 on which the GaN-based epitaxial film 13 200921937 is made up to a thickness of about 8 μm; further, using the eutectic metal (Pt/Au/Ti/Pt/ Au) i 4 is bonded to the GaN-based epitaxial film 13 by a wafer bonding technique. Subsequently, the sapphire substrate 12 is subjected to 32GX: wet etching using a wet (four) agent mixed with H2S〇4# h3P〇4 to scribe the sapphire substrate 12 to a thickness of approximately 5 μm; Stepwise, a si〇2 mask having an annular opening is formed on the sapphire substrate 12, and the etching is performed by using 25 (TC of 4 wet etchant at an etching rate of 3 〇nm/min). The sapphire at the annular opening; 5, and thus the annular opening 121 of the sapphire substrate 12. After the annular opening 121 is completed, the η-electrode 16 is filled in the annular opening 。2. Finally, the Si substrate 15 is ground. The light reaches the thickness of 1 〇〇μηι, and the ρ-electrode u is formed on the Si substrate 15 to complete the vertical conduction of the light-emitting diode 1.
Seong-Jin Kim所揭示的濕式姓刻法雖然可不需透過 LL0技術將藍寶石基板移除以解決散熱的問題。然而，該 藍寶石基板12在實施濕式蝕刻法以形成該環形開口丨2丨之 前，尚有一道機械研磨的薄化處理（lapping and p〇Hsh process)及一道濕式蝕刻法的薄化處理；此外，以移除該環 形開口處的藍寶石之蝕刻速率為30 nm/min計算，5 μιη厚 的藍寶石則需化費約2小時。因此，Seong-Jin Kim所揭示 的方法不僅製程繁複，亦相當耗時。 再者，由於該GaN系磊晶膜13的總膜層厚度僅6 μιη 左右；因此，當厚度約5 μηι的該藍寶石基板12於形成該 200921937 環形開〇 121的過程日夺，厚度僅約6 μιη的GaN系蟲晶膜 13不僅無法阻隔濕式蝕刻劑對該共晶金屬14的破壞；此外 ’该共晶金屬14亦將因遭受濕式蝕刻劑的破壞而影響元件 的信賴性品質。 經上述說明可知，尋求簡易的製作方法以製得高信賴 性的固態發光元件，是當前開發固態發光元件相關領域者 所待突破的課題。 【發明内容】 <發明概要> 有鑑於Se〇ng-Jin Kim在先前技術中所使用的濕式蝕刻 法對元件信賴性品質所造成的影響。本發明主要是先於一 磊晶基板上的一第一磊晶膜中形成相互交錯且連通並定義 出複數柱體的溝槽，進—步地，於該n日日膜再成長 (regrowth)-具有_ pn接面（pn juncti〇n)的第二蟲晶膜。後 續，亦透過晶圓鍵合技術以使該第二磊晶膜與一導電性基 板鍵合。 而移除磊晶基板的技術，則是利用毛細現象 (CaPlllaHty)以於該等溝槽中引人僅對該等蟲晶膜產生姑刻 反應的濕式蝕刻劑’藉以使得濕式蝕刻的反應速率得以因 反應表面積的增加而變快；$，該蟲晶基板則是因該第一 蟲晶膜中的柱體是優先地受濕式㈣劑所侵ϋ，而得以快 速地被移除掉。此外，值得—提的是，該等溝槽與柱體的 整體結構可使得該第二蟲晶臈於再成長期間抑制差排的延 伸因此，整體固態發光元件的内部量子效率亦得以有效 8 200921937 地被提昇。 <發明目的> 此’本發明之目的’即在提供 间秸賴性之固 發光元件的製作方法 於是’本發明高信賴性之固態發光元件的製作方法， 匕3以下步驟： ⑷於、-磊晶基板上的一第一磊晶膜形成複數相互交錯 且連通並定義出複數柱體的溝槽； (b)對該第-磊晶膜施予再成長以形成—具有pn接面的 第一蟲晶膜； ⑷利用-金屬鍵合膜將該第二磊晶膜與—導電性基板 鍵合； ⑷於該等溝槽内引入濕式蝕刻劑以蝕刻各相鄰溝槽間 的柱體並移除該磊晶基板；及 一者形成至少一 (e)於该第一磊晶膜與第二磊晶膜其中 接觸電極。 本發明之功效在於，提供既簡易又省時的製作方法以 製得信賴性品質優異且内部量子效率高的固態發光元件。 【實施方式】 ^ ° <發明詳細說明> 參閱圖2、圖3與圖4,本發明高信賴性之固態發光元 件的製作方法之一較佳實施例，包含以下步驟： ⑷於-磊晶基板2上的一第一磊晶膜3形成複數相互 交錯且連通並定義出複數柱體31的溝槽32 ; 200921937 ⑻對該第一蟲晶膜3施予再成長以形成-具有Pn接面 的第二磊晶膜4 ; ⑷利用-金屬鍵合膜5將該第二磊晶膜4與_導電性 基板6鍵合； ⑷於该等溝槽32内引入濕式蝕刻劑7以蝕刻各相鄰溝 槽32間的柱體31並移除該磊晶基板2 ;及 (e)於該第一磊晶膜3與第二磊晶膜4其中一者形成至 少一接觸電極8。 本發明該步驟（d)主要是利用毛細現象於該等溝槽&内 引入濕式蝕刻齊"。而值得一提的是，當該步驟⑷的溝槽 32之溝槽寬度不足時，將影響濕式蝕刻劑7滲透於該等溝 槽32内的滲透量並降低触刻速率；另，當該步驟⑷之桂體 31的柱體尺寸過大時，不僅影響濕式蝕刻速率，亦將無法 有效地抑制形成於該第^晶膜4㈣差排量⑽未示） 此，如圖4所示，較佳地，定義該步驟（a)的溝槽32之溝槽 寬度與相鄰溝槽32間之柱體31的柱體尺寸分別為〇與d， D是介於5 nm〜looo nm之間，d是介於5 〜⑺㈧订爪 之間。又本發明並非僅侷限於如圖4所顯示之圓形柱體才 可實施，凡是藉由柱體共同定義出相互交錯且連通的溝槽 之結構，皆利於在溝槽内引入濕式蝕刻劑，例如：正方彤 柱體、六角柱體、三角柱體等。 另，值得一提的是，當該步驟⑷之柱體31的長徑比 (aspect ratio)過大時，那麼，在製作過程中，該等柱體 將容易因些微的撞擊而產生斷裂。因此，參閱圖5,較佳地 10 200921937 ，定義該步驟（a)之溝槽32的溝槽深度為Η，Η/D是介於2 〜400之間。更佳地，d是介於50 nm〜500 nm之間；D是 介於20 nm ~ 500 nm之間；η/D是介於5〜100之間。又更 佳地，d是介於50 nm〜300 nm之間；D是介於2〇 nm〜 300 nm之間；Η/D是介於5〜50之間。 又值得一提的是，當Η/D之比值足夠大時，那麼，在 完成該步驟（d)之後的該第一磊晶膜3則尚留下有未被該濕 式蝕刻劑7蝕刻掉並可增加本發明之固態發光元件的光取 出率的柱體31。因此，參閱圖6，本發明之製作方法的另 一較佳實施例，是於該步驟(d)之後更包含一步驟（d，）。該步 驟（d，）是對該第一磊晶膜3的該等柱體31施予薄化處理。 在本發明之一具體例中，該步驟（e)是於該第二磊晶臈4上 形成一接觸電極8 ;在本發明之另一具體例中，該步驟（e)是 於遠第-遙晶膜3的部分柱體31上分別形成__接觸電極8 〇 亥導電性基板6受該濕式蝕刻劑7的影響雖然不大， 但為進—步地财該導電性基板6的完整外觀。因此，再 2圖3，較佳地，本發日狀製作方法於該步驟⑷之後更包含 :步驟（c，），該步驟（c，）是於該導電性基板6的一表面包裹 -蝕刻阻障層(etching st〇p layer)9;該步驟(c)、(c，)之金屬 ^合膜5錢刻阻障層9兩者與該等Μ膜3、4是互為高 選擇飯刻（selective etching)比的材料。而值得一提的是，由 ^步驟⑷之金屬鍵合膜5與該等以们、4是互為高選 d比的材料’因此’本發明若省略該步驟⑹的蝕刻阻 200921937 障層9 ’僅直接將元件放置於該濕式蝕刻劑7中並避免該濕 式蚀刻劑7接觸該導電性基板6，亦可以於該等溝槽32内 引入該濕式触刻劑7。 適用於本發明該步驟（a)之磊晶基板2是藍寶石基板， 該步驟（a)、（b)第一、二磊晶膜3、4是使用GaN系材料； 該步驟（c，）之蝕刻阻障層9是選自氮化矽（sixN)或氧化石夕 (Si02);該導電性基板6是選自p_Si、p_sic或p_GaAs。在 本發明該等具體例中，該第一磊晶膜3是由n_GaN所構成 ，该第二磊晶膜4是經由一 n-GaN層41、一 p-GaN層42 及一夾置於該η-GaN層41與該p-GaN層42間的多重量子 井（MQW)層43以構成該pn接面；該步驟（c)之金屬鍵合膜 5是由一依序形成於該第二磊晶膜4的Ni/Au/Cr/Pt/Au層 51及一依序形成於該導電性基板6的Cr/Pt/Au層52所構成 。值得一提的是，該Ni/Au/Cr/Pt/Au層51亦可以是以一 Ag/Ni/Au/AuSn 層、一 Cr/Au 層、一 Ti/Au 層、一 Ti/pt/Au 層、一 Ni/Pd/Au 層、一 Ni/Au 層、一 IT〇/Ti/Au 層、一 ITO/Ni/Au 層’或一 ITO/Ti/Pt/Au 層所取代。 本發明之主要技術特徵是在於，利用毛細現象以於該 等溝槽32内引入濕式蝕刻劑7來蝕刻該等柱體31並移除 該磊晶基板2 ;另，利用高選擇性蝕刻比的技術以使得濕式 蝕刻劑僅優先地蝕刻該等柱H 31，並避免因該濕式蝕刻劑 7對該金屬鍵合膜5造成損壞而影響元件的電性連接與信賴 性品質。㈣’該第二4巾的各膜層結構並非本發 明之技術重點，因此，於此不再多加贅述。 12 200921937 適用於本發明該步驟（d)的濕式蝕刻劑是使用濃度介於 0.01 Μ〜0.04 Μ之間的KOH水溶液；且較佳地，該步驟⑷ 的蝕刻反應溫度是介於25t：〜10(rc之間。更佳地，該步驟 (d)的蝕刻反應溫度是介於6(rc〜1〇(rc之間該步驟（心的蝕 刻反應時間是介於20分鐘〜4〇分鐘之間。 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之三個具體例的詳細說明中，將可清楚 的呈現。 在本發明被詳細描述之前，要注意的是，在以下的說 明内容中，類似的元件是以相同的編號來表示。 <具體例1> 本發明高信賴性之固態發光元件的製作方法之一具體 例1是簡單地說明於下。 再參閱圖2，首先，於該磊晶基板2上的第一磊晶膜3 形成該等柱體31並界定出該等溝槽32。在本發明該具體例 1中，該第一磊晶膜3是n-GaN，且該等柱體31的d值是 介於90 nm〜100 ηηι之間，該等通道32的D值與H值分 別是介於50 nm〜100 nm之間與1000 nm〜11〇〇 nm之間（ 如所示圖4及圖5)。 進一步地，對該第一磊晶膜3施予再成長以形成該第 一蟲晶膜4 ’並利用s亥金屬鍵合膜5以350°C持溫1小時的 熱壓條件將該第二磊晶膜4與該導電性基板6予以鍵合。 在該具體例1中’該導電性基板6是p_Si。此外，亦可於該 導電性基板6下形成一 P-電極（圖未示）。 13 200921937 再參圖3 ’於該導電性基板6的表面包裹該姓刻阻障層 9並浸泡於該濕式蝕刻劑7中，以於該等溝槽32内引入該 濕式蝕刻劑7並移除該磊晶基板2。在本發明該具體例i中 ，該蝕刻阻障層9是Si〇2;該濕式蝕刻劑是濃度介於〇 〇ι Μ〜0.03 Μ之間的K〇H水溶液，蝕刻反應溫度是介於75<>c 〜i〇o°c之間，且蝕刻反應時間是介於25分鐘〜3〇分鐘之間 。最後，移除該蝕刻阻障層9並於該第二磊晶膜4上形成 該接觸電極8。 <具體例2> 本發明高信賴性之固態發光元件的製作方法之一具體 例2大致上是相同於該具體例丨，其不同處是在於，該等柱 體31的d值是介於14〇 nm〜160 nm之間，該等通道32的 D值是介於1〇〇 nm〜15〇 nm之間，該等通道32的η值是 介於1400 nm〜1500 nm之間。 <具體例3> 再參閱6,本發明高信賴性之固態發光元件的製作方 法之一具體例2大致上是相同於該具體例丨，其不同處是在 於，該第-蟲晶膜3的該等柱體31之d值是介於19〇 nm〜 210 nm之間，該第一磊晶膜3的該等通道32之d值與η 值分別是介於150 nm〜200 nm之間與19〇〇⑽〜2〇〇〇 nm 之間；此外，該第一磊晶膜3的該等柱體31是進一步地被 =予薄化處理，以使得該第―蟲晶膜3的柱體31與該第二 蟲晶膜4的n-GaN層41的總厚度約為丨μιη :且該等接觸 電極8是均勻地分別形成在部分柱體3】上。 14 200921937 本發明該等具體例之細部製作條件是簡單地整理於下 列表1.中。The wet-type engraving method disclosed by Seong-Jin Kim does not require the LL0 technology to remove the sapphire substrate to solve the problem of heat dissipation. However, the sapphire substrate 12 has a lapping and p〇Hsh process and a thinning process by a wet etching method before performing the wet etching method to form the annular opening 丨2丨; In addition, a 5 μm thick sapphire would take about 2 hours to calculate the etch rate of sapphire at the annular opening of 30 nm/min. Therefore, the method disclosed by Seong-Jin Kim is not only complicated but also time consuming. Furthermore, since the total film thickness of the GaN-based epitaxial film 13 is only about 6 μm; therefore, when the sapphire substrate 12 having a thickness of about 5 μm is formed in the process of forming the 200921937 annular opening 121, the thickness is only about 6 The GaN-based eutectic film 13 of μιη not only cannot block the destruction of the eutectic metal 14 by the wet etchant, but also the eutectic metal 14 will also affect the reliability of the device due to the destruction of the wet etchant. As apparent from the above description, the search for a simple manufacturing method to obtain a highly reliable solid-state light-emitting element is a subject to be solved in the field of developing solid-state light-emitting elements. SUMMARY OF THE INVENTION <Summary of the Invention> The effect of the wet etching method used by Se〇ng-Jin Kim in the prior art on the reliability of components is considered. The invention mainly forms a trench which is interlaced and connected to each other and defines a plurality of pillars in a first epitaxial film on an epitaxial substrate, and further, in the n-day film, regrowth a second insect film having a _ pn junction (pn juncti〇n). Subsequently, the second epitaxial film is bonded to a conductive substrate by a wafer bonding technique. The technique for removing the epitaxial substrate is to use a capillary phenomenon (CaPlllaHty) to introduce a wet etchant that only produces a positive reaction to the insect film in the trenches, thereby making the reaction of the wet etching. The rate is increased by the increase of the reaction surface area; $, the insect crystal substrate is quickly removed because the column in the first insect film is preferentially wetted by the wet agent . In addition, it is worth mentioning that the overall structure of the trenches and the pillars can inhibit the extension of the differential rows during the re-growth of the second insect crystals, and therefore the internal quantum efficiency of the solid-state light-emitting element is also effective. 8 200921937 The ground was promoted. <Objectives of the Invention> The 'object of the present invention' is a method for producing a solid-state light-emitting element which provides interstitial properties, and thus a method for producing a highly reliable solid-state light-emitting element of the present invention, 匕3 the following steps: (4) - a first epitaxial film on the epitaxial substrate forms a plurality of trenches which are interdigitated and connected to each other and define a plurality of pillars; (b) the first epitaxial film is regrown to form - having a pn junction a first insect crystal film; (4) bonding the second epitaxial film to the conductive substrate by using a metal bonding film; (4) introducing a wet etchant into the trenches to etch the pillars between adjacent trenches And removing the epitaxial substrate; and forming at least one of (e) the first epitaxial film and the second epitaxial film to contact the electrode. The effect of the present invention is to provide a simple and time-saving manufacturing method for producing a solid-state light-emitting element which is excellent in reliability and high in internal quantum efficiency. [Embodiment] ^ ° <Detailed Description of the Invention> Referring to Figures 2, 3 and 4, a preferred embodiment of the method for fabricating a highly reliable solid-state light-emitting device of the present invention comprises the following steps: (4) Yu-Lei A first epitaxial film 3 on the crystal substrate 2 forms a plurality of trenches 32 which are interdigitated and communicate with each other and define a plurality of pillars 31; 200921937 (8) The first crystal film 3 is regrown to form - with Pn junction a second epitaxial film 4; (4) bonding the second epitaxial film 4 to the _ conductive substrate 6 by using the -metal bonding film 5; (4) introducing a wet etchant 7 into the trenches 32 for etching The pillars 31 between the adjacent trenches 32 remove the epitaxial substrate 2; and (e) one of the first epitaxial film 3 and the second epitaxial film 4 forms at least one contact electrode 8. This step (d) of the present invention mainly utilizes capillary phenomenon to introduce wet etching in the grooves & It is worth mentioning that when the groove width of the groove 32 of the step (4) is insufficient, the amount of penetration of the wet etchant 7 into the grooves 32 is affected and the etch rate is lowered; When the cylinder size of the cinnamon body 31 in the step (4) is too large, not only the wet etching rate is affected, but also the formation of the fourth crystal film 4 (four) differential displacement (10) is not effectively suppressed, as shown in FIG. Preferably, the groove width defining the groove 32 of the step (a) and the cylinder size of the column 31 between the adjacent grooves 32 are 〇 and d, respectively, and D is between 5 nm and 1 nanometer. d is between 5 and (7) (eight) between the claws. Moreover, the present invention is not limited to the circular cylinder shown in FIG. 4, and the structure in which the grooves are mutually staggered and connected by the cylinders is advantageous for introducing a wet etchant into the trench. For example, a square cylinder, a hexagonal cylinder, a triangular cylinder, and the like. In addition, it is worth mentioning that when the aspect ratio of the cylinder 31 of the step (4) is too large, the cylinders are liable to be broken by a slight impact during the manufacturing process. Therefore, referring to FIG. 5, preferably 10 200921937, the groove depth of the groove 32 defining the step (a) is Η, and Η/D is between 2 and 400. More preferably, d is between 50 nm and 500 nm; D is between 20 nm and 500 nm; and η/D is between 5 and 100. More preferably, d is between 50 nm and 300 nm; D is between 2 〇 nm and 300 nm; Η/D is between 5 and 50. It is also worth mentioning that when the ratio of Η/D is sufficiently large, then the first epitaxial film 3 after the completion of the step (d) remains without being etched away by the wet etchant 7. The column 31 of the light extraction rate of the solid-state light-emitting element of the present invention can be increased. Therefore, referring to Fig. 6, another preferred embodiment of the manufacturing method of the present invention further comprises a step (d,) after the step (d). This step (d,) is to apply a thinning treatment to the pillars 31 of the first epitaxial film 3. In a specific embodiment of the present invention, the step (e) is to form a contact electrode 8 on the second epitaxial germanium 4; in another embodiment of the invention, the step (e) is in the far- The partial pillars 31 of the crystal film 3 are respectively formed with __contact electrodes 8. The conductive substrate 6 is affected by the wet etchant 7, although it is not large, but the integrity of the conductive substrate 6 is further advanced. Exterior. Therefore, in the second embodiment, after the step (4), the method of the present invention further comprises: step (c,), which is wrapped-etched on a surface of the conductive substrate 6. An etching layer (etching st〇p layer) 9; the metal film 5 of the steps (c), (c,), and the barrier layer 9 are mutually high-selective rice Selective etching of the material. It is worth mentioning that the metal bonding film 5 of the step (4) and the materials of the fourth and fourth are mutually high d ratios. Therefore, if the etching etch resistance of the step (6) is omitted in the present invention, the barrier layer 9 is omitted. The wet-type etchant 7 can also be introduced into the trenches 32 by placing the components directly in the wet etchant 7 and avoiding the wet etchant 7 from contacting the conductive substrate 6. The epitaxial substrate 2 suitable for the step (a) of the present invention is a sapphire substrate, and the steps (a) and (b) of the first and second epitaxial films 3 and 4 are GaN-based materials; the step (c,) The etch barrier layer 9 is selected from the group consisting of tantalum nitride (sixN) or oxidized oxide (SiO 2 ); the conductive substrate 6 is selected from p_Si, p_sic or p_GaAs. In the specific examples of the present invention, the first epitaxial film 3 is made of n-GaN, and the second epitaxial film 4 is sandwiched by an n-GaN layer 41, a p-GaN layer 42 a multiple quantum well (MQW) layer 43 between the η-GaN layer 41 and the p-GaN layer 42 to form the pn junction; the metal bonding film 5 of the step (c) is sequentially formed in the second The Ni/Au/Cr/Pt/Au layer 51 of the epitaxial film 4 and the Cr/Pt/Au layer 52 which is sequentially formed on the conductive substrate 6 are formed. It is worth mentioning that the Ni/Au/Cr/Pt/Au layer 51 can also be an Ag/Ni/Au/AuSn layer, a Cr/Au layer, a Ti/Au layer, and a Ti/pt/Au layer. The layer, a Ni/Pd/Au layer, a Ni/Au layer, an IT/Ti/Au layer, an ITO/Ni/Au layer' or an ITO/Ti/Pt/Au layer is substituted. The main technical feature of the present invention is to use capillary phenomenon to introduce the wet etchant 7 into the trenches 32 to etch the pillars 31 and remove the epitaxial substrate 2; The technique is such that the wet etchant preferentially etches the pillars H 31 preferentially and avoids damage to the metal bonding film 5 due to the wet etchant 7, thereby affecting the electrical connection and reliability qualities of the components. (4) The film structure of the second 4th towel is not the technical focus of the present invention, and therefore, no further details are provided herein. 12 200921937 The wet etchant suitable for the step (d) of the present invention is an aqueous KOH solution having a concentration between 0.01 Μ and 0.04 Torr; and preferably, the etching reaction temperature of the step (4) is between 25 t: Preferably, the etching reaction temperature of the step (d) is between 6 (rc~1 〇 (the step between the rc (the etching reaction time of the heart is between 20 minutes and 4 minutes) The foregoing and other technical contents, features, and advantages of the present invention will be apparent from the following detailed description of the accompanying drawings. In the following description, like elements are denoted by the same reference numerals. <Specific Example 1> One of the methods for producing a highly reliable solid-state light-emitting device of the present invention is simply described below. Referring to FIG. 2, first, the first epitaxial film 3 on the epitaxial substrate 2 forms the pillars 31 and defines the trenches 32. In the specific example 1 of the present invention, the first epitaxial film 3 is n-GaN, and the d value of the pillars 31 is between 90 nm and 100 η Between ι, the D and H values of the channels 32 are between 50 nm and 100 nm and between 1000 nm and 11 〇〇 nm (as shown in Figures 4 and 5). Further, The first epitaxial film 3 is further grown to form the first crystal film 4' and the second epitaxial film 4 is heated by a temperature of 350 ° C for 1 hour using a s-metal bonding film 5 In this specific example 1, the conductive substrate 6 is p_Si. Further, a P-electrode (not shown) may be formed under the conductive substrate 6. 13 200921937 Referring to FIG. 3 'the surface of the conductive substrate 6 is wrapped with the surname barrier layer 9 and immersed in the wet etchant 7 to introduce the wet etchant 7 into the trenches 32 and remove the Epitaxial substrate 2. In the specific example i of the present invention, the etch barrier layer 9 is Si 〇 2; the wet etchant is a K 〇 H aqueous solution having a concentration between 〇〇 Μ 〜 0.03 Μ, etching The reaction temperature is between 75 <>c~i〇o°c, and the etching reaction time is between 25 minutes and 3 minutes. Finally, the etching barrier layer 9 is removed and the second On the epitaxial film 4 The contact electrode 8 is formed. <Specific example 2> One of the methods for fabricating the highly reliable solid-state light-emitting device of the present invention is substantially the same as the specific example, and the difference is that the pillars 31 are The value of d is between 14 〇 nm and 160 nm, and the D value of the channels 32 is between 1 〇〇 nm and 15 〇 nm, and the η value of the channels 32 is between 1400 nm and 1500 nm. Between nm and <Specific Example 3> Referring to FIG. 6, one of the methods for fabricating the highly reliable solid-state light-emitting device of the present invention is substantially the same as the specific example, and the difference is that the first- The d values of the pillars 31 of the insect crystal film 3 are between 19 nm and 210 nm, and the d values and the η values of the channels 32 of the first epitaxial film 3 are respectively 150 nm~ Between 200 nm and 19 〇〇 (10) 〜2 〇〇〇 nm; in addition, the pillars 31 of the first epitaxial film 3 are further subjected to a thinning treatment to make the first insect crystal The total thickness of the pillar 31 of the film 3 and the n-GaN layer 41 of the second insect film 4 is about 丨μη: and the contact electrodes 8 are uniformly formed on the partial pillars 3, respectively. 14 200921937 The detailed fabrication conditions of the specific examples of the present invention are simply summarized in Table 1. below.
經前述表1·的整理說明可知，本發明不僅因不需薄化 藍寶石基板而節省製作工時：此外，該等柱體31增加了濕 式姓刻反應的表面積，因此，在移除㈣晶基& 2的製程 上僅花費約30分鐘的時間；再者，本發明亦沒有習知所使 用之LLO技術所存有的信賴性缺失；又，該等柱體η與溝 槽32的結構，使得該第二j晶膜4内的差排密度得以下降 ’因此m件的内部量子效率得以提昇，而該具體例3 的柱體31亦提供了優異的外部量子效率。 练上所述，本發明高信賴性之固態發光元件的製作方 法既簡易又省肖’可製得高信賴性品質之固態發光元件， 確實達到本發明之目的。 惟以上所述者’僅為本發明之較佳實施例而已，當不 旎以此限疋本發明實施之範圍，即大凡依本發明申請專利 15 200921937 範圍及發明說明内容所作之簡單的等效變化與修 屬本發明專利涵蓋之範圍内。 身仍 【圖式簡單說明】 圖1是一正視示意圖，說明習知一種利用 所製作之垂直導通的lED; ”，、式蝕刻法 圖2是一元件製作流程示意圖，說 之固態發光，件的製作方法之一較佳實施例之前=賴性 圈3疋-凡件製作流程示意圖’說明本發明該較佳由 施例之後段流程； 乃-亥車乂佳貝 第日A K —俯視示意圖’說明本發明該較佳實施例之-一 Μ晶膜中的柱體與溝槽間之關係； ^ I視不意圖’說明本發明該較佳實施例之溝 槽見度與溝槽深度間的關係；及 圖6是—正視示意圖，說明由本發明高信賴性之固離 先疋件的製作方法之另—較佳實_的後段流程。 16 200921937 【主要元件符號說明】 2 ..........蠢晶基板 3 ..........第·一遙晶膜 31 .........柱體 32 .........溝槽 4 ..........弟二蟲晶膜 41 .........n-GaN 層 42 .........p-GaN 廣 43 .........多重量子井層 5 ..........金屬鍵合膜 51 .........Ni/Au/Cr/Pt/Au 層 52 .........Cr/Pt/Au 層 6 ..........導電性基板 7 ..........濕式蝕刻劑 8 ..........接觸電極 9 ..........钱刻阻障層 d ..........柱體尺寸 D..........溝槽寬度 Η..........溝槽深度 17It can be seen from the above description of Table 1 that the present invention not only saves manufacturing time by not requiring thinning of the sapphire substrate: in addition, the pillars 31 increase the surface area of the wet-type reaction, and therefore, the (tetra) crystal is removed. The process of the base & 2 takes only about 30 minutes; furthermore, the present invention does not have the loss of reliability inherent in the LLO technology used; and the structure of the columns η and the trenches 32, The difference in the density of the second J film 4 is lowered, so that the internal quantum efficiency of the m piece is improved, and the column 31 of this specific example 3 also provides excellent external quantum efficiency. As described above, the method for producing a highly reliable solid-state light-emitting device of the present invention is simple and elegant, and a solid-state light-emitting element of high reliability can be obtained, which achieves the object of the present invention. However, the above description is only a preferred embodiment of the present invention, and is not limited to the scope of the present invention, that is, the simple equivalent of the scope of the invention patent 15 200921937 and the description of the invention. Changes and modifications are within the scope of the invention patent. Figure 1 is a front view showing a conventional use of the fabricated vertical conduction lED;", etching method Figure 2 is a schematic diagram of a component manufacturing process, said solid state light, the piece One of the production methods is a preferred embodiment before the 赖 赖 疋 疋 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 凡 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' 亥 亥 亥 亥 亥 亥 亥The relationship between the pillars and the trenches in the twin film of the preferred embodiment of the present invention; ^I is not intended to illustrate the relationship between the trench visibility and the trench depth of the preferred embodiment of the present invention. And Fig. 6 is a front elevational view showing the latter stage of the method for manufacturing the high-reliability solid-state splicing device of the present invention. 16 200921937 [Major component symbol description] 2 ...... .... stupid substrate 3 .......... first one crystal film 31 ... ... column 32 ... ... groove 4 . .........二二晶晶膜41 .........n-GaN layer 42 .........p-GaN wide 43....... .. multiple quantum well layer 5 ..... metal bonded film 51 ......... Ni / Au / C r/Pt/Au layer 52 .........Cr/Pt/Au layer 6 ..... conductive substrate 7 ..... wet etching Agent 8 .......... Contact electrode 9 .......... money engraved barrier layer d .......... cylinder size D..... ..... groove width Η.......... groove depth 17