TW200905792A - Method for producing a thin film - Google Patents

Method for producing a thin film Download PDF

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TW200905792A
TW200905792A TW97121038A TW97121038A TW200905792A TW 200905792 A TW200905792 A TW 200905792A TW 97121038 A TW97121038 A TW 97121038A TW 97121038 A TW97121038 A TW 97121038A TW 200905792 A TW200905792 A TW 200905792A
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Taiwan
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layer
substrate
film
ion
sacrificial layer
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TW97121038A
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Chinese (zh)
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TWI469252B (en
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Tien-Hsi Lee
Ching-Han Huang
Chao-Liang Chang
Yao-Yu Yang
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Tien-Hsi Lee
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Abstract

A method for producing a thin film comprises following steps: providing a primary substrate, forming an etching stop layer on the primary substrate, forming a sacrificial layer on the etching stop layer, implanting gas ions to form an ion implantation peak layer, which defines an effective transferred layer and a remnant layer, and separating the effective transferred layer and the remnant layer. The thickness of the effective transferred layer can be controlled effectively by controlling the thickness of the sacrificial layer. Moreover, the thickness of the effective transferred layer can be uniform and then the effective transferred layer can become a nano-thin film.

Description

200905792 九、發明說明: 【發明所屬之技術領域】 本發明係為-種薄_造方法’特別為—種在基板上合成 薄膜之製造方法。 •【先前技術】 .石夕晶絕緣體(Silic〇n On Insulator,S0I)主要是在石夕晶圓下 ,設置絕緣層’用以避免電氣效應並且可降低耗電量以減少電流 "的損失,此外矽晶絕緣體也可加快積體電路(Integrated Circuit, 1C)的處理速度。矽晶絕緣體可應用在需要低耗電量的裝置 上,如行動電話、手錶等,為了能充分發揮矽晶絕緣體可高速 作業的特點’目前也積極朝高頻積體電路應用發展。 而矽晶絕緣體亦有各種不同之製造方法,將分別描述如 後。一九八八年美國的馬舒拉(Dr. W. Maszara)利用一蝕刻停止 層(Etch Stop Layer),製造具微米等級薄膜厚度的鍵合背蝕式 (石夕晶絕緣體(6〇11(^11层£化]1-丑&〇1<:8爪〇〇11〇11111511以〇]:,:6£801)。 然而由於蝕刻停止層在晶圓上各點的停止蝕刻的工作時間不 一,因此會影響鍵合背蝕式矽晶絕緣體上薄膜的膜厚均勻度 (Total Thickness Variation,TTV)。此外,鍵合背蝕式矽晶絕緣 體之製程十分費時’而且所産生之廢棄溶液也易造成環境污染 問題,並使得製造成本居高不下。 同一時期’國際商業機器公司(IBM)應用氧離子直接植入 法(Separation by Implantation 〇xygen,SIMOX)製造矽晶絕緣 體,由於氧離子直接植入法所製造的矽晶絕緣體具有良好的薄 200905792 膜的膜厚均勻度,因此也使得鍵合背蝕式矽晶絕緣體在製造高 度積體電路領域之應用幾乎被淘汰。 一九九二年,法國的布魯爾(Dr. M. Brud)發明一種薄膜製 造方法,即「智切法」(Sman Cut>職ss)。智切法可成功二 由基板切下具有次微米等級薄膜厚度的薄膜,並將薄膜轉移到 另一基板上。智切法能使鍵合背蝕式矽晶絕緣體上薄膜: 厚度具有和利用氧離子直接植入法所製造之薄膜―、/ 、 膜厚均勻度。 、僳良好的 如美國專利第5,374,564號所揭露之製造半導體 ^ 之方法,其係於原始基板中植入高劑量離子如氫或純$二+專膜 離子,並產生一離子層,然後再將原始基板與目樟展『等虱體 體後,措由加熱處理使離子在離子層中聚合,二 s成 微氣泡(microbubbles)。而微氣泡會逐漸連成—片,、弁多的 的原始基板上下分離,而被分離之原始基板即被_ '々而使部份 板上,藉此在目標基板上形成薄膜。智切法所得至目襟基 〇均勻度十分良好,而且薄膜的缺陷密度小,在製造專犋的犋厚 會產生腐餘液,所逸出之氣體也無毒無害,因此中也不 問題,而且原始基板也還可以回收再次使用。 裒 ^無論是智切法或是氧離子直接植入法皆以離 ^來控制離子植入的深度,進而控制石夕晶絕緣體上植 * 一 *「,乃式 π 条低離子植入的能量,離子植入的深度仍不易縮 級,因此難以產生良好離子分佈的淺層佈植,龙製 境污染 j八的能 上薄模的犋 厚。然而,因為智切法中所使用的氫離子質量過低,200905792 IX. Description of the Invention: [Technical Field] The present invention is a method for producing a thin film on a substrate. • [Prior Art] . The Silicium On Insulator (S0I) is mainly used under the Shi Xi wafer to provide an insulating layer to avoid electrical effects and reduce power consumption to reduce current loss. In addition, the germanium insulator can also speed up the processing of the integrated circuit (1C). The crystal insulator can be applied to devices requiring low power consumption, such as mobile phones, watches, etc., in order to fully utilize the characteristics of the high-speed operation of the crystal insulators. The twin crystal insulators also have various manufacturing methods, which will be described separately below. In 1988, Dr. W. Maszara of the United States used an Etch Stop Layer to fabricate a bonded back-etched layer with a micron-thickness film thickness (6 〇 11 ( ^11层£化]1- ugly &〇1<:8 claws 11〇11111511 〇]:,:6£801). However, due to the etch stop layer, the etching time at each point on the wafer is stopped. Different, it will affect the film thickness uniformity (TTV) of the bonded back-etched germanium insulator. In addition, the process of bonding the back-etched germanium insulator is very time consuming and the waste solution produced It is also prone to environmental pollution problems and high manufacturing costs. In the same period, International Business Machines Corporation (IBM) applied a direct ion implantation method (Separation by Implantation 〇xygen, SIMOX) to manufacture germanium insulators due to oxygen ions directly. The twinned insulators produced by the implantation method have a good film thickness uniformity of the thin 200905792 film, and thus the application of the bonded back-etched germanium insulator in the field of manufacturing highly integrated circuits is almost eliminated. 1992 Dr. M. Brud of France invented a film manufacturing method called “Sman Cut” (Ss Cut), which can successfully cut a film with submicron film thickness from the substrate. And transfer the film to another substrate. The wisdom cutting method can bond the film on the back-etched germanium insulator: the thickness has a uniformity of film-, /, film thickness produced by direct implantation using oxygen ions. A method of fabricating a semiconductor, as disclosed in U.S. Patent No. 5,374,564, which is incorporated herein by reference to the entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire- After the original substrate and the target are "equal to the body, the heat treatment will cause the ions to polymerize in the ion layer, and the second bubbles become microbubbles. The microbubbles will gradually form into a piece, and the original is more The substrate is separated up and down, and the separated original substrate is _'々 to form a partial plate, thereby forming a film on the target substrate. The uniformity of the substrate obtained by the wisdom cutting method is very good, and the defect density of the film Small, in manufacturing specialization The thick layer will produce the residual liquid, and the escaped gas is also non-toxic and harmless, so it is not problematic, and the original substrate can also be recycled for reuse. 裒^ Whether it is wisdom cutting or oxygen ion direct implantation Controlling the depth of ion implantation, and then controlling the energy of the implantation of the 石 晶 绝缘 insulator, the energy of the low-ion implantation of π, the depth of ion implantation is still not easy to be scaled, so it is difficult to produce good ion distribution. The shallow layer of planting, the dragon environment pollution j eight can be thin and thin. However, because the quality of hydrogen ions used in the wisdom cutting method is too low,

攸一…’’ -所以即使 、 米等 的薄膜。而且利用智切法將薄膜轉移至目標基板後^厚度均句 ,仍須以化 200905792 學拋光方式或氧化蝕刻方式使薄膜的厚度減薄至奈米等級。但 如此一來,會使得在大面積晶圓中薄膜轉移後的薄膜厚度的準 確度及均勻度良率都將大幅降低。 既使氧離子直接植入法是使用具有較重質量的氧離子佈 植,可產生良好離子分佈的淺層佈植,並製作出超薄的矽晶絕 緣體薄膜。但是在半導體製程進入奈米等級要求下,氧離子直 接植入法所產生的缺陷,特別是因植入氧離子所產生的氧析出 物,會危害元件的製程良率。 又為了使智切法達到良好奈米等級的厚度,如美國專利第 5,882,987號揭露的一種以智切法製造半導體材料薄膜之方 法,其係藉由在目標矽基板上生長一蝕刻停止層(Etch Stop Layer),然後再生長一超薄單晶石夕層在ϋ刻停止層上,並利用 智切法將連同部份在蝕刻停止層下多餘的矽一同自目標矽基 板上切下,並轉移至一目標基板。 之後將目標基板表面作表面蝕刻,並將蝕刻停止層上多餘 的石夕移除,而使得目標基板上剩下超薄單晶石夕層和餘刻停止 層,並再利用製造鍵合背蝕式矽晶絕緣體的方法,製作出超薄 的矽晶絕緣體晶圓片,但仍會產生膜厚不均勻的缺點。 綜合以上所述,以智切法製作矽晶絕緣體會因為氫離子質 量輕,所以不容易製作良好離子分佈的淺層佈植,進而造成轉 移後之薄膜厚度難以達到奈米等級的需求。此外,轉移後之薄 膜的薄膜厚度又需進一步的減薄步驟,才可達到奈米等級的薄 膜厚度,因此會使得薄膜厚度的準確度及均勻度都大幅降低。 又因為蝕刻停止層與薄膜間的晶體晶格匹配度會影響薄膜之 7 200905792 品質,因此也會彥生產品良率下降的問題。 【發明内容】 本發明係為,種薄膜製造方法,其藉由將縣層設置於餘 刻停止薄膜層上,並控制犧牲層之厚度及離子佈植之能量,以 使得所佈植之離子可界定出極薄之有效轉移薄膜層,以達到奈 米等級之膜厚。此外,由於犧牲層具有類似過濾之功能,可二 濾掉所佈植之離子中的雜質離子,因此可使用較簡易的離子佈 植裝置,即能製造出奈米等級且厚度均勻之薄膜。 為達上述目的’本發明係提供一種薄膜製造方法,其包括 下列步驟:提供一原始基板(Primary Substrate);形成一蝕刻停 止薄膜層(Etching Stop Layer)於原始基板上;形成至少—犧牲 層於蝕刻停止薄膜層上,·植入氣體離子,其係剎用〜離子佈植 (I〇ymplantation)技術,由犧牲層植入氣體離手並穿越餘刻停 止薄膜層並在原始基板内形成—離子分佈濃度高♦層以 G — _層;以及分離有㈣移薄膜# =層’其係藉由-輸人能量處理使植以離子聚^ (Polymerized)而使其分離之。 1匕 藉由本發明的實施,至少可達到下列進步功效·· 一、可製造奈米等級厚度之薄膜。 薄膜層 、可平滑地剝離有效轉移 的膜厚均勻度。 薄臈層,且不影響有效轉移 藉由犧牲層具有過減之胜 雜攸一...’’ - So even the film of rice, etc. Moreover, after the film is transferred to the target substrate by the wisdom cutting method, the thickness of the film must be reduced to the nanometer level by the polishing method or the oxidative etching method. However, the accuracy and uniformity of the film thickness after film transfer in a large-area wafer will be greatly reduced. Even if the direct ion implantation method uses oxygen ion implantation with a heavier mass, it can produce a shallow implant of a good ion distribution and produce an ultrathin twinned insulator film. However, in the semiconductor process required to enter the nanometer level, the defects caused by the direct ion implantation method, especially the oxygen precipitates generated by the implantation of oxygen ions, may jeopardize the process yield of the component. In order to achieve a good nanometer-thickness thickness, a method for fabricating a thin film of a semiconductor material by a wisdom-cut method is disclosed in U.S. Patent No. 5,882,987, which is to form an etch stop layer on a target germanium substrate (Etch). Stop Layer), then regrowth an ultra-thin single crystal layer on the etch stop layer, and use the wisdom cutting method to cut off the excess 矽 under the etch stop layer from the target 矽 substrate and transfer To a target substrate. Then, the surface of the target substrate is etched by the surface, and the excess ceremonial layer on the etch stop layer is removed, so that the ultra-thin single crystal layer and the residual stop layer are left on the target substrate, and the bond back etching is fabricated. A method of a germanium insulator produces an ultrathin silicon germanium wafer, but still has the disadvantage of uneven film thickness. In summary, the use of the wisdom-cutting method to produce a germanium insulator results in a shallow implant of a good ion distribution because of the light weight of the hydrogen ion, which in turn makes it difficult to achieve the nanometer level of film thickness after transfer. In addition, the film thickness of the transferred film requires a further thinning step to achieve a nano-scale film thickness, which results in a significant reduction in film thickness accuracy and uniformity. Moreover, because the crystal lattice matching degree between the etch stop layer and the film affects the quality of the film, it will also reduce the yield of the product. SUMMARY OF THE INVENTION The present invention is a method for fabricating a film by placing a county layer on a residual film layer and controlling the thickness of the sacrificial layer and the energy of the ion implantation so that the implanted ions can be An extremely thin effective transfer film layer is defined to achieve a film thickness of the nanometer grade. In addition, since the sacrificial layer has a function similar to filtering, the impurity ions in the implanted ions can be filtered out, so that a relatively simple ion implantation apparatus can be used, that is, a film having a nanometer-scale and uniform thickness can be manufactured. In order to achieve the above object, the present invention provides a film manufacturing method comprising the steps of: providing a primary substrate; forming an etch stop film layer on the original substrate; forming at least a sacrificial layer on the sacrificial layer Etching stops the film layer, implants gas ions, and brakes it with ion implantation technology. The sacrificial layer implants gas away from the hand and traverses the residual film layer to form an ion in the original substrate. The distribution concentration is high ♦ the layer is in the G— _ layer; and the separated (four) moving film #=layer' is separated by the ionized energy treatment by the input-human energy treatment. By the implementation of the present invention, at least the following advancements can be achieved. 1. A film having a nanometer-thickness thickness can be produced. The film layer can smoothly peel off the film thickness uniformity of effective transfer. Thin layer without affecting effective transfer.

齙早,植^離子中的 曰可利用簡易之離子佈植裝置製造薄與。 200905792 為了使任何熟習相關技藝者了解本發明之技術内容並據 以實施,且根據本說明書所揭露之内容、申請專利範圍及圖 式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優 點,因此將在實施方式中詳細敘述本發明之詳細特徵以及優 【實施方式】 第1圖係為本發明之一種薄膜製造方法S10流程實施例圖 一。第2A圖至第2F圖係為第1圖之薄膜製造方法S10其製 程狀態實施例圖。第3圖係為本發明之一種薄膜製造方法S10’ 流程實施例圖二。第4A圖至第4C圖係為第3圖之薄膜製造 方法S10’其製程狀態實施例圖。第5圖係為本發明之一種薄膜 製造方法S10”流程實施例圖三。第6A圖至第6C圖係為第5 圖之薄膜製造方法S10”其製程狀態實施例圖。第7圖係為離子 佈植能量與離子佈植深度之關係圖。第8圖為利用場發射掃描 式電子顯微鏡所拍攝之單晶矽薄膜層之斷面圖。第9圖係為利 用穿透式電子顯微鏡所拍攝之單晶矽薄膜層之斷面圖。第10 圖係為單晶矽薄膜層之X-Ray能量散佈光譜。 如第1圖所示,本實施例係為一種薄膜製造方法S10,其 包括下列步驟:提供一原始基板S20 ;形成一蝕刻停止薄膜層 於原始基板上S30 ;形成至少一犧牲層於蝕刻停止薄膜層上 S40 ;植入氣體離子S50 ;以及分離有效轉移薄膜層與剩餘層 S60。 提供一原始基板S20 :如第2A圖所示,可依使用需求選 200905792 擇不同材質之原始基板1G,例如原始基板ίο之材質係可以為 一第四族材料(G_p 1V) ’例如原始基板1G可以為-石夕(Si)基 板或-錯(Ge)基板…等。另外,原始基板1〇之材質也可以為 三五族材料(Group ΠΙ_ν),使原始基板1〇可以為一砷化鎵 (GaAs)基板、—魏_np)基板、—魏鎵基板、—氮化銘基 板或-亂化鎵(GaN)基板...等。此外,原始基板1〇之材質亦可 以為二六族材料(Gr〇up 或者原始基板1〇可以為一硫化 ^物基板,例如-硫化鄉⑹基板或—硫傾_)基板…等, 又或者原始基板10可以為一碳化矽(Sic)基板。 一形成一蝕刻停止薄膜層於原始基板上S3〇 :如第2B圖所 不’可猎由薄膜生長技術在原始基板1〇上形成钱刻停止薄膜 層2〇 ’而1虫刻#止薄膜層20係可以為-絕緣層,又姓刻停止 薄膜層20之材料係可以為氧化物材料、氮化物材料、或碳基 ,石材料.··等。由於在使用驗性溶液或有機溶液移除犧牲層 寸姓刻知止薄膜層20不易被驗性溶液或有機溶液触刻,因 此可進一步避免原始基板10被蝕刻。 形成至少一犧牲層於蝕刻停止薄膜層上S4〇 :如第2c圖 所不,可藉由一化學氣相沉積(CVD)技術、一物理氣相沉積 (PVD)技術、一分子束磊晶成長(MBE)技術、一液相磊晶(LPE) 成長技術或一氣相磊晶(VPE)成長技術…等類似技術形成犧牲 層30於蝕刻停止薄膜層2〇上。此外,犧牲層3〇可以為一非 曰曰夕 夕晶石夕或一單晶石夕,或者犧牲層30也可以為氧化石夕 層或二氧化矽層。當犧牲層30為二層以上時,每一犧牲層3〇 之組成元素係可以為相同或不同。 200905792 植入氣體離子S50··如第2D圖所示,藉由一離子佈植(ι〇η Implamation)技術,例如一浸沒式電漿離子佈植技術(piasma ion implantaticm immersion technol〇gyM一離子浴摻雜技術… 等植入氣體離子。所植入之離子可以為一氫離子(H+)或一分子 離^(Molecular I〇ns),而分子離子又可包括一氫分子離子 (H2 )。在植入氣體離子的過程中’植入的溫度可設計為溫度相 異之階段,分別植入氣體離子。 ,如第2E圖所丨’利用離子佈植技術所植入之離子可穿越 犧牲層30及餘刻停止薄膜層2〇進入原始基板ι〇 0,並藉由 植入之氣㈣子的植人離子濃度分佈以形成—離 ^ 並可界定出一有效轉移薄膜層5〇及一剩餘層㈣ 效轉移薄膜層5(:基請W,並界定出較薄之有 产,因而離子佈植之能量,可準確地㈣離子植入之深 X因此可準確地控制有效轉移_層% :=3:τ一蝴膜生*技= 可利用控制犧牲層3。之厚度和植入氣 轉和㈣層5G之厚度大約為700夺米。 此外,當離子穿越過犧牲層料,由於犧牲層3g可以為 200905792 非晶石夕或多晶石夕’因此當離子穿過犧牲層3〇日寺,由於犧牲層 30亦具有類似過濾之功能,可使得離子佈植的能量均勻,而&amp; 低有效轉&amp;3膜層的粗糙度。而且犧牲層%也可消除離子 佈植技術植入氣體離子時的通道效應(Channding Effect),進而 使得植入之離子濃度均勻,並且均勻地植入於同一平面,使得 分離後的有效轉移薄膜層具有相當均勻的平坦度及平滑的粗 糙度。 此外,犧牲層30也可過濾植入之離子的雜質離子,因此 可使用較簡易的離子佈植裝置,而不用使用精密且較為昂貴之 離子佈植裝置,即能製造出極薄之有效轉移薄膜層5〇,藉此可 降低可觀的製造成本。 分離有效轉移薄膜層與剩餘層S60 :如第2F圖所示,兹 由一輸入能量處理使離子分佈濃度高峰層40中的離子與周圍 散佈之離子聚合化。由於所植入之離子為氣體離子,因此聚合 化後之離子可形成氣體核種,並且可結聚其他植入氣體離子所 產生之氣體,瑱充於氣體分子所造成之氣體核種中,進而膨服 碎裂周圍的固體結構,藉此使有效轉移薄膜層50平滑地與剩 餘層60分離。 輸入能量處理係可以為施以一高頻交替電場處理或一磁 場照射處理。其中高頻交替電場處理或磁場照射處理所使用之 裝置係爲一微波(Microwave)産生裝置、一高周波 Frequency)産生裝置或一感應耦合(Inductive Coupled)場產生 裝置。此外,輸入能量處理也可以為一熱處理(Thermai treatment),而熱處理之溫度係可高於室溫並且低於I25〇〇c。 12 200905792 又高頻交替電場處理或磁場照射處理所使用之一微波系 統係可以爲一固定頻率微波系統或一可轉變頻率微波系統,而 固定頻率微波系統係可使用2.45 GHz或900 MHz頻率之微 波,且微波系統之微波照射時間係可大於一分鐘。 如第3圖所示,薄膜製造方法S10’又可進一步包括—移除 犧牲層步驟S70以及一晶圓鍵合步驟S80,其係執行於植入氣 體離子步驟S50及分離有效轉移薄膜層與剩餘層步驟S60之 間。 移除犧牲層S 7 0 .如第4A圖所示,可藉由一餘刻處理、 一化學溶液蝕刻處理或一離子電漿蝕刻處理…等將第2E圖中 之犧牲層30移除。例如可以使用鹼性溶液或有機溶液移除犧 牲層30’而鹼性溶液或有機溶液係例如氫氧化鉀(p〇tassium hydroxide,KOH)、TMAH 和 EDP (EthyleneDamine Pyrocatochol, EDP)、TMAH(TetraMethy Ammonium Hydroxide,TMAH)標準 I虫刻溶液…等。 晶圓鍵合S80 :如第4B圖所示,可以藉由晶圓鍵合技術, 例如一直接鍵合技術、一陽極鍵合技術、一低溫鍵合技術、一 真空鍵合技術、或一電漿強化鍵合技術…等技術,將蝕刻停止 薄膜層20與目標基板70鍵合為一體。又晶圓鍵合步驟s8〇可 進一步包括一表面離子化處王里,以加強餘刻停止薄膜層2〇與 目標基板70之鍵合強度。 、 如第4C圖所示’接著再藉由分離有效轉移薄膜層與剩餘 層步驟S60使有效轉移薄膜層5時滑地與剩餘層6〇分離,而 使得钱刻停止薄膜層2G及有效轉移薄膜層5()順利地轉移至目 200905792 標基板70上。 此外,晶圓鍵合步驟S80可進一步包括一預熱步驟,藉此 提高蝕刻停止薄膜層20、有效轉移薄膜層50、離子分佈濃度 高蜂層40及剩餘層60之溫度,用以縮短分離有效轉移薄膜層 50與剩餘層60所需之時間。例如輸入能量處理為熱處理,且 熱處理之溫度大於500°C時,需耗費30分鐘以上才可使有效轉 移薄膜層50與剩餘層60分離,若先以300°C之溫度執行預熱 步驟1小時,並使蝕刻停止薄膜層20與目標基板70鍵合,則 〔在500°C的條件下只需10分鐘即可分離有效轉移薄膜層50及 剩餘層60。 如第5圖所示,薄膜製造方法S10”又可進一步包括一晶圓 鍵合步驟S80’以及一退火處理步驟S90,其中晶圓鍵合步驟 S80’係執行於植入氣體離子步驟S50及分離有效轉移薄膜層與 剩餘層步驟S60之間,而退火處理步驟S90則執行於分離有效 轉移薄膜層與剩餘層步驟S60之後。 ^ 晶圓鍵合步驟S80’ :如第6A圖所示,可以藉由晶圓鍵合 技術,例如直接鍵合技術、陽極鍵合技術、低溫鍵合技術、真 空鍵合技術、或電漿強化鍵合技術…等技術,將犧牲層30與 目標基板70鍵合為一體。又晶圓鍵合步驟S80’可進一步包括 一表面離子化處理,用以加強晶圓鍵合之強度。此外,同樣地 晶圓鍵合步驟S80’亦可進一步包括一預熱步驟,藉此提高犧牲 層30、蝕刻停止薄膜層20、有效轉移薄膜層50、離子分佈濃 度高峰層40及剩餘層60之溫度,用以縮短分離有效轉移薄膜 層50與剩餘層60所需之時間。 14 200905792 如第6B圖所示,接著再藉由分離有效轉移薄膜層與剩餘 層步驟S60使有效轉移薄膜層50平滑地與剩餘層60分離,而 使得犧牲層30、蝕刻停止薄膜層20及有效轉移薄膜層50順利 地轉移至目標基板70上。 退火處理S90:如第6C圖所示,為了改善犧牲層30之晶 體結構,並使犧牲層30之晶體結構可與目標基板70之晶體結 構相接近,因此可藉由退火處理步驟S90使犧牲層30再結晶。 經過退火處理步驟S90後,被轉移至目標基板70之犧牲層30 ( 可再結晶,以形成具有較佳晶體結構之犧牲.層30’,並使犧牲 層30’與目標基板70間晶體結構的晶格匹配度相近。 本實施例之方法係藉由薄膜生長技術準確地控制犧牲層 30厚度至奈米等級,並可搭配犧牲層30之厚度以控制離子佈 植之能量,使離子分佈濃度高峰層40位於較為淺層之位置, 進而使得有效轉移薄膜層50之厚度為奈米等級。犧牲層30可 以在執行晶圓鍵合步驟S80前,藉由化學蝕刻方式移除,或者 .可不移除犧牲層30,而在將犧牲層30、蝕刻停止薄膜層20及 有效轉移薄膜層50轉移至目標基板70後,再藉由退火處理步 驟S90使犧牲層30’之晶格匹配度與目標基板70相近。 為了方便瞭解本實施例之功效,以下將提供一些較佳之具 體實施例,藉以進一步說明本實施方式的架構製作方法與特 點。 &lt;第一具體應用例&gt; 利用原始矽晶圓作為原始基板10、二氧化矽層作為蝕刻停 15 200905792 止薄膜層20 ^曰曰石夕犧牲層作為犧牲層%、以及氮離子佈植 為^進步°羊細°兒明如下。如第7圖係為藉由SRIM™程式 «十算疋佈植ι里與相對應之離子佈植深度分佈之關係圖,藉 以估計㈣妙晶圓上所轉移下來的單糾薄膜層的厚度。 如第7圖所示,將氫離子佈植能量設定為、佈植 傾斜角為7。,而二氧化石夕層之厚度為綱奈米、多晶石夕犧牲層 士厚度為400奈米,所以可由第7圖中得知,氫離子濃度分佈 尚蜂值約位在730〜810奈米之深度,因此可推知離子分佈漢度 高蜂層40所界定出之有效轉移薄膜層5〇大約具有3〇〜ιι〇奈 米之厚度。 在植入氫離子後,可藉由鹼性溶液或有機溶液移除多晶矽 犧牲層,而鹼性溶液或有機溶液係例如氫氧化鉀(p〇tassium hydroxide, KOH)、TMAH 和 EDP (EthyleneDamine Pyrocatochol, EDP) 4為較常見的非專向性石夕餘刻溶液…等。而一般來說較多 用TMAH作為移除多晶石夕犧牲層之餘刻液,因為τμαη[是 〇 —種無色無毒的有機溶劑。此外,ΤΜΑΗ也與互補式金氧半導 體(Complementary Metal-Oxide-Semiconductor,CMOS)製程具 有高度的相容性,且具有對二氧化矽及氮化矽有低敍刻率之優 點。 在經過TMAH溶液移除多晶石夕犧牲層後,可藉由原子力 顯微鏡(Atomic Force Microscope,AFM)量測得知其表面粗链 度為0.586奈米,此結果證實經過餘刻後,並不會嚴重影塑晶 圓鍵合的品質。並可藉由橢圓儀(ellipsometer)量測單晶石夕薄膜 層轉移後之厚度約為97奈米,而其中二氧化石夕層之厚度約為 16 200905792 313奈米。 圖所示,上層單晶矽薄膜層厚度約為驅謂、而 相者平敕 圖所不,可看出鍵合之界面 圖复Γ而且沒有任合的未鍵合區域。由第8圖及第9 與S—M所模擬出來的結果相近,這表靡^ 派度取大處就是薄膜分離的地方。 如第10圖所示’其係用以說明筮 y f 上層的石夕為&lt;100&gt;之單曰於。,圖中位於二氧化石夕層 夕曰‘ 日日 以多晶矽犧牲層作為犧牲層30 二Γ錢牲層可作為有效的離子佈植屏蔽層,可避免在離 子佈植過程中,由於晶格排列而造成的離子佈植深度差異,因 此可付到更平滑、低粗缝度(R a、約為i. 3奈米)的劈裂面。 此外,在以浸沒式電漿離子佈植技術植入氣體離子的過程 中,多晶石夕犧牲層能夠有效地將植入之雜質離子阻絕於多晶石夕 犧牲層内,再藉由移除多晶石夕犧牲層,也可將雜質離子一併過 濾移除’而使雜質離子之不會進入原始基板10内,所以可以 使用較簡易的離子佈植設備。 &lt;第二具體應用例&gt; 第一具體應用例為提供兩片p型&lt;1〇〇〉晶向、阻值 MOohm.之石夕晶圓,使其中—片石夕晶圓作為原始基板1〇。 在離子佈植之前,先在發晶圓上以熱氧化法成長—層扇奈米 厚度的氧化層作為_停止薄膜層2G’接者在氧化層上以液相 蟲晶成長技術沈積40◦奈米厚度之多㈣,用以作為犧牲層 3〇,然後施予離子佈植能量⑽1^、植人劑量為4x1(;6 17 200905792 ions/cm2氫分子離子+、 # # a 、 于(tI2 )之離子佈植製程。在晶圓鍵合之前, 由夕Γ夕乂 ΤΜΑΉ化學触刻的方式移除,而剩下300奈米厚 又的乳化:在經過氫分子離子佈植的矽晶圓上。 k a□鍵D後,施以低溫退火處理,用以加強鍵能,再 由900瓦的微波照射10分鐘,即可將約100奈米厚度之單晶 石夕及3 0 0奈米厚唐的—β X的一虱化矽層轉移至另一矽晶圓上。 &lt;第三具體應用例&gt; 第一’、體應用例為提供兩片P型&lt;100&gt;晶向、阻值為 15 20ohm-cm之石夕晶圓,使其中—片石夕晶圓作為原始基板⑺。 並在石夕b曰圓上以濕、式氧化方式成長一層厚度為卿奈米的二氧 化石夕層4乍為餘刻停止薄膜層2〇,然後再以低壓化學汽相沉積 技術/t積層未_之多晶⑪’用以作為犧牲層3◦並使其厚 度為400奈米。將此石夕晶圓施以氫氣離子佈植,其離子佈植能 1為160keV、植入劑量為4xl〇i6i〇ns/cm2。在離子佈植後,以 〇 TMAH溶液移除多晶⑪’然後以RCA溶液清洗表面,再以晶 圓鍵合技術將矽晶圓直接與另一矽晶圓直接鍵合。並施予微波 照射ίο分鐘,以使得約100奈米厚度之單晶矽及3〇〇nm厚度 的一乳化石夕層可轉移至另一石夕晶圓上。 &lt;第四具體應用例&gt; 第四具體應用例為提供兩片p型&lt;1〇〇&gt;晶向、阻值 15-20ohm-cm之矽晶圓,使其中一片矽晶圓作為原始基板1〇。 在離子佈植之前,先在矽晶圓上以熱氧化法成長一層3〇〇奈米 18 200905792 厚度的氧化層’接者以液相蠢晶成長技術在乳化層上沈積400 奈米厚度的多晶矽作為犧牲層30。然後將此矽晶圓施以離子佈 植能量為160keV、植入劑量為4xl016 ions/cm2的氫分子離子 (H2+)佈植製程。 在晶圓鍵合之前,將多晶矽保留不予移除。在晶圓鍵合 後,再以低溫退火處理加強鍵能,再以900瓦之微波照射10 分鐘,即可將約100奈米厚度之單晶矽、300奈米厚度的二氧 化矽層,及400奈米厚度的多晶矽轉移至另一矽晶圓上。並可 、再將另一珍晶圓經過適當之南溫退火處理,使多晶梦發生再結 晶現象,藉以產生更佳之單晶晶體結構,並可使多晶矽層與另 一矽晶圓的晶格匹配度相近。 惟上述各實施例係用以說明本發明之特點,其目的在使熟 習該技術者能瞭解本發明之内容並據以實施,而非限定本發明 之專利範圍,故凡其他未脫離本發明所揭示之精神而完成之等 效修飾或修改,仍應包含在以下所述之申請專利範圍中。Early in the day, the cesium in the implanted ions can be made thin with a simple ion implantation device. 200905792 In order to make the technical content of the present invention known to those skilled in the art and to implement it, and according to the disclosure, the scope of the patent and the drawings, the relevant objects of the present invention can be easily understood by those skilled in the art and The detailed description of the present invention and the preferred embodiments thereof will be described in detail in the embodiments. FIG. 1 is a first embodiment of a thin film manufacturing method S10 of the present invention. Fig. 2A to Fig. 2F are diagrams showing an example of a process state of the film manufacturing method S10 of Fig. 1. Fig. 3 is a second embodiment of a film manufacturing method S10' of the present invention. 4A to 4C are diagrams showing an example of a process state of the film manufacturing method S10' of Fig. 3. Fig. 5 is a view showing a process example of a film manufacturing method S10" of the present invention. Fig. 6A to Fig. 6C are diagrams showing a process state of the film manufacturing method S10 of Fig. 5. Figure 7 is a plot of ion implantation energy versus ion implantation depth. Figure 8 is a cross-sectional view of a single crystal germanium film layer taken by a field emission scanning electron microscope. Figure 9 is a cross-sectional view of a single crystal germanium film layer taken by a transmission electron microscope. Figure 10 is the X-Ray energy dispersion spectrum of a single crystal germanium film layer. As shown in FIG. 1 , the present embodiment is a film manufacturing method S10 comprising the steps of: providing an original substrate S20; forming an etch stop film layer on the original substrate S30; forming at least one sacrificial layer on the etch stop film. S40 on the layer; implanting gas ions S50; and separating the effective transfer film layer from the remaining layer S60. An original substrate S20 is provided: as shown in FIG. 2A, the original substrate 1G of different materials may be selected according to the requirements of use, for example, the material of the original substrate ίο may be a fourth group material (G_p 1V) 'for example, the original substrate 1G It may be a -Si (Si) substrate or a -Ge (Ge) substrate or the like. In addition, the material of the original substrate 1 can also be a group of three or five materials (Group ΠΙ _ ν), so that the original substrate 1 〇 can be a gallium arsenide (GaAs) substrate, - Wei _np) substrate, - Wei gallium substrate, - nitrogen Huaming substrate or - chaotic gallium (GaN) substrate...etc. In addition, the material of the original substrate may be a group of six or six materials (Gr〇up or the original substrate 1 may be a vulcanized substrate, for example, a vulcanized (6) substrate or a sulfur-plated substrate), etc., or The original substrate 10 may be a silicon carbide (Sic) substrate. An etch stop film layer is formed on the original substrate S3 〇: as shown in FIG. 2B, the thin film layer can be formed on the original substrate by a thin film growth technique, and the film layer is stopped. The 20 series may be an insulating layer, and the material of the film layer 20 may be an oxide material, a nitride material, or a carbon base, a stone material, etc. Since the sacrificial layer is removed by using the test solution or the organic solution, the film layer 20 is not easily touched by the test solution or the organic solution, so that the original substrate 10 can be further prevented from being etched. Forming at least one sacrificial layer on the etch stop film layer S4 〇: as shown in FIG. 2c, a chemical vapor deposition (CVD) technique, a physical vapor deposition (PVD) technique, a molecular beam epitaxial growth A (MBE) technique, a liquid phase epitaxy (LPE) growth technique or a vapor phase epitaxy (VPE) growth technique, etc., forms a sacrificial layer 30 on the etch stop film layer 2 . Further, the sacrificial layer 3 may be a non-ceramic or a single crystal, or the sacrificial layer 30 may be an oxidized layer or a ceria layer. When the sacrificial layer 30 is two or more layers, the constituent elements of each of the sacrificial layers 3 may be the same or different. 200905792 Implanted gas ion S50·· as shown in Fig. 2D, by ion implantation (ι〇η Implamation) technology, such as a immersion plasma ion implantation technique (piasma ion implantaticm immersion technol〇gyM-ion bath) Doping technology... Implanting gas ions. The implanted ions can be one hydrogen ion (H+) or one molecule (Molecular I〇ns), and the molecular ions can include a hydrogen molecular ion (H2). During the implantation of gas ions, the temperature of the implantation can be designed as a phase of temperature difference, respectively implanting gas ions. As shown in Fig. 2E, the ions implanted by the ion implantation technique can pass through the sacrificial layer 30. And the film layer 2〇 is stopped to enter the original substrate ι〇0, and the implanted ion concentration distribution of the implanted gas (tetra) is formed to form an effective transfer film layer 5〇 and a remaining layer. (iv) Effect transfer film layer 5 (: base W, and define a thinner production, so the energy of ion implantation, can accurately (d) the deep X of ion implantation can therefore accurately control the effective transfer _ layer % := 3: τ a butterfly film * technology = can be used to control the sacrificial layer 3. The thickness and the thickness of the implanted gas and the thickness of the (4) layer 5G are about 700 mp. In addition, when the ions traverse the sacrificial layer, the sacrificial layer 3g can be 200905792 amorphous or stellite, so when the ions pass through Sacrificial layer 3〇日寺, because the sacrificial layer 30 also has a similar filtering function, which can make the energy of ion implantation uniform, and the roughness of the film is low and effective, and the sacrificial layer can also eliminate ions. The channeling technique implants gas ions with a Channing effect, which makes the ion concentration of the implant uniform and uniformly implanted in the same plane, so that the separated effective transfer film layer has a fairly uniform flatness and smoothness. In addition, the sacrificial layer 30 can also filter the impurity ions of the implanted ions, so that a relatively simple ion implantation device can be used without using a sophisticated and expensive ion implantation device, which can be extremely thin. Effectively transferring the film layer 5〇, thereby reducing the considerable manufacturing cost. Separating the effective transfer film layer and the remaining layer S60: as shown in FIG. 2F, processed by an input energy The ions in the ion distribution concentration peak layer 40 are polymerized with the surrounding dispersed ions. Since the implanted ions are gas ions, the polymerized ions can form gas species and can be aggregated by other implant gas ions. The gas is filled in the gas nucleus caused by the gas molecules, and then the solid structure around the fracture is swollen, thereby effectively separating the effective transfer film layer 50 from the remaining layer 60. The input energy treatment system can be applied High-frequency alternating electric field processing or a magnetic field irradiation processing, wherein the apparatus used in the high-frequency alternating electric field processing or the magnetic field irradiation processing is a microwave generating device, a high-frequency generating device or an inductive coupled field. A device is produced. In addition, the input energy treatment may also be a Thermai treatment, and the temperature of the heat treatment may be higher than room temperature and lower than I25〇〇c. 12 200905792 One of the microwave systems used in the high frequency alternating electric field processing or the magnetic field irradiation processing may be a fixed frequency microwave system or a convertible frequency microwave system, and the fixed frequency microwave system may use a microwave of 2.45 GHz or 900 MHz frequency. And the microwave irradiation time of the microwave system can be greater than one minute. As shown in FIG. 3, the film manufacturing method S10' may further include a step of removing the sacrificial layer S70 and a wafer bonding step S80, which are performed by implanting the gas ion step S50 and separating the effective transfer film layer and remaining Layer between step S60. The sacrificial layer S 70 is removed. As shown in Fig. 4A, the sacrificial layer 30 in Fig. 2E can be removed by a process of etching, a chemical solution etching process, or an ion plasma etching process. For example, the sacrificial layer 30' may be removed using an alkaline solution or an organic solution, and an alkaline solution or an organic solution such as potassium hydroxide (KOH), TMAH and EDP (Ethylene Damine Pyrocatochol, EDP), TMAH (TetraMethy Ammonium) Hydroxide, TMAH) Standard I insect solution...etc. Wafer bonding S80: as shown in FIG. 4B, by wafer bonding technology, such as a direct bonding technique, an anodic bonding technique, a low temperature bonding technique, a vacuum bonding technique, or an electric The etch stop film layer 20 and the target substrate 70 are bonded together by a technique such as a slurry strengthening bonding technique. The wafer bonding step s8〇 may further include a surface ionization site to enhance the bonding strength of the photoresist layer 2〇 to the target substrate 70. As shown in FIG. 4C, 'the separation of the effective transfer film layer and the remaining layer step S60 causes the film layer 5 to be effectively transferred to the remaining layer 6〇, thereby allowing the film layer 2G and the effective transfer film to be stopped. Layer 5 () is smoothly transferred to the substrate 200905792 standard substrate 70. In addition, the wafer bonding step S80 may further include a preheating step, thereby increasing the temperature of the etch stop film layer 20, the effective transfer film layer 50, the ion distribution concentration high bee layer 40, and the remaining layer 60 for shortening the separation effective The time required to transfer the film layer 50 to the remaining layer 60. For example, if the input energy treatment is heat treatment, and the temperature of the heat treatment is greater than 500 ° C, it takes more than 30 minutes to separate the effective transfer film layer 50 from the remaining layer 60. If the preheating step is performed at a temperature of 300 ° C for 1 hour. When the etching stop film layer 20 is bonded to the target substrate 70, the effective transfer film layer 50 and the remaining layer 60 can be separated in only 10 minutes under conditions of 500 °C. As shown in FIG. 5, the film manufacturing method S10" may further include a wafer bonding step S80' and an annealing processing step S90, wherein the wafer bonding step S80' is performed in the implantation gas ion step S50 and separation. The film layer is effectively transferred between the film layer and the remaining layer S60, and the annealing step S90 is performed after the step of separating the effective transfer film layer and the remaining layer S60. ^ Wafer bonding step S80': as shown in FIG. 6A, The sacrificial layer 30 is bonded to the target substrate 70 by a wafer bonding technique such as direct bonding technique, anodic bonding technique, low temperature bonding technique, vacuum bonding technique, or plasma bonding bonding technique. The wafer bonding step S80' may further include a surface ionization process for enhancing the strength of the wafer bonding. Further, the wafer bonding step S80' may further include a preheating step. The temperature of the sacrificial layer 30, the etch stop film layer 20, the effective transfer film layer 50, the ion distribution concentration peak layer 40, and the remaining layer 60 is increased to shorten the separation effective transfer film layer 50 and the remaining layer 60. The time required. 14 200905792 As shown in FIG. 6B, the effective transfer film layer 50 is then smoothly separated from the remaining layer 60 by separating the effective transfer film layer and the remaining layer step S60, so that the sacrificial layer 30 and the etching stop The thin film layer 20 and the effective transfer thin film layer 50 are smoothly transferred onto the target substrate 70. Annealing treatment S90: As shown in Fig. 6C, in order to improve the crystal structure of the sacrificial layer 30, the crystal structure of the sacrificial layer 30 can be matched with the target substrate. The crystal structure of 70 is close to each other, so that the sacrificial layer 30 can be recrystallized by the annealing treatment step S90. After the annealing step S90, it is transferred to the sacrificial layer 30 of the target substrate 70 (recrystallizable to form a crystal having better crystals) The structure sacrifices the layer 30' and makes the lattice matching degree of the crystal structure between the sacrificial layer 30' and the target substrate 70. The method of this embodiment accurately controls the thickness of the sacrificial layer 30 to the nanometer level by the thin film growth technique. And the thickness of the sacrificial layer 30 can be matched to control the energy of the ion implantation, so that the ion distribution concentration peak layer 40 is located at a shallower layer, thereby enabling the effective transfer of the thin film layer 50. The thickness is nanometer. The sacrificial layer 30 may be removed by chemical etching before the wafer bonding step S80 is performed, or the sacrificial layer 30 may not be removed, and the sacrificial layer 30, the etch stop film layer 20 and After the effective transfer film layer 50 is transferred to the target substrate 70, the lattice matching degree of the sacrificial layer 30' is made close to the target substrate 70 by the annealing process step S90. In order to facilitate the understanding of the efficacy of the embodiment, some of the following will be provided. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and characteristics of the architecture of the present embodiment will be further described. <First Specific Application Example> The original germanium wafer is used as the original substrate 10 and the germanium dioxide layer is used as the etching stop 15 200905792 The 曰曰石夕 sacrifice layer is used as the sacrificial layer %, and the nitrogen ion implantation is improved. Figure 7 shows the thickness of the single-correction film layer transferred from the SRIMTM program «10 疋 疋 ι 与 与 与 相对 相对 相对 相对 相对 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 As shown in Fig. 7, the hydrogen ion implantation energy was set to a planting inclination angle of 7. The thickness of the dioxide layer is about 400 nm, and the thickness of the polycrystalline stone is 400 nm. Therefore, it can be seen from Fig. 7, that the hydrogen ion concentration distribution is still about 730~810. The depth of the meter, so it can be inferred that the effective transfer film layer 5 defined by the ion distribution Hanbow high bee layer 40 has a thickness of about 3 〇~ιιη nanometer. After the implantation of hydrogen ions, the polycrystalline germanium sacrificial layer can be removed by an alkaline solution or an organic solution such as potassium hydroxide (KOH), TMAH and EDP (Ethylene Damine Pyrocatochol, EDP) 4 is a more common non-specifically-oriented stone night solution...etc. In general, TMAH is used as the residual solution for removing the polycrystalline stone sacrificial layer, because τμαη [is a kind of colorless and non-toxic organic solvent. In addition, germanium is also highly compatible with Complementary Metal-Oxide-Semiconductor (CMOS) processes and has a low characterization rate for cerium oxide and tantalum nitride. After removing the polycrystalline stone sacrificial layer through the TMAH solution, the surface roughness of the surface was 0.586 nm by Atomic Force Microscope (AFM) measurement, which confirmed that after the remainder, it was not Will seriously affect the quality of wafer bonding. The thickness of the single crystal layer can be measured by an ellipsometer to be about 97 nm, and the thickness of the layer of the dioxide is about 16 200905792 313 nm. As shown in the figure, the thickness of the upper single crystal germanium film layer is about the same as that of the front layer, and it can be seen that the interface of the bonding layer is rectified and there is no unbonded area. The results simulated by Fig. 8 and Fig. 9 are similar to those of S-M, and this table is the place where the film is separated. As shown in Fig. 10, it is used to explain that the upper layer of 筮 y f is a single & &&lt;100&gt;. In the figure, it is located in the smectite layer of the sulphur dioxide. The polycrystalline 矽 sacrificial layer is used as the sacrificial layer. The Γ Γ 牲 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可 可The resulting ion implantation depth is different, so that a smoother, lower coarse seam (R a , about i. 3 nm) split surface can be paid. In addition, in the process of implanting gas ions by immersion plasma ion implantation technology, the polycrystalline stone sacrificial layer can effectively block the implanted impurity ions in the polycrystalline stone sacrificial layer, and then remove The polycrystalline stone sacrificial layer can also filter and remove the impurity ions together to prevent the impurity ions from entering the original substrate 10, so that a simple ion implantation apparatus can be used. &lt;Second Specific Application Example&gt; The first specific application example is to provide two p-type &lt;1〇〇> crystal orientation and resistance value MOohm. The silicon wafer is used as the original substrate 1 Hey. Before the ion implantation, the oxide layer is grown by thermal oxidation on the wafer, and the oxide layer of the thickness of the fan is used as the _stop film layer 2G'. The deposition on the oxide layer is carried out by liquid phase crystal growth technique. The thickness of the rice is (4), which is used as the sacrificial layer 3〇, and then the ion implantation energy (10)1^, the implant dose is 4x1 (; 6 17 200905792 ions/cm2 hydrogen molecular ion +, # # a , (tI2 ) The ion implantation process is removed by the chemical etching of the wafer before the wafer bonding, leaving 300 nm thick emulsification: on the germanium wafer implanted with hydrogen molecular ions. After the ka□ key D, it is subjected to low-temperature annealing treatment to strengthen the bond energy, and then irradiated by 900 watts of microwave for 10 minutes, which can be about 100 nm thick single crystal stone and 300 nm thick Tang The 矽 虱 layer of β X is transferred to another 矽 wafer. &lt;Third specific application example&gt; The first 'body application example is to provide two P-type &lt;100&gt; crystal orientations, resistance values It is a 15-20 ohm-cm stone lithography wafer, which is used as the original substrate (7). It is wet on the stone 曰b曰 circle. A layer of silicon dioxide with a thickness of 2.7 nm is used to stop the film layer 2 〇, and then a low-pressure chemical vapor deposition technique/t laminate of polycrystalline 11' is used as a sacrificial layer. And the thickness is 400 nm. The Shi Xi wafer is applied with hydrogen ion implantation, and the ion implantation energy is 1 160 keV, and the implantation dose is 4xl 〇i6i 〇 ns / cm 2 . After ion implantation, 〇TMAH solution remove polycrystalline 11' and then clean the surface with RCA solution, then directly bond the germanium wafer directly to another germanium wafer by wafer bonding technology, and apply microwave irradiation for ίο minutes to make about 100 The single crystal germanium of a nanometer thickness and an emulsified layer of a thickness of 3 〇〇 nm can be transferred to another lithographic wafer. &lt;Fourth Specific Application Example&gt; The fourth specific application example provides two p-types &lt;lt;1〇〇&gt; crystal orientation, resistance of 15-20 ohm-cm wafer, one of the germanium wafers is used as the original substrate. Before the ion implantation, the wafer is grown by thermal oxidation on the germanium wafer. One layer of 3 〇〇 nanometer 18 200905792 The thickness of the oxide layer 'connected by liquid phase stupid growth technique on the emulsion layer deposited 400 奈The thickness of the polycrystalline germanium is used as the sacrificial layer 30. Then, the germanium wafer is subjected to a hydrogen molecular ion (H2+) implantation process with an ion implantation energy of 160 keV and an implantation dose of 4×10 16 ions/cm 2 . The polycrystalline germanium remains unremoved. After the wafer is bonded, the bonding energy can be strengthened by low-temperature annealing, and then irradiated with a microwave of 900 watts for 10 minutes to obtain a single crystal germanium of about 100 nm thickness and a thickness of 300 nm. The ruthenium dioxide layer and the 400 nm thick polysilicon are transferred to another wafer. And another rare wafer can be subjected to an appropriate south temperature annealing treatment to recrystallize the polycrystalline dream, thereby producing a better single crystal crystal structure, and allowing the polycrystalline germanium layer and the other germanium wafer to be latticed. The matching degree is similar. The embodiments are described to illustrate the features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the present invention and to implement the present invention without limiting the scope of the present invention. Equivalent modifications or modifications made by the spirit of the disclosure should still be included in the scope of the claims described below.

U 【圖式簡單說明】 第1圖係為本發明之一種薄膜製造方法S10流程實施例圖一。 第2A圖至第2F圖係為第1圖之薄膜製造方法S10其製程狀 態實施例圖。 第3圖係為本發明之一種薄膜製造方法S10’流程實施例圖二。 第4A圖至第4C圖係為第3圖之薄膜製造方法S10’其製程狀 態實施例圖。 第5圖係為本發明之一種薄膜製造方法S10”流程實施例圖三。 19 200905792 第6A圖至第6C圖係為第5圖之薄膜製造方法S10”其製程狀 態實施例圖。 第7圖係為離子佈植能量與離子佈植深度之關係圖。 第8圖為利用場發射掃描式電子顯微鏡所拍攝之單晶矽薄膜層 之斷面圖。 第9圖係為利用穿透式電子顯微鏡所拍攝之單晶矽薄膜層之斷 面圖。 第10圖係為單晶矽薄膜層之X-Ray能量散佈光譜。 fU [Simple Description of the Drawings] Fig. 1 is a first embodiment of a process for producing a film S10 of the present invention. Fig. 2A to Fig. 2F are diagrams showing an example of a process state of the film manufacturing method S10 of Fig. 1. Fig. 3 is a second embodiment of a process for producing a film S10' of the present invention. 4A to 4C are views showing a process state of the film manufacturing method S10' of Fig. 3. Fig. 5 is a third embodiment of a process for producing a film of the present invention. Fig. 3 is a diagram showing a process state of the film manufacturing method S10 of Fig. 5. Figure 7 is a plot of ion implantation energy versus ion implantation depth. Fig. 8 is a cross-sectional view showing a single crystal germanium film layer taken by a field emission scanning electron microscope. Figure 9 is a cross-sectional view of a single crystal germanium film layer taken by a transmission electron microscope. Figure 10 is an X-Ray energy dispersion spectrum of a single crystal germanium film layer. f

I 【主要元件符號說明】 S10、S10’、S10’’ .....薄膜製造方法 S20............................提供一原始基板 S30............................形成一#刻停止薄膜層於原始基板上 S40............................形成至少一犧牲層於钱刻停止薄膜層上 S50............................植入氣體離子 S60............................分離有效轉移薄膜層與剩餘層 S70............................移除犧牲層 S80、S80’.................晶圓鍵合 S90............................退火處理 10..............................原始基板 20..............................I虫刻停止薄膜層 30、30’.....................犧牲層 40..............................離子分佈濃度高峰層 50..............................有效轉移薄膜層 20 200905792 60..............................乘丨J餘層 70..............................目標基板I [Description of main component symbols] S10, S10', S10'' ..... Film manufacturing method S20.......................... .. Providing an original substrate S30...................... Forming a #刻止膜层层 on the original substrate S40... ......................... Form at least one sacrificial layer on the film to stop the S50 on the film layer............ ................ Implanted gas ion S60...........................Separation Effectively transferring the thin film layer and the remaining layer S70..................... removing the sacrificial layers S80, S80'... ........... Wafer Bonding S90......................... Annealing Process 10... ...........................original substrate 20.................... ..........I insect stop film layer 30, 30'..................... sacrificial layer 40... ........................Ion distribution concentration peak layer 50.................. .......... effectively transfer film layer 20 200905792 60.............................. Residual layer 70..............................target substrate

Claims (1)

200905792 十、申請專利範圍: 1. 一種薄膜製造方法,其包括下列步驟: 提供一原始基板; 形成一蝕刻停止薄膜層於該原始基板上; 形成至少一犧牲層於該蝕刻停止薄膜層上; f C 植入氣體離子,其係利用一離子佈植技術,由該犧牲 層植入氣體離子並穿越該蝕刻停止薄膜層,並在該原始基 板内形成一離子分佈濃度高峰層以界定出一有效轉移薄膜 層及一剩餘層;以及 分離該有效轉移薄膜層與該剩餘層,其係藉由一輸入 能量處理使植入之離子聚合化而使其分離之。 2. 如申請專利範圍第1項所述之方法,其中該原始基板之材 質係為一第四族材料。 3. 如申請專利範圍第1項所述之方法,其中該原始基板係為 一石夕基板、一鍺基板、或一碳化^夕基板。 4. 如申請專利範圍第1項所述之方法,其中該原始基板之材 質係為三五族材料。 5. 如申請專利範圍第1項所述之方法,其中該原始基板係為 一砷化鎵基板、一磷化銦基板、一磷化鎵基板、一氮化鋁 基板或一氮化録基板。 6. 如申請專利範圍第1項所述之方法,其中該原始基板之材 質係為二六族材料。 7. 如申請專利範圍第1項所述之方法,其中該原始基板係為 硫化物基板。 22 200905792 8.如申請專·圍第丨項所叙方法, 9 2層步驟,其係藉由-㈣處理移除、^齡;括一㈣ .犧範圍第1項所述之方法,其進-步包括-移除 U)如申:i =其係猎由—化學溶祕刻處理移除該犧牲層。 u 驟,其係藉由—離子電漿_處理移除該犧牲層。 f' .4: I範圍第1項所述之方法,其中該姓刻停止薄膜 曰係為一絕緣層。 其中該钱刻停止薄膜 其中該钱刻停止薄膜 其中該钱刻停止薄膜 其中該犧牲層係利用 I2.如申請專利範圍第1項所述之方法 層之材質係為氧化物材質。 u♦如申請專利範圍第1項所述之方法 層之材質係為氮化物材質。 M.如申請專利範圍第1項所述之方法 層之材質係為碳基鑽石材質。 I5·如申請專利範圍第1項所述之方法 化學氣相沉積技術、一物理氣相沉積技術、一分子束磊 曰曰成長技術、一液相磊晶成長技術或一氣相磊晶成長技術 所形成。 16.如申請專利範圍第1項所述之方法,其中賴牲層係為一 非晶矽、一多晶矽或一單晶矽。 17_如申請專利|請#丨項職之方法,其㈣餘層係為氧 化矽層或二氧化矽層。 18’如申請專利範圍第1項所述之方法,其中該犧牲層為二層 以上時,每一該犧牲層之組成元素係為相同或不同。 23 200905792 19. 如申請專利範圍第1項所述之方法,其進一步包括一晶圓 鍵合(Wafer Bonding)步驟,其係將該犧牲層層與一目標基 板鍵合。 20. 如申請專利範圍第19項所述之方法,其中該晶圓鍵合步驟 進一步包括一表面離子化處理。 21. 如申請專利範圍第20項所述之方法,其中該晶圓鍵合步驟 進一步包括一預熱步驟。 22·如申請專利範圍第8項所述之方法,其進一步包括一晶圓 鍵合(Wafer Bonding)步驟,其係將該蝕刻停止薄膜層與一 目標基板鍵合。 23. 如申請專利範圍第22項所述之方法,其中該晶圓鍵合步驟 進一步包括一表面離子化處理。 24. 如申請專利範圍第22項所述之方法,其中該晶圓鍵合步驟 進一步包括一預熱步驟。 25_如申請專利範圍第1項所述之方法,其中該離子植入技術 係為一浸沒式電漿離子佈植技術(plasma ion implantation immersion technology)或一離子浴(i〇n Shower)摻雜技術。 26. 如申請專利範圍第1項所述之方法,其中該離子植入技術 所植入之離子係爲一氫離子(H+)。 27. 如申請專利範圍第1項所述之方法,其中該離子植入技術 所植入之離子係爲一分子離子(Molecular Ions) 0 28. 如申請專利範圍第27項所述之方法,其中該分子離子係包 括一氫分子離子(H2+)。 29. 如申請專利範圍第1項所述之方法,其中該輸入能量處理 24 200905792 以肖頻父替電場處理或—磁場照射處理。 述之方法’其中該高頻交替電場 …琢…、射處理所使用之裝置係爲一微波 f式二叫產生裝置、一高周波(Radio Frequency)產生裝 或一感應耦合(inductiveCoupled)場產生 31.^申料利範圍第3G項所述之方法,其中該高頻交替電場 照射處理所使用之—微波系統係^固㈣200905792 X. Patent application scope: 1. A film manufacturing method comprising the steps of: providing an original substrate; forming an etch stop film layer on the original substrate; forming at least one sacrificial layer on the etch stop film layer; C implanting gas ions by using an ion implantation technique, implanting gas ions from the sacrificial layer and stopping the thin film layer through the etching, and forming an ion distribution concentration peak layer in the original substrate to define an effective transfer a thin film layer and a remaining layer; and separating the effective transfer film layer from the remaining layer by polymerizing the implanted ions by an input energy treatment to separate them. 2. The method of claim 1, wherein the material of the original substrate is a Group IV material. 3. The method of claim 1, wherein the original substrate is a substrate, a substrate, or a carbonization substrate. 4. The method of claim 1, wherein the material of the original substrate is a Group III material. 5. The method of claim 1, wherein the original substrate is a gallium arsenide substrate, an indium phosphide substrate, a gallium phosphide substrate, an aluminum nitride substrate or a nitride substrate. 6. The method of claim 1, wherein the material of the original substrate is a Group VI material. 7. The method of claim 1, wherein the original substrate is a sulfide substrate. 22 200905792 8. If the method described in the application section is applied, the 9-layer step is removed by the treatment of - (4), and the age is included; - Steps include - remove U) as claimed: i = its hunting is removed by chemical etching to remove the sacrificial layer. u, the sacrificial layer is removed by ion plasma treatment. The method of claim 1, wherein the last name of the film is an insulating layer. Wherein the money is stopped to stop the film, wherein the film is stopped, wherein the film is stopped, wherein the sacrificial layer is utilized. The method of claim 1 is as described in the first aspect of the invention. U♦ The method described in the first paragraph of the patent application is made of a nitride material. M. The method described in the first paragraph of the patent application is made of a carbon-based diamond material. I5. The method of claim 1, wherein the chemical vapor deposition technique, a physical vapor deposition technique, a molecular beam epitaxy growth technique, a liquid phase epitaxial growth technique or a vapor phase epitaxial growth technique form. 16. The method of claim 1, wherein the layer is an amorphous germanium, a polycrystalline germanium or a single crystal germanium. 17_If applying for a patent|Please refer to the method of the project, the (4) residual layer is a layer of cerium oxide or a layer of cerium oxide. The method of claim 1, wherein when the sacrificial layer is two or more layers, the constituent elements of each of the sacrificial layers are the same or different. The method of claim 1, further comprising a Wafer Bonding step of bonding the sacrificial layer to a target substrate. 20. The method of claim 19, wherein the wafer bonding step further comprises a surface ionization process. 21. The method of claim 20, wherein the wafer bonding step further comprises a preheating step. The method of claim 8, further comprising a Wafer Bonding step of bonding the etch stop film layer to a target substrate. 23. The method of claim 22, wherein the wafer bonding step further comprises a surface ionization process. 24. The method of claim 22, wherein the wafer bonding step further comprises a preheating step. The method of claim 1, wherein the ion implantation technique is doped plasma ion implantation immersion technology or an ion bath (i〇n Shower) doping. technology. 26. The method of claim 1, wherein the ion implantation technique implants an ion system of hydrogen ions (H+). 27. The method of claim 1, wherein the ion implantation technique is a molecular ion (Molecular Ions). 28. The method of claim 27, wherein The molecular ion system includes a hydrogen molecular ion (H2+). 29. The method of claim 1, wherein the input energy processing 24 200905792 is performed by an electric field treatment or a magnetic field irradiation treatment. The method described in which the high-frequency alternating electric field ... 琢 ..., the device used for the radiation processing is a microwave f-type two-called generating device, a high-frequency (Radio Frequency) generating device or an inductive coupling (inductiveCoupled) field generating 31. ^ The method described in claim 3G, wherein the high frequency alternating electric field irradiation treatment is used - the microwave system is solid (4) 變頻率微波系統,該固定頻率微波系 冼係使用2.45 GHz或900 MHz頻率之微波。 ^申請專利範圍第31項所述之方法,其中該 波照射時間係大於-分鐘。 化糸、、充之微 其中該輸入能量處理 其中該熱處理之溫度 其進一步包括一退火 膜層與該剩餘層後使 33. 如申請專利範圍第1項所述之方法, 係為一熱處理(Thermal treatment)。 34. 如申請專利範圍第33項所述之方法, 係高於室溫且低於125〇〇c。 35.如申請專利範圍第1項所述之方法, 處理,其係執行於分離該有效轉移薄 該犧牲層再結晶。 36.如申請專利範圍第1項所述之方法,&amp; a / _ 具中该犧牲層係拜 k濾該離子佈植技術所植入氣體離子所 1 乂雜貝離子。 7·如申請專利範圍第丨項所述之方法, %A &gt; 具中戎犧牲層係月 (Channeling Effect) 4除该離子佈植技術植入氣體離子時的通道效 25A variable frequency microwave system that uses microwaves at a frequency of 2.45 GHz or 900 MHz. The method of claim 31, wherein the wave irradiation time is greater than - minutes. The enthalpy of the enthalpy, wherein the input energy is processed, wherein the temperature of the heat treatment further comprises an annealed film layer and the remaining layer. 33. The method of claim 1 is a heat treatment (Thermal Treatment). 34. The method of claim 33, which is above room temperature and below 125 〇〇c. 35. The method of claim 1, wherein the processing is performed by separating the effective transfer thin film and re-crystallizing the sacrificial layer. 36. The method of claim 1, wherein the sacrificial layer is a filter of a gas ion implanted by the ion implantation technique. 7. As described in the scope of the patent application, %A &gt; with a channeling effect 4 in addition to the channel effect of the ion implantation technique when implanting gas ions 25
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Cited By (2)

* Cited by examiner, † Cited by third party
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US8778717B2 (en) 2010-03-17 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Local oxidation of silicon processes with reduced lateral oxidation
TWI550144B (en) * 2014-02-20 2016-09-21 紐富來科技股份有限公司 Vapor phase growth device

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* Cited by examiner, † Cited by third party
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US5882987A (en) * 1997-08-26 1999-03-16 International Business Machines Corporation Smart-cut process for the production of thin semiconductor material films
TW452866B (en) * 2000-02-25 2001-09-01 Lee Tien Hsi Manufacturing method of thin film on a substrate
AU2003270040A1 (en) * 2002-08-29 2004-03-19 Massachusetts Institute Of Technology Fabrication method for a monocrystalline semiconductor layer on a substrate
US7176528B2 (en) * 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures
US7160753B2 (en) * 2004-03-16 2007-01-09 Voxtel, Inc. Silicon-on-insulator active pixel sensors

Cited By (3)

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Publication number Priority date Publication date Assignee Title
US8778717B2 (en) 2010-03-17 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Local oxidation of silicon processes with reduced lateral oxidation
TWI456661B (en) * 2010-03-17 2014-10-11 Taiwan Semiconductor Mfg Local oxidation of silicon processes with reduced lateral oxidation
TWI550144B (en) * 2014-02-20 2016-09-21 紐富來科技股份有限公司 Vapor phase growth device

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