TW200847250A - Semiconductor device and method of producing semiconductor device - Google Patents

Semiconductor device and method of producing semiconductor device Download PDF

Info

Publication number
TW200847250A
TW200847250A TW97106804A TW97106804A TW200847250A TW 200847250 A TW200847250 A TW 200847250A TW 97106804 A TW97106804 A TW 97106804A TW 97106804 A TW97106804 A TW 97106804A TW 200847250 A TW200847250 A TW 200847250A
Authority
TW
Taiwan
Prior art keywords
wire
metal
semiconductor device
region
film
Prior art date
Application number
TW97106804A
Other languages
Chinese (zh)
Other versions
TWI373797B (en
Inventor
Tomoyuki Yamada
Fumio Ushida
Shigetoshi Takeda
Tomoharu Awaya
Koji Banno
Takayoshi Minami
Original Assignee
Fujitsu Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Microelectronics Ltd filed Critical Fujitsu Microelectronics Ltd
Publication of TW200847250A publication Critical patent/TW200847250A/en
Application granted granted Critical
Publication of TWI373797B publication Critical patent/TWI373797B/en

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.

Description

200847250 九、發明說明: 【發日月所屬之技術領域】 發明領域 本發明係有關於一種半導體裝置以及一種製造半導體 4 5 裝置的方法。 【先前技 發明背景 纟半導體I置於-晶圓上的形成中,有效晶片的數目 是由該等半導體裝置的面積以及切割線區域的面積來決 10定。因此,是希望藉由縮減切割線區域的面積來增加每片 晶圓有效晶片的數目。 该等切割線區域是為用於以雷射切割或者切刀切割來 把數個形成於一片晶圓上之半導體裝置分開成晶片所需的 區域。 15 半導體裝置各包括一個電路圖案區域和一個用於吸收 當該等半導體裝置彼此分開時所形成之裂痕的外週緣區 域,該等外週緣區域是與該電路圖案區域和一切割線區域 相鄰。用於吸收因晶片切割而起之裂痕的外週緣區域是從 切割線區域的邊緣延伸到置於該晶片的内之抗濕框架狀擒 - 20體。該抗濕框架狀播體是置於在該電路圖案區域與該外週 . 緣區域之間的邊界。該抗濕框架狀擋體是設置俾可防止濕 氣在該數個形成於該晶圓上之半導體裝置彼此分開之後從 切割表面進入該半導體裝置内部。 根據一種用於縮減該吸收裂痕之外週緣區域的習知技 5 200847250 術,一個用於防止裂痕之延伸的凹槽是設置在一個設置於 一個在一切割線區域之邊緣與一抗濕框架狀擋體之間之位 置作為一半導體裝置之最上層的覆蓋薄膜上(見,例如,曰 本早期公開專利申請案公告第9-199449號案)。根據另一種 5 技術,一個從一半導體裝置之頂部延伸到一基體的凹槽是 形成在一個於一切割線區域之邊緣與一抗濕框架狀擋體之 間的位置,而且該凹槽然後是以金屬材料填充(見,例如, 曰本未審查專利申請案公告第10-41408號案)。 【發明内容】 10 發明概要 本發明之特徵提供一種設置在一半導體基體上的半導 體裝置,該半導體裝置包括一個包括一元件的元件區域、 一個包圍該元件區域的抗濕框架、一個設置在該抗濕框狀 與該半導體裝置之外週緣之間且在該半導體基體之上的絕 15 緣層、一條沿著該外週緣延伸且設置於該絕緣層中的第一 金屬線、及一個設置於該絕緣層中的凹槽。 圖式簡單說明 第1圖是為一個顯示一第一實施例之半導體裝置的平 面圖; 20 第2圖是為一個顯示該第一實施例之半導體裝置之變 化的平面圖; 第3A和3B圖是為該第一實施例之半導體裝置之橫截 面圖並且顯示在該第一實施例中之金屬線2b的優點; 第4圖是為一個顯示該第一實施例之半導體裝置之變 6 200847250 化的橫截面圖並且顯示一個對應於第1圖或第2圖之A-A,橫 截面的橫截面; 第5A、5B、和5C圖是為利用第1圖或第2圖之A-A,橫截 面與B-B,橫截面來描繪製作該第一實施例之半導體裝置之 5 步驟的圖示; 第6圖包括顯示在形成一上層導線之步驟、形成一最上 層導線之步驟、與形成覆蓋薄膜之步驟之後所得到之該第 一實施例之半導體裝置之第i圖或第2圖之a_a,橫截面和 B_B’橫截面的橫截面圖; 1〇 第7圖是為一個顯示一第二實施例之半導體裝置之 A-A橫截面的橫截面圖; 第8圖是為一個顯示一第三實施例之半導體裝置之 A-A’橫截面的橫截面圖; 苐囷疋為個顯示一第四實施例之半導體裝置的平 15 面圖; …個顯示該第四實施例之半導體裝置之變 化的平面圖; 第11圖是為一個顯示該第四實施例之半導體裝置之 20 A-A,橫截㈣構之第—例子的橫截面圖; 第12圖是1 . ' 固顯示该弟四實施例之半導體梦詈之 Μ,減岭構之第二例子的橫截面圖; 弟—第五實_之半導體裝置的平 甶圖; 第14圖是為-個顯示該第五實施例之半導體裝置之 7 200847250 A-A’橫截面結構之例子的橫截面圖; 第15圖是為一個顯示該第五實施例之半導體裝置之變 化1之A-A’橫截面結構的橫截面圖; 第16圖是為在一第六實施例之半導體裝置是以矩陣形 5 狀排列之情況中切割區域8b是彼此相交之一個部份的平面 圖, 第17A圖是為一個沿著在第16圖中之線C-C’的橫截面 圖, 第17B圖是為一個5著在第16圖中之線D-D’的橫截面 10 圖; 第18圖是為一個顯示第七實施例中之一個沿著在第16 圖中之線C-C’之橫截面的圖示; 第19A至19F圖各顯示一個構成一金屬線之金屬圖案 的平面形狀;及 15 第19G圖是為一個顯示用於形成一基本金屬線之光罩 之光罩圖案之形狀之一部份的圖示。 【實施方式】 較佳實施例之詳細說明 第一實施例、第二實施例、第三實施例、第四實施例、 20 第五實施例、第六實施例、第七實施例、和第八實施例現 在將會作描述。本發明不受限制為這些實施例。 第一實施例 一第一實施例係有關於一種半導體裝置,該半導體裝 置包括,在一個置於一設置有半導體元件之元件區域與一 8 200847250 切割區域之間的外週緣區域中,一條埋藏在設置於絕緣層 中之凹槽俾可包圍該元件區域的金屬線,及在該外週緣區 域中,一個設置於一在該金屬線上之最上層絕緣薄膜中的 凹槽。 5 該第一實施例現在將會配合第1至6圖來作說明。 第1圖是為一個顯示該第一實施例之半導體裝置的平 面圖。第1圖顯示一個切割邊緣1、一個開孔2a、一條金屬 線2b、一個抗濕框架狀擋體3、一個元件區域8a、一個切割 區域8b、和一個外週緣區域8c。 10 該元件區域8a是為一個在該半導體裝置中之形成有半 導體電路之圖案的區域。 該切割區域8b是為一個當形成於一片晶圓上之半導體 裝置是彼此分開時要被切割的區域。 該外週緣區域8c是為一個位於該切割區域8b與該元件 15 區域8a之間且是被設置俾可包圍在該半導體裝置中之元件 區域8a的區域。 該切割邊緣1是為一個在該切割區域8b與該半導體裝 置之間的邊界。更特別地,該切割邊緣1是為一個在該切割 區域8b與該外週緣區域8c之間的邊界。 20 該開孔2a是為一個設置於一個被包括在該半導體裝置 内之最上層絕緣薄膜中的凹槽狀開孔。該開孔2a是置於該 外週緣區域8c中俾可以框架形式包圍該元件區域8a。該開 孔2a是置於一個位置,在該位置中,該開孔2a是如在下面 所述與該金屬線2b兩度空間地重疊。 9 200847250 該開孔2 a防止該最上層絕緣薄膜在該半導體裝置以雷 射光束或者切割機之切刀在切割區域奶切割時產生的分離 或者延伸到元件區域8a的裂痕。 會這樣的原因相彳§是如下。由於該開孔2a是以凹槽形 5式5又置在该最上層絕緣薄膜中,在該最上層絕緣薄膜中之 裂痕之自切割區域8b側起的傳遞會被停止。 該金屬線2 b是由與包括在該半導體裝置内之導線相同 的金屬材料製成。如在下面所述,該金屬線2b是藉由以金 屬材料填充設置在絕緣層中俾可包圍該元件區域8a的凹槽 1〇來形成。該等絕緣層是為把在該半導體裝置中之導線層分 開的絕緣層。 在這裡,如在下面所述,該金屬線沘防止裂痕在該等 絕緣層中從切割區域8b側延伸到元件區域如的傳遞。無彈 性的絕緣材料在應力施加到它那裡時是容易斷裂。相對 15地,由於金屬材料具有彈性,要斷裂必須要有大量的應力。 據此,相信當金屬材料填充於在該等絕緣層中的凹槽時, 裂痕在該等絕緣層中的傳遞會被防止。 該抗濕框架狀擋體3是由與被包括在該半導體裝置中 之導線相同的金屬材料製成。該抗濕框架狀擔體3是置於在 元件區域8a與外週緣區域8C之間的邊界俾可包圍該元件區 域8a ’如下面所述,該抗濕框架狀擒體3是由所有被包括在 該半導體裝置中的導線層構成。所有構成該抗濕㈣㈣ 體3的導線是由埋藏在該等凹槽内且設置在該等導線之間 的金屬插塞連接俾可連接上和下導線。如下面所述,該名 200847250 5司金屬插基主要是指埋滅在一接觸窗中的整個金屬材 料,但亦是指埋藏在一凹槽内的整個金屬材料。 該抗濕框架狀擋體3防止濕氣在該等半導體裝置藉由 切割來彼此分開之後從切割區域8b到元件區域8a的入侵。 5 這是因為該抗濕框架狀擋體3具有一個包圍該元件區域8a 的金屬壁狀形狀。亦相信的是,由於構成該抗濕框架狀擋 體3的金屬材料與濕氣反應,而因此濕氣維持在金屬材料的 區域中,濕氣至元件區域8a的入侵能夠被防止。 第2圖是為一個顯示該第一實施例之半導體裝置之變 10 化的平面圖。第2圖顯示一個切割邊緣1、一個C-窗擋體6a、 一條金屬線6b、一個抗濕框架狀擋體3、一個元件區域8a、 一個切割區域8b、和一個外週緣區域8c。與在第1圖中所示 之那些相同的組件是由相同的標號標示。特別地,該切割 邊緣1、該抗濕框架狀擋體3、該元件區域8a、該切割區域 15 8b、和該外週緣區域8c是與在第1圖中所示的那些相同。 該C-窗擋體6a是置於該外週緣區域8c中而且是為一個 設置於一個被包括在該半導體裝置内之最上層絕緣薄膜中 的開孔。該C·窗擋體6a是由四個各具有與元件區域8a之邊 緣之長度相同之長度的矩形凹槽組成。該四個凹槽被配置 2〇 俾可包圍該元件區域8a。然而,該四個凹槽在該元件區域 8a的四個角落處是不連續的。此外,該四個凹槽是置於該 四個凹槽是如下面所述兩度空間地與該金屬線6b重疊的位 置。該C-窗播體6a具有與開孔2a之功能相同的功能。 該金屬線6b是由與被包括在該半導體裝置内之導線相 11 200847250 同的金屬材料製成。如在下面所述,該金屬線6b是藉由以 金屬材料填充該四個設置於絕緣層中俾可包圍元件區域8a 的矩形凹槽來形成。特別地,該四個凹槽不形成一個框架 形狀而是在該元件區域8a的四個角落處不連續。該等絕緣 5 層是為把在該半導體裝置中之導線層分開的絕緣層。金屬 線6b之存在的優點是與以上所述之金屬線2b之存在的優點 相同。 由細線箭頭所標示的放大圖顯示該元件區域8 a的一個 角落。這變化的結構能夠防止在該等絕緣層中之每一者與 10 該金屬材料之間的應力累積在具有金屬材料在其中的凹槽 之間,該應力是在金屬材料因熱膨脹而延長時產生。會這 樣的原因是如下。以上所述的金屬線2b具有平面形狀,其 中,在角落處的角是為90度。因此,應力是集中在該等角 落。相對地,至於該金屬線6b,在一個應力施加的方向上, 15 該等絕緣層中之每一者與該金屬材料是在具有金屬於其内 之凹槽的邊緣彼此接觸。結果,應力能夠被消散。 此外,如在由粗箭頭所標示的另一放大圖中所示,藉 由去除該金屬線2b的角落,應力能夠類似地在金屬線2b的 角落消散。這是因為,在一個應力施加的方向上,類似地, 20 該等絕緣層中之每一者與該金屬材料是在去角邊緣彼此接 觸。 第3A和3B圖是為該第一實施例之半導體裝置的橫截 面圖而且顯示在該第一實施例中之金屬線2b的優點。第3A 圖是為一個顯示第1圖和第2圖之A-A’橫截面的橫截面圖。 12 200847250 弟3B圖疋為^個顯不弟1圖和弟2圖之B _B ’橫截面的橫截面 圖。 第3A和3B圖顯示一個切割邊緣1、一個開孔2A、一條 金屬線2b、一個抗濕框架狀擋體3、一個淺溝渠隔離(STI) 5 1〇、一個MOS電晶體的源極區域11、該m〇S電晶體的汲極 £域12、δ亥MOS電晶體的閘極電極、側壁14、^^基體15a、 一井15b、一絕緣薄膜16、一接觸中間層薄膜π、一接觸中 間層薄膜18、導線中間層薄膜19,20,21,22,23,24,25,26,27, 28,29,30,和3卜覆蓋薄膜32&和321)、導線與插塞33,34,35,36, 10 37,38,和39、一插塞42、一導線43、導線45a,45b,45c,45d,45e, 45f,和45g、導線與插塞46a,46b,46c,46d,46e,46f,*46g、一 插塞46h、一導線46i、和箭頭60,61,62,和63。 該切割邊緣1、該開孔2a、該金屬線2b、和該抗濕框架 狀擋體3是與配合第1圖所述的切割邊緣1、開孔2a、金屬線 15 2b、和抗濕框架狀擋體3相同。 該B-B’橫截面,其係關於該元件區域8a,現在將會配 合第3B圖來作描述。第3B圖顯示一個包括一MOS電晶體及 其類似的基本部份(bulk portion)、一個下層導線部份、一個 中間層導線部份、一個上層導線部份、一個最上層導線部 20 份、和一個覆蓋薄膜部份。 该基本部份包括該基體15a、該井15b、該STI 1〇、今 M0S電晶體、以及該絕緣薄膜16。 該基體15a是為一個在上面形成有半導體元件且具有 一預定導電性類型的半導體基體。該STI 10是為一個電氣 13 200847250 地隔離该等半導體元件的元件隔離。該STI 1〇是由一個設 置在半$體元件之間的凹槽以及填充該凹槽的絕緣材料構 成。該井15b是為一個從基體15a之表面到基體15&内部的雜 質區域。與形成於該井1讣中之]^1〇3電晶體之導電性類型相 5反之導電性類型的雜質是在該井⑽中擴散。 4M0S電晶體的源極區域丨丨是為一個形成該Μ〇§電晶 體之源極電極的區域,而且是為一個在該基體…中之傳入 有與基體15a之導電性類型不同之導電性類型之雜質的雜 質擴散區域。該M0S電晶體的汲極區域12是為一個形成該 1〇 MOS電晶體之汲極電極的區域,而且是為一個與該源極區 域11相似的雜質擴散區域。該M〇s電晶體的閘極電極13是 置於一個設置在基體l5a之表面上的閘極氧化物薄膜。該閘 極電極13是由,例如,多晶石夕、石夕化物、金屬、或其類似 製成。該汲極區域12和該源極區域丨丨是置於該M〇s電晶體 15的閘極電極13兩側。該等側壁14是設置在該閘極電極13的 側壁上而且是由,例如,一個氧化矽薄膜構成。該絕緣薄 膜16疋為一個設置在該MOS電晶體上的絕緣薄膜而且是 由’例如,一個氧化矽薄膜構成。 该下層導線部份包括該等接觸中間層薄膜17和18,以 20及置於該等接觸中間層薄膜上的四個層單元,該等層單元 中之每一者是由一個導線層以及該導線層的一中間層薄膜 構成。 該等接觸中間層薄膜17和18是依序堆疊在該絕緣薄膜 16上。該接觸中間層薄膜17和18是為設置在該M〇s電晶體 14 200847250 與一用於與該MOS電晶體電氣接觸之導線之間的絕緣薄 膜。該導線與插塞33是由一埋藏於一個在該接觸中間層薄 膜18中之凹槽内且是與該厘〇3電晶體電氣接觸的導線,以 及一埋藏於一個在該接觸中間層薄膜17中之介層孔内的接 5觸插塞構成。注意的是,該名詞,,介層孔,,是指一個貫穿一 絕緣薄膜的開孔。該名詞,,接觸插塞,,是指一個在其之頂部 與底部連接到導線俾可把上導線電氣連接到下導線的桿狀 金屬塊。該等導線與該接觸插塞是由像是銅、或者銅盘設 於銅與絕緣薄膜之間之邊界之组或者氮化组般的金屬材料 1〇製成。銅是為導線的主要成份。组或氣化組作用如一個防 止銅在絕緣薄膜中擴散的防擴散薄膜。 該等導線中間層薄膜19和20,其是依序堆疊在該接觸 中間層薄膜18上,是為設置在導線之間的絕緣薄膜。該導 線與插塞3 4是由-埋藏於一個在該導線中間層薄膜2 〇中之 ^凹槽内的導線以及一埋藏於一個在該導線中間層薄膜附 之介層孔内的接觸插塞構成。這些導線與插塞具有與以上 所述之那些相同的結構。 該等導線中間層薄膜21和22,其是依序堆疊在該接觸 中間層薄膜20上,是為設置在導線之間的絕緣薄膜。該導 線與插塞35是由-埋藏於一個在該導線甲間層薄肪中之 凹槽内的導線以及一埋藏於一個在該導線中間層薄膜以中 之介層孔内的接觸插塞構成。這些導線與插塞具有與以上 所述之那些相同的結構。 該等導線中間層薄膜23和24,其是依序堆疊在該接觸 15 200847250 中間層薄膜22上,是為設置在導線之間的絕緣薄膜。該導 線與插塞36是由一埋藏於一個在該導線中間層薄膜Μ中之 凹槽内的導線以及一埋藏於—個在該導線中間層薄助中 之介層孔内的接觸插塞構成。這些導線與插塞具有與以上 5所述之那些相同的結構。 該中間層導線部份包括該等導線中間層薄膜25和%, 及兩個置於該等導線中間層薄膜上的層單元,該等層單元 中之每一者是由一個導線層與該導線層的一個中間層薄膜 構成。 、 1〇由該等導線中間層薄膜25和26,其是依序堆疊在該接觸 間層薄膜24上,是為設置在導線之間的絕緣薄膜。該 線與插塞37是由一埋藏於-個在該導線中間層薄膜%中之 凹=内的導線以及-埋藏於-個在該導線中間層薄膜辦 之’丨層孔内的接觸插塞構成。這些導線與插塞具有與以上 15所述之那些相同的結構。 、 該等導線中間層薄膜27和28,其是依序堆疊在該接觸 中間層薄膜26上,是為設置在導線之間的絕緣薄膜。該導 線與插塞38是由一埋藏於一個在該導線中間層薄膜28中之 凹槽内的導線以及一埋藏於一個在該導線中間層薄膜27中 2〇之介層孔内的接觸插塞構成。這些導線與插塞具有與以上 所述之那些相同的結構。 該上層導線部份包括該等導線中間層薄膜29和30及一 個置於該等導線中間層薄膜上的導線層。 該等導線中間層薄膜29和30,其是依序堆疊在該接觸 16 200847250 中間層薄膜28上,是為設置在導線之間的絕緣薄膜。該導 線與插塞39是由一埋藏於一個在該導線中間層薄膜30中之 凹槽内的導線以及一埋藏於一個在該導線中間層薄膜29中 之介層孔内的接觸插塞構成。這些導線與插塞具有與以上 5 所述之那些相同的結構。 該最上層導線部份包括該導線中間層薄膜31、該插塞 42、和由一置於該導線中間層薄膜31與該插塞42上之導線 層構成的該導線43。 該導線中間層薄膜31,其是堆疊在該導線中間層薄膜 10 30上’是為一個設置在導線之間的絕緣薄膜。該插塞42是 由一埋藏於一個在該導線中間層薄膜31中之介層孔内的接 觸插塞構成。該插塞42的接觸插塞可以由銅製成,其之表 面是由氮化鈦覆蓋。或者,這接觸插塞可以是由鎢製成。 该導線43是為一設置在該導線中間層薄膜3丨上的最上 15層士線。该導線43是由銅或者銘製成。當該導線是如在 圖式中所示由銘製成時,導線43是利用-由光刻法定以圖 案的光阻作為光罩藉由蝕刻來形成。 胃雖然未在圖式中顯示,當該導線43是由銅製成時,該 導線43是藉由形成—個凹槽於該覆蓋薄膜❿中而然後把 20銅埋藏於該凹槽内來形成。 «蓋薄膜部份包括該覆蓋薄膜3 2 a和該覆蓋薄膜 32b。該覆蓋薄膜32a是為—個堆疊在該導線^上的絕緣薄 膜。該覆蓋薄膜32b是為—個堆疊在該覆蓋薄膜瓜上的最 上層絕緣薄膜。 17 200847250 該A-A’橫截面’其係有關於範圍從切割區域奶到抗濕 框架狀擔體3的部份’現在將會配合第3 A圖來作說明。第3 A 圖顯示該切割邊緣1、該金屬線2b、該開孔2a、和該抗濕框 架狀擋體3。 5 該抗濕框架狀擋體3是由導線與插塞46a,46b,46c,46d, 46e,46f,和46g、該插塞46h、和該導線46i構成。 該導線與插塞46a是由一埋藏於一個在該接觸中間層 薄膜18中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜17中之介層孔内的接觸插塞構成。以上的介層孔不僅 10包括在元件區域8a中所使用的標準矩形介層孔且亦包括凹 槽狀介層孔。該導線與插塞46a是連接到基體15a。該導線 與插塞46a是由,例如,覆蓋有钽或者氮化鈕的銅製成。鈕 或者氮化钽作用如一防止銅在接觸中間層薄膜17和18中擴 散的防擴散薄膜。 15 該導線與插塞46b是由一埋藏於一個在該接觸中間層 /專膜20中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜19中之介層孔内的接觸插塞構成。該導線與插塞*此是 連接到該導線與插塞46a。該導線與插塞46b亦是如在以上 所述的導線與插塞中一樣藉雙重大馬士革製程來形成。 2〇 该導線與插塞46c是由一埋藏於一個在該接觸中間層 薄膜22中之凹槽内的導線和一埋藏於一個在該接觸中間^ 薄膜21中之介層孔内的接觸插塞構成。該導線與插塞4化是 連接到該導線與插塞46b。該導線與插塞46c亦是如在以上 所述的導線與插塞中-樣藉雙重大馬士革製程來形成。 18 200847250 該導線與插塞46d是由—城於—個在祕觸中間層 薄膜24中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜23中之介層孔内的接觸插塞構成。該導線與插塞_是 連接到該導線與插塞46c。該導線與插塞46d亦是如在以上 5所述的導線與插塞中一樣藉雙重大馬士革製程來形成。 該導線與插塞46e是由一埋藏於一個在該接觸中間層 薄膜26中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜25中之介層孔内的接觸插塞構成。該導線與插塞4心是 連接到該導線與插塞46d。該導線與插塞46e亦是如在以上 10所述的導線與插塞中一樣藉雙重大馬士革製程來形成。 該導線與插塞46f是由一埋藏於一個在該接觸中間層 薄膜28中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜27中之介層孔内的接觸插塞構成。該導線與插塞4紅是 連接到該導線與插塞46e。該導線與插塞46f亦是如在以上 15所述的導線與插塞中一樣藉雙重大馬士革製程來形成。 4 線與插基46g是由一埋藏於一個在該接觸中間層 薄膜30中之凹槽内的導線和一埋藏於一個在該接觸中間層 薄膜29中之介層孔内的接觸插塞構成。該導線與插塞46g是 連接到該導線與插塞46f。該導線與插塞46g亦是如在以上 20所述的導線與插塞中一樣藉雙重大馬士革製程來形成。 該插塞46h是為一個埋藏於一個在該導線中間層薄膜 31中之介層孔内的接觸插塞。該導線與插塞46h是連接到該 導線與插塞46g。這接觸插塞可以是由覆蓋有鈕或者氮化鈕 的銅製成。或者,這接觸插塞可以是由鎢製成。 19 200847250 該導線46i是為一設置在該導線中間層薄膜31上的導 線。該導線46i是連接到該插塞46h。該導線46i是由銅或者 铭製成。當該導線46i是如在圖式中所示由铭製成時,該導 線46i是利用一個由光刻法定以圖案的光阻作為光罩藉蝕 5 刻來形成。雖然未在圖式中顯示,當該導線46i是由銅製成 時,該導線46i是藉由形成一個凹槽在該覆蓋薄膜32a内而然 後把銅埋藏在該凹槽内來形成。 該金屬線2b是由該等導線45a,45b,45c,45d,45e,45fju 45g構成。構成該金屬線沘的導線不包括一置於一個對應於 10插塞46h之位置的導線及形成該抗濕框架狀擋體3的導線 46i。這是因為必須確保在下面所述之開孔2a之凹槽之深度 的若干量。 該導線45a是由一埋藏於一個在該接觸中間層薄膜18 中之凹槽内的金屬材料製成。該金屬材料是為覆蓋有鈕或 15者氮化組的銅。纽或者氮化鈕作用如一個防止銅在該接觸 中間層薄膜18中擴散的防擴散薄膜。 該導線45b是由一埋藏於一個在該導線中間層薄膜2〇 中之凹槽内的導線構成。該導線45b亦是如在以上所述之導 線一樣藉大馬士革製程來形成。 20 該導線45c是由一埋藏於一個在該導線中間層薄膜22 中之凹槽内的導線構成。該導線45c亦是如在以上所述之導 線一樣藉大馬士革製程來形成。 該導線45d是由一埋藏於一個在該導線中間層薄膜24 中之凹槽内的導線構成。該導線45d亦是如在以上所述之導 20 200847250 線一樣藉大馬士革製程來形成。 该導線45e是由一埋藏於一個在該導線中間層薄膜% 中之凹槽内的導線構成。該導線45e亦是如在以上所述之導 線一樣藉大馬士革製程來形成。 5 該導線45f是由一埋藏於一個在該導線中間層薄膜28 中之凹槽内的導線構成。該導線45f亦是如在以上所述之導 線一樣藉大馬士革製程來形成。 该導線45g是由一埋藏於一個在該導線中間層薄膜3〇 中之凹槽内的導線構成。該導線45g亦是如在以上所述之導 1〇 線一樣藉大馬士革製程來形成。 該開孔2a是為一個形成在該等覆蓋薄膜32a和32b中的 凹槽。例如,如在第3A圖中所示,該開孔2a是為一個貫穿 该覆盍薄膜32b且到達該覆蓋薄膜32a之中途位置的凹槽。 注意的是’構成在元件區域8a側之開孔2&之凹槽之邊 15緣的平面位置是與構成在元件區域8a側之導線45a至45g之 邊緣的平面位置對準。然而,即使在元件區域%側之導線 45a至45g之邊緣的位置是在橫截面圖之水平方向上從構成 在元件區域8a側之開孔2a之凹槽之邊緣的位置在丨到⑺μιη 的範圍之内位移,因開孔2a與金屬線2b之存在而獲得的優 20 點不會減少。 該切割邊緣1是為該半導體裝置之最外侧週緣的邊緣。 該開孔2a與金屬線2b在該第一實施例之半導體裝置中 之存在的優點現在將會配合第3 a圖來作說明。 在第3A圖中,該等箭頭60和61中之每一者顯示當該半 21 200847250 導體裝置是在切割區域8b切割時形成在該切割邊緣1之裂 痕的傳遞狀態。 在這裡,於該半導體裝置中,為了形成八個導線層, 是設置有十五個導線中間層薄膜,如在第3B圖中所示。據 5 此,相信該裂痕是如由箭頭60或61所示沿著該等導線中間 層薄膜傳遞。 因此,相信當藉由以金屬材料填充一個在該等導線中 間層薄膜中之每一者中之凹槽來形成的金屬線2b是設置 時,能夠防止裂痕在該等導線中間層薄膜中的傳播。 10 構成該等導線中間層薄膜的絕緣材料,其將會在下面 作說明,不具有彈性。因此,該等絕緣材料在應力施加到 它們那裡時是易於斷裂。相對地,金屬材料具有彈性,而 因此,相信該等金屬材料即使在應力施加到它們那裡時不 會斷裂。會這樣的原因是如下。當因裂痕之傳遞而起的應 15 力是施加到金屬材料時,金屬材料經歷彈性變形,藉此釋 放應力。此外,超過金屬材料之彈性變形之極限且導致金 屬材料斷裂的應力是比導致絕緣材料斷裂的應力大。 據此,金屬線2b提供可靠地防止裂痕在該等導線中間 層薄膜中之傳遞的優點。 20 接著,在第3A圖中,箭頭63顯示除非金屬線2b是設置, 否則裂痕是從開孔2a之邊緣開始傳遞的一個現象。 為何裂痕從開孔2a之邊緣開始傳遞的原因是如下。首 先,覆蓋薄膜之在半導體裝置於切割區域8b中之切割期間 發生的脫離延伸。該覆蓋薄膜之脫離的延伸被防止,因為 22 200847250 開孔2a的凹槽是事先設置在該覆蓋薄膜中。在這情況中, -個來自該切割區域8b的力量是施加在開孔2a之凹槽的元 件區域8a側。 因此,本案發明人發現當金屬線2b是在第3八圖中設置 • 5肖’―個從開孔&之邊緣開始傳遞的裂痕是如由箭頭似斤 示沿著金屬線2b傳遞。 這結構的優點是在於從開孔仏之邊緣開始傳遞的裂痕 不到達该抗濕框架擋體3,而該抗濕框架狀擋體3與該元件 區域3a是由該金屬線2b保護。 1〇 據此,這結構的優點是在於形成在金屬線2b之元件區 域8a側之裂痕的傳遞亦能夠可靠地防止。 因此,該第一實施例的半導體裝置是為一個具有一由 i屬線2b與開孔2a構成之防裂痕傳遞結構的半導體裝置。 該第一實施例之半導體裝置的變化現在將會配合第4 15圖來作說明。第4圖是為一個顯示該第一實施例之半導體裝 置之變化的橫截面圖而且顯示一個對應於第丨圖或第2圖之 A_A’橫截面的橫截面。第4圖顯示一個切割邊緣i、一個開 孔2a、一條金屬線2b、一個抗濕框架狀擋體3、一個絕緣薄 膜Μ、一個接觸中間層薄膜17、一個接觸中間層薄膜18、 20 導線巾間層薄膜 19,20,21,22,23,24,25,26,27,28,29,30,和 , 31、覆蓋薄膜32a和32b、導線45a,45b,45c,45d,45e,45f,45g, 和45h、導線與插塞46^4613,46(:,46(1,466,46£,和46§、一個插 塞46h、一條導線46i、和箭頭6〇,61,62,和63。 與在第1圖中所示之那些相同的組件是由相同的標號 23 200847250 標示。特別地,該切割邊緣1、該開孔2a、該金屬線2b、和 該抗濕框架狀擋體3是與配合第1圖所述之切割邊緣卜開孔 2a、金屬線2b、和抗濕框架狀擋體3相同。該絕緣薄膜16、 該接觸中間層薄膜17、該接觸中間層薄膜18、該等導線中 5 間層薄膜 19,20,21,22,23,24,25,26,27,28,29,30,和31、及該等 覆蓋薄膜32a和32b亦是與配合第1圖所述的那些相同。然 而,這半導體裝置與以上所述之半導體裝置不同的地方是 在於該金屬線2b是由該等導線45a,45b,45c,45d,45e,45f,45g, 和45h。即,這半導體裝置更包括該導線45h。 10 該導線45h是為一條屬於一個也是該抗濕框架狀擋體3 之導線46i所屬之導線層(即,最上層導線層)的金屬導線。 該導線45h是由鋁製成。據此,該導線45h是由與在形成導 線43於元件區域8a中之步驟之間之使用鋁形成導線43之步 驟相同的步驟形成。 15 該導線4 5 h具有一個包圍該元件區域8 b與該抗濕框架 狀擋體3的框架形狀。該導線45h的寬度是比該開孔2a之凹 槽的寬度大。 該第一實施例的半導體裝置不包括一相當於該抗濕框 架狀擋體3之導線46i的導線。這是因為,在相當於導線46i 20 之導線是由銅製成的情況中,應該防止銅被曝露且因銅而 起之金屬污染是在製程裝置中出現的現象。 相對地,在該第一實施例之半導體裝置的這個變化 中,由於導線45h是由鋁製成,金屬污染的問題不會發生。 眾所周知,即使因鋁而起的金屬污染發生,其之影響是可 24 200847250 忽略的。 據此,在第4圖中雖然該覆蓋薄膜32a維持在開孔2a的 底部與導線45h之間,該開孔2a會到達該導線45h。 於在第4圖中所示之第一實施例之半導體裝置之變化 5 中該開孔2a與該金屬線2b之存在的優點是如下。 在第4圖中,當裂痕是從由箭頭60或61所示之方向開始 傳遞時,裂痕的傳遞會如同在該第一實施例之半導體裝置 之金屬線2b的情況中一樣被防止。 如上所述,在未設置金屬線2b的情況中,裂痕是在由 10箭頭63所示的方向上從開孔2a的邊緣開始傳遞。 在該第一實施例之半導體裝置的金屬線沘中,裂痕傳 遞的方向由於導線45a至45g的存在而是改變成由箭頭62所 示的方向。因此,裂痕至元件區域%内的傳遞能夠被防止。 相對地,在该第一實施例之半導體裝置之變化的金屬 5線2b中。亥i屬線2b包括該導線45h,而該導線祝的寬度 疋比開孔2:之凹槽的寬度大。因此,這結構的優點是在於 4痕在由則碩63所示之方向上的傳遞能夠優先防止。這是 因為由紹製成的導線视具有高彈性。 -種製造料—實_之半導體裝置的方法現在將會 20配合第5A、5B、5C和6圖來作說明。 第5Α:5β、和5C圖是為利用第1圖或第2圖之A-A,橫截 面與B - B k戴面來描繪製造該第一實施例之半導體裝置之 步驟的圖7^。第6圖包括顯示在形成上層導線之步驟、形成 最上層導線之步驟、與形成覆蓋薄膜之步驟之後得到之該 25 200847250 第一實施例之半導體裝置之第丨圖或第2圖之A_A,橫截面和 B-B’橫截面的圖示。第5A、5B、5C、和6圖顯示一個開孔 2a、一條金屬線2b、一個抗濕框架狀擋體3、一個317 1〇、 一個MOS電晶體的源極區域^、該M〇s電晶體的汲極區域 5 12、該M〇S電晶體的閘極電極13、側壁14、一個基體15a、 10 一個井15b、一個絕緣薄膜16、一個接觸中間層薄膜口、一 個接觸中間層薄膜18、導線中間層薄膜19,2〇,21,22,23,24, 25,26,27,28,29,30,和31、覆蓋薄膜32咖3213、導線與插塞 33,34,35,36,37,38,和39、-個插塞42、一條導線43、導線45&, 45b?45c?45d?45e?45f^a 45g . f ^ ik # ^ 46a?46b546c?46d? 46e,46f’和46g、一個插塞46h、和一條導線。與在第 和3B圖中所不之那些相同的組件是由相同的標號標示。 ,第5八圖顯示第1圖或第2圖的A-A,橫截面和B_B,橫截 面第八圖,員不在形成一個基本體⑽化)之步驟之後所得到 15之第一實施例之半導體裝置的橫截面。形成-個基本體的 々驟包括由!知製程形成該购§電晶體的步驟。 例如,如在第5A圖的B-B,橫截面中所示,用於電氣隔 離一半導體元件的STI 1〇是形成在該基體W上。隨後,與 該MOS電晶體之導雷 20 離子植入法來傳入在,相反之導電性類型的雜質是藉 ^ 仕邊井1^中。熱處理然後是執行來形成 该井15b。一個問極 u 、、、巴緣薄膜是形成在該基體15a的表面 上。一個氧化矽薄膜 緣薄膜。隨後,多曰 個高介電薄膜是用作該間極絕 個具有-閘極電^曰曰石夕是沉積在該間極絕緣薄膜上,而一 <形狀的光罩然後是藉光刻法來形成在 26 200847250 它上面。該多晶矽然後是藉各向異性蝕刻來蝕刻俾可形成 該閘極電極13。隨後,與該MOS電晶體之導電性類型相同 之導電性類型的雜質是利用該閘極電極13作為光罩藉著離 子植入法來傳入在源極/汲極延伸區域中。據此,源極/汲極 5延伸區域是形成在該閘極電極13兩側。一個絕緣薄膜是沉 積在該MOS電晶體上而然後是各向異性地蝕刻,藉此形成 該等側壁14在該閘極電極13的側壁上。與該M〇s電晶體之 導電性類型相同之導電性類型的雜質是利用該閘極電極13 與該等側壁14作為光罩藉離子植入法來傳入在源極/汲極 10區域中。據此,源極/汲極區域是形成在該等側壁14兩側, 藉此形成該等源極/汲極區域是與該等源極/汲極延伸區域 整合在一起的一個擴散區域。該絕緣薄膜16然後是沉積在 該MOS電晶體上。 另一方面,在第5A圖的A-A,橫截面中,該閘極絕緣薄 15膜與該絕緣薄膜16亦是分別在以上所述之步驟當中之形成 閘極絕緣薄膜之步驟與形成絕緣薄膜16之步驟中形成在對 應於該抗濕框架狀播體3的部份上。然@,無組件是在其他 步驟中形成。然而,-個傳入有與基體l5a之導電性類型相 同之導電性類型之雜質的擴散層可以在形成該M〇s電晶體 2〇之源極/没極區域的步驟中形成在該基體…中位於包括在 該抗濕框架狀擋體3内的導線與插塞4如下面。這是因為該 抗濕框架狀擔體3的電位是穩定化。再者,該問極=緣薄: 與該絕緣薄膜16亦是分別在形成閘極絕緣薄膜的步驟與形 成絕緣薄賴的步驟中形成在對應於該金屬線此的位置。 27 200847250 一第5B圖顯示在形成下層導線之步驟之後所 貫施例之半導體裝W j之弟 梧哉而Λ 弟2圖的Μ横裁面和Μ, 士、。形成下層導線的步驟包括藉習知製程,即 5 10 15 大馬士革製程,來形成下層導線部份的步驟。 例如’在第5B圖的B_B’橫截面中’由氧化驾膜與 矽薄膜構成的接觸中間層薄膜17,及由氧化 … 的接觸中間層咖8是藉化學蒸氣沉積法(CVD)來= 冓成 隨後,一個用於形成連接到該M〇s電晶體之導線於盆 中的凹槽是形成在該接觸中間層薄賴中。—個細請⑽ 電晶體之源極區域U、汲極區域12、和瞧電極接觸的介 層孔然後是形成在該接觸中間層薄膜17中。隨後,组或者 氮化钽是藉CVD來沉積在該介層孔與該凹槽内部。銅缺後 是藉電鍍來沉積在它上面。置於該接财間層_18上的 銅然後是藉化學機械研磨法(CMp)來移除。 結果,銅是埋藏在該凹槽與該介層孔内俾可形成該導 線與插塞33。 ^ 另方面’在第5B圖的A_A,橫截面中,以上所述的步 驟是以相同的形式執行,而因此,該導線與插塞咖是形成 在對應於該抗濕框架狀播體3的位置。好層孔是形成在該 20接觸中間層薄膜17中於對應於金屬線2b的位置。因此,一 個由銅製成的插塞不會形成在該接觸中間層薄膜丨了中。據 此,在以上的步驟中,導線45a是形成在該接觸中間層薄膜 18中的一凹槽内於對應於金屬線沘的位置。 該等導線中間層薄膜19和20、該導線與插塞34、形成 28 200847250 該抗濕框架狀擋體3的導線與插塞46b、和形成該金屬線2b 的導線45b,它們全部是顯示在第5B圖中,是由與以上所述 之那些相同的步驟形成。 再者,該等導線中間層薄膜21,22,23,和24、該等導線 5 與插塞35和36、該等形成抗濕框架狀擋體3的導線與插塞 46c和46d、及形成該金屬線2b的導線45c和45d,它們全部 是顯示在第5B圖中,是藉由重覆與以上所述之那些相同的 步驟來形成。 第5C圖顯示在形成中間層導線之步驟之後所得到之第 10 —實施例之半導體裝置之第1圖或第2圖的A-A’橫截面和 B_B’橫截面。形成中間層導線的步驟包括藉習知製程,即, 雙重大馬士革製程,形成中間層導線部份的步驟。 據此,該等導線中間層薄膜25,26,27,和28、該等導線 與插塞37和38、形成該抗濕框架狀擋體3的該等導線與插塞 15 46e和46f、及形成該金屬線2b的該等導線45e和45f是藉由重 覆與在形成下層導線之步驟中所述之那些相同的步驟來形 成。 第6圖包括顯示在形成上層導線之步驟、形成最上層導 線之步驟、與形成覆蓋薄膜之步驟之後所得到之第一實施 20 例之半導體裝置之第1圖或第2圖之A-A’橫截面與B-B’橫截 面的橫截面圖。 形成上層導線的步驟包括藉習知製程,即,雙重大馬 士革製程,形成上層導線部份的步驟。據此,該等導線中 間層薄膜29和30、該導線與插塞39、形成該抗濕框架狀擋 29 200847250 體3的導線與插塞46g、及形成該金屬線2b的導線45g是由與 以上所述之那些相同的步驟形成。 〃 形成最上層導線的步驟包括藉習知形成導線和插突 步驟形成最上層導線部份的步驟。 土之 5 、例如,如在第6圖的Μ,橫截面中所示,由氧化石夕薄膜 構成的導線中間層薄膜31是藉CVD來沉積。一個要連接到 導線與插塞39的介層孔然後是形成在該導線中間層薄膜= 上。隨後,鎢是藉濺鍍或者CVD來沉積在該導線中間層薄 膜^的整個表面之上。沉積於導線中間層薄膜31上的^然 10後是藉CMP來移除。因此,鐫是埋藏在該導線中間層薄稱 31中的介層孔内,藉此形成由鎢製成的插塞42。隨後,鋁 是藉濺鍍來沉積於該導線中間層薄膜31上。一個具有導= 之形狀的光阻圖案然後是藉光刻法來形成於鋁上。該光L 圖案然後是各向異性蝕刻來形成該導線43。 15 另一方面,如在第6圖的A-A,橫截面中所示,該抗濕樞 架狀擋體3的導線46i和減46h是藉著與以上所述之那趣 相同的步驟來形成。 〜 ^ 7成該金屬線2b的最上層導線不形成以致於當開孔“ 形成打在下面所述之開孔2&之凹槽的底部不與該最上層導 20線接觸。當形成金屬線213的最上層導線是設置且如果該開 ^2a之凹槽的底部是與該最上層導線接觸的話,後面的問 題出】現S最上層導線是由銅製成的情況中,銅被曝露而 一製程裝置在該步驟以及後續的步驟中會被銅污染。此 外,除非開孔2a之凹槽的深度是適足的,否則該等覆蓋薄 30 200847250 膜32a和32b之脫離的延伸是無法防止。 在第6圖的B_B’橫截面中,形成覆蓋薄膜的步驟包括藉 著以CVD沉積氧化矽或者氮化矽來形成覆蓋薄膜3和32匕 的步驟。另一方面,在第6圖的A-A,橫截面中,於覆蓋薄膜 5 32a*32b的形成之後,一個具有一對應於開孔2a之開孔的 光阻圖案是藉光刻法來形成在該覆蓋薄膜32b上。隨後,該 等覆盍薄膜32a和32b是由各向異性蝕刻來蝕刻俾可形成開 孔2a的凹槽。注意的是,當在橫截面圖觀看時,在抗濕框 架狀播體3側之開孔2a之邊緣的位置是實質上與在抗濕框 10架狀擋體3側之形成金屬線2b之導線45a,45b,45c,45d,45e, 45f,和45g之邊緣的位置對準。這是因為在金屬線2b是設置 的情況中,從開孔2a之邊緣開始傳遞的裂痕是如由箭頭62 所示沿著金屬線2b傳遞。 在製造該第一實施例之半導體裝置的方法中,該金屬 15線21)和該開孔2a能夠藉著與形成半導體元件與導線於元件 區域8a中之那些相同的步驟來輕易形成。結果,裂痕從金 屬線2b到抗濕框架狀擋體3的傳遞能夠被防止。 第二實施例 一第二實施例的半導體裝置現在將會配合第7圖來作 20 說明。在該第二實施例的半導體裝置中,形成第一實施例 之金屬線2b的導線是改變成導線與插塞。 第7圖是為顯示該第二實施例之半導體裝置之A-A’橫 截面的橫截面圖。第7圖顯示一切割邊緣1、一開孔2a、一 金屬線2b、一抗濕框架狀擋體3、一絕緣薄膜16、一接觸中 31 200847250 間層薄膜17、一接觸中間層薄膜18、導線中間層薄膜19, 20,21,22,23,24,25,26,27,28,29,30,和31、及覆蓋'薄膜32&和 32b。 與在第卜2、3A、3B、5A、5B、5C、和6圖中所示之 5 那些相同的組件是由相同的標號標示。 該第二實施例之半導體裝置的平面圖是與第1圖或者 第2圖相同。據此,該切割邊緣1、該開孔2a、該金屬線2b、 和該抗濕框架狀擋體3的平面位置關係是與配合第1圖和第 2圖所述的位置關係相同。 10 然而,在第7圖中所示的金屬線2b與該第一實施例的金 屬線2 b不同的地方是在於這實施例的金屬線2 b是由導線與 插塞 473,471),47〇,47(1,476,47(和47£構成。 構成該金屬線2b的導線與插塞不包括一置於一個對應 於插塞46h之位置的導線和形成該抗濕框架狀播體3的^"線 15 46i。這是因為必須保證開孔2a之凹槽之深度的若干量。如 同在該第一實施例的半導體裝置中一樣,在該元件區域8a 側之導線與插塞47a,47b,47c,47d,47e,47f,和47g之邊緣的位 置是與在元件區域8a側之開孔2a之凹槽之邊緣的位置對 準。 20 該等導線與插塞47a,47b,47c,47d,47e,47f^n47gfi5 一者是連接到相鄰的導線與插塞而且是彼此整合在一起。 該導線與插塞47a是由一埋藏於一個在該接觸中間層 薄膜18中之凹槽内的導線與一埋藏於一個在該接觸中間^ 薄膜17中之介層孔内的接觸插塞構成。在這裡,兮介層^ 32 200847250 不僅包括-個在元件區域8神所使用的習知介層孔且亦包 括一個凹槽狀介層孔。以上的導線與接觸插塞是由覆蓋有 钽或者氮化纽的銅製成。组或者氮化组作用如一個防止銅 在接觸中間層薄膜17和18中擴散的防擴散薄膜。該導線與 5插塞47a是藉雙重大馬士革製程來與導線與插塞幻一起形 成在元件區域8a中。 該導線與插塞47b是由-埋藏於—個在該導線中間層 薄膜20中之凹槽内的導線及一埋藏於一個在該導線中間層 薄膜19中之介層孔内的接觸插塞構成。該導線與插塞㈣是 10如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞34—起形成在元件區域8a中。 該導線與插塞47c是由一埋藏於一個在該導線中間層 薄膜22中之凹槽内的導線及一埋藏於一個在該導線中間層 薄膜21中之介層孔内的接觸插塞構成。該導線與插塞是 15如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞35—起形成在元件區域8a中。 該導線與插塞47d是由一埋藏於一個在該導線中間層 薄膜24中之凹槽内的導線及一埋藏於一個在該導線中間層 薄膜23中之介層孔内的接觸插塞構成。該導線與插塞47(1是 2〇 如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞36—起形成在元件區域8a中。 該導線與插塞47e是由一埋藏於一個在該導線中間層 薄膜26中之凹槽内的導線及一埋藏於一個在該導線中間層 薄膜25中之介層孔内的接觸插塞構成。該導線與插塞4%是 33 200847250 如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞37—起形成在元件區域8a中。 該導線與插塞47f是由一埋藏於一個在該導線中間層 薄膜28中之凹槽内的導線及一埋藏於一個在該導線中間層 5 薄膜27中之介層孔内的接觸插塞構成。該導線與插塞47f是 如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞38—起形成在元件區域8a中。 該導線與插塞4 7 g是由一埋藏於一個在該導線中間層 薄膜30中之凹槽内的導線及一埋藏於一個在該導線中間層 10 薄膜29中之介層孔内的接觸插塞構成。該導線與插塞47g是 如以上所述之導線與插塞中一樣藉雙重大馬士革製程來與 導線與插塞39—起形成在元件區域8a中。 請參閱第3A圖所示,相信的是,在該切割區域8b中, 於半導體裝置之切割期間形成在切割邊緣的裂痕是如由箭 15 頭60或61所示沿著導線中間層薄膜傳遞。 請參閱第7圖所示,在該第二實施例的金屬線2b中,埋 藏於一設置在所有該等導線中間層薄膜中之凹槽或者介層 孔的金屬材料是存在。據此’相信該第二實施例的金屬線 2 b具有比該第一實施例之金屬線2 b更高之防止裂痕在導線 20 中間層薄膜中之傳遞的效果。 構成該等導線中間層薄膜的絕緣材料,其會在下面作 描讀,不具有彈性。因此,當應力施加到它們那裡時該等 絕緣材料是容易斷裂。相對地,金屬材料具有彈性,而因 此,相信該等金屬材料不會斷裂,即使應力是施加到它們 34 200847250 那裡。會這樣的原因是如下。金屬材料具有彈性。因此, 當由於裂痕之傳遞而起的應力是施加到金屬材料時,金屬 材料經歷彈性變形,藉此釋放應力。 據此’该第二實施例的金屬線2b具有可靠地防止裂痕 5在導線中間層薄膜之傳遞的效果。 因此,該第二實施例的半導體裝置是為一個具有由金 屬線2b與開孔2b構成之防裂痕傳遞結構的半導體裝置。 如上所述,该第二實施例的金屬線2|3亦能夠藉著與形 成半導體元件和導線在該元件區域8a中之那些相同的步驟 1〇 來容易形成。 第三實施例 一第三實施例的半導體裝置現在將會配合第8圖來作 說明。在該第三實施例的半導體裝置中,構成金屬線沘之 導線的寬度是大的,而且該等導線伸到該切割區域8b側。 15 第8圖是為一個顯示該第三實施例之半導體裝置之 A-A杈截面的檢截面圖。第8圖顯示一切割邊緣i、一開孔 2a、一金屬線2b、一抗濕框架狀擋體3、一絕緣薄膊16、一 接觸中間層薄膜17、-接觸中間層薄膜18、導線中間層薄 膜 19,20,21,22,23,24,25,26,27,28,29,30,和31、及覆蓋薄膜32& 20 和32b 〇 與在第卜2、3A、3B、5A、5B、5C、和6®中所示之 那些相同的組件是由相同的標號標示。 孩第一貫靶例之半導體裝置的平面圖是與第1圖或第2 圖相同。據此,該切割邊緣卜該開孔23、該金屬線2b、和 35 200847250 抗濕框架狀擋體3的平面位置關係是與配合第1圖和第2圖 所述的位置關係相同。 然而,在第8圖中所示的金屬線2b與該第一實施例之金 屬線2b不同的地方是在於該金屬線2b是由導線構成。 5 構成金屬線2b的導線不包括一置於一個對應於該插塞 46h之位置的導線和形成該抗濕框架狀擋體3的導線46i。這 是因為必須保證該開孔2a之凹槽之深度的若干量。如同在 該第一實施例的半導體裝置中一樣,在元件區域8a側之該 等導線48&,4813,48〇,48(1,486,48€和488之邊緣的位置是與在 10 元件區域8a側之開孔2a之凹槽之邊緣的位置對準。 該等導線48&,4813,48(:,48(1,486,48£和48§中之每一者的 寬度是比開孔2a之凹槽的寬度大。在切割區域扑側之該等 導線48a至48g中之每一者的邊緣相對於在切割區域讣側之 開孔2a之凹槽的邊緣朝向切割區域奶側伸出。 15 該導線48a是由一埋藏於一個在該接觸中間層薄膜18 中之凹槽的導線構成。這導線48a是由覆蓋有鈕或者氮化鈕 的銅製成。组或者氮化组作用如一個防止銅在該接觸中間 層薄膜18中擴散的防擴散薄膜。該導線48a是藉大馬士革製 程來與導線與插塞33的導線部份一起形成在該元件區軌 20 中。 »亥導線48b疋由-埋藏於—個在該導線中間層薄膜加 中之凹槽内的導線構成。該導線-是如同在以上所述的導 樣藉著大馬士革製程來與該導線與插塞34的導線部份 ~起形成在該元件區域8a中。 36 200847250 該導線48c是由一埋藏於一個在該導線中間層薄膜22 中之凹槽内的導線構成。該導線48c是如同在以上所述的導 線一樣藉著大馬士革製程來與該導線與插塞35的導線部份 一起形成在該元件區域8a中。 5 該導線48d是由一埋藏於一個在該導線中間層薄膜24 中之凹槽内的導線構成。該導線48d是如同在以上所述的導 線一樣藉著大馬士革製程來與該導線與插塞36的導線部份 一起形成在該元件區域8a中。 該導線48e是由一埋藏於一個在該導線中間層薄膜26 10 中之凹槽内的導線構成。該導線48e是如同在以上所述的導 線一樣藉著大馬士革製程來與該導線與插塞37的導線部份 一起形成在該元件區域8a中。 該導線48f是由一埋藏於一個在該導線中間層薄膜28 中之凹槽内的導線構成。該導線48f是如同在以上所述的導 15 線一樣藉著大馬士革製程來與該導線與插塞38的導線部份 一起形成在該元件區域8a中。 該導線48g是由一埋藏於一個在該導線中間層薄膜30 中之凹槽内的導線構成。該導線48g是如同在以上所述的導 線一樣藉著大馬士革製程來與該導線與插塞39的導線部份 20 一起形成在該元件區域8a中。 請參閱第3A圖所示,相信在該切割區域8b中,於半導 體裝置之切割期間形成在切割邊緣1的裂痕是如由箭頭60 或61所示沿著導線中間層薄膜傳遞。 因此,請參閱第8圖所示,在該第三實施例的金屬線2b 37 200847250 中’埋藏於導線中間層薄膜中之凹槽内的金屬材料是存 在。此外’與在切割區域讣側之第一實施例之金屬線2b之 凹槽的邊緣比較起來,在切割區域8b側之第三實施例之金 屬線2b之凹槽的邊緣是位於較接近該切割區域8b。因此, 5相信該第三實施例的金屬線2b具有比由第一實施例之金屬 線2b所達成之效果更高之防止裂痕在導線中間層薄膜中之 傳遞的效果。會這樣的原因是如下。由於包括金屬材料於 其内之凹槽中之每一者的寬度是大的而且該等凹槽中之每 一者的末端是位於較接近該切割區域8b,裂痕從切割區域 10 8b開始的傳遞會在較接近切割區域8b的位置停止。 據此,該第三實施例的金屬線2b具有更強且可靠地防 止裂痕在導線中間層薄膜中之傳遞的效果。 因此,該第三實施例的半導體裝置是為一種具有由金 屬線2b與開孔2a構成之防裂痕傳遞結構的半導體裝置。 15 如上所述,該第三實施例的金屬線2b亦能夠藉著與形 成半導體元件和導線於元件區域8a中之那些相同的步驟來 輕易形成。 第四實施例 一第四實施例的半導體裝置現在將會配合第9、1〇、 20 11、和12圖來作描述。在該第四實施例的半導體裝置中, 一金屬線4是更設置在一金屬線2b與一切割區域8b之間。 第9圖是為一個顯示該第四實施例之半導體裝置的平 面圖。第9圖顯示一切割邊緣1、一開孔2a、一金屬線2b、 ' 抗濕框架狀播體3、或金屬線4、該元件區域8 a、該切割 38 200847250 區域8b、和一外週緣區域8c。與在第1圖或第2圖中所示之 那些相同的組件是由相同的標號標示。 據此,該切割邊緣1、該開孔2a、該金屬線2b、該抗濕 框架狀擋體3、該元件區域8a、該切割區域8b、和該外週緣 5 區域8c是與在第1圖或第2圖中的描述與配置相同。 該金屬線4在平面圖中是置於開孔2a和置於它下面的 金屬線2b與切割邊緣1之間俾可包圍該元件區域8a。該金屬 線4是由一具有若干寬度的金屬導線構成而且形成一連續 框架。如下面所述,該金屬線4是由埋藏於在數個導線中間 10 層薄膜中之凹槽内的金屬材料構成。即,該等凹槽中之每 一者亦具有一連續框架形狀。 第10圖是為一個顯示該第四實施例之半導體裝置之變 化的平面圖。第10圖顯示一切割邊緣1、一開孔2a、一金屬 線2b、一抗濕框架狀擋體3、一金屬線7、該元件區域8a、 15 該切割區域8b、及一外週緣區域8c。與在第1圖或第2圖中 所示之那些相同的組件是由相同的標號標示。 據此,該切割邊緣卜該開孔2a、該金屬線2b、該抗濕 框架狀擋體3、該元件區域8a、該切割區域8b、及該外週緣 區域8c是與在第1圖或第2圖中的描述與配置相同。 20 該金屬線7在平面圖中是置於開孔2a和置於它下面的 金屬線2b與切割邊緣1之間俾可包圍該元件區域8a。該金屬 線7是由一具有若干寬度和若干長度的金屬導線構成而且 是配置俾可形成一不連續框架。如下面所述,該金屬線7是 由埋藏於在數個導線中間層薄膜中之凹槽内的金屬材料構 39 200847250 成。即,該等凹槽中之每一者具有若干寬度和若干長度而 且是配置俾可形成一不連續框架。 第11圖疋為一個顯示該第四實施例之半導體裝置之 Μ橫截面結構之第—例子的職面圖。第u圖顯示一切 5割邊緣1、-開孔2a、該金屬線㉛、該抗濕框架狀擋體3、 五屬線4或7、-絕緣薄膜16、—接觸中間層薄膜17、一 接觸中間層薄膜18、導線中間層薄膜19,2〇,21 22,23 24,25, 26,27,28,29,30,和31、及覆蓋薄膜32咖3213。 與在第卜2、3A、3B、5A、5B、5C、和6圖中所示之 1〇那些相同的組件是由相同的標號標示。據此,構成金屬線 2B之該等導線祝獅从祝从供和^的結構是與在 第3A圖中所示的那些相同。 由第11圖所示的橫截面圖與顯示由第3八圖所示之第一 實施例之半導體裝置之A_A,橫截面的橫截面圖不同的地方 I5 是在於該金屬線4或7是進一步設置。 在第11圖中所示的金屬線4或7是由導線51a,51b,51c, 51(1,516,51(和54構成。 構成金屬線4或7的導線不包括一置於一個對應於該插 塞46h之位置的導線和形成該抗濕框架狀擋體的導線。 20這是因為必須保證該開孔之凹槽之深度的若干量。該等 導線51&,5113,51(:,51(1,5^,511;和54是置於該切割邊緣1與 該金屬線2b之間。 該等導線51&,5113,51。,51(1,516,51£;和51§中之每一者最 好具有與構成金屬線2b之導線中之每一者之寬度相同的寬 40 200847250 度。然而,該等導線51a至5lg的寬度不被特別限制,只要 該等導線51a至5lg不伸出到該切割區域8b。 该導線51a是由一埋藏於一個在接觸中間層薄膜“中 之凹槽内的導線構成。這導線51a是由覆蓋有组或者氮化组 5的銅製成。组或者氮化组是作用如一個防止銅在該接觸中 間層薄膜18中擴散的防擴散薄膜。該導線…是藉大馬士革 製程來與該導線與插塞33的導線部份一起形成在該元件區 域8a中。 忒導線5lb是由一埋藏於一個在該導線中間層薄膜 1〇中之凹槽内的導線構成。該導線51b是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞%的導線部份一 起形成在該元件區域8a。 該導線51c是由一埋藏於一個在該導線中間層薄膜22 中之凹槽内的導線構成。該導線51c是如同在以上所述的導 15線-樣藉大馬士革製程來與該導線與插塞%料線部份一 起形成在該元件區域8a。 该導線51d是由一埋藏於一個在該導線中間層薄膜24 中之凹槽内的導線構成。該導線51d是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞36的導線部份一 20起形成在該元件區域8a。 該導線5le是由一埋藏於一個在該導線中間層薄膜% 中之凹槽内的導線構成。該導線5喊如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞37的導線部份一 起形成在該元件區域8a 〇 刀 41 200847250 該導線51f是由-埋藏於—個在該導線中間層薄膜烈 中之凹槽_導線構成。該導線川是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞38的導線部份= 起形成在該元件區域8a。 77 5 該導線51g是由—埋藏於—個在該導線巾間層薄膜3〇 中之凹槽_導線構成。該導線5ig是如㈤在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞39的導線部份一 起形成在該元件區域8a。 第12圖是為一個顯示該第四實施例之半導體妒置之 1〇 ΑβΑ’橫截面結構之第二例子的橫截面圖。第12圖顯示一切 剎邊緣1、一開孔2a、該金屬線2b、該抗濕框架狀擋體3、 一金屬線4或7、一絕緣薄膜16、一接觸中間層薄膜17、一 接觸中間層薄膜18、導線中間層薄膜19,2〇,21,22,2乙24 h 26,27,28,29,30,和31、及覆蓋薄膜32&和321)。 15 與在第 1、2、3A、3B、5A、5B、5C、6、和7圖中所 示之那些相同的組件是由相同的標號標示。據此,構成金 屬線2b之導線與插塞•,^/〜,,•,,和们㈣結構 疋與在弟7圖中所示的那些相同。 由第12圖所示的橫截面圖與該顯示由第7圖所示之第 2〇二實施例之半導體裝置之A-A,橫截面的橫截面圖不同的地 方是在於該金屬線4或7是進一步設置。 在第12圖中所示的金屬線4或7是由導線 51&,5比,51(:,51(1,51151(和54構成。 構成金屬線4或7的導線不包括一置於一個對應於插塞 42 200847250 46h之位置的導線和形成該抗濕框架狀擋體3的導線46i。這 是因為必須保證該開孔2a之凹槽之深度的若干量。該等導 線518,511),51(:,51(1,516,51(和51§是置於切割邊緣1與金屬 線2b之間。 5 該等導線51&,511),51〇,51(1,5化551&和51§中之每一者最 好具有與構成金屬線2b之導線中之每一者之寬度相同的寬 度。然而,該等導線51a至51g的寬度不特別受限制,只要 該等導線5la至5lg不伸出到該切割區域8b。 該等導線51江,5113,51(:,51(1,51€,51£;和518是與在第11圖 10 中所述的那些相同。 請參閱第3A圖所示,相信在該切割區域讣中,於半導 體裝置之切割期間形成在切割邊緣1的裂痕是沿著由箭頭 60或61所示的導線中間層薄膜傳遞。 據此,該第四實施例之金屬線2b為何具有防止裂痕在 15導線中間層薄膜中之傳遞之效果的原因是與在第一實施例 或第二實施例中所述的相同。 另一方面’該第四實施例的金屬線4或7具有縮減從切 割區域8b開始傳遞之裂痕數目的效果。雖然金屬線4或7不 設置在所有該等導線中間層薄膜中,在包括構成金屬線4或 20 7之導線51 &至51 g的導線中間層薄膜中,該金屬線4或7具有 防止裂痕傳遞的效果。這是因為金屬線4或7具有與金屬線 2b之效果相同的效果。再者,當裂痕傳遞通過置於構成金 屬線4或7之$線51 a至51 g之間的導線中間層薄膜時,該金 屬線4或7具有限制裂痕之尺寸的效果。這是因為該等導線 43 200847250 51a至51g強化該等導線中間層薄膜。 據此,該第四實施例的金屬線4或7與金屬線2b具有更 強地且可靠地防止裂痕在導線中間層薄膜中之傳遞的效 果。 5 因此,該第四實施例的半導體裝置是為一個具有一由 金屬線2b、金屬線4或7、與開孔2a構成之防裂痕傳遞結構 的半導體裝置。 如上所述,該第四實施例的金屬線4或7和金屬線沘亦 能夠藉著與形成半導體元件和導線於該元件區域8a中之那 10 些相同的步驟來輕易形成。 第五實施例 一第五實施例的半導體裝置及其之變化現在將會配合 第13、14、和15圖來作描述。在該第五實施例的半導體裝 置中,一金屬線5是進一步設置在一金屬線2b與一抗濕框架 15 狀擋體3之間。 第13圖是為一個顯示該第五實施例之半導體裝置的平 面圖。第13圖顯示一切割邊緣i、一開孔以、一金屬線汕、 抗濕框架狀擋體3、一金屬線4、一金屬線5、該元件區域 8a、該切割區域8b、和一外週緣區域8c。與在第丨圖、第2 2〇圖、或第9圖中所示之那些相同的組件是由相同的標號標 示0 據此,該切割邊緣卜該開孔仏、該金屬線此、該抗濕 框架狀撞體3、該金屬線4、該元件區域8a、該切割區域%、 和一外週緣區域8c的描述與配置是與在第丨圖、第2圖、或 44 200847250 第9圖中的描述和配置相同。 該金屬線5在平面圖中是置於該開孔2a和置於它下面 的金屬線2b與該抗濕框架狀擋體3之間俾可包圍該元件區 域8a。該金屬線5是由一具有若干寬度的金屬導線構成而且 5 形成一連續框架。如下面所述,該金屬線5是由一埋藏於在 數個導線中間層薄膜中之凹槽内的金屬材料構成。即,該 等凹槽中之每一者亦具有一連續框架形狀。 第14圖是為一個顯示該第五實施例之半導體裝置之 A-A’橫截面結構之例子的橫截面圖。第14圖顯示一切割邊 10 緣1、一開孔2a、一金屬線2b、該抗濕框架狀擋體3、一金 屬線4、一金屬線5、一絕緣薄膜16、一接觸中間層薄膜17、 一接觸中間層薄膜18、導線中間層薄膜19,20,21,22,23,24, 25,26,27,28,29,30,和31、及覆蓋薄膜32&和321)。 與在第 1、2、3A、3B、5A、5B、5C、6、和11圖中所 15 示之那些相同的組件是由相同的標號標示。據此,構成金 屬線2B的導線45&,4513,45〇,45(1,456,45&和458是與在第3八圖 中所示之那些相同。構成金屬線4之導線51a,51b,51c,51d, 5 4,51匕和54的結構亦是與在第11圖中所示的那些相同。 由第14圖所示的橫截面圖與顯示由第11圖所示之第四 20 實施例之半導體裝置之A-A’橫截面的橫截面圖不同的地方 是在於該金屬線5是進一步設置。 在第14圖中所示的金屬線5是由導線52a,52b,52c,52d, 52e,52f,和 52g 構成。 構成金屬線5的導線不包括一置於一個對應於該插塞 45 200847250 46h之位置的導線和形成該抗濕框架狀擋體3的導線。這是 因為必須保證開孔2a之凹槽之深度的若干量。該等導線52a, 5213,52〇,52(1,5202£;和52§是置於該金屬線21)與該抗濕框架 狀擋體3之間。 該等導線52&,521),52(:,52(1,526,52(和528中之每一者最 好具有與構成金屬線2b之導線中之每一者之寬度相同的寬 度。然而,該等導線52&至52§的寬度不特別受限制,只要 該等導線52a至52g不與該金屬線2b和該抗濕框架狀播體3 接觸。 10 15 20 料⑽a是由—埋藏於—個在該接觸中間層薄膜18 中之凹槽的導線構成。這導線52岐由覆蓋有Μ 的銅製成。组或者氮化蚊作用如—個防止銅在接觸中; 層溥膜18中擴散的防擴散薄勝。該導線200847250 IX. INSTRUCTIONS: TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor device and a method of fabricating a semiconductor device. BACKGROUND OF THE INVENTION In the formation of a semiconductor I on a wafer, the number of effective wafers is determined by the area of the semiconductor device and the area of the dicing line region. Therefore, it is desirable to increase the number of active wafers per wafer by reducing the area of the dicing line region. The cut line areas are the areas required for separating a plurality of semiconductor devices formed on a wafer into wafers by laser cutting or knife cutting. The semiconductor devices each include a circuit pattern region and an outer peripheral region for absorbing a crack formed when the semiconductor devices are separated from each other, the outer peripheral regions being adjacent to the circuit pattern region and a cut line region. The outer peripheral region for absorbing cracks due to wafer dicing is from the edge of the dicing line region to the moisture resistant frame-like 擒-20 body placed within the wafer. The moisture resistant frame-like broadcast body is placed in the circuit pattern area and the outer circumference.  The boundary between the edge regions. The moisture-resistant frame-like stopper is disposed to prevent moisture from entering the inside of the semiconductor device from the cutting surface after the plurality of semiconductor devices formed on the wafer are separated from each other. According to a conventional technique for reducing the peripheral region of the absorption crack, a groove for preventing the extension of the crack is disposed at an edge disposed at a cutting line region and a moisture resistant frame. The position between the stoppers is used as the uppermost cover film of a semiconductor device (see, for example, Japanese Laid-Open Patent Application Publication No. 9-199449). According to another 5 technique, a recess extending from the top of a semiconductor device to a substrate is formed at a position between an edge of a cutting line region and a moisture-resistant frame-like stopper, and the groove is then It is filled with a metal material (see, for example, Unexamined Patent Application Publication No. 10-41408). SUMMARY OF THE INVENTION 10 SUMMARY OF THE INVENTION A feature of the present invention is to provide a semiconductor device disposed on a semiconductor substrate, the semiconductor device including an element region including an element, a moisture resistant frame surrounding the element region, and a set in the anti-wet a 15th edge layer between the wet frame and the outer periphery of the semiconductor device and above the semiconductor substrate, a first metal line extending along the outer periphery and disposed in the insulating layer, and a first metal line disposed thereon A groove in the insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view showing a semiconductor device of a first embodiment; 20 FIG. 2 is a plan view showing a variation of the semiconductor device of the first embodiment; FIGS. 3A and 3B are A cross-sectional view of the semiconductor device of the first embodiment and showing the advantages of the metal line 2b in the first embodiment; FIG. 4 is a cross-sectional view showing the variation of the semiconductor device of the first embodiment. A cross-sectional view and showing a cross section corresponding to AA of Fig. 1 or Fig. 2; cross sections 5A, 5B, and 5C are for using AA of Fig. 1 or Fig. 2, cross section and BB, horizontal The cross-section depicts an illustration of the steps of the fifth embodiment of the semiconductor device of the first embodiment; FIG. 6 includes the steps of forming a top layer of wire, forming a topmost layer of wire, and forming a cover film. A cross-sectional view of a cross section and a B_B' cross section of the first or second embodiment of the semiconductor device of the first embodiment; FIG. 7 is an AA showing a semiconductor device of a second embodiment; Cross-section FIG. 8 is a cross-sectional view showing a cross section of A-A' of a semiconductor device showing a third embodiment; FIG. 8 is a plan view showing a semiconductor device of a fourth embodiment; A plan view showing a variation of the semiconductor device of the fourth embodiment; Fig. 11 is a cross-sectional view showing a first example of a cross-sectional (four) configuration of a semiconductor device of the fourth embodiment; The picture is 1 .  ' 固 固 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的 的A cross-sectional view of an example of a cross-sectional structure of a semiconductor device of the fifth embodiment; 200847250 A-A' cross-sectional structure showing a variation 1 of the semiconductor device of the fifth embodiment Fig. 16 is a plan view showing a portion where the cutting regions 8b intersect each other in the case where the semiconductor devices of the sixth embodiment are arranged in a matrix shape of 5, and Fig. 17A is a In the cross-sectional view of line C-C' in Fig. 16, Fig. 17B is a cross-sectional view of a line D-D' of Fig. 16; Fig. 18 is a view showing a seventh One of the embodiments is illustrated along a cross section of line C-C' in Fig. 16; the 19A to 19F drawings each show a planar shape of a metal pattern constituting a metal line; and 15 Fig. 19G is a diagram showing a portion of the shape of the reticle pattern used to form the reticle of a basic metal line Show. [Embodiment] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment, Second Embodiment, Third Embodiment, Fourth Embodiment, 20 Fifth Embodiment, Sixth Embodiment, Seventh Embodiment, and Eighth The embodiment will now be described. The invention is not limited to these examples. First Embodiment A first embodiment relates to a semiconductor device including a buried region in an outer peripheral region between an element region in which a semiconductor element is disposed and an 8200847250 cutting region. A recess 设置 disposed in the insulating layer surrounds the metal line of the element region, and in the outer peripheral region, a recess disposed in the uppermost insulating film on the metal line. 5 This first embodiment will now be described in conjunction with Figures 1 through 6. Fig. 1 is a plan view showing a semiconductor device of the first embodiment. Fig. 1 shows a cutting edge 1, an opening 2a, a metal wire 2b, a moisture-resistant frame-like stopper 3, an element region 8a, a cutting region 8b, and an outer peripheral region 8c. The element region 8a is a region in which a pattern of a semiconductor circuit is formed in the semiconductor device. The dicing area 8b is an area to be cut when the semiconductor devices formed on one wafer are separated from each other. The outer peripheral region 8c is a region between the cutting region 8b and the element 15 region 8a and which is disposed to surround the element region 8a in the semiconductor device. The cutting edge 1 is a boundary between the cutting region 8b and the semiconductor device. More specifically, the cutting edge 1 is a boundary between the cutting area 8b and the outer peripheral area 8c. The opening 2a is a groove-like opening provided in an uppermost insulating film included in the semiconductor device. The opening 2a is placed in the outer peripheral region 8c and may surround the element region 8a in a frame form. The opening 2a is placed in a position in which the opening 2a is spatially overlapped twice with the wire 2b as described below. 9 200847250 The opening 2 a prevents the uppermost insulating film from separating or extending into the crack of the element region 8a when the semiconductor device is cut by a laser beam or a cutter of the cutter in the cutting region. The reason for this is § § is as follows. Since the opening 2a is placed in the uppermost insulating film in the form of a groove 5, the transfer of the crack in the uppermost insulating film from the side of the cutting portion 8b is stopped. The metal wire 2b is made of the same metal material as the wires included in the semiconductor device. As described below, the metal wire 2b is formed by filling a recess 1 设置 which is disposed in the insulating layer and surrounds the element region 8a with a metal material. The insulating layers are insulating layers for separating the wiring layers in the semiconductor device. Here, as described below, the wire ridge prevents cracks from extending from the side of the cutting region 8b to the passage of the element region in the insulating layers. The non-elastic insulating material is easily broken when stress is applied thereto. Relative to 15 ground, due to the elasticity of the metal material, a large amount of stress must be broken. Accordingly, it is believed that when metal materials are filled in the grooves in the insulating layers, the transfer of cracks in the insulating layers is prevented. The moisture-resistant frame-like stopper 3 is made of the same metal material as that of the wires included in the semiconductor device. The moisture-resistant frame-like carrier 3 is disposed at a boundary between the element region 8a and the outer peripheral region 8C, and can surround the element region 8a as described below, and the moisture-resistant frame-like body 3 is included by all The wire layer is formed in the semiconductor device. All of the wires constituting the moisture-resistant (four) (four) body 3 are connected to the upper and lower wires by metal plug connectors buried in the grooves and disposed between the wires. As described below, the name 200847250 5 metal insert mainly refers to the entire metal material buried in a contact window, but also refers to the entire metal material buried in a groove. The moisture-resistant frame-like stopper 3 prevents intrusion of moisture from the cutting region 8b to the element region 8a after the semiconductor devices are separated from each other by cutting. 5 This is because the moisture-resistant frame-like stopper 3 has a metal wall shape surrounding the element region 8a. It is also believed that since the metal material constituting the moisture-resistant frame-like member 3 reacts with moisture, moisture is maintained in the region of the metal material, and the intrusion of moisture into the element region 8a can be prevented. Fig. 2 is a plan view showing a modification of the semiconductor device of the first embodiment. Fig. 2 shows a cutting edge 1, a C-window body 6a, a metal wire 6b, a moisture-resistant frame-like body 3, an element region 8a, a cutting region 8b, and an outer peripheral region 8c. The same components as those shown in Fig. 1 are denoted by the same reference numerals. Specifically, the cutting edge 1, the moisture-resistant frame-like stopper 3, the element region 8a, the cutting region 15 8b, and the outer peripheral region 8c are the same as those shown in Fig. 1. The C-window body 6a is placed in the outer peripheral region 8c and is an opening provided in an uppermost insulating film included in the semiconductor device. The C window stopper 6a is composed of four rectangular grooves each having the same length as the edge of the element region 8a. The four grooves are configured to surround the element region 8a. However, the four grooves are discontinuous at the four corners of the element region 8a. Further, the four grooves are positions where the four grooves are spatially overlapped with the metal wires 6b as described below. The C-window body 6a has the same function as that of the opening 2a. The metal wire 6b is made of the same metal material as the wire phase 11 200847250 included in the semiconductor device. As will be described later, the metal wire 6b is formed by filling the four rectangular recesses provided in the insulating layer with the metal material to surround the element region 8a. In particular, the four grooves do not form a frame shape but are discontinuous at the four corners of the element region 8a. The insulating 5 layers are insulating layers for separating the wiring layers in the semiconductor device. The advantage of the presence of the metal wire 6b is the same as the advantage of the presence of the metal wire 2b described above. An enlarged view indicated by a thin line arrow shows a corner of the element area 8a. The varying structure can prevent stress accumulation between each of the insulating layers and 10 of the metal material between the grooves having the metal material therein, the stress being generated when the metal material is elongated due to thermal expansion . The reason for this is as follows. The metal wire 2b described above has a planar shape in which the angle at the corner is 90 degrees. Therefore, the stress is concentrated on the equiangular angle. In contrast, as for the metal wire 6b, in the direction in which a stress is applied, 15 each of the insulating layers and the metal material are in contact with each other at the edge of the groove having the metal therein. As a result, the stress can be dissipated. Further, as shown in another enlarged view indicated by a thick arrow, by removing the corners of the metal wire 2b, the stress can be similarly dissipated at the corner of the metal wire 2b. This is because, in a direction in which stress is applied, similarly, each of the insulating layers and the metallic material are in contact with each other at the corners. Figs. 3A and 3B are cross-sectional views of the semiconductor device of the first embodiment and show the advantages of the metal wires 2b in the first embodiment. Fig. 3A is a cross-sectional view showing a cross section of A-A' showing Figs. 1 and 2; 12 200847250 Brother 3B is a cross-sectional view of the cross section of the B _B ′ of the 1 and 2 brothers. 3A and 3B show a cutting edge 1, an opening 2A, a metal wire 2b, a moisture-resistant frame-like body 3, a shallow trench isolation (STI) 5 1 , a source region 11 of a MOS transistor. The gate electrode of the m〇S transistor, the gate electrode of the δ MOS transistor, the sidewall 14, the substrate 15a, the well 15b, an insulating film 16, a contact interlayer film π, a contact Intermediate film 18, wire intermediate film 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 3 cover film 32 & and 321), wire and plug 33, 34, 35, 36, 10 37, 38, and 39, a plug 42, a wire 43, wires 45a, 45b, 45c, 45d, 45e, 45f, and 45g, wires and plugs 46a, 46b, 46c, 46d 46e, 46f, *46g, a plug 46h, a wire 46i, and arrows 60, 61, 62, and 63. The cutting edge 1, the opening 2a, the wire 2b, and the moisture-resistant frame-like body 3 are the cutting edge 1, the opening 2a, the wire 15b, and the moisture-resistant frame described in conjunction with FIG. The stoppers 3 are identical. The B-B' cross section, which is related to the element region 8a, will now be described in conjunction with Figure 3B. Figure 3B shows a bulk portion including a MOS transistor and the like, a lower wire portion, an intermediate layer wire portion, an upper wire portion, an uppermost wire portion 20 portions, and A cover film portion. The basic portion includes the substrate 15a, the well 15b, the STI 1 , the MOS transistor, and the insulating film 16. The substrate 15a is a semiconductor substrate having a semiconductor element formed thereon and having a predetermined conductivity type. The STI 10 is an element isolation that isolates the semiconductor components for an electrical 13 200847250. The STI 1〇 is composed of a recess disposed between the half body elements and an insulating material filling the recess. The well 15b is a heterogeneous region from the surface of the substrate 15a to the inside of the substrate 15& The conductivity type of the ^1〇3 transistor formed in the well 1 is opposite to that of the conductivity type of impurities diffused in the well (10). The source region 4 of the 4M0S transistor is a region forming the source electrode of the transistor, and is a conductivity different from the conductivity type of the substrate 15a in the substrate. An impurity diffusion region of a type of impurity. The drain region 12 of the MOS transistor is a region forming a drain electrode of the NMOS transistor, and is an impurity diffusion region similar to the source region 11. The gate electrode 13 of the M?s transistor is placed on a gate oxide film provided on the surface of the substrate 15a. The gate electrode 13 is made of, for example, polycrystalline shi, lithium, metal, or the like. The drain region 12 and the source region 丨丨 are disposed on both sides of the gate electrode 13 of the M 〇 transistor. The side walls 14 are disposed on the side walls of the gate electrode 13 and are formed, for example, of a hafnium oxide film. The insulating film 16 is an insulating film provided on the MOS transistor and is composed of, for example, a hafnium oxide film. The lower wire portion includes the contact interlayer films 17 and 18, 20 and four layer units disposed on the contact interlayer film, each of the layer units being composed of a wire layer and the layer An intermediate layer film of the wire layer is formed. The contact interlayer films 17 and 18 are sequentially stacked on the insulating film 16. The contact interlayer films 17 and 18 are insulating films disposed between the M?s transistor 14 200847250 and a wire for electrical contact with the MOS transistor. The wire and plug 33 are formed by a wire buried in a recess in the contact interlayer film 18 and in electrical contact with the centistate 3 transistor, and a film embedded in the contact interlayer film 17 The 5 touch plug is formed in the middle layer hole. Note that the term, the via hole, refers to an opening through an insulating film. The term, contact plug, refers to a rod-shaped metal block that is connected to the wire at its top and bottom to electrically connect the upper wire to the lower wire. The wires and the contact plug are made of a metal material such as copper or a copper plate which is provided at the boundary between the copper and the insulating film or a nitrided metal material. Copper is the main component of the wire. The group or gasification group acts as a diffusion preventive film that prevents copper from diffusing in the insulating film. The wire intermediate film 19 and 20 are sequentially stacked on the contact interlayer film 18 as an insulating film disposed between the wires. The wire and plug 34 is a wire buried in a groove in the film 2 of the wire intermediate layer and a contact plug buried in a via hole attached to the film of the interlayer of the wire Composition. These wires and plugs have the same structure as those described above. The wire intermediate film 21 and 22 are sequentially stacked on the contact interlayer film 20 as an insulating film disposed between the wires. The wire and the plug 35 are composed of a wire buried in a groove in the thin layer of the wire and a contact plug buried in a hole in the interlayer film of the wire. . These wires and plugs have the same structure as those described above. The conductor interlayer films 23 and 24 are sequentially stacked on the contact layer 15 200847250 interlayer film 22 as an insulating film disposed between the wires. The wire and plug 36 are formed by a wire buried in a groove in the film stack of the wire and a contact plug buried in a via hole in the middle layer of the wire. . These wires and plugs have the same structure as those described in the above 5. The intermediate layer wire portion includes the wire intermediate film 25 and %, and two layer units disposed on the wire intermediate film, each of the layer units being composed of a wire layer and the wire An intermediate layer film of the layer is formed. The conductor interlayer films 25 and 26 are sequentially stacked on the contact interlayer film 24 as an insulating film disposed between the wires. The wire and plug 37 is made of a wire buried in a concave portion of the film of the intermediate layer of the wire and a contact plug buried in the hole of the film of the intermediate layer of the wire. Composition. These wires and plugs have the same structure as those described in the above 15. The conductor interlayer films 27 and 28 are sequentially stacked on the contact interlayer film 26 as an insulating film disposed between the wires. The wire and plug 38 are formed by a wire buried in a recess in the intermediate film 28 of the wire and a contact plug buried in a via hole in the interlayer film 27 of the wire. Composition. These wires and plugs have the same structure as those described above. The upper wire portion includes the wire interlayer films 29 and 30 and a wire layer disposed on the wire interlayer film. The conductor interlayer films 29 and 30 are sequentially stacked on the contact layer 16 200847250 interlayer film 28 as an insulating film disposed between the wires. The wire and plug 39 are formed by a wire buried in a recess in the conductor interlayer film 30 and a contact plug buried in a via hole in the conductor interlayer film 29. These wires and plugs have the same structure as those described in 5 above. The uppermost wire portion includes the wire intermediate film 31, the plug 42, and the wire 43 formed of a wire layer disposed on the wire interlayer film 31 and the plug 42. The wire intermediate film 31, which is stacked on the wire intermediate film 10 30', is an insulating film disposed between the wires. The plug 42 is formed by a contact plug buried in a via hole in the intermediate film 31 of the wire. The contact plug of the plug 42 can be made of copper, the surface of which is covered by titanium nitride. Alternatively, the contact plug can be made of tungsten. The wire 43 is a top 15 layer of wire disposed on the film 3 of the intermediate layer of the wire. The wire 43 is made of copper or inscription. When the wire is made of the same as shown in the drawing, the wire 43 is formed by etching using a photoresist patterned by photolithography as a mask. Although the stomach is not shown in the drawings, when the wire 43 is made of copper, the wire 43 is formed by forming a groove in the cover film and then burying 20 copper in the groove. The cover film portion includes the cover film 32a and the cover film 32b. The cover film 32a is an insulating film stacked on the wire. The cover film 32b is an uppermost insulating film stacked on the cover film. 17 200847250 The A-A' cross section 'with respect to the portion ranging from the cutting area milk to the moisture resistant frame-like carrier 3' will now be described in conjunction with Figure 3A. Fig. 3A shows the cutting edge 1, the metal wire 2b, the opening 2a, and the moisture-resistant frame-like stopper 3. 5 The moisture-resistant frame-like stopper 3 is composed of a wire and plugs 46a, 46b, 46c, 46d, 46e, 46f, and 46g, the plug 46h, and the wire 46i. The wire and plug 46a is formed by a wire buried in a recess in the contact interlayer film 18 and a contact plug buried in a via hole in the contact interlayer film 17. The above via holes not only 10 include standard rectangular via holes used in the element region 8a but also include recessed via holes. The wire and plug 46a are connected to the base 15a. The wire and plug 46a are made of, for example, copper covered with a tantalum or nitride button. The button or tantalum nitride acts as a diffusion preventing film which prevents copper from diffusing in the contact interlayer films 17 and 18. 15 The wire and plug 46b is a wire embedded in a recess in the contact interlayer/film 20 and a contact plug buried in a via hole in the contact interlayer film 19. Plug composition. The wire and plug * this is connected to the wire and plug 46a. The wire and plug 46b are also formed by a dual damascene process as in the wire and plug described above. The wire and plug 46c is a contact plug buried in a recess in the contact interlayer film 22 and a contact plug buried in a via hole in the contact film 21 Composition. The wire and plug 4 are connected to the wire and plug 46b. The wire and plug 46c are also formed by a double damascene process as in the wire and plug described above. 18 200847250 The wire and plug 46d is a wire inserted in a groove in the interlayer film 24 and a contact hole buried in a via hole in the contact interlayer film 23. Plug composition. The wire and plug _ are connected to the wire and plug 46c. The wire and plug 46d are also formed by a double damascene process as in the wire and plug described in the above. The wire and plug 46e is formed by a wire buried in a recess in the contact interlayer film 26 and a contact plug buried in a via hole in the contact interlayer film 25. The wire and plug 4 are connected to the wire and plug 46d. The wire and plug 46e are also formed by a dual damascene process as in the wire and plug described in the above 10. The wire and plug 46f is formed by a wire buried in a recess in the contact interlayer film 28 and a contact plug buried in a via hole in the contact interlayer film 27. The wire and plug 4 red are connected to the wire and plug 46e. The wire and plug 46f are also formed by a double damascene process as in the wire and plug described in the above. The 4-wire and interposer 46g are formed by a wire buried in a recess in the contact interlayer film 30 and a contact plug buried in a via hole in the contact interlayer film 29. The wire and plug 46g are connected to the wire and plug 46f. The wire and plug 46g are also formed by a dual damascene process as in the wire and plug described in the above. The plug 46h is a contact plug buried in a via hole in the interlayer film 31 of the wiring. The wire and plug 46h are connected to the wire and plug 46g. The contact plug may be made of copper covered with a button or a nitride button. Alternatively, the contact plug can be made of tungsten. 19 200847250 The wire 46i is a wire disposed on the intermediate film 31 of the wire. The wire 46i is connected to the plug 46h. The wire 46i is made of copper or Ming. When the wire 46i is made of the same as shown in the drawings, the wire 46i is formed by etching a photoresist patterned by photolithography as a mask. Although not shown in the drawings, when the wire 46i is made of copper, the wire 46i is formed by forming a groove in the cover film 32a and then burying copper in the groove. The wire 2b is composed of the wires 45a, 45b, 45c, 45d, 45e, 45fju 45g. The wire constituting the wire rim does not include a wire placed at a position corresponding to the 10 plug 46h and a wire 46i forming the moisture-resistant frame-like body 3. This is because it is necessary to ensure a certain amount of the depth of the groove of the opening 2a described below. The wire 45a is made of a metal material buried in a groove in the contact interlayer film 18. The metal material is copper covered with a button or a nitride group of 15 people. The neodymium or nitride button functions as a diffusion preventive film that prevents copper from diffusing in the contact interlayer film 18. The wire 45b is composed of a wire buried in a recess in the intermediate film 2 of the wire. The wire 45b is also formed by a Damascene process as in the above-described wires. 20 The wire 45c is formed by a wire buried in a recess in the intermediate film 22 of the wire. The wire 45c is also formed by a Damascene process as in the above-described wires. The wire 45d is constructed of a wire buried in a recess in the intermediate film 24 of the wire. The wire 45d is also formed by the Damascus process as in the above-mentioned guideline 2008 200847250. The wire 45e is composed of a wire buried in a groove in the intermediate film % of the wire. The wire 45e is also formed by a Damascene process as in the above-described wires. 5 The wire 45f is constructed of a wire buried in a recess in the intermediate film 28 of the wire. The wire 45f is also formed by a Damascene process as in the above-described wires. The wire 45g is composed of a wire buried in a groove in the intermediate film 3 of the wire. The wire 45g is also formed by a Damascene process as in the above-described guide wire. The opening 2a is a groove formed in the cover films 32a and 32b. For example, as shown in Fig. 3A, the opening 2a is a groove penetrating the cover film 32b and reaching the middle of the cover film 32a. Note that the plane position of the edge 15 of the groove constituting the opening 2 & of the element region 8a side is aligned with the plane position of the edge of the wires 45a to 45g constituting the element region 8a side. However, even the position of the edge of the wires 45a to 45g on the element region % side is in the range of 丨 to (7) μη from the position of the edge of the groove constituting the opening 2a on the element region 8a side in the horizontal direction of the cross-sectional view. Within the displacement, the optimum 20 points obtained by the presence of the opening 2a and the metal wire 2b are not reduced. The cutting edge 1 is the edge of the outermost circumference of the semiconductor device. The advantages of the opening 2a and the metal line 2b in the semiconductor device of the first embodiment will now be described in conjunction with Fig. 3a. In Fig. 3A, each of the arrows 60 and 61 shows a state of transmission of a crack formed at the cutting edge 1 when the half 21 200847250 conductor device is cut at the cutting region 8b. Here, in the semiconductor device, in order to form eight wiring layers, fifteen conductor interlayer films are provided, as shown in Fig. 3B. According to this, it is believed that the crack is transmitted along the intermediate film of the wires as indicated by arrows 60 or 61. Therefore, it is believed that when the metal wires 2b formed by filling a groove in each of the wire intermediate film with a metal material are disposed, the propagation of cracks in the interlayer film of the wires can be prevented. . 10 Insulating materials constituting the intermediate film of the wires, which will be described below, without elasticity. Therefore, the insulating materials are easily broken when stress is applied thereto. In contrast, metal materials have elasticity, and therefore, it is believed that the metal materials do not break even when stress is applied thereto. The reason for this is as follows. When the force due to the transmission of the crack is applied to the metal material, the metal material undergoes elastic deformation, thereby releasing the stress. Further, the stress exceeding the limit of the elastic deformation of the metal material and causing the fracture of the metal material is greater than the stress causing the fracture of the insulating material. Accordingly, the metal wire 2b provides the advantage of reliably preventing the transfer of cracks in the interlayer film of the wires. 20 Next, in Fig. 3A, an arrow 63 shows that the crack is transmitted from the edge of the opening 2a unless the wire 2b is set. The reason why the crack is transmitted from the edge of the opening 2a is as follows. First, the delamination of the cover film during the cutting of the semiconductor device in the cutting region 8b occurs. The detachment of the cover film is prevented because the groove of the opening 2a of 22 200847250 is previously disposed in the cover film. In this case, - the force from the cutting area 8b is applied to the element region 8a side of the groove of the opening 2a. Therefore, the inventors of the present invention found that when the metal wire 2b is disposed in the eighth figure, a crack originating from the edge of the opening & is transmitted along the metal wire 2b as indicated by an arrow. This structure is advantageous in that the crack transmitted from the edge of the opening hole does not reach the moisture-resistant frame body 3, and the moisture-resistant frame-like body 3 and the element region 3a are protected by the wire 2b. According to this, an advantage of this structure is that the transmission of cracks formed on the element region 8a side of the metal wire 2b can be reliably prevented. Therefore, the semiconductor device of the first embodiment is a semiconductor device having a crack preventing transmission structure composed of an i-line 2b and an opening 2a. Variations of the semiconductor device of the first embodiment will now be described in conjunction with FIG. Fig. 4 is a cross-sectional view showing a variation of the semiconductor device of the first embodiment and showing a cross section corresponding to the A_A' cross section of the second or second drawing. Figure 4 shows a cutting edge i, an opening 2a, a metal wire 2b, a moisture-resistant frame-like body 3, an insulating film Μ, a contact interlayer film 17, a contact interlayer film 18, 20 wire towel Interlayer films 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 31, cover films 32a and 32b, wires 45a, 45b, 45c, 45d, 45e, 45f, 45g, and 45h, wires and plugs 46^4613, 46 (:, 46 (1,466, 46 £, and 46 §, one plug 46h, one wire 46i, and arrows 6〇, 61, 62, and 63) The same components as those shown in Fig. 1 are denoted by the same reference numeral 23 200847250. In particular, the cutting edge 1, the opening 2a, the wire 2b, and the moisture-resistant frame-like body 3 It is the same as the cutting edge opening 2a, the metal wire 2b, and the moisture-resistant frame-like blocking body 3 described in Fig. 1. The insulating film 16, the contact interlayer film 17, the contact interlayer film 18, the The five interlayer films 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 31, and the cover films 32a and 32b are also matched with the first figure. The same as those described However, the semiconductor device differs from the semiconductor device described above in that the metal line 2b is composed of the wires 45a, 45b, 45c, 45d, 45e, 45f, 45g, and 45h. That is, the semiconductor device further includes The wire 45h is a metal wire belonging to a wire layer (i.e., the uppermost wire layer) to which the wire 46i of the moisture-resistant frame-like body 3 belongs. The wire 45h is made of aluminum. Accordingly, the wire 45h is formed by the same steps as the step of forming the wire 43 using aluminum between the steps of forming the wire 43 in the element region 8a. 15 The wire 45h has a region 8b surrounding the element The frame shape of the moisture-resistant frame-like stopper 3. The width of the wire 45h is larger than the width of the groove of the opening 2a. The semiconductor device of the first embodiment does not include a moisture-resistant frame-like body. The wire of the wire 46i of 3. The reason is that in the case where the wire corresponding to the wire 46i 20 is made of copper, the copper should be prevented from being exposed and the metal contamination due to the copper is a phenomenon occurring in the process apparatus. Ground In this variation of the semiconductor device of the first embodiment, since the wire 45h is made of aluminum, the problem of metal contamination does not occur. It is known that even if metal contamination due to aluminum occurs, the effect is 24 200847250 Accordingly, in Fig. 4, although the cover film 32a is maintained between the bottom of the opening 2a and the wire 45h, the opening 2a reaches the wire 45h. The advantage of the presence of the opening 2a and the metal wire 2b in the variation 5 of the semiconductor device of the first embodiment shown in Fig. 4 is as follows. In Fig. 4, when the crack is transmitted from the direction indicated by the arrow 60 or 61, the transfer of the crack is prevented as in the case of the metal wire 2b of the semiconductor device of the first embodiment. As described above, in the case where the metal wire 2b is not provided, the crack is transmitted from the edge of the opening 2a in the direction indicated by the arrow 63. In the metal wire of the semiconductor device of the first embodiment, the direction in which the crack is transmitted is changed to the direction indicated by the arrow 62 due to the presence of the wires 45a to 45g. Therefore, the transfer from the crack to the component area % can be prevented. In contrast, in the changed metal line 5b of the semiconductor device of the first embodiment. The illuminating line 2b includes the wire 45h, and the width of the wire 疋 is larger than the width of the groove of the opening 2:. Therefore, the advantage of this structure is that the transfer of the 4 marks in the direction indicated by the Jushi 63 can be preferentially prevented. This is because the wire made from Shao has a high elasticity. The method of fabricating a semiconductor device is now described in conjunction with Figures 5A, 5B, 5C and 6. The fifth Α: 5β, and 5C diagrams are diagrams for depicting the steps of fabricating the semiconductor device of the first embodiment by using the A-A of Fig. 1 or Fig. 2, the cross section and the B - B k wearing surface. Figure 6 includes the steps of the step of forming the upper layer conductor, the step of forming the uppermost layer conductor, and the step of forming the cover film, the second embodiment of the semiconductor device of the first embodiment or the A_A of the second embodiment. Illustration of section and B-B' cross section. Figures 5A, 5B, 5C, and 6 show an opening 2a, a metal wire 2b, a moisture-resistant frame-like body 3, a 317 1〇, a source region of a MOS transistor, and the M 〇s The drain region 5 12 of the crystal, the gate electrode 13 of the M〇S transistor, the sidewall 14 , a substrate 15 a , 10 a well 15 b , an insulating film 16 , a contact interlayer film opening, and a contact interlayer film 18 , wire intermediate film 19, 2, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 31, cover film 32 coffee 3213, wires and plugs 33, 34, 35, 36 , 37, 38, and 39, a plug 42, a wire 43, a wire 45 &, 45b? 45c? 45d? 45e? 45f^a 45g.  f ^ ik # ^ 46a? 46b546c? 46d? 46e, 46f' and 46g, a plug 46h, and a wire. The same components as those which are not in the drawings and 3B are denoted by the same reference numerals. , FIG. 5 shows a semiconductor device of the first embodiment obtained by the step AA of FIG. 1 or FIG. 2, the cross section and the B_B, and the eighth section of the cross section, after the step of forming a basic body (10). Cross-section. The steps of forming a basic body include! The process of forming the § transistor is known. For example, as shown in the cross section of B-B of Fig. 5A, an STI 1? for electrically isolating a semiconductor element is formed on the substrate W. Subsequently, the MOS transistor is guided by a 20-ion ion implantation method, and the opposite conductivity type impurity is borrowed from the Shibian well 1^. The heat treatment is then performed to form the well 15b. A question mark u, , and a bain film are formed on the surface of the base 15a. A ruthenium oxide film edge film. Subsequently, a plurality of high-dielectric films are used as the inter-electrode, and the gate electrode is deposited on the inter-electrode insulating film, and < The shape of the mask is then formed by photolithography on 26 200847250. The polysilicon is then etched by an anisotropic etch to form the gate electrode 13. Subsequently, An impurity of the conductivity type of the same conductivity type as that of the MOS transistor is introduced into the source/drain extension region by ion implantation using the gate electrode 13 as a mask. According to this, The source/drain 5 extension regions are formed on both sides of the gate electrode 13. An insulating film is deposited on the MOS transistor and then anisotropically etched, Thereby, the side walls 14 are formed on the side walls of the gate electrode 13. The conductivity type of the same type of conductivity as the M〇s transistor is transferred into the source/drain 10 region by the gate electrode 13 and the sidewalls 14 as a mask by ion implantation. . According to this, Source/drain regions are formed on both sides of the side walls 14,  The source/drain regions are thereby formed as a diffusion region integrated with the source/drain extension regions. The insulating film 16 is then deposited on the MOS transistor.  on the other hand, In A-A of Figure 5A, In cross section, The gate insulating thin film 15 and the insulating film 16 are also formed in the step of forming the gate insulating film and the step of forming the insulating film 16 in the steps described above, respectively, corresponding to the moisture-resistant frame-like broadcast body 3 Part of it. However, @, No components are formed in other steps. however, a diffusion layer into which an impurity of the conductivity type of the same conductivity type as that of the substrate 15a is introduced may be formed in the substrate in the step of forming the source/nothotropic region of the M?s transistor 2? The wires and plugs 4 included in the moisture-resistant frame-like stopper 3 are as follows. This is because the potential of the moisture-resistant frame-like support 3 is stabilized. Furthermore, The question pole = edge thin:  The insulating film 16 is also formed at a position corresponding to the metal line in the step of forming the gate insulating film and the step of forming the insulating thin film, respectively.  27 200847250 A picture 5B shows the Μ transverse plane and Μ of the semiconductor package W 所 of the example after the step of forming the lower layer conductor.  , . The step of forming the underlying conductor includes borrowing a known process, That is 5 10 15 Damascus process, The step of forming the lower wire portion.  For example, 'in the B_B' cross section of Fig. 5B', the contact interlayer film 17 composed of an oxidized film and a ruthenium film, And by contacting the intermediate layer of the oxidation ... by chemical vapor deposition (CVD) = 冓成 Subsequently, A recess for forming a wire connected to the M〇s transistor in the basin is formed in the contact interlayer. - a fine (10) source region U of the transistor, Bungee area 12, A via hole in contact with the ruthenium electrode is then formed in the contact interlayer film 17. Subsequently, The group or tantalum nitride is deposited by CVD in the via hole and inside the recess. After the copper is missing, it is deposited on it by electroplating. The copper placed on the junction layer _18 is then removed by chemical mechanical polishing (CMp).  result, Copper is buried in the recess and the via hole to form the lead and plug 33.  ^ Another aspect 'A_A in Figure 5B, In cross section, The steps described above are performed in the same form. And therefore, The wire and the plug are formed at positions corresponding to the moisture-resistant frame-like broadcast body 3. A good layer hole is formed in the 20-contact interlayer film 17 at a position corresponding to the metal line 2b. therefore, A plug made of copper is not formed in the contact interlayer film. Accordingly, In the above steps, The wire 45a is formed in a groove in the contact interlayer film 18 at a position corresponding to the wire turns.  The conductor interlayer films 19 and 20, The wire and the plug 34, Forming 28 200847250 the wire and plug 46b of the moisture-resistant frame-like body 3, And a wire 45b forming the metal wire 2b, They are all shown in Figure 5B, It is formed by the same steps as those described above.  Furthermore, The wire intermediate film 21, twenty two, twenty three, And 24, The wires 5 and the plugs 35 and 36, The wires and plugs 46c and 46d forming the moisture-resistant frame-like stopper 3, And the wires 45c and 45d forming the metal wire 2b, They are all shown in Figure 5B, It is formed by repeating the same steps as those described above.  Fig. 5C shows the A-A' cross section and the B_B' cross section of the first or second embodiment of the semiconductor device of the tenth embodiment obtained after the step of forming the intermediate layer wiring. The step of forming the intermediate layer wire includes borrowing a known process, which is,  Double major Maersk process, The step of forming the intermediate layer wire portion.  According to this, The wire intermediate film 25, 26, 27, And 28, The wires and plugs 37 and 38, The wires and plugs 15 46e and 46f forming the moisture-resistant frame-like stopper 3, And the wires 45e and 45f forming the metal wires 2b are formed by repeating the same steps as those described in the step of forming the underlying wires.  Figure 6 includes the steps shown in forming the upper layer conductor, The steps of forming the uppermost layer, A cross-sectional view of the A-A' cross section and the B-B' cross section of the first or second embodiment of the semiconductor device of the first embodiment 20 obtained after the step of forming the cover film.  The step of forming the upper wire includes borrowing a known process, which is, Double major Marsh process, The step of forming the upper wire portion. According to this, The conductor interlayer films 29 and 30, The wire and the plug 39, Forming the moisture-resistant frame-like block 29 200847250 body 3 wire and plug 46g, And the wires 45g forming the metal wires 2b are formed by the same steps as those described above.  步骤 The step of forming the uppermost wire comprises the step of forming the uppermost wire portion by the step of forming the wire and the insertion step.  5, E.g, As shown in Figure 6, As shown in the cross section, The wire intermediate film 31 composed of the oxidized stone film is deposited by CVD. A via hole to be connected to the wire and plug 39 is then formed on the intermediate film of the wire =. Subsequently, Tungsten is deposited on the entire surface of the interlayer film of the wire by sputtering or CVD. The film deposited on the interlayer film 31 of the wire is removed by CMP. therefore, The crucible is buried in the via hole in the thin layer 31 of the middle layer of the wire. Thereby, a plug 42 made of tungsten is formed. Subsequently, Aluminum is deposited on the conductor interlayer film 31 by sputtering. A photoresist pattern having a shape of conduction = is then formed on aluminum by photolithography. The light L pattern is then anisotropically etched to form the wire 43.  15 On the other hand, As in A-A in Figure 6, As shown in the cross section, The wire 46i and the minus 46h of the moisture-resistant pivotal body 3 are formed by the same steps as described above.  ~ ^ 7 into the uppermost wire of the metal wire 2b is not formed so that when the opening "forms the opening 2 & The bottom of the groove is not in line contact with the uppermost layer guide 20. When the uppermost wire forming the metal line 213 is disposed and if the bottom of the groove of the opening is in contact with the uppermost wire, The following problem arises: In the case where the uppermost wire of the S is made of copper, Copper is exposed and a process unit is contaminated with copper during this and subsequent steps. In addition, Unless the depth of the groove of the opening 2a is sufficient, Otherwise the cover sheets 30 200847250 The extension of the detachment of the films 32a and 32b cannot be prevented.  In the B_B' cross section of Figure 6, The step of forming the cover film includes the steps of forming the cover films 3 and 32 by depositing ruthenium oxide or tantalum nitride by CVD. on the other hand, In Figure A, A-A, In cross section, After the formation of the cover film 5 32a*32b, A photoresist pattern having an opening corresponding to the opening 2a is formed on the cover film 32b by photolithography. Subsequently, The cover films 32a and 32b are grooves which are etched by anisotropic etching to form the openings 2a. pay attention to, When viewed in a cross-sectional view, The position of the edge of the opening 2a on the side of the moisture-resistant frame-like body 3 is substantially the wire 45a which forms the wire 2b on the side of the frame 10 of the moisture-proof frame 10, 45b, 45c, 45d, 45e,  45f, Align with the edge of the 45g edge. This is because in the case where the metal wire 2b is set, The crack transmitted from the edge of the opening 2a is transmitted along the wire 2b as indicated by the arrow 62.  In the method of manufacturing the semiconductor device of the first embodiment, The metal 15 line 21) and the opening 2a can be easily formed by the same steps as those for forming the semiconductor element and the wiring in the element region 8a. result, The transfer of the crack from the metal wire 2b to the moisture-resistant frame-like stopper 3 can be prevented.  Second Embodiment A semiconductor device of a second embodiment will now be described with reference to Fig. 7. In the semiconductor device of the second embodiment, The wires forming the metal wires 2b of the first embodiment are changed into wires and plugs.  Fig. 7 is a cross-sectional view showing the A-A' cross section of the semiconductor device of the second embodiment. Figure 7 shows a cutting edge 1, a hole 2a, a metal wire 2b, a moisture resistant frame-like body 3, An insulating film 16, One contact 31 200847250 interlayer film 17, Contacting the interlayer film 18, Conductor interlayer film 19,  20, twenty one, twenty two, twenty three, twenty four, 25, 26, 27, 28, 29, 30, And 31, And covering 'film 32 & And 32b.  With in the second 3A, 3B, 5A, 5B, 5C, The same components as those shown in Fig. 6 are denoted by the same reference numerals.  The plan view of the semiconductor device of the second embodiment is the same as that of Fig. 1 or Fig. 2. According to this, The cutting edge 1, The opening 2a, The metal wire 2b,  The positional relationship between the plane and the moisture-resistant frame-like member 3 is the same as that described in connection with Figs. 1 and 2 .  10 However, The metal wire 2b shown in Fig. 7 is different from the metal wire 2b of the first embodiment in that the metal wire 2b of this embodiment is composed of a wire and a plug 473, 471), 47〇, 47 (1, 476, 47 (and 47 £ constitutes.  The wire and the plug constituting the wire 2b do not include a wire placed at a position corresponding to the plug 46h and a ^" which forms the moisture-resistant frame-like body 3. Line 15 46i. This is because it is necessary to ensure a certain amount of the depth of the groove of the opening 2a. As in the semiconductor device of the first embodiment, a wire and a plug 47a on the side of the element region 8a, 47b, 47c, 47d, 47e, 47f, The position of the edge of 47g is aligned with the position of the edge of the groove of the opening 2a on the side of the element region 8a.  20 the wires and plugs 47a, 47b, 47c, 47d, 47e, 47f^n47gfi5 One is connected to adjacent wires and plugs and is integrated with each other.  The wire and plug 47a is formed by a wire buried in a recess in the contact interlayer film 18 and a contact plug buried in a via hole in the contact film 17. it's here, The germanium layer ^ 32 200847250 includes not only a conventional via hole used in the component region 8 but also a groove-like via hole. The above wires and contact plugs are made of copper covered with tantalum or nitride. The group or nitride group acts as a diffusion preventing film which prevents copper from diffusing in the contact interlayer films 17 and 18. The wire and the 5 plug 47a are formed in the element region 8a by a double damascene process with wires and plugs.  The wire and plug 47b is composed of a wire buried in a groove in the film 20 of the wire and a contact plug buried in a via hole in the film 19 of the wire interlayer. . The wire and the plug (4) are 10 in the same manner as in the plug, and the double damascene process is used in the element area 8a together with the wire and the plug 34.  The wire and plug 47c is formed by a wire buried in a recess in the intermediate film 22 of the wire and a contact plug buried in a via hole in the film 21 of the wire interlayer. The wire and the plug are formed in the element region 8a by a double damascene process as in the above-described wire and plug, together with the wire and the plug 35.  The wire and plug 47d is formed by a wire buried in a recess in the film 24 of the wire intermediate layer and a contact plug buried in a via hole in the film 23 of the wire intermediate layer. The wire is formed in the element region 8a with the plug 47 (1 is 2) as in the wire and plug described above by a double damascene process with the wire and plug 36.  The wire and plug 47e is formed by a wire buried in a recess in the film 26 of the wire intermediate layer and a contact plug buried in a via hole in the film 25 of the intermediate layer of the wire. The wire and the plug 4% are 33 200847250. The wires and plugs as described above are formed in the component region 8a by a double damascene process together with the wires and plugs 37.  The wire and plug 47f is formed by a wire buried in a recess in the intermediate film 28 of the wire and a contact plug buried in a via hole in the film 27 of the intermediate layer 5 of the wire. . The wire and plug 47f are formed in the element region 8a by a double damascene process as in the above-described wire and plug, together with the wire and plug 38.  The wire and plug 47 g is a wire embedded in a groove in the intermediate film 30 of the wire and a contact plug buried in a via hole in the film 29 of the intermediate layer 10 of the wire Plug composition. The wire and plug 47g are formed in the element region 8a by a double damascene process as in the above-described wire and plug, together with the wire and the plug 39.  Please refer to Figure 3A, Believe that In the cutting area 8b,  The crack formed at the cutting edge during the cutting of the semiconductor device is transferred along the wire intermediate film as indicated by the arrow head 60 or 61.  Please refer to Figure 7, In the metal wire 2b of the second embodiment, A metal material buried in a recess or via hole provided in the interlayer film of all of the conductors is present. Accordingly, it is believed that the metal wire 2b of the second embodiment has a higher effect of preventing the transfer of cracks in the interlayer film of the wire 20 than the metal wire 2b of the first embodiment.  An insulating material constituting the intermediate film of the wires, It will be described below. Not flexible. therefore, The insulating materials are easily broken when stress is applied to them. relatively, Metal material is elastic, And therefore, I believe that these metal materials will not break, Even the stress is applied to them 34 200847250 there. The reason for this is as follows. The metal material is elastic. therefore,  When the stress due to the transmission of cracks is applied to the metal material, Metal materials undergo elastic deformation, Thereby releasing the stress.  According to this, the metal wire 2b of the second embodiment has an effect of reliably preventing the transfer of the crack 5 in the film of the intermediate layer of the wire.  therefore, The semiconductor device of the second embodiment is a semiconductor device having a crack preventing transmission structure composed of a metal wire 2b and an opening 2b.  As mentioned above, The metal wire 2|3 of the second embodiment can also be easily formed by the same steps 1B as those for forming the semiconductor element and the wiring in the element region 8a.  Third Embodiment A semiconductor device of a third embodiment will now be described with reference to Fig. 8. In the semiconductor device of the third embodiment, The width of the wire constituting the wire turns is large, Moreover, the wires extend to the side of the cutting area 8b.  Fig. 8 is a cross-sectional view showing a cross section of the A-A crucible showing the semiconductor device of the third embodiment. Figure 8 shows a cutting edge i, One opening 2a, a metal wire 2b, a moisture resistant frame-like body 3, An insulated thin neck 16, a contact with the interlayer film 17, - contacting the interlayer film 18, Conductor interlayer film 19, 20, twenty one, twenty two, twenty three, twenty four, 25, 26, 27, 28, 29, 30, And 31, And cover film 32&  20 and 32b 〇 and in the second 3A, 3B, 5A, 5B, 5C, The same components as those shown in 6® are denoted by the same reference numerals.  The plan view of the semiconductor device of the first target example is the same as that of Fig. 1 or Fig. 2. According to this, The cutting edge is the opening 23, The metal wire 2b, The positional relationship between the planes of the moisture-resistant frame-like stoppers 3 and 35 200847250 is the same as that described in connection with Figs. 1 and 2 .  however, The metal wire 2b shown in Fig. 8 is different from the metal wire 2b of the first embodiment in that the metal wire 2b is composed of a wire.  The wire constituting the wire 2b does not include a wire placed at a position corresponding to the plug 46h and a wire 46i forming the moisture-resistant frame-like body 3. This is because a certain amount of the depth of the groove of the opening 2a must be secured. As in the semiconductor device of the first embodiment, The wires 48 & on the side of the element region 8a , 4813, 48 years old, 48 (1, 486, The positions of the edges of 48 € and 488 are aligned with the positions of the edges of the grooves of the opening 2a on the side of the 10 element region 8a.  The wires 48 & , 4813, 48(: , 48 (1, 486, The width of each of 48 £ and 48 § is larger than the width of the groove of the opening 2a. The edge of each of the wires 48a to 48g on the flapping side of the cutting region projects toward the milk side of the cutting region with respect to the edge of the groove of the opening 2a at the side of the cutting region.  15 The wire 48a is formed by a wire buried in a groove in the contact interlayer film 18. This wire 48a is made of copper covered with a button or a nitride button. The group or nitride group acts as a diffusion preventive film that prevents copper from diffusing in the contact interlayer film 18. The wire 48a is formed in the component track 20 by the damascene process together with the wire and the wire portion of the plug 33.  The LED wire 48b is composed of a wire buried in a groove in the film of the intermediate layer of the wire. The wire is formed in the element region 8a by a wire portion of the lead wire and the plug 34 as described above by the Damascus process.  36 200847250 The wire 48c is formed by a wire buried in a recess in the intermediate film 22 of the wire. The wire 48c is formed in the element region 8a together with the wire portion of the wire and the plug 35 by a damascene process as in the above-described wire.  5 The wire 48d is constructed of a wire buried in a recess in the intermediate film 24 of the wire. The wire 48d is formed in the element region 8a together with the wire portion of the wire and plug 36 by a damascene process as in the above-described wire.  The wire 48e is formed by a wire buried in a recess in the intermediate film 26 10 of the wire. The wire 48e is formed in the element region 8a together with the wire portion of the wire and plug 37 by a damascene process as in the above-described wire.  The wire 48f is constructed of a wire buried in a recess in the intermediate film 28 of the wire. The wire 48f is formed in the element region 8a together with the wire portion of the wire and the plug 38 by a damascene process as in the above-described guide wire.  The wire 48g is constructed of a wire buried in a recess in the intermediate film 30 of the wire. The wire 48g is formed in the element region 8a together with the wire portion 20 of the wire and plug 39 by a damascene process as in the above-described wire.  Please refer to Figure 3A, I believe that in the cutting area 8b, The crack formed at the cutting edge 1 during the cutting of the semiconductor device is transmitted along the wire intermediate film as indicated by the arrow 60 or 61.  therefore, Please refer to Figure 8, In the metal wire 2b 37 200847250 of the third embodiment, the metal material buried in the groove in the interlayer film of the wire exists. Further, in comparison with the edge of the groove of the metal wire 2b of the first embodiment on the side of the cutting region, The edge of the groove of the metal wire 2b of the third embodiment on the side of the cutting region 8b is located closer to the cutting region 8b. therefore,  It is believed that the metal wire 2b of the third embodiment has an effect of preventing the transmission of cracks in the film of the wire intermediate layer higher than that achieved by the wire 2b of the first embodiment. The reason for this is as follows. Since the width of each of the grooves including the metal material is large and the end of each of the grooves is located closer to the cutting area 8b, The transfer of the crack from the cutting area 10 8b will stop at a position closer to the cutting area 8b.  According to this, The metal wire 2b of the third embodiment has an effect of more strongly and reliably preventing the transfer of cracks in the interlayer film of the wire.  therefore, The semiconductor device of the third embodiment is a semiconductor device having a crack preventing transmission structure composed of a metal wire 2b and an opening 2a.  15 as mentioned above, The metal wire 2b of the third embodiment can also be easily formed by the same steps as those for forming the semiconductor element and the wiring in the element region 8a.  Fourth Embodiment A semiconductor device of the fourth embodiment will now cooperate with the ninth, 1〇,  20 11, And 12 pictures for description. In the semiconductor device of the fourth embodiment,  A metal wire 4 is further disposed between a metal wire 2b and a cutting region 8b.  Fig. 9 is a plan view showing a semiconductor device of the fourth embodiment. Figure 9 shows a cutting edge 1, a hole 2a, a metal wire 2b,  'Resistant frame-like broadcast body 3, Or metal wire 4, The component area 8 a, The cut 38 200847250 area 8b, And an outer peripheral region 8c. The same components as those shown in Fig. 1 or Fig. 2 are denoted by the same reference numerals.  According to this, The cutting edge 1, The opening 2a, The metal wire 2b, The moisture-resistant frame-shaped blocking body 3, The component area 8a, The cutting area 8b, And the outer peripheral 5 region 8c is the same as the description and configuration in the first or second drawing.  The metal wire 4 is placed in the plan view between the opening 2a and the metal wire 2b placed under it and the cutting edge 1 so as to surround the element region 8a. The metal wire 4 is composed of a metal wire having a plurality of widths and forms a continuous frame. As described below, The metal wire 4 is composed of a metal material buried in a groove in a film of 10 layers in the middle of a plurality of wires. which is, Each of the grooves also has a continuous frame shape.  Fig. 10 is a plan view showing a variation of the semiconductor device of the fourth embodiment. Figure 10 shows a cutting edge 1, a hole 2a, a metal wire 2b, a moisture resistant frame-like body 3, a metal wire 7, The component area 8a,  15 the cutting area 8b, And an outer peripheral region 8c. The same components as those shown in Fig. 1 or Fig. 2 are denoted by the same reference numerals.  According to this, The cutting edge is the opening 2a, The metal wire 2b, The moisture-resistant frame-shaped blocking body 3, The component area 8a, The cutting area 8b, And the outer peripheral region 8c is the same as the description and configuration in Fig. 1 or Fig. 2.  The metal wire 7 is placed in the plan view between the opening 2a and the metal wire 2b placed under it and the cutting edge 1 so as to surround the element region 8a. The metal wire 7 is composed of a metal wire having a plurality of widths and lengths and is configured to form a discontinuous frame. As described below, The metal wire 7 is made of a metal material structure 39 200847250 buried in a recess in a plurality of wire interlayer films. which is, Each of the grooves has a plurality of widths and lengths and is configured to form a discontinuous frame.  Fig. 11 is a plan view showing a first example of the cross-sectional structure of the semiconductor device of the fourth embodiment. Figure u shows everything 5 cut edge 1, - opening 2a, The metal wire 31, The moisture-resistant frame-shaped blocking body 3,  Five lines 4 or 7, -Insulating film 16, - contacting the interlayer film 17, Contacting the interlayer film 18, Conductor interlayer film 19, 2〇, 21 22, 23 24, 25,  26, 27, 28, 29, 30, And 31, And cover film 32 coffee 3213.  With in the second 3A, 3B, 5A, 5B, 5C, The same components as those shown in Fig. 6 are denoted by the same reference numerals. According to this, The structures constituting the wires 2B are the same as those shown in Fig. 3A.  The cross-sectional view shown in Fig. 11 and the A_A of the semiconductor device of the first embodiment shown in Fig. 3, The cross-sectional view of the cross-section is different. I5 is that the metal wire 4 or 7 is further arranged.  The metal wire 4 or 7 shown in Fig. 11 is composed of a wire 51a, 51b, 51c,  51 (1, 516, 51 (and 54 constitutes.  The wires constituting the metal wires 4 or 7 do not include a wire placed at a position corresponding to the plug 46h and a wire forming the moisture-resistant frame-like stopper.  20 This is because a certain amount of depth of the groove of the opening must be guaranteed. These wires 51& , 5113, 51 (: , 51 (1, 5^, 511; And 54 is placed between the cutting edge 1 and the metal wire 2b.  These wires 51& , 5113, 51. , 51 (1, 516, 51£; Each of 51 and 51 § preferably has the same width as the width of each of the wires constituting the metal wire 2b by 40 200847250 degrees. however, The widths of the wires 51a to 5lg are not particularly limited. As long as the wires 51a to 5lg do not protrude to the cutting region 8b.  The wire 51a is composed of a wire buried in a groove in the film of the contact interlayer film. This wire 51a is made of copper covered with a group or nitride group 5. The group or nitride group acts as a diffusion preventive film which prevents copper from diffusing in the contact interlayer film 18. The wire is formed in the component region 8a by a damascene process together with the wire and the wire portion of the plug 33.  The ruthenium wire 5lb is composed of a wire buried in a groove in the film 1 中间 of the intermediate layer of the wire. The wire 51b is formed in the element region 8a together with the wire portion of the wire and the plug by a damascene process as in the above-described wire.  The wire 51c is composed of a wire buried in a groove in the intermediate film 22 of the wire. The wire 51c is formed in the element region 8a together with the wire and the plug % wire portion as in the above-described guide wire-like damascene process.  The wire 51d is constructed of a wire buried in a recess in the intermediate film 24 of the wire. The wire 51d is formed in the element region 8a by a damascene process as in the above-described wire and with the wire portion of the wire and plug 36.  The wire 5le is composed of a wire buried in a groove in the film of the intermediate layer of the wire. The wire 5 is shouted in the same manner as the wire described above by the Damascus process to form the wire portion of the wire and the plug 37 in the component region 8a. The blade 41f is buried in the wire 51f. The middle layer of the wire is formed by a groove_wire. The conductor is formed in the component region 8a by the damascene process as in the above-described wires and the wire portion of the wire and plug 38.  77 5 The wire 51g is composed of a groove-wire buried in the film 3 〇 of the wire. The wire 5ig is formed in the element region 8a together with the wire portion of the wire and the plug 39 by a damascene process as in the above-mentioned wires.  Fig. 12 is a cross-sectional view showing a second example of a cross-sectional structure of a 〇βΑ' of the semiconductor device of the fourth embodiment. Figure 12 shows everything brake edge 1, a hole 2a, The metal wire 2b, The moisture-resistant frame-shaped blocking body 3,  a metal wire 4 or 7, An insulating film 16, a contact with the interlayer film 17, Contacting the interlayer film 18, Conductor interlayer film 19, 2〇, twenty one, twenty two, 2 B 24 h 26, 27, 28, 29, 30, And 31, And cover film 32& And 321).  15 and at the first, 2, 3A, 3B, 5A, 5B, 5C, 6, The same components as those shown in Fig. 7 are denoted by the same reference numerals. According to this, Wires and plugs constituting the metal wire 2b, ^/~, , •, , The structure of (4) is the same as those shown in Figure 7.  The cross-sectional view shown in Fig. 12 and the A-A showing the semiconductor device of the second embodiment shown in Fig. 7, The cross-sectional view of the cross section differs in that the metal wire 4 or 7 is further disposed.  The metal wire 4 or 7 shown in Fig. 12 is made of wire 51& , 5 ratio, 51 (: , 51 (1, 51151 (and 54 constitutes.  The wires constituting the metal wires 4 or 7 do not include a wire placed at a position corresponding to the plug 42 200847250 46h and a wire 46i forming the moisture-resistant frame-like body 3. This is because a certain amount of the depth of the groove of the opening 2a must be secured. The wires 518, 511), 51 (: , 51 (1, 516, 51 (and 51 § are placed between the cutting edge 1 and the metal wire 2b.  5 these wires 51 & , 511), 51〇, 51 (1, 5 551 & Each of 51 and 51 § preferably has the same width as the width of each of the wires constituting the metal wire 2b. however, The widths of the wires 51a to 51g are not particularly limited. As long as the wires 5la to 5lg do not protrude to the cutting region 8b.  These wires are 51 Jiang, 5113, 51 (: , 51 (1, 51€, 51£; And 518 are the same as those described in FIG. 11 FIG.  Please refer to Figure 3A, I believe in this cutting area, The crack formed at the cutting edge 1 during the cutting of the semiconductor device is transmitted along the intermediate layer film of the wire indicated by the arrow 60 or 61.  According to this, The reason why the metal wire 2b of the fourth embodiment has an effect of preventing the transfer of cracks in the 15-wire interlayer film is the same as that described in the first embodiment or the second embodiment.  On the other hand, the metal wire 4 or 7 of the fourth embodiment has an effect of reducing the number of cracks transmitted from the cutting region 8b. Although the metal wires 4 or 7 are not disposed in all of the intermediate film layers of the wires, Including the wires 51 & constituting the metal wires 4 or 20 7 To the 51 g wire intermediate film, This metal wire 4 or 7 has an effect of preventing crack transmission. This is because the metal wire 4 or 7 has the same effect as that of the metal wire 2b. Furthermore, When the crack is transmitted through the intermediate film of the wire placed between the lines 51a to 51g constituting the metal wire 4 or 7, This metal wire 4 or 7 has the effect of limiting the size of the crack. This is because the wires 43 200847250 51a to 51g reinforce the intermediate film of the wires.  According to this, The metal wire 4 or 7 of the fourth embodiment and the metal wire 2b have an effect of more strongly and reliably preventing the transfer of cracks in the film of the wire interlayer.  5 Therefore, The semiconductor device of the fourth embodiment has a metal wire 2b, Metal wire 4 or 7, A semiconductor device having a crack preventing transmission structure formed of the opening 2a.  As mentioned above, The metal wires 4 or 7 and the metal wires of the fourth embodiment can also be easily formed by the same steps as those for forming the semiconductor element and the wires in the element region 8a.  Fifth Embodiment A semiconductor device of a fifth embodiment and variations thereof will now be matched with 14, And 15 pictures for description. In the semiconductor device of the fifth embodiment, A metal wire 5 is further disposed between a metal wire 2b and a moisture-resistant frame 15 shaped body 3.  Figure 13 is a plan view showing a semiconductor device of the fifth embodiment. Figure 13 shows a cutting edge i, Open a hole to a metal wire,  Moisture-resistant frame-like body 3, a metal wire 4, a metal wire 5, The component area 8a, The cutting area 8b, And an outer peripheral region 8c. With the map, Picture 2 2 Or the same components as those shown in Fig. 9 are denoted by the same reference numerals. The cutting edge The wire is this, The moisture-resistant frame-shaped collision body 3, The metal wire 4, The component area 8a, % of the cutting area,  And the description and configuration of an outer peripheral region 8c is in the Figure 2, Or 44 200847250 The description and configuration in Figure 9 are the same.  The metal wire 5 is placed between the opening 2a and the metal wire 2b placed under it and the moisture-resistant frame-like body 3 in plan view so as to surround the element region 8a. The metal wire 5 is composed of a metal wire having a plurality of widths and 5 forms a continuous frame. As described below, The metal wire 5 is composed of a metal material buried in a recess in a plurality of wire interlayer films. which is, Each of the grooves also has a continuous frame shape.  Fig. 14 is a cross-sectional view showing an example of the A-A' cross-sectional structure of the semiconductor device of the fifth embodiment. Figure 14 shows a cutting edge 10 edge 1, a hole 2a, a metal wire 2b, The moisture-resistant frame-shaped blocking body 3, a metal line 4, a metal wire 5, An insulating film 16, a contact with the interlayer film 17,  Contacting the interlayer film 18, Conductor interlayer film 19, 20, twenty one, twenty two, twenty three, twenty four,  25, 26, 27, 28, 29, 30, And 31, And cover film 32& And 321).  With the first, 2, 3A, 3B, 5A, 5B, 5C, 6, The same components as those shown in Fig. 11 are denoted by the same reference numerals. According to this, Wires 45& constituting the metal wire 2B , 4513, 45 years old, 45 (1, 456, 45& And 458 are the same as those shown in Fig. 38. a wire 51a constituting the metal wire 4, 51b, 51c, 51d,  5 4, The structures of 51匕 and 54 are also the same as those shown in Fig. 11.  The cross-sectional view shown in Fig. 14 is different from the cross-sectional view showing the A-A' cross section of the semiconductor device of the fourth embodiment shown in Fig. 11 in that the metal line 5 is further set. .  The metal wire 5 shown in Fig. 14 is composed of a wire 52a, 52b, 52c, 52d,  52e, 52f, And 52g.  The wires constituting the metal wires 5 do not include a wire placed at a position corresponding to the plug 45 200847250 46h and a wire forming the moisture-resistant frame-like body 3. This is because it is necessary to ensure a certain amount of the depth of the groove of the opening 2a. The wires 52a,  5213, 52〇, 52 (1, £5,202; And 52 § are placed between the metal wire 21) and the moisture-resistant frame-like body 3.  The wires 52& , 521), 52 (: , 52 (1, 526, Each of 52 (and 528) preferably has the same width as the width of each of the wires constituting the metal wire 2b. however, The wires 52& The width to 52§ is not particularly limited, As long as the wires 52a to 52g are not in contact with the wire 2b and the moisture-resistant frame-like body 3.  10 15 20 The material (10)a is composed of a wire buried in a groove in the contact interlayer film 18. This wire 52 is made of copper covered with enamel. Group or nitrided mosquito action, such as to prevent copper from being in contact;  The diffusion-proof diffusion in the tantalum film 18 is thin. The wire

程來與該導線與插塞33的導線部份 馬士革I 8a中。 I ^成在忒元件區域 脚仕綠导踝τ間層 中之凹槽内的導線構成。該導 5/|^20 線-《大馬,_該::==^ 起形成在該元件區域8a中。 七線^份一 該導線52c是由一埋藏於〜 中之_的導線構成。該導二 線二樣猎大馬士革製程來與轉線與插塞调導的導 起开>成在該元件區域8a中。 份一 該導線细是由-埋藏於1在該導線中間層薄私 46 200847250 中之凹槽内的導線構成。該導線5 2 d是如同在以上所述的、 線一樣藉大馬士革製程來與該導線與插塞36的導線部广 起形成在該元件區域8a中。 乃 該導線52e是由一埋藏於一個在該導線中間層薄膜% 5中之凹槽内的導線構成。該導線52e是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞37的導線部份一 起形成在該元件區域8a中。 10 15 20 。亥導線52f是由一埋藏於一個在該導線中間層薄膜Μ 中之凹槽内的導線構成。该導線52f是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞38的導線部份一 起形成在該元件區域8a中。 該導線52g是由一埋藏於一個在該導線中間層薄膜3〇 中之凹槽内的導線構成。该導線52g是如同在以上所述的導 線一樣藉大馬士革製程來與該導線與插塞39的導線部份一 起形成在該元件區域8a中。 請參閱第3A圖所示,相信在切割區域扑中,於半導體 裝置之切割期間形成在該切割邊緣丨中的裂痕是如由箭頭 60或61所示沿著導線中間層薄膜傳遞。 、 歹】據此,該第五實施例之金屬線2b之部份為何具有防止 ㈣在導線中間層薄膜中之傳遞之效果的職是與在第一 實施例或第二實施例中所述的相同。 開於t ’該第五實施例的金屬線4具有縮減從切割區域8b 開始傳遞之裂 實施例中所 會這樣的是與在該第四 47 200847250 請再次參閱第3A圖所示,本案發明人發現形成在開孔 2a之邊緣的裂痕是在由箭頭62所示的方向上傳遞。然而, 在某些情況中裂痕可以在由箭頭63所示的方向上傳遞。 因此,相信當構成該第五實施例之金屬線5的導線52a 5至是設置時’即使在裂痕是在由箭頭63所示之方向上傳 遞的情況中,裂痕的傳遞能夠被防止。 這是因為由於構成金屬線5的導線52a至52g是埋藏在 導線中間層薄膜的凹槽内,在導線中間層薄膜中之裂痕的 傳遞會被防止。更特別地,該等由金屬材料製成的導線52a 1〇至52g具有彈性。據此,當因裂痕之傳遞而起的應力是施加 到金屬材料時,金屬材料經歷彈性變形,藉此釋放應力。 再者’由於導線52a至52g是由金屬材料製成且具有彈性, 相信要使該等導線52a至52g斷裂必須要有大的應力。 據此’該第五實施例的金屬線2b、金屬線4、和金屬線 15 5具有更強地防止裂痕在導線中間層薄膜中之傳遞的效果。 因此,該第五實施例的半導體裝置是為一個具有一由 金屬線2b、金屬線4、金屬線5、和開孔2以冓成之防裂痕傳 遞結構的半導體裝置。 如上所述,該第五實施例的金屬線2b、金屬線4、和金 20屬線5亦能夠藉著與形成半導體元件與導線在元件區域8a 中之那些相同的步驟來輕易形成。 第15圖是為一個顯示該第五實施例之半導體裝置之變 化1之A-A’橫截面結構的橫截面圖。第15圖顯示一切割邊緣 1、一開孔2a、一金屬線9、一抗濕框架狀擋體3、一金屬線 48 200847250 4、一絕緣薄膜16、一接觸中間層薄膜17、一接觸中間層薄 膜 18、導線中間層薄膜 19,20,21,22,23,24,25,26,27,28,29,30, 和31、及覆蓋薄膜32a和32b。 與在第 1、2、3A、3B、5A、5B、5C、6、11、和 14圖 5中所示之那些相同的組件是由相同的標號標示。據此,構 成金屬線4之導線51&,5113,51(:,51火516,51!;和51§的結構是 與在第11圖中所示的那些相同。構成金屬線4之導線 513,5113,51〇,51(1,516,51&和51§的結構亦是與在第11圖中所 示的那些相同。 10 由第15圖所示的橫截面圖與顯示由第11圖所示之第五 實施例之半導體裝置之A_A’橫截面的橫截面圖不同的地方 是在於該金屬線2b與該金屬線5是整合一起來形成一金屬 線9 〇 在第15圖中所示的金屬線9是由導線53^531),53(:,53(1, 15 53e,53f,和 53g 構成。 構成金屬線9的導線不包括一置於一個對應於插塞46h 之位置的導線和形成抗濕框架狀擋體3的導線46i。這是因 為必須保證開孔2a之凹槽之深度的若干量。該等導線53a, 53b,53c,53d,53e,53f,和53g是置於金屬線4與抗濕框架狀擋 2〇 體3之間。 在第14圖中所示的該等導線53a,53b,53c,53d,53e,53f, 彳53g疋各具有一個兩度空間地從一個與開孔2&重疊之位 置延伸到该金屬線5之寬度的金屬導線。該等導線 53&,5313,53(:,53(1,536,536和538可以是兩度空間地從一個在 49 200847250 該開孔2a下面的位置延伸到一個該等導線53a至53g不與該 抗濕框架狀擋體3接觸的位置。 請參閱第3A圖所示,相信在半導體裝置之切割期間形 成在切割邊緣1的裂痕是如由箭頭60或61所示沿著導線中 5 間層薄膜傳遞。 該第五實施例之金屬線4為何具有縮減從切割區域8 b 開始傳遞之裂痕數目之效果的原因是與在該第四實施例中 所述的相同。 請再次參閱第3A圖所示,本案發明人發現形成在開孔 10 2a之邊緣的裂痕是在由箭頭62所示的方向上傳遞。然而, 在某些情況中該裂痕可以在由箭頭63所示的方向上傳遞。 因此,相信當構成該第五實施例之變化1之金屬線9的 該等導線53a至53g是設置時,即使在裂痕是在由箭頭63所 示之方向上傳遞的情況中,裂痕的傳遞能夠被防止。 15 這是因為由於構成金屬線9的該等導線53a至53g是設 置在導線中間層薄膜的凹槽中,在該等導線中間層薄膜中 之裂痕的傳遞能夠被防止。再者,由於該等導線53a至53g 是由金屬材料製成而且具有彈性,相信要使導線53a至53g 斷裂是需要有大的應力。 20 據此,該第五實施例之變化1的金屬線9和金屬線4具有 更強地防止裂痕在導線中間層薄膜中之傳遞的效果。 因此,該第五實施例之半導體裝置的變化1是為一個具 有一由金屬線4、金屬線9、與開孔2a構成之防裂痕傳遞結 構的半導體裝置。 50 200847250 =所述,該第五實施例之變似的金屬線4和金屬線9 亦: 夠错著與形成半導體元件和導線於該元件區域如中之 那些相同的步驟來輕易形成。 5明二 體裝置的變化2現在將會作說 5 Γ &例之半導料置的變化巧為―個在第關 中之金屬線4和金屬線9是形成如—整合金屬線的例子。更 特別地,該第五實施例之半導體震置的變化2是為一個構成 金屬線4之該等導線51a至51g中之每一者與構成金屬線$之 該等導線53a至53g中之每-者是_體地形成的例子。 1〇 即’该整合金屬線’其是形成以致於金屬線4和金屬線 9是彼此整合,是置於該切割邊緣丨與該抗濕框架狀擋體3之 間。該整合金屬線的寬度不特別受限制,只要該整合金屬 線是置於該切割邊緣丨與該抗濕框架狀擋體3;間。 如上所述,該第五實施例之變化2的金屬線4和金屬線9 15亦能夠藉著與形成半導體元件和導線於該元件區域8a中之 那些相同的步驟來輕易形成。 在第15圖中之金屬線4和金屬線9是進/沪一體地形成 的情況中,因金屬線4之存在而防止裂痕傳痛的效果,其已 在第四實施例中作說明,是增加到因金屬線9义存在而防止 2〇 裂痕傳遞的效果。 第六實施例 在第一實施例到第五實施例中所說明的半導體裝置 中,除了金屬線4之外的圖案,其是置於位在^置於一目標 半導體裝置之覆蓋薄膜328和3沘中之開孔如與相鄰於該目 51 200847250 標半導體裝置之另一半導體裝置之開孔2a之間的切割區域 8b中,從裂痕形成的觀點來看是不被考慮。然而,當製程 檢查監視器(PCM)圖案是設置在切割區域8b中時,裂痕會強 烈地形成在該等PCM圖案附近。鑑於這問題,一第六實施 5 例的半導體裝置包括被配置俾可在注意PCM圖案的存在之 下防止裂痕之傳遞的圖案。 一第六實施例現在將會配合第16圖來作說明。第16圖 是為在該第六實施例之半導體裝置是以矩形形狀配置之情 況中切割區域8b是彼此相交之一個部份的平面圖。在第16 10 圖中,PCM圖案80、一PCM圖案8卜一金屬線64a、和一金 屬線64b是配置在一個置於半導體裝置之間且是在水平方 向上延伸的切割區域8b中。此外,在第16圖中,PCM圖案 82是配置在一個置於半導體裝置之間且是在垂直方向上延 伸的切割區域8b中。再者,一個抗濕框架狀擋體3和一個開 15 孔2a是配置在一外週緣區域8c中。該第六實施例之半導體 裝置中之每一者包括一個元件區域8a和一個外週緣區域 8c。該切割區域8b是為一個位於切割邊緣1之間的區域。注 意,一金屬線2b不配置在該外週緣區域8c。 該元件區域8a、該切割區域8b、該外週緣區域8c、該 20 開孔2a、和該抗濕框架狀擋體3是與在第一實施例中所述的 那些相同。因此,這些組件的描述是省略。 該等PCM圖案80,81,和82中之每一者是由兩個或者更 多個藉構成一設於元件區域8a中之元件之圖案當中之兩個 或者更多個圖案來同時地形成的圖案構成。這些PCM圖案 52 200847250 80,81,和82是為用於檢查構成該元件之圖案之位置對準之 狀態的圖案。該等PCM圖案80,81,和82中之每一者包含一個 無法配置其他圖案的禁區區域,該禁區區域是位於一個與 該等PCM圖案80,81,和82相隔的預定距離之内。會這樣的原 5因是如下。當圖案之位置對準的狀態是利用該等PCM圖案 80,81,和82藉雷射光束來檢查時’如果其他圖案是配置的 話,從其他圖案反射的雷射光束光線以及從構成該等PCM 圖案80,81,和82之圖案反射的雷射光束光線會彼此干涉。在 如此的情況中,構成該等PCM圖案80,81,和82之圖案之位置 10 對準的狀態無法被準確偵測。 該等PCM圖案80中之每一者是由四個長矩形圖案 65a、四個長矩形圖案65b、和一個矩形圖案65c構成。該四 個長矩形圖案65a是以矩形形式配置在該矩形圖案65c内部 俾可置於該矩形圖案65c的中央。該等矩形圖案65a中之每 15 一者構成該矩形的每一個邊。該四個長矩形圖案65b是以矩 形形式配置在該矩形圖案65c内部俾可置於該矩形圖案65c 的中央四周。該等矩形圖案65b中之每一者構成該矩形的每 一個邊。由該等矩形圖案65a所形成的矩形是比由該等矩形 圖案65b所形成的矩形小而且是配置在由該等矩形圖案65b 20 所形成的矩形内部。 該等PCM圖案80是配置在該切割區域8b中作為一個置 於第16圖之水平方向上沿著切割區域8b之邊之由兩個列與 八個行構成的單元。在行方向上之PCM圖案80之單元的寬 度是為,例如’大約是該切割區域8b之寬度的90%。據此, 53 200847250 當該等半導體裝置是在切割區域8b切割時,切割刀片是與 該等矩形圖案65a,65b,和65c接觸而該等PCM圖案80是斷 裂,藉此形成裂痕。在這情況中,裂痕形成的位置是接近 該抗濕框架狀擋體3。 5 該PCM圖案81是由一矩形圖案66a與數個矩形圖案66b 構成。該矩形圖案66a是為一個由短邊與長邊所包圍的圖 案。該等矩形圖案66b是為長圖案。該等矩形圖案66b是包 括在該矩形圖案66a内而且是以預定間隔配置俾可與矩形 圖案66a的短邊平行。該PCM圖案81是配置在該切割區域gb 10中在第丨6圖的水平方向上沿著該切割區域8b的邊設置。該 PCM圖案81的寬度是為,例如,大約該切割區域8b之寬度 的70%。據此,當該等半導體裝置是在該切割區域扑中切 割時,一切割刀片是與該等矩形圖案66a和66b接觸而該 Μ圖案81疋fe/f裂,因此形成裂痕。在這情況中,裂痕形 15成的位置是遠離該抗濕框架狀擋體3。 该等PCM圖案82中之每一者是由一矩形圖案67a、數個 矩形圖案67b、和數個矩形圖案67c構成。該矩形圖案67a是 l個正方形圖案。該等長方形圖案_是長圖案而且是以 2〇 =間隔配置俾可把該長方形圖案67a的中央夾住而且與 是:方形圖案67a的右邊和左邊平行。該等長方形圖案— 的圖案而且疋以預定間隔配置俾可把該長方形圖案— 〜央夾住而且是與該長方形圖案67a的上邊和下邊平 ^該等PCM圖案82中之每-者是配置於該切割區域8b中 Μ的垂直方向上沿著該切割區域处的邊設置。該 54 200847250 PCM圖案82的寬度是為,例如,大約該切割區域8b之寬度 的80%。據此’當該等半導體裝置是在該切割區域讣中切 割時’一切割刀片是與該等長方形圖案67a,67b,和67c接觸 而該等PCM圖案82是斷裂,因此形成裂痕。與在PCM圖案 5 80之情況中裂痕形成的位置比較起來,在這情況中,裂痕 形成的位置是遠離該抗濕框架狀擋體3。 該金屬線64a是由兩個沿著該等PCM圖案80之單元中 之一列’即,沿著八個PCM圖案8〇,置於該等pCM圖案80 兩側之長的長方形圖案構成。置於該抗濕框架狀擋體3與該 10等PCM圖案80之間之金屬線64a的一部份屬於該外週緣區 域8c。特別地,金屬線64a不包括在該等pcM圖案8〇之行方 向上配置的圖案。金屬線64a是配置於在該等PCM圖案80之 禁區區域以外的區域。 金屬線64a可以防止當PCM圖案80是在裂痕之形成之 15後馬上斷裂時形成之裂痕的傳遞。這是因為裂痕的傳遞是 由構成金屬線64a的金屬圖案阻擋。該等金屬圖案將會在下 面配合第17A和17B圖來詳細地說明。該等金屬圖案具有彈 性。因此,當因裂痕之傳遞而起的應力是施加到該等金屬 圖案時’該等金屬圖案經歷彈性變形,藉此釋放應力。 20 金屬線64b是為一個包圍該等PCM圖案80之單元中之 一列’即,八個PCM圖案80,俾可形成一個長方形之具有 小寬度的條狀圖案。置於抗濕框架狀擋體3與PCM圖案80 之間之金屬線64b的一部份屬於該外週緣區域8c。該金屬線 64b是配置於在該等Pcm圖案80之禁區區域以外的區域。 55 200847250 如在第16圖中之放大圖中所示,該金屬線⑽在金屬線 64b的角落具有-不連續形狀,而_個空間是^置在該金屬 線64b的兩相鄰圖案之間。會這樣的原因是如下。構成金屬 線64b的圖案是微細的。因此,如果在該金屬線_的角落 5不設置如此的空間的話,由於用以形成金屬線⑽之光刻法 的特生個圓化部份是形成在該金屬線㈣的角落。結 果4金屬線64b的角落部份是置於該等pCM圖案8〇的禁區 區域。在這情況中,偵測該等PCM圖案8〇之位置對準的功 能是降級。 10 該金屬線祕可以如在金屬線64a中-樣防止當該等 PCM圖獅是在裂痕的形成之後馬上斷裂時所形成之裂痕 的傳遞。 在第16圖中,該金屬線64a是為了上面列之pCM圖案8〇 的單元來配置,而該金屬線64b是為了下面列之pCM圖案8〇 15的單元來配置。或者,金屬線64a可以為了上面列和下面列 之PCM圖案80的單元來配置。或者,金屬線64b可以為了上 面列和下面列之PCM圖案8〇的單元來配置。 據此,具有一個對應於PCM圖案80之一個列之長度之 金屬線64b之一部份或者金屬線64a之一部份是配置在該開 2〇孔2a與該等PCM圖案80之間,即,在該外週緣區域8c中。 / 口著弟16圖中之線C-C’的橫截面和沿著第16圖中之線 D_D’的橫截面現在將會配合第17A和17B圖來作說明。 第17A圖是為一個顯示沿著第16圖中之線c_c,之橫截 面的圖示。 56 200847250 請參閱第17A圖所示,包括一絕緣薄膜16的中間層絕緣 薄膜、接觸中間層薄膜17和18、導線中間層薄膜 19,20,21,22,23,24,25,26,27,28,29,30,和31、及覆蓋薄膜32& 和32b是設置在一基體15a上。 5 請參閱第17A圖所示,由全部是設置在中間層絕緣薄膜 中的導線與插塞468,4613,46(:,46(1,466,46!;和46§、一插塞 46h、一導線46i、構成的抗濕框架狀擋體3是設置在各位於 一開孔2a與一元件區域8a之間的外週緣區域8c。 晴參閱第17A圖所示’構成金屬線64a之金屬圖案的一 10 部份和構成金屬線64b之金屬圖案的一部份不是剛好設置 在開孔2a下面而是在該等外週緣區域8c中。再者,構成金 屬線64a之金屬圖案的其他部份、構成金屬線64b之金屬圖 案的其他部份、及構成PCM圖案80的長方形圖案65a,65b, 和65c是配置在該切割區域8b中。 15 構成金屬線64a的金屬圖案與構成金屬線64b的金屬圖 案是與該等導線與插塞46&,4613,46(:,46(1,466,46!;和468—起 形成。此外,以上的金屬圖案是藉大馬士革製程來形成作 為導線。該等金屬圖案中之每一者可以包括該導線與插塞 46a或其類似的一個插塞部份。在如此的情況中,該等金屬 2〇圖案疋藉雙重大馬士革製程來形成,而形成在該等中間層 、、、巴緣’專騰中的金屬圖案是經由该專插塞部份來彼此緊密接 觸。相信當該等金屬圖案具有與該導線與插塞46a及其類似 的結構相同的結構時,防止裂痕之傳遞的高效果能夠被達 成,因為在該等金屬圖案與該等中間層絕緣薄膜之間的黏 57 200847250 性是高的。 3等PCM圖案80的長方形圖案65c是由與閘極電極13 相同的材料製成。該等長方形圖案65c和該閘極電極13是由 與形成閘極電極13之方法相同的方法同時地形成。該等長 5方幵y圖案65a疋為設置在該等長方形圖案65c中之每一者内 部的開孔圖案。據此,該等長方形圖案65a和該閘極電極13 亦疋由與形成該閘極電極13之方法相同的方法同時地形 成。瀛等長方形圖案65b和一 STI 10是由與形成該SU 10之 方法相同的方法同時地形成。即,該等長方形圖案65b是確 10認為設置在基體15a中的開孔圖案。 第17B圖是為一個顯示沿著在第16圖中之線D_D,之橫 截面的圖示。 請參閱第17B圖所示,由絕緣薄膜16、接觸中間層薄膜 17和 18、導線中間層薄膜 19,20,21,22,23,24,25,26,27,28,29, 15 30,和31、及覆蓋薄膜32a和32b構成的中間層絕緣薄膜是設 置在基體15a上。 請參閱第17B圖所示,由全部是設置在該等中間層薄膜 中之導線與插塞46a,46b,46c,46d,46e,46f>46g^^|46h、 導線46i構成的抗濕框架狀擋體3是設置在該等各位於一開 20 孔2a與一元件區域8a之間的外週緣區域8c。 然而,無圖案是設置在切割區域此中。特別地,由於 該等PCM圖案80不存在,當該等半導體裝置是以切割刀片 在切割區域8b中切割時,裂痕是形成在遠離該等抗濕框架 狀擋體3或者該等開孔2a的位置。據此’裂痕之傳遞是到達 58 200847250 該等抗濕框架狀檔體3或者該等開孔2a的可能性是低。因 此’金屬線64a或者金屬線64b不會設置。 如上所述,金屬線64a和金屬線64b是配置在該第六實 施例之半導體裝置的外週緣區域8c中俾可與該等PCM圖案 5 80相鄰。然而,與該第一實施例至第五實施例的半導體裝 置不同,包圍元件區域8a的金屬線2b不剛好配置在開孔2a 下面。 這結構無法改進防止裂痕在整個外週緣區域8c上之傳 遞的效果。然而,由於構成金屬線64a或64b之金屬圖案的 10 存在,在裂痕形成特別高可能性之區域中裂痕的傳遞能夠 有效地防止。這是因為由於構成金屬線64a或64b之金屬圖 案之存在而起之防止裂痕之傳遞的效果是與在第一實施例 至第五實施例中所述之金屬線2b之存在而起的效果相同。 或者’金屬線64a或64b能夠與在第一實施例至第五實 15施例中所述的金屬線2b組合使用。如此的結構能夠更強烈 地防止因PCM圖案80之存在而形成之裂痕的傳遞。 在以上所述的實施例中,金屬線6如或6413是為了該等 PCM圖案而配置。或者,該金屬線64a或64b可以是為了一 個設置在該切割區域中的圖案而配置俾可監視元件的電氣 20特性。 第七實施例 在第六實施例中,金屬線64a或金屬線64b是由隔離的 金屬圖案構成。在這情況中,當金屬材料是藉大馬士革製 程來埋藏在該等中間層絕緣薄膜中俾形成金屬圖案時,於 59 200847250 CMP的步驟期間凹陷或者腐蝕是發生。結果,金屬圖案的 形成故障會發生。據此,在第七實施例中,一個用於防止 在CMP步驟期間凹陷或者腐蝕之發生的圖案是設置俾可與 以上所述的金屬圖案相鄰。 5 該第七實施例現在將會配合第18圖來作說明。第18圖 是為一個顯示第七實施例中沿著在第16圖中之線C-C,之橫 截面的圖示。 請參閱第18圖所示,由絕緣薄膜16、接觸中間層薄膜 Π和 18、導線中間層薄膜 19,20,21,22,23,24,25,26,27,28,29, 10 30,和3卜覆蓋薄膜32a和32b構成的中間層絕緣薄膜是設置 在一基體15a上。 請參閱第18圖所示,由全部是設置在中間層薄膜中之 導線與插塞 46&,4613,46〇,46(1,466,46!;和46§、插塞4611、導線 46i構成的抗濕框架狀擋體3是設置於各位在一開孔“與一 15元件區域8a之間的外週緣區域8C中。 請參閱第18圖所示,構成金屬線64a之金屬圖案的一部 伤和構成金屬線64b之金屬圖案的一部份不是剛好配置在 開孔2a下面而是在外週緣區域以中。再者,構成金屬線64a 之金屬圖案的其他部份、構成金屬線64b之金屬圖案的其他 2〇部份、及構成PCM圖案80的長方形圖案65a,65b,和65c是配 置在一切割區域8b中。 請參閱第18圖所示,假圖案砧和的是配置俾可與外遞 緣區域8c和切割區域8b中的金屬線64a或金屬線6扑相鄰。 在以上的半導體裝置中,金屬線64a和64b;基體15a、 60 200847250 由絕緣薄膜16、接觸中間層薄膜17和18、導線中間層薄興 19,20,21,22,23,24,25,26,27,28,29,30,和31、與覆蓋薄膜32& 和32b構成的中間層絕緣薄膜;由導線與插塞 46a,46b,46C,46d,46e,46f,和46g、插塞46h、和導線46i構成的 5 抗濕框架狀擋體3 ;開孔2a ;元件區域8a ;切割區域8b ;外 週緣區域8c ;及切割邊緣1是與在以上所述之實施例中的那 些相同。 該假圖案68包括設置在接觸中間層薄膜18、導線中間 層薄膜20,22,24,26,28,和30中的金屬圖案。假圖案68是置於 10 抗濕框架狀擋體3與金屬線64a或64b之間。假圖案68是如在 以上所述之構成金屬線64a或64b的金屬圖案中一樣藉大馬 士革製程來形成在該等導線中間層薄膜中。在這結構中, 因在大馬士革製程中於CMP步驟期間之凹陷或腐蝕而引起 的圖案形成故障能夠被防止。 15 該假圖案69包括設置在接觸中間層薄膜18、導線中間 層薄膜20,22,24,26,28,和30中的金屬圖案。假圖案69是置於 在金屬線64a與金屬線64a之間或者在金屬線64b與金屬線 64b之間的PCM圖案80上。假圖案69是如在以上所述之構成 金屬線64a或64b的金屬圖案中一樣藉大馬士革製程來形成 20在該等導線中間層薄膜中。在這結構中,因在大馬士革製 程中於CMP步驟期間之凹陷或腐蝕而引起的圖案形成故障 能夠被防止。 該名詞”凹陷”是指具有一個大寬度之金屬圖案變成凹 形俾可具有一淺碟形狀的一個現象。該名詞,,腐蝕,,是指, 200847250 與在一個未形成有導線圖案之區域中的比較起來,置於一 個密集配置有細金屬圖案之區域中之絕緣薄膜之厚度與金 屬圖案之厚度'起減少的一個現象。 據此,在假圖案68和69是以適當間隔配置俾可與構成 5 金屬線64a或64b之金屬圖案相鄰的情況中,於CMP步驟中 圖案的研磨不會僅集中在構成金屬線64a或64b的金屬圖 案。因此,圖案形成故障會被防止。 此外,第七實施例的半導體裝置亦提供與第六實施例 之半導體裝置的優點相同的優點。再者,由於假圖案68是 10 設置在金屬線64a或64b與抗濕框架狀擔體3之間,這半導體 裝置有利的地方是在於形成在切割區域8b中之裂痕的傳遞 能夠被更強烈地抑制。 第八實施例 構成第六實施例和第七實施例之金屬線64a或64b之金 15 屬圖案中之每一者的平面形狀是長方形。然而,除非在一 金屬圖案與一設有該金屬圖案之中間層絕緣薄膜之間的黏 性是適足的,否則該金屬圖案是與該中間層絕緣薄膜分 離,且在該中間層絕緣薄膜中的應力不會轉移到該金屬圖 案。結果,因金屬圖案之彈性變形而起的應力釋放不會發 20 生,而因此無防止在中間層絕緣薄膜中之裂痕的傳遞。 因此,第八實施例的金屬線具有一個不規則的平面形 狀俾可改變在金屬圖案與中間層絕緣薄膜之間的黏性。 配置在第八實施例之半導體裝置中之金屬線的平面形 狀現在將會配合第19A至19G圖來作說明。第19A至19F各顯 62 200847250 示一形成金屬線64a或64b之金屬圖案的平面形狀。 第19A圖顯示一形成金屬線64a或64b之金屬圖案的基 本金屬線70。該基本金屬線70是一長方形圖案。該金屬線 64a或64b是藉由以預定間隔配置數條基本線70來形成。在 5 這結構中,與金屬線64a或64b是形成如一單一圖案的情況 比較起來’於金屬圖案與設有該金屬圖案之中間層絕緣薄 膜之間的接觸區域是增加。這是因為金屬圖案的周緣增 加’而因此,金屬圖案之側表面的總面積是增加。 第19B圖顯示一形成該金屬線64&或641)之金屬圖案的 10基本金屬線71。在該基本金屬線71中,較小的長方形圖案 是成兩行地配置。據此,與金屬線64a或64b是利用基本金 屬線70來形成的情況比較起來,在金屬圖案與一設有該金 屬圖案之中間層絕緣薄膜之間的接觸面積是進一步增加。 第19C圖顯示一形成金屬線64a或64b之金屬圖案的基 15本金屬線72。在該基本金屬線72中,比形成基本金屬線71 之小長方形圖案更小的長方形圖案是成兩行地配置。據 此,與金屬線64a或64b是利用基本金屬線71來形成的情況 比較起來,在該金屬圖案與一設有該金屬圖案之中間層絕 緣薄膜之間的接觸面積是進一步增加。 20 第19D圖顯示一形成金屬線64a或64b之金屬圖案的基 本金屬線73。該基本金屬線73是為一條在基本金屬線7〇之 週緣出現不規則的金屬線。該基本金屬線73的周緣是由於 設置該等不規則而增加,藉此增加在該金屬圖案與一設有 該金屬圖案之中間層絕緣薄膜之間的接觸面積。 63 200847250 第19E圖顯示一形成金屬線64a或64b之金屬圖案的基 本金屬線74。該基本金屬線74是為一條在基本金屬線70之 一側出現比該基本金屬線73之不規則更大之不規則的金屬 線。由於該基本金屬線74的周緣是增加,在該金屬圖案與 一設有該金屬圖案之中間層絕緣薄膜之間的接觸面積是增 加0 第19F圖顯示一形成金屬線64a或64b之金屬圖案的基 本金屬線75。在該基本金屬線75中,具有在水平方向上延 伸之圖案形狀的大不規則是設置在其之週緣。由於該基本 10金屬線75的周緣是增加,在該金屬圖案與一設有該金屬圖 案之中間層絕緣薄膜之間的接觸面積是增加。 第19G圖顯示用於形成基本金屬線73,74,或75之光罩 之光罩圖案之形狀的一部份。 當基本金屬線73,74,或75是藉光刻法來形成時,基本金 15屬線73,74,或75的小不規則在某些情況中由於後面的原因 而無法形成。例如,當基本金屬線73,74,或75具有小不規則 時,光線由於光線的近接效應而在設於光罩上的光罩圖案 上衍射。結果,在曝光期間設於光罩上的光罩圖案無法準 確地轉移到半導體基體上。 20 為了解決這問題,藉由設置一個在第19G圖中所示的凹 陷部份在對應於基本金屬線73,74,或75之光罩圖案的角 落,該等小不規則能夠被準確地再生。這是因為該光罩圖 案是在光線衍射的考量下設計。Cheng came with the wire and the wire portion of the plug 33 in the Ma Shi I 8a. I ^ is formed by a wire in a groove in the interlayer of the 忒 element region. The line 5/|^20 line - "Malaysia, _this::==^" is formed in the element area 8a. Seven Wires One of the wires 52c is composed of a wire buried in the ~. The second line of the second line of the Damascus process is guided by the turn-by-wire and plug-in guidance > into the component area 8a. Part 1 The wire is composed of a wire buried in a groove in the intermediate layer of the wire 46 200847250. The wire 52 d is formed in the element region 8a by a damascene process as in the above-described line, and the wire portion of the wire and plug 36 is widely formed. The wire 52e is composed of a wire buried in a groove in the film intermediate layer 5 of the wire. The wire 52e is formed in the element region 8a together with the wire portion of the wire and plug 37 by a damascene process as in the above-described wire. 10 15 20 . The led wire 52f is constructed of a wire buried in a recess in the film stack of the intermediate layer of the wire. The wire 52f is formed in the element region 8a together with the wire portion of the wire and the plug 38 by a damascene process as in the above-described wire. The wire 52g is composed of a wire buried in a groove in the intermediate film 3 of the wire. The wire 52g is formed in the element region 8a together with the wire portion of the wire and the plug 39 by a damascene process as in the above-described wire. Referring to Fig. 3A, it is believed that in the cutting region, the crack formed in the cutting edge of the semiconductor device during the cutting of the semiconductor device is transmitted along the wire intermediate film as indicated by the arrow 60 or 61. According to this, the reason why the portion of the metal wire 2b of the fifth embodiment has the effect of preventing the transfer of (4) in the film of the interlayer of the wire is the same as that described in the first embodiment or the second embodiment. the same. The metal wire 4 of the fifth embodiment has a reduction in the splitting from the cutting region 8b. The embodiment is the same as in the fourth 47 200847250. Please refer to FIG. 3A again, the inventor of the present invention. It is found that the crack formed at the edge of the opening 2a is transmitted in the direction indicated by the arrow 62. However, in some cases the crack may be transmitted in the direction indicated by arrow 63. Therefore, it is believed that when the wires 52a 5 constituting the metal wire 5 of the fifth embodiment are set to be disposed, even in the case where the crack is uploaded in the direction indicated by the arrow 63, the transfer of the crack can be prevented. This is because since the wires 52a to 52g constituting the metal wires 5 are buried in the grooves of the film of the interlayer of the wires, the transmission of cracks in the film of the interlayer of the wires can be prevented. More specifically, the wires 52a 1 to 52g made of a metal material have elasticity. According to this, when the stress due to the transfer of the crack is applied to the metal material, the metal material undergoes elastic deformation, thereby releasing the stress. Further, since the wires 52a to 52g are made of a metal material and have elasticity, it is believed that a large stress is required to break the wires 52a to 52g. According to this, the metal wire 2b, the metal wire 4, and the metal wire 15 5 of the fifth embodiment have an effect of more strongly preventing the transmission of cracks in the film of the wire interlayer. Therefore, the semiconductor device of the fifth embodiment is a semiconductor device having a crack-proof transfer structure formed of a metal wire 2b, a metal wire 4, a metal wire 5, and an opening 2. As described above, the metal wire 2b, the metal wire 4, and the gold 20 wire 5 of the fifth embodiment can also be easily formed by the same steps as those for forming the semiconductor element and the wire in the element region 8a. Fig. 15 is a cross-sectional view showing the A-A' cross-sectional structure of Variation 1 of the semiconductor device of the fifth embodiment. Figure 15 shows a cutting edge 1, an opening 2a, a metal wire 9, a moisture-resistant frame-like body 3, a metal wire 48 200847250 4, an insulating film 16, a contact interlayer film 17, a contact intermediate Layer film 18, wire intermediate film 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, and 31, and cover films 32a and 32b. The same components as those shown in Figs. 1, 2, 3A, 3B, 5A, 5B, 5C, 6, 11, and 14 are denoted by the same reference numerals. Accordingly, the structures of the wires 51 & 5113, 51 (:, 51 fires 516, 51!; and 51 § constituting the metal wires 4 are the same as those shown in Fig. 11. The wires 513 constituting the metal wires 4 The structures of 5113, 51〇, 51 (1, 516, 51 & and 51 § are also the same as those shown in Fig. 11. 10 Cross-sectional view and display shown in Fig. 15 by Fig. 11 The cross-sectional view of the A_A' cross section of the semiconductor device of the fifth embodiment shown is different in that the metal line 2b and the metal line 5 are integrated to form a metal line 9 〇 shown in FIG. The metal wire 9 is composed of wires 53^531), 53 (:, 53 (1, 15 53e, 53f, and 53g. The wires constituting the wire 9 do not include a wire placed at a position corresponding to the plug 46h). And forming the wire 46i of the moisture-resistant frame-like stopper 3. This is because the amount of the depth of the groove of the opening 2a must be ensured. The wires 53a, 53b, 53c, 53d, 53e, 53f, and 53g are placed. Between the metal wire 4 and the moisture-resistant frame-like body 2, the wires 53a, 53b, 53c, 53d, 53e, 53f, 彳 53g 所示 shown in Fig. 14 each have one Two-dimensionally extending from a position overlapping the opening 2 & to a metal wire having a width of the metal wire 5. The wires 53 &, 5313, 53 (:, 53 (1, 536, 536 and 538 may be two degrees of space) The ground extends from a position below the opening 2a of 49 200847250 to a position where the wires 53a to 53g are not in contact with the moisture-resistant frame-like stopper 3. Referring to FIG. 3A, it is believed that the cutting is performed on the semiconductor device. The crack formed at the cutting edge 1 is transmitted along the five-layer film in the wire as indicated by the arrow 60 or 61. Why does the metal wire 4 of the fifth embodiment have a reduced number of cracks transmitted from the cutting region 8 b The reason for the effect is the same as that described in the fourth embodiment. Referring again to Fig. 3A, the inventors have found that the crack formed at the edge of the opening 10 2a is in the direction indicated by the arrow 62. However, in some cases the crack can be transmitted in the direction indicated by the arrow 63. Therefore, it is believed that when the wires 53a to 53g constituting the wire 9 of the variation 1 of the fifth embodiment are set Even in the crack is In the case of being transmitted in the direction indicated by the arrow 63, the transmission of the crack can be prevented. 15 This is because the wires 53a to 53g constituting the metal wire 9 are disposed in the grooves of the film of the intermediate layer of the wire, where The transmission of cracks in the intermediate layer film of the equal conductor can be prevented. Further, since the wires 53a to 53g are made of a metal material and are elastic, it is believed that a large stress is required to break the wires 53a to 53g. According to this, the metal wire 9 and the metal wire 4 of the variation 1 of the fifth embodiment have an effect of more strongly preventing the transmission of cracks in the film of the interlayer of the wire. Therefore, the variation 1 of the semiconductor device of the fifth embodiment is a semiconductor device having a crack-proof transmission structure composed of a metal wire 4, a metal wire 9, and an opening 2a. 50 200847250 = The metal wire 4 and the metal wire 9 of the fifth embodiment are also easily formed by the same steps as those for forming a semiconductor element and a wire in the element region. The change of the second body device 2 will now be described. The change of the semiconductor material of the Γ & example is that the metal wire 4 and the metal wire 9 in the first pass form an example of forming an integrated metal wire. More specifically, the variation 2 of the semiconductor shake of the fifth embodiment is one of the wires 51a to 51g constituting the metal wire 4 and each of the wires 53a to 53g constituting the wire $ - The person is an example of the formation of the body. That is, the 'integrated metal wire' is formed such that the metal wire 4 and the metal wire 9 are integrated with each other and placed between the cutting edge 丨 and the moisture-resistant frame-like stopper 3. The width of the integrated metal wire is not particularly limited as long as the integrated metal wire is placed between the cutting edge and the moisture-resistant frame-like body 3; As described above, the metal wire 4 and the metal wire 9 15 of the variation 2 of the fifth embodiment can also be easily formed by the same steps as those for forming the semiconductor element and the wiring in the element region 8a. In the case where the metal wire 4 and the metal wire 9 in Fig. 15 are formed integrally with the entrance/exit, the effect of preventing cracking and pain transmission due to the presence of the metal wire 4 has been described in the fourth embodiment, Increased to prevent the transmission of 2 〇 cracks due to the presence of metal wires 9 . Sixth Embodiment In the semiconductor device described in the first to fifth embodiments, a pattern other than the metal line 4 is placed on the cover films 328 and 3 placed on a target semiconductor device. The opening in the crucible is not considered from the viewpoint of crack formation from the cutting region 8b between the opening 2a of another semiconductor device adjacent to the semiconductor device of the reference No. 2008. However, when the process inspection monitor (PCM) pattern is disposed in the cutting area 8b, cracks are strongly formed in the vicinity of the PCM patterns. In view of this problem, the semiconductor device of the sixth embodiment 5 includes a pattern configured to prevent the transfer of cracks while paying attention to the presence of the PCM pattern. A sixth embodiment will now be described in conjunction with Fig. 16. Fig. 16 is a plan view showing a portion where the cutting regions 8b intersect each other in the case where the semiconductor device of the sixth embodiment is arranged in a rectangular shape. In Fig. 1610, the PCM pattern 80, a PCM pattern 8 and a metal line 64a, and a metal line 64b are disposed in a cutting region 8b which is interposed between the semiconductor devices and which extends in the horizontal direction. Further, in Fig. 16, the PCM pattern 82 is disposed in a cutting region 8b which is interposed between the semiconductor devices and which extends in the vertical direction. Further, a moisture-resistant frame-like stopper 3 and an opening 15 hole 2a are disposed in an outer peripheral region 8c. Each of the semiconductor devices of the sixth embodiment includes an element region 8a and an outer peripheral region 8c. The cutting area 8b is an area located between the cutting edges 1. Note that a metal wire 2b is not disposed in the outer peripheral region 8c. The element region 8a, the cutting region 8b, the outer peripheral region 8c, the 20 opening 2a, and the moisture resistant frame-like stopper 3 are the same as those described in the first embodiment. Therefore, the description of these components is omitted. Each of the PCM patterns 80, 81, and 82 is simultaneously formed by two or more of two or more patterns constituting a pattern of elements provided in the element region 8a. Pattern composition. These PCM patterns 52 200847250 80, 81, and 82 are patterns for checking the state of alignment of the patterns constituting the elements. Each of the PCM patterns 80, 81, and 82 includes a forbidden area that cannot be configured with other patterns, the restricted area being located within a predetermined distance from the PCM patterns 80, 81, and 82. The original 5 reasons for this are as follows. When the position of the pattern is aligned, the PCM patterns 80, 81, and 82 are inspected by the laser beam. 'If other patterns are configured, the laser beam rays reflected from the other patterns and the PCM are formed. The laser beam rays reflected by the patterns of patterns 80, 81, and 82 interfere with each other. In such a case, the state in which the positions 10 of the patterns constituting the PCM patterns 80, 81, and 82 are aligned cannot be accurately detected. Each of the PCM patterns 80 is composed of four long rectangular patterns 65a, four long rectangular patterns 65b, and one rectangular pattern 65c. The four long rectangular patterns 65a are disposed in a rectangular form inside the rectangular pattern 65c and can be placed in the center of the rectangular pattern 65c. Each of the rectangular patterns 65a constitutes each side of the rectangle. The four long rectangular patterns 65b are disposed in a rectangular form inside the rectangular pattern 65c and can be placed around the center of the rectangular pattern 65c. Each of the rectangular patterns 65b constitutes each side of the rectangle. The rectangle formed by the rectangular patterns 65a is smaller than the rectangle formed by the rectangular patterns 65b and is disposed inside the rectangle formed by the rectangular patterns 65b20. The PCM pattern 80 is a unit composed of two columns and eight rows disposed in the cutting region 8b as a side along the cutting region 8b in the horizontal direction of Fig. 16. The width of the unit of the PCM pattern 80 in the row direction is, for example, 'about 90% of the width of the cutting area 8b. Accordingly, 53 200847250, when the semiconductor devices are cut at the dicing region 8b, the dicing blades are in contact with the rectangular patterns 65a, 65b, and 65c and the PCM patterns 80 are broken, thereby forming cracks. In this case, the position where the crack is formed is close to the moisture-resistant frame-like stopper 3. 5 The PCM pattern 81 is composed of a rectangular pattern 66a and a plurality of rectangular patterns 66b. The rectangular pattern 66a is a pattern surrounded by a short side and a long side. The rectangular patterns 66b are long patterns. The rectangular patterns 66b are included in the rectangular pattern 66a and are disposed at predetermined intervals so as to be parallel to the short sides of the rectangular pattern 66a. The PCM pattern 81 is disposed in the cutting region gb 10 along the side of the cutting region 8b in the horizontal direction of the sixth drawing. The width of the PCM pattern 81 is, for example, about 70% of the width of the cutting area 8b. According to this, when the semiconductor devices are cut in the cutting region, a cutting blade is in contact with the rectangular patterns 66a and 66b and the meandering pattern 81疋fe/f is split, thereby forming a crack. In this case, the fissure shape is 15 inches away from the moisture-resistant frame-like stopper 3. Each of the PCM patterns 82 is composed of a rectangular pattern 67a, a plurality of rectangular patterns 67b, and a plurality of rectangular patterns 67c. The rectangular pattern 67a is a square pattern. The rectangular patterns _ are long patterns and are arranged at intervals of 2 〇 = 夹 to sandwich the center of the rectangular pattern 67a and are parallel to the right and left sides of the square pattern 67a. The patterns of the rectangular patterns are arranged at predetermined intervals, and the rectangular patterns are sandwiched and disposed on the upper and lower sides of the rectangular pattern 67a. Each of the PCM patterns 82 is disposed. The cutting area 8b is disposed along the side at the cutting area in the vertical direction. The width of the 54 200847250 PCM pattern 82 is, for example, approximately 80% of the width of the cutting area 8b. According to this, when the semiconductor devices are cut in the dicing region ’, a dicing blade is in contact with the rectangular patterns 67a, 67b, and 67c, and the PCM patterns 82 are broken, thereby forming cracks. In comparison with the position where the crack is formed in the case of the PCM pattern 580, the position where the crack is formed is away from the moisture-resistant frame-like stopper 3. The metal line 64a is formed by two long rectangular patterns placed along one of the cells of the PCM pattern 80, i.e., along the eight PCM patterns 8〇, placed on either side of the pCM pattern 80. A portion of the metal line 64a interposed between the moisture-resistant frame-like body 3 and the 10th PCM pattern 80 belongs to the outer peripheral region 8c. In particular, the metal line 64a does not include a pattern disposed in the row direction of the pcM patterns 8〇. The metal wires 64a are disposed in regions other than the forbidden region of the PCM patterns 80. The metal wire 64a can prevent the transfer of the crack formed when the PCM pattern 80 is broken immediately after the formation of the crack. This is because the transfer of the crack is blocked by the metal pattern constituting the metal wire 64a. These metal patterns will be described in detail below in conjunction with Figures 17A and 17B. These metal patterns are elastic. Therefore, when stress due to the transfer of cracks is applied to the metal patterns, the metal patterns undergo elastic deformation, thereby releasing stress. The metal line 64b is a column of cells constituting the PCM patterns 80, i.e., eight PCM patterns 80, which may form a rectangular strip pattern having a small width. A portion of the metal wire 64b placed between the moisture-resistant frame-like body 3 and the PCM pattern 80 belongs to the outer peripheral region 8c. The metal wire 64b is disposed in a region other than the forbidden region of the Pcm pattern 80. 55 200847250 As shown in the enlarged view in Fig. 16, the metal wire (10) has a discontinuous shape at the corner of the metal wire 64b, and _ space is placed between two adjacent patterns of the metal wire 64b. . The reason for this is as follows. The pattern constituting the metal wire 64b is fine. Therefore, if such a space is not provided at the corner 5 of the metal line _, a special rounded portion of the photolithography for forming the metal line (10) is formed at the corner of the metal line (4). The corner portion of the metal wire 64b of the result 4 is placed in the forbidden region of the pCM pattern 8〇. In this case, the function of detecting the alignment of the PCM patterns 8 is degraded. 10 The metal wire can be prevented from being transmitted as the crack formed when the PCM lion is broken immediately after the formation of the crack, as in the wire 64a. In Fig. 16, the metal line 64a is arranged for the unit of the pCM pattern 8 上面 listed above, and the metal line 64b is arranged for the unit of the pCM pattern 8 〇 15 listed below. Alternatively, the metal line 64a may be configured for the cells of the PCM pattern 80 in the upper and lower columns. Alternatively, the metal line 64b may be configured for the unit of the PCM pattern 8A of the upper column and the lower column. Accordingly, a portion of the metal line 64b having a length corresponding to one column of the PCM pattern 80 or a portion of the metal line 64a is disposed between the opening 2 hole 2a and the PCM pattern 80, that is, In the outer peripheral region 8c. The cross section of the line C-C' in the figure of the mouthpiece 16 and the cross section along the line D_D' in Fig. 16 will now be described in conjunction with Figs. 17A and 17B. Fig. 17A is a diagram showing a cross section along the line c_c in Fig. 16. 56 200847250 Referring to FIG. 17A, an interlayer insulating film including an insulating film 16, a contact interlayer film 17 and 18, and a wiring interlayer film 19, 20, 21, 22, 23, 24, 25, 26, 27 , 28, 29, 30, and 31, and cover films 32 & and 32b are disposed on a base 15a. 5 Referring to Figure 17A, all of the wires and plugs 468, 4613, 46 (:, 46 (1, 466, 46!; and 46 §, one plug 46h, are provided in the interlayer insulating film, A wire 46i and a moisture-resistant frame-like body 3 are disposed on the outer peripheral edge region 8c between each of the openings 2a and an element region 8a. For the sake of clarity, see the metal pattern constituting the metal wire 64a shown in Fig. 17A. A portion of the 10 and a portion of the metal pattern constituting the metal line 64b are not disposed just below the opening 2a but in the outer peripheral portion 8c. Further, other portions of the metal pattern constituting the metal line 64a The other portions of the metal pattern constituting the metal wire 64b, and the rectangular patterns 65a, 65b, and 65c constituting the PCM pattern 80 are disposed in the dicing region 8b. 15 The metal pattern constituting the metal wire 64a and the metal wire 64b constituting the metal wire 64b The metal pattern is formed with the wires 46 & 4613, 46 (:, 46 (1, 466, 46!; and 468). Further, the above metal pattern is formed by the Damascus process as a wire. Each of the metal patterns may include the wire and plug 46a or a plug portion similar to this. In such a case, the metal pattern is formed by a double damascene process, and the metal pattern formed in the intermediate layer, the edge of the bar is through the The plug portions are in close contact with each other. It is believed that when the metal patterns have the same structure as the wires and the plugs 46a and the like, a high effect of preventing the transfer of cracks can be achieved because the metals are The adhesion between the pattern and the interlayer insulating film is high. The rectangular pattern 65c of the PCM pattern 80 is made of the same material as the gate electrode 13. The rectangular pattern 65c and the gate are formed. The electrode 13 is simultaneously formed by the same method as the method of forming the gate electrode 13. The equal-length 5-square y pattern 65a is an opening pattern provided inside each of the rectangular patterns 65c. The rectangular patterns 65a and the gate electrodes 13 are also simultaneously formed by the same method as the method of forming the gate electrodes 13. The rectangular pattern 65b and an STI 10 are formed by the method of forming the SU 10 The same method is simultaneously formed. That is, the rectangular patterns 65b are aperture patterns which are considered to be disposed in the base 15a. Fig. 17B is a cross section taken along the line D_D in Fig. 16. As shown in Fig. 17B, the insulating film 16, the contact interlayer films 17 and 18, the wire interlayer film 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, An interlayer insulating film composed of 15 30, and 31, and cover films 32a and 32b is provided on the substrate 15a. Referring to Fig. 17B, the moisture-proof frame shape is composed of the wires and the plugs 46a, 46b, 46c, 46d, 46e, 46f > 46g^^|46h and the wires 46i which are all disposed in the intermediate film. The stopper 3 is disposed on the outer peripheral edge region 8c between each of the opening 20 holes 2a and an element region 8a. However, no pattern is set in the cutting area here. In particular, since the PCM patterns 80 are absent, when the semiconductor devices are cut in the cutting region 8b by the cutting blades, the cracks are formed away from the moisture-resistant frame-like members 3 or the openings 2a. position. Accordingly, the transmission of the 'cracks' is the probability of reaching the 2008 200847250 such wet-resistant frame-like body 3 or the openings 2a. Therefore, the metal wire 64a or the metal wire 64b is not provided. As described above, the metal wires 64a and the metal wires 64b are disposed in the outer peripheral edge region 8c of the semiconductor device of the sixth embodiment, and are adjacent to the PCM patterns 580. However, unlike the semiconductor devices of the first to fifth embodiments, the metal wires 2b surrounding the element regions 8a are not disposed just below the openings 2a. This structure cannot improve the effect of preventing the transfer of cracks on the entire outer peripheral region 8c. However, due to the presence of the metal pattern 10 constituting the metal wire 64a or 64b, the transfer of cracks in the region where the crack formation is particularly high can be effectively prevented. This is because the effect of preventing the transfer of cracks due to the presence of the metal pattern constituting the metal wires 64a or 64b is the same as that of the presence of the metal wires 2b described in the first to fifth embodiments. . Alternatively, the metal wire 64a or 64b can be used in combination with the metal wire 2b described in the first to fifth embodiments. Such a structure can more strongly prevent the transmission of cracks formed by the presence of the PCM pattern 80. In the embodiment described above, the metal wires 6 such as or 6413 are configured for the PCM patterns. Alternatively, the metal line 64a or 64b may be an electrical 20 characteristic that is configured to monitor the component for a pattern disposed in the cutting region. Seventh Embodiment In the sixth embodiment, the metal wire 64a or the metal wire 64b is composed of an isolated metal pattern. In this case, when the metal material is buried in the interlayer insulating film by the Damascene process to form a metal pattern, depression or corrosion occurs during the step of the 2008 200847250 CMP. As a result, a formation failure of the metal pattern occurs. Accordingly, in the seventh embodiment, a pattern for preventing occurrence of dishing or corrosion during the CMP step is disposed so as to be adjacent to the metal pattern described above. 5 This seventh embodiment will now be described with reference to Fig. 18. Fig. 18 is a view showing a cross section taken along line C-C in Fig. 16 in the seventh embodiment. Referring to FIG. 18, the insulating film 16, the contact interlayer film Π and 18, the wire intermediate film 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 10 30, The interlayer insulating film composed of the cover films 32a and 32b is provided on a substrate 15a. Referring to Figure 18, the wires and plugs 46 & 4613, 46〇, 46 (1, 466, 46!; and 46 §, plug 4611, and wire 46i are all formed in the interlayer film. The moisture-resistant frame-like stopper 3 is disposed in the outer peripheral edge region 8C between the one opening and the one-element region 8a. Referring to Fig. 18, a part of the metal pattern constituting the metal wire 64a is shown. A portion of the metal pattern of the wound and constituting metal wire 64b is not disposed just below the opening 2a but in the outer peripheral region. Further, other portions of the metal pattern constituting the metal wire 64a, the metal constituting the metal wire 64b The other two portions of the pattern, and the rectangular patterns 65a, 65b, and 65c constituting the PCM pattern 80 are disposed in a cutting region 8b. Referring to Fig. 18, the dummy pattern anvil and the configuration are both external and external. The edge region 8c and the metal line 64a or the metal line 6 in the dicing region 8b are adjacent to each other. In the above semiconductor device, the metal wires 64a and 64b; the substrate 15a, 60 200847250 are made of the insulating film 16, the contact interlayer film 17 and 18, the middle layer of the wire thinning 19,20,21,22,23,24,25,26,27,28,2 9, 30, and 31, an interlayer insulating film composed of the cover films 32 & and 32b; and a wire and plugs 46a, 46b, 46C, 46d, 46e, 46f, and 46g, a plug 46h, and a wire 46i 5 Wet-resistant frame-like body 3; opening 2a; element area 8a; cutting area 8b; outer peripheral area 8c; and cutting edge 1 are the same as those in the embodiment described above. The metal pattern in the intermediate layer film 18, the wire intermediate film 20, 22, 24, 26, 28, and 30 is contacted. The dummy pattern 68 is placed between the 10 moisture resistant frame-like body 3 and the metal wire 64a or 64b. The dummy pattern 68 is formed in the wire interlayer film by a damascene process as in the metal pattern constituting the metal wire 64a or 64b described above. In this structure, during the CMP step in the Damascene process. A patterning failure caused by depression or corrosion can be prevented. 15 The dummy pattern 69 includes a metal pattern disposed in the contact interlayer film 18, the wire interlayer films 20, 22, 24, 26, 28, and 30. The pattern 69 is placed between the metal line 64a and the metal line 64a or The PCM pattern 80 between the metal line 64b and the metal line 64b. The dummy pattern 69 is formed by the Damascus process as in the metal pattern constituting the metal line 64a or 64b as described above. In this configuration, patterning failure due to dishing or corrosion during the CMP step in the damascene process can be prevented. The term "recessed" refers to a phenomenon in which a metal pattern having a large width becomes a concave shape and can have a shallow dish shape. The term "corrosion" means that the thickness of the insulating film and the thickness of the metal pattern in a region in which a fine metal pattern is densely arranged are compared with that in a region in which a conductor pattern is not formed. A phenomenon of reduction. Accordingly, in the case where the dummy patterns 68 and 69 are disposed at appropriate intervals adjacent to the metal pattern constituting the five metal wires 64a or 64b, the polishing of the pattern in the CMP step is not concentrated only on the constituent metal wires 64a or 64b metal pattern. Therefore, pattern formation failure can be prevented. Further, the semiconductor device of the seventh embodiment also provides the same advantages as those of the semiconductor device of the sixth embodiment. Furthermore, since the dummy pattern 68 is disposed between the metal wire 64a or 64b and the moisture-resistant frame-like carrier 3, the semiconductor device is advantageous in that the transmission of the crack formed in the cutting region 8b can be more strongly inhibition. Eighth Embodiment The planar shape of each of the gold-like patterns constituting the metal wires 64a or 64b of the sixth embodiment and the seventh embodiment is a rectangle. However, unless the adhesion between a metal pattern and an interlayer insulating film provided with the metal pattern is sufficient, the metal pattern is separated from the interlayer insulating film and is in the interlayer insulating film. The stress is not transferred to the metal pattern. As a result, the stress release due to the elastic deformation of the metal pattern does not occur, and thus there is no prevention of the transmission of cracks in the interlayer insulating film. Therefore, the metal wire of the eighth embodiment has an irregular planar shape which changes the viscosity between the metal pattern and the interlayer insulating film. The planar shape of the metal wires disposed in the semiconductor device of the eighth embodiment will now be described with reference to Figs. 19A to 19G. 19A to 19F each show 62 200847250 shows a planar shape of a metal pattern forming the metal line 64a or 64b. Figure 19A shows a basic metal line 70 forming a metal pattern of metal lines 64a or 64b. The base metal wire 70 is a rectangular pattern. The metal wire 64a or 64b is formed by arranging a plurality of basic wires 70 at predetermined intervals. In the structure of 5, the contact area between the metal pattern and the interlayer insulating film provided with the metal pattern is increased as compared with the case where the metal wire 64a or 64b is formed as a single pattern. This is because the peripheral edge of the metal pattern is increased, and therefore, the total area of the side surface of the metal pattern is increased. Fig. 19B shows a ten basic metal line 71 forming a metal pattern of the metal line 64 & or 641). In the basic metal wire 71, the smaller rectangular pattern is arranged in two rows. Accordingly, as compared with the case where the metal wires 64a or 64b are formed using the basic metal wires 70, the contact area between the metal pattern and the interlayer insulating film provided with the metal pattern is further increased. Figure 19C shows a base 15 metal line 72 forming a metal pattern of metal lines 64a or 64b. In the basic metal wire 72, a rectangular pattern smaller than a small rectangular pattern forming the basic metal wire 71 is arranged in two rows. Accordingly, in comparison with the case where the metal wire 64a or 64b is formed using the basic metal wire 71, the contact area between the metal pattern and the interlayer insulating film provided with the metal pattern is further increased. 20 Figure 19D shows a basic metal line 73 forming a metal pattern of metal lines 64a or 64b. The basic metal line 73 is an irregular metal line which is formed on the periphery of the basic metal line 7〇. The circumference of the base metal wire 73 is increased by the provision of such irregularities, thereby increasing the contact area between the metal pattern and an interlayer insulating film provided with the metal pattern. 63 200847250 Figure 19E shows a basic metal line 74 forming a metal pattern of metal lines 64a or 64b. The base metal wire 74 is an irregular metal wire which appears on one side of the base metal wire 70 to be larger than the irregularity of the base metal wire 73. Since the circumference of the basic metal line 74 is increased, the contact area between the metal pattern and the interlayer insulating film provided with the metal pattern is increased by 0. FIG. 19F shows a metal pattern forming the metal line 64a or 64b. Basic metal wire 75. In the basic metal wire 75, a large irregularity having a pattern shape extending in the horizontal direction is provided at the periphery thereof. Since the circumference of the base 10 metal wire 75 is increased, the contact area between the metal pattern and the interlayer insulating film provided with the metal pattern is increased. Figure 19G shows a portion of the shape of the reticle pattern used to form the reticle of the basic metal line 73, 74, or 75. When the basic metal lines 73, 74, or 75 are formed by photolithography, the small irregularities of the basic gold 15 lines 73, 74, or 75 cannot be formed in some cases for the latter reason. For example, when the basic metal wires 73, 74, or 75 have small irregularities, the light is diffracted on the reticle pattern provided on the reticle due to the proximity effect of the light. As a result, the mask pattern provided on the reticle during exposure cannot be accurately transferred to the semiconductor substrate. In order to solve this problem, the small irregularities can be accurately reproduced by providing a recessed portion shown in Fig. 19G at a corner of the reticle pattern corresponding to the basic metal line 73, 74, or 75. . This is because the reticle pattern is designed with light diffraction in mind.

【圖式簡單說明J 64 200847250 弟1圖是為一個顯示一第一實施例之半導體裝置的平 面圖; 第2圖是為一個顯示該第一實施例之半導體裝置之變 化的平面圖; 5 第3 A和3B圖是為該第一實施例之半導體裝置之橫截 面圖並且顯示在該第一實施例中之金屬線孔的優點; 第4圖是為一個顯示該第一實施例之半導體裝置之變 化的橫截面圖並且顯示一個對應於第i圖或第2圖之A_A,橫 截面的橫截面; 1〇 第5A、5B、和5C圖是為利用第1圖或第2圖之A_A,橫截 面與B-B’橫截面來描繪製作該第一實施例之半導體裝置之 步驟的圖示; 第6圖包括顯示在形成一上層導線之步驟、形成一最上 層導線之步驟、與形成覆蓋薄膜之步驟之後所得到之該第 κ %例之半導體裝置之第i圖或第2圖之A_A,橫截面和 B-B’橫截面的橫截面圖; 第7圖是為一個顯示一第二實施例之半導體裝置之 A_A’橫截面的橫截面圖; 第8囷疋為個顯示一第三實施例之半導體裝置之 2〇 A_A’橫截面的橫截面圖; 第9圖疋為一個顯示一第四實施例之半導體裝置的平 面圖; 少疋為個頒示该弟四實施例之半導體裝置之變 化的平面圖; 65 200847250 卜囷疋為個顯示該第四實施例之半導體裝置之 Α·Α’橫截面結構之第_例子的橫截面圖; °疋為個顯示該第四實施例之半導體裝置之 Α-Α’橫截面結構之第二例子的橫截面圖; 5 第13圖是為一個顯示一第五實施例之半導體裝置的平 面圖; 苐0疋為個顯示该苐五實施例之半導體裝置之 Α-Α’橫截面結構之例子的橫截面圖; 第15圖是為一個顯示該第五實施例之半導體裝置之變 10化1之Α-Α’橫截面結構的橫截面圖; 第16圖是為在一第六實施例之半導體裝置是以矩陣形 狀排列之情況中切割區域讣是彼此相交之一個部份的平面 圖; 第17Α圖是為一個沿著在第16圖中之線c_c,的橫截面 15 圖; 第17B圖是為一個5著在第16圖中之線D_D,的橫截面 圖; 第18圖是為一個顯示第七實施例中之一個沿著在第 圖中之線C-C’之橫截面的圖示; 20 弟19A至19F圖各顯示一個構成一金屬線之金屬圖案 的平面形狀;及 第19G圖是為一個顯示用於形成一基本金屬線之光罩 之光罩圖案之形狀之一部份的圖示。 【主要元件符號說明】 66 200847250 1 切割邊緣 18 接觸中間層薄膜 2a 開孔 19 導線中間層薄膜 2b 金屬線 20 導線中間層薄膜 3 抗濕框架狀播體 21 導線中間層薄膜 4 金屬線 22 導線中間層薄膜 5 金"屬線 23 導線中間層薄膜 6a C-窗擋體 24 導線中間層薄膜 6b 金屬線 25 導線中間層薄膜 8a 元件區域 26 導線中間層薄膜 8b 切割區域 27 導線中間層薄膜 8c 外週緣區域 28 導線中間層薄膜 9 金屬線 29 導線中間層薄膜 10 淺溝渠隔離 30 導線中間層薄膜 11 源極區域 31 導線中間層薄膜 12 >及極區域 32a 覆蓋薄膜 13 閘極電極 32b 覆蓋薄膜 14 側壁 33 導線與插塞 15a 基體 34 導線與插塞 15b 井 35 導線與插塞 16 絕緣薄膜 36 導線與插塞 17 接觸中間層薄膜 37 導線與插塞 67 200847250 38 導線與插塞 47b 導線與插塞 39 導線與插塞 47c 導線與插塞 42 插塞 47d 導線與插塞 43 導線 47e 導線與插塞 45a 導線 47f 導線與插塞 45b 導線 47g 導線與插塞 45c 導線 48a 導線 45d 導線 48b 導線 45e 導線 48c 導線 45f 導線 48d 導線 45g 導線 48e 導線 46a 導線與插塞 48f 導線 46b 導線與插塞 48g 導線 46c 導線與插塞 51a 導線 46d 導線與插塞 51b 導線 46e 導線與插塞 51c 導線 46f 導線與插塞 51d 導線 46g 導線與插塞 51e 導線 46h 插塞 51f 導線 46i 導線 51g 導線 47a 導線與插塞 52a 導線 68 200847250 52b 導線 65b 長矩形圖案 52c 導線 65a 長方形圖案 52d 導線 66a 長方形圖案 52e 導線 66b 長方形圖案 52f 導線 67a 長方形圖案 52g 導線 67b 長方形圖案 53a 導線 67c 長方形圖案 53b 導線 68 假圖案 53c 導線 69 假圖案 53d 導線 70 基本金屬線 53e 導線 71 基本金屬線 53f 導線 72 基本金屬線 53g 導線 73 基本金屬線 60 箭頭 74 基本金屬線 61 箭頭 75 基本金屬線 62 箭頭 80 PCM圖案 63 箭頭 81 PCM圖案 64a 金屬線 82 PCM圖案 64b 金屬線 65a 長矩形圖案 69BRIEF DESCRIPTION OF THE DRAWINGS J 64 200847250 FIG. 1 is a plan view showing a semiconductor device of a first embodiment; FIG. 2 is a plan view showing a variation of the semiconductor device of the first embodiment; 5 3 A And FIG. 3B is a cross-sectional view of the semiconductor device of the first embodiment and shows the advantages of the metal line hole in the first embodiment; FIG. 4 is a view showing a variation of the semiconductor device of the first embodiment. Cross-sectional view and showing a cross section of A_A corresponding to the i-th or 2nd figure; 1〇 5A, 5B, and 5C are the A_A using the 1st or 2nd, cross section An illustration of the steps of fabricating the semiconductor device of the first embodiment is depicted in cross-section with BB'; FIG. 6 includes the steps of forming an upper layer of wire, forming a topmost wire, and forming a cover film. The cross-sectional view of the cross-section and the BB' cross-section of the ith image or the A-A of the semiconductor device of the κ% example obtained after the step; FIG. 7 is a view showing a second embodiment A_A' cross section of the semiconductor device Cross-sectional view; FIG. 8 is a cross-sectional view showing a cross section of a second AA' of a semiconductor device of a third embodiment; FIG. 9 is a plan view showing a semiconductor device of a fourth embodiment;平面图 is a plan view showing a variation of the semiconductor device of the fourth embodiment of the invention; 65 200847250 A cross-sectional view showing a first example of a cross-sectional structure of the semiconductor device of the fourth embodiment. FIG. 13 is a cross-sectional view showing a second example of a cross-sectional structure of the semiconductor device of the fourth embodiment; FIG. 13 is a plan view showing a semiconductor device of a fifth embodiment; FIG. 15 is a cross-sectional view showing an example of a cross-sectional structure of a semiconductor device of the fifth embodiment; FIG. 15 is a view showing a variation of the semiconductor device of the fifth embodiment. A cross-sectional view of a cross-sectional structure of the Α-Α'; Fig. 16 is a plan view showing a portion where the dicing regions 相 intersect each other in the case where the semiconductor devices of the sixth embodiment are arranged in a matrix shape; it's for A cross-sectional view 15 along line c_c in Fig. 16; a 17D view is a cross-sectional view of a line D_D in Fig. 16; Fig. 18 is a seventh embodiment for display One of the examples is shown along the cross section of the line C-C' in the figure; 20th pages 19A to 19F each show a planar shape of a metal pattern constituting a metal wire; and the 19Gth image is a An illustration showing a portion of the shape of the reticle pattern used to form the reticle of a basic metal line. [Main component symbol description] 66 200847250 1 Cutting edge 18 Contact intermediate film 2a Opening 19 Conductor intermediate film 2b Metal wire 20 Conductor intermediate film 3 Wet frame-like broadcast 21 Conductor intermediate film 4 Wire 22 Wire middle Layer film 5 Gold"Line 23 Conductor interlayer film 6a C-window block 24 Conductor interlayer film 6b Metal wire 25 Conductor interlayer film 8a Component region 26 Conductor interlayer film 8b Cutting region 27 Conductor interlayer film 8c Peripheral region 28 Conductor interlayer film 9 Metal wire 29 Conductor interlayer film 10 Shallow trench isolation 30 Conductor interlayer film 11 Source region 31 Conductor interlayer film 12 > and pole region 32a Cover film 13 Gate electrode 32b Cover film 14 Side wall 33 Conductor and plug 15a Base 34 Conductor and plug 15b Well 35 Conductor and plug 16 Insulating film 36 Conductor and plug 17 Contact intermediate film 37 Conductor and plug 67 200847250 38 Conductor and plug 47b Conductor and plug 39 wires and plugs 47c wires and plugs 42 plugs 47d wires and plugs 43 wires 47e wire and plug 45a wire 47f wire and plug 45b wire 47g wire and plug 45c wire 48a wire 45d wire 48b wire 45e wire 48c wire 45f wire 48d wire 45g wire 48e wire 46a wire and plug 48f wire 46b wire and plug Plug 48g wire 46c wire and plug 51a wire 46d wire and plug 51b wire 46e wire and plug 51c wire 46f wire and plug 51d wire 46g wire and plug 51e wire 46h plug 51f wire 46i wire 51g wire 47a wire and Plug 52a wire 68 200847250 52b wire 65b long rectangular pattern 52c wire 65a rectangular pattern 52d wire 66a rectangular pattern 52e wire 66b rectangular pattern 52f wire 67a rectangular pattern 52g wire 67b rectangular pattern 53a wire 67c rectangular pattern 53b wire 68 dummy pattern 53c wire 69 Fake pattern 53d wire 70 basic metal wire 53e wire 71 basic metal wire 53f wire 72 basic metal wire 53g wire 73 basic metal wire 60 arrow 74 basic metal wire 61 arrow 75 basic metal wire 62 arrow 80 PCM pattern 63 Arrow 81 PCM pattern 64a metal wire 82 PCM pattern 64b metal wire 65a long rectangular pattern 69

Claims (1)

200847250 十、申請專利範圍: L一種設置於—半導體基體上的半導體裝置,包含: 一個具有一元件的元件區域; 個包圍該元件區域的抗濕框架; 5 一個設置於該抗濕框架與該半導體裝置之外週邊緣 之間且在該半導體基體之上的絕緣層; 條沿著該外週邊緣延伸且設置在該絕緣層中的第 一金屬線;及 一個设置於該絕緣層中的凹槽。 10 2·如申請專利範圍第1項所述的半導體裝置,其中,該第一 金屬線是配置俾可包圍該元件區域。 3·如申請專利範圍第丨項所述的半導體裝置,其中,該凹槽 是置於該第一金屬線之上。 4·如申請專利範圍第1項所述的半導體裝置,其中,該第一 孟屬線包括δ又置在一個界定該第一金屬線之平面形狀之 邊的不規則。 5_如申請專利範圍第1項所述的半導體裝置,更包含: 一條设置在該絕緣層中和在一個置於該第一金屬線 與該外週邊緣之間之區域中的第二金屬線。 20 6·如申請專利範圍第1項所述的半導體裝置,其中,該第一 金屬線或者該凹槽具有一個不連續部份。 7.如申請專利範圍第丨項所述的半導體裝置,其中,該第一 金屬線在該元件區域側之側表面的位置是與該凹槽在該 元件區域側之側表面的位置對準。 70 200847250 8·如申請專利範圍第3項所述的半導體裝置,更包含: 一條具有比該第一金屬線之寬度更大之寬度且是置 於該第-金屬線與該凹槽之間並且是在該凹槽下面的金 屬導線。 5 10 9·如申凊專利範圍第1項所述的半導體裝置,其中,該第一 金屬線包含-第-導線一置於該第—導線下_第二 導線、及-連接至該第一導線到該第二導線的接觸插塞。 10·如申请專利範圍第丨項所述的半導體裝置,其中,在該 第一金屬線之置於該外週邊緣側之側表面之位置與該 外週邊緣之間的距離是比在該凹槽之置於該外週邊緣 側之側表面之位置與該外週邊緣之間的距離小。 11 ·如申凊專利範圍第1項所述的半導體裝置,更包含: 一個設置在該絕緣層中於該第一金屬線與該外週邊 緣之間的假圖案。 15 I2·如申請專利範圍第1項所述的半導體裝置,其中,該凹 槽是配置俾可包圍該元件區域。 13·—種製造半導體裝置的方法,包含: 形成-第-導線於-個包圍_元件區域的抗濕框架 狀區域中; 在該抗濕框架狀區域與_半導體裝置之外週邊緣之 間形成一 者该外週邊緣延伸的第二導線· 形成一絕緣薄膜在該第-導線與該第二導線之上; 形成-凹槽在該絕緣薄财於該外週邊緣與該抗濕 71 200847250 框木狀區域之間。 如申明專利视圍第13項所述之製造半導體裝置的方 法’其中’形成一凹槽是藉由蝕刻該位在第二導線之上 的絕緣薄膜來執行。 5 15.如巾請專·圍第叫所述之製造半導體裝置的方 法’其中’形成該第-導線與形成該第二導線是在同一 時間執行。 16.—種製造半導體裝置的方法,包含: 形成一第—導線於—第-抗濕框架區域中,該第一 1〇 抗濕框架區域包圍一個在-半導體基體中的第一元件 區域; 形成一第二導線於一第二抗濕框架區域,該第二抗 濕框架區域包圍-個在該半導體基體中之面向該第一 凡件區域的第二元件區域,該第一元件區域與該第二元 15 件區域之間有一切割區域; 在該第一導線與該切割區域之間形成一沿著該切割 區域延伸的第三導線; 在該第二導線與該切割區域之間形成一沿著該切割 區域延伸的第四導線; 0 形成一絕緣薄膜在該第一導線、該第二導線、該第 三導線、和該第四導線之上; 形成一第一凹槽於該絕緣薄膜中在該第一導線與該 切割區域之間; 形成一第二凹槽於該絕緣薄膜中在該第二導線與該 72 200847250 切割區域之間;及 沿著該切顏勒_半導縣體和魏緣薄膜。 Π.如申請專利第16項所述之製造半㈣裝置的方 法,更包含: 形成-第-元件於該半導體基體上在該切割區域 中,該步驟是在該切割步驟之前執行。 18·如申請專利範圍第16項所述之製造半導體裝置的方 法’其中,形成該第-凹槽是藉由似彳位在該第三導線 10 =的麟薄膜來執行,而形成該第二凹槽是藉由钮刻位 在5亥弟四導線之上的絕緣薄膜來執行。 申叫專利乾圍第16項所述之製造半導體裝置的方 绩’,中’形成第-導線、形成第二導線、形成第三導 線、與形成第四導線是在同一時間執行。 73200847250 X. Patent Application Range: L A semiconductor device disposed on a semiconductor substrate, comprising: an element region having a component; a moisture resistant frame surrounding the component region; 5 a device disposed on the moisture resistant frame and the semiconductor An insulating layer between the peripheral edges of the device and over the semiconductor substrate; a first metal line extending along the peripheral edge and disposed in the insulating layer; and a recess disposed in the insulating layer . The semiconductor device according to claim 1, wherein the first metal line is disposed to surround the element region. 3. The semiconductor device of claim 2, wherein the recess is placed over the first metal line. 4. The semiconductor device of claim 1, wherein the first Meng line includes an δ and an irregularity defined on an edge defining a planar shape of the first metal line. The semiconductor device of claim 1, further comprising: a second metal line disposed in the insulating layer and in a region between the first metal line and the peripheral edge . The semiconductor device of claim 1, wherein the first metal line or the recess has a discontinuous portion. 7. The semiconductor device according to claim 2, wherein the position of the side surface of the first metal line on the element region side is aligned with the position of the side surface of the groove on the element region side. The semiconductor device of claim 3, further comprising: a strip having a width greater than a width of the first metal line and disposed between the first metal line and the recess and Is the metal wire under the groove. The semiconductor device of claim 1, wherein the first metal wire comprises a -first wire disposed under the first wire - a second wire, and - connected to the first a contact plug of the wire to the second wire. 10. The semiconductor device according to claim 2, wherein a distance between a position of the side surface of the first metal wire placed on the outer peripheral edge side and the outer peripheral edge is greater than that in the concave The distance between the position of the side surface of the groove placed on the outer peripheral edge side and the outer peripheral edge is small. The semiconductor device of claim 1, further comprising: a dummy pattern disposed in the insulating layer between the first metal line and the outer peripheral edge. The semiconductor device according to claim 1, wherein the recess is disposed to surround the element region. 13. A method of fabricating a semiconductor device, comprising: forming a --conductor in a moisture-resistant frame-like region surrounding a component region; forming a gap between the moisture-resistant frame-like region and an outer peripheral edge of the semiconductor device a second wire extending from the peripheral edge, forming an insulating film over the first wire and the second wire; forming a groove in the insulating thin portion of the outer peripheral edge and the moisture resistant 71 200847250 frame Between woody areas. A method of fabricating a semiconductor device as described in claim 13 of the invention is directed to forming a recess by etching the insulating film positioned over the second wiring. 5 15. The method of manufacturing a semiconductor device as described in the above-mentioned section, wherein the formation of the first-conductor wire and the formation of the second wire are performed at the same time. 16. A method of fabricating a semiconductor device, comprising: forming a first conductor in a - moisture-resistant frame region, the first barrier wet frame region surrounding a first component region in a semiconductor substrate; forming a second wire is disposed in a second moisture-resistant frame region, and the second moisture-resistant frame region surrounds a second component region in the semiconductor substrate facing the first component region, the first component region and the first component a cutting area is formed between the binary 15 pieces; a third wire extending along the cutting area is formed between the first wire and the cutting area; and a second line is formed between the second wire and the cutting area a fourth wire extending from the cutting region; 0 forming an insulating film over the first wire, the second wire, the third wire, and the fourth wire; forming a first groove in the insulating film Between the first wire and the cutting region; forming a second groove in the insulating film between the second wire and the 72 200847250 cutting region; and along the Cheyenne _ semi-guided body and Wei Film. The method of manufacturing a half (four) device according to claim 16, further comprising: forming a - element on the semiconductor substrate in the cutting region, the step being performed prior to the cutting step. The method of manufacturing a semiconductor device according to claim 16, wherein the forming the first groove is performed by a film similar to the third wire 10 = and forming the second The groove is performed by an insulating film in which the button is engraved on the four wires of the 5th. The method of manufacturing a semiconductor device described in claim 16 of the patent circumstance, the formation of the first wire, the formation of the second wire, the formation of the third wire, and the formation of the fourth wire are performed at the same time. 73
TW97106804A 2007-03-22 2008-02-27 Semiconductor device and method of producing semiconductor device TWI373797B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007074424 2007-03-22
JP2007338951A JP5332200B2 (en) 2007-03-22 2007-12-28 Semiconductor device and manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
TW200847250A true TW200847250A (en) 2008-12-01
TWI373797B TWI373797B (en) 2012-10-01

Family

ID=40049786

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97106804A TWI373797B (en) 2007-03-22 2008-02-27 Semiconductor device and method of producing semiconductor device

Country Status (2)

Country Link
JP (1) JP5332200B2 (en)
TW (1) TWI373797B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104009024A (en) * 2013-02-26 2014-08-27 瑞萨电子株式会社 Semiconductor device and semiconductor wafer
CN110931521A (en) * 2018-08-29 2020-03-27 京东方科技集团股份有限公司 Display panel, manufacturing method thereof and display device
CN111834434A (en) * 2020-07-29 2020-10-27 山东傲晟智能科技有限公司 OLED display device and preparation method thereof

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5830843B2 (en) 2010-03-24 2015-12-09 富士通セミコンダクター株式会社 Semiconductor wafer, manufacturing method thereof, and semiconductor chip
JP5879774B2 (en) * 2011-06-30 2016-03-08 富士通セミコンダクター株式会社 Semiconductor device and manufacturing method thereof
JP6132525B2 (en) 2012-11-30 2017-05-24 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
JP6395304B2 (en) 2013-11-13 2018-09-26 ローム株式会社 Semiconductor device and semiconductor module
JP6591637B2 (en) * 2013-11-13 2019-10-16 ローム株式会社 Semiconductor device and semiconductor module
JP2016178329A (en) * 2016-05-26 2016-10-06 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method of the same
WO2019193896A1 (en) 2018-04-02 2019-10-10 株式会社ソシオネクスト Semiconductor device
JP7045271B2 (en) * 2018-06-28 2022-03-31 エイブリック株式会社 Semiconductor devices and semiconductor chips

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6365958B1 (en) * 1998-02-06 2002-04-02 Texas Instruments Incorporated Sacrificial structures for arresting insulator cracks in semiconductor devices
KR100314133B1 (en) * 1999-11-26 2001-11-15 윤종용 Semiconductor chip having edge with an anti-moisture-absorption film and forming method of the anti-moisture-absorption film
JP4118029B2 (en) * 2001-03-09 2008-07-16 富士通株式会社 Semiconductor integrated circuit device and manufacturing method thereof
JP4050876B2 (en) * 2001-03-28 2008-02-20 富士通株式会社 Semiconductor integrated circuit device and manufacturing method thereof
JP3757143B2 (en) * 2001-10-11 2006-03-22 富士通株式会社 Semiconductor device manufacturing method and semiconductor device
JP4250006B2 (en) * 2002-06-06 2009-04-08 富士通マイクロエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
JP3779243B2 (en) * 2002-07-31 2006-05-24 富士通株式会社 Semiconductor device and manufacturing method thereof
JP4776195B2 (en) * 2004-09-10 2011-09-21 ルネサスエレクトロニクス株式会社 Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104009024A (en) * 2013-02-26 2014-08-27 瑞萨电子株式会社 Semiconductor device and semiconductor wafer
CN110931521A (en) * 2018-08-29 2020-03-27 京东方科技集团股份有限公司 Display panel, manufacturing method thereof and display device
US11245096B2 (en) 2018-08-29 2022-02-08 Boe Technology Group Co., Ltd. Display panel, method for manufacturing display panel and display apparatus
CN111834434A (en) * 2020-07-29 2020-10-27 山东傲晟智能科技有限公司 OLED display device and preparation method thereof
CN111834434B (en) * 2020-07-29 2022-07-05 深圳富创通科技有限公司 OLED display device and preparation method thereof

Also Published As

Publication number Publication date
TWI373797B (en) 2012-10-01
JP2008270720A (en) 2008-11-06
JP5332200B2 (en) 2013-11-06

Similar Documents

Publication Publication Date Title
TW200847250A (en) Semiconductor device and method of producing semiconductor device
KR100995558B1 (en) Semiconductor device and method of producing semiconductor device
US10566326B2 (en) Semiconductor devices including a device isolation region in a substrate and/or fin
JP4271901B2 (en) Method of forming a semiconductor device having a gate all-around transistor
TWI278964B (en) Semiconductor device and method of manufacturing the same
US6927461B2 (en) Semiconductor device having shared contact and fabrication method thereof
US7417295B2 (en) Insulated gate semiconductor device and manufacturing method thereof
KR20190023527A (en) Semiconductor devices and method of manufacturing semiconductor devices
JP2009267021A (en) Semiconductor device, and method for manufacturing the same
US20060006466A1 (en) Semiconductor device and method of manufacturing the same
TW200937620A (en) Semiconductor device and a method of manufacturing the same
KR20120068057A (en) Semiconductor devices and methods of fabricating the same
TW200818340A (en) Semiconductor device and method of fabricating the same
JP2009094364A (en) Semiconductor device and method of manufacturing the same
JP2005243932A (en) Semiconductor device and its manufacturing method
JP4192348B2 (en) Semiconductor device
TW201243956A (en) Method for forming self-aligned contact and integrated circuit with self-aligned contact
JP2012089772A (en) Method of manufacturing semiconductor device
JP2010157588A (en) Semiconductor device and method of manufacturing same
TW201005826A (en) Semiconductor device, semiconductor chip, manufacturing methods thereof, and stack package
JP2009277849A (en) Semiconductor device and manufacturing method thereof
TW578273B (en) Memory device that comprises self-aligned contact and fabrication method thereof
TW200919638A (en) Metal line in semiconductor device and fabricating method thereof
JP2009147161A (en) Semiconductor device and its manufacturing method
TWI293786B (en) Method for fabricating semiconductor device and wire with silicide