TW200829099A - Capacitor layer-forming material, method for producing capacitor layer-forming material, and printed wiring board comprising built-in capacitor obtained by using the capacitor layer-forming material - Google Patents

Abstract

Disclosed is a capacitor layer-forming material for printed wiring boards which enables to improve temperature characteristics of an oxide dielectric layer having a perovskite structure, while reducing leakage current at the same time. Specifically disclosed is a capacitor layer-forming material (1) comprising a dielectric layer (2) between an upper electrode-forming layer (5) and a lower electrode-forming layer (6). This capacitor layer-forming material (1) is characterized in that the dielectric layer (2) is an oxide dielectric layer having a multilayer structure, which is composed of a manganese-less oxide dielectric layer (3) containing no manganese, and a manganese-containing oxide dielectric layer (4). Also disclosed is a method for producing such a capacitor layer-forming material, wherein a manganese-less oxide dielectric layer and a manganese-containing oxide dielectric layer are formed by any one of a physical deposition method, a chemical vapor reaction method and a sol-gel method.

Description

200829099 九、發明說明： 【發明所屬之技術領域】 關於本案發明之發明，係關於電容層形成材料與電容 層形成材料之製造方法及使用該電容層形成材料製、出之 具有内藏電容元件之印刷線路板。 【先前技術】 • 近年，内藏電容電路之多層印刷線路板，係將位於豆 =1以上之層使用作為含有電容電路之層，對位於該電 谷’、路之介電層之兩面之内層電路對峙配 下部電極之形態使用。 上極及 然後’該電容電路層得將且女 Φ线屠賴具有上部電極形成層/ > 士 ^電極形成層之3層構造之電容電路形成材料， 二本國㈣中請特表綱2-5_號_ 丁 刻法等加工而得者。本案發明所稱印刷缘路板 ·,内藏電容層形成材料，係以具有用於 = ==用於下部電極形成之第2導電層之間二： €之構造者表不，琴楚1措 4弟1導電層與第2導電層 等加工形成電容電路，用於作為印刷線路板；之電 子材料之構成材料。 ， 予之電 然後，上述介雷屏，# u 曰係具有絕緣性，而為蓄積一定電 何者。於如此之介電層之形成方法，可採用各種方法。 例如，於專利文獻2(日本國專利 06-140385號公報），作為 °特開平 作馮使用化學氣相反應法者，揭示有200829099 IX. Description of the Invention: The invention of the invention relates to a method for producing a capacitor layer forming material and a capacitor layer forming material, and a method for manufacturing a capacitor layer using the capacitor layer forming material. Printed circuit board. [Prior Art] • In recent years, a multilayer printed wiring board with a built-in capacitor circuit uses a layer of Bean=1 or more as a layer containing a capacitor circuit, and is located on the inner side of both sides of the dielectric layer of the electric valley. The circuit is used in the form of a lower electrode. The upper pole and then the 'capacitor circuit layer will be and the female Φ line will be slaughtered with the upper electrode forming layer / > the electrode layer forming layer of the three-layer structure of the capacitor circuit forming material, two national (four) in the special table 2 5_ No. _ Ding engraving and other processing. The invention relates to a printing edge plate, and a built-in capacitor layer forming material is provided with a structure for the second conductive layer for === for the formation of the lower electrode. The fourth conductive layer and the second conductive layer are processed to form a capacitor circuit for use as a printed circuit board; , to the power Then, the above-mentioned Jie Lei screen, # u 曰 is insulated, but to accumulate a certain amount of electricity. Various methods can be employed for the formation of such a dielectric layer. For example, in Patent Document 2 (Japanese Patent No. 06-140385), a chemical vapor phase reaction method is used as a special opening method.

2213〜9175-PF 5 200829099 -種製造方法，其特徵在於：包含：，於基底上以較· °c低的溫度沉積薄膜之步驟；及將該非晶質狀系薄 膜以雷射退火或快速熱退火處理使之結晶製出SrT池系 薄膜之步驟。以該方法製出之介電層，以得到具有高介電 常數之SrTi 〇3系薄膜為目的。 其-人，於專利文獻3(日本國專利申請特開 2一00卜3583G3號公報），作為使用賤鑛法者，揭示一種薄膜 電容元件，其係於基板上的任一層層積下部電極、高介電 常數的介電體、上部電極之薄膜電容元件，該高介電常數 之介電體係由結晶粒與結晶粒界所構成之多結晶，其特徵 在於：含有可採取複數原子價之金屬離子作為雜/，、於二 結晶粒界附近含有較該結晶粒内部高濃之該雜質，作為該 可知取複數原子價之金屬離子以Mn離子為佳。以該方法 製出之薄膜電容元件，長期可青疮含 ， 号电合1干m罪度兩到達絕緣崩潰之時間 長。 再者’於專利文獻4(曰本國專利申請特開平 0 7-294862號公報），作為使用溶膠—凝膠法者，揭示一 氧化物介電體薄膜之製造方法，其係於基板表面施：氫： 化處理後，於該基板上，形成以金屬燒氧化物作為原料之 氧化物介電體薄膜者。在此，可形成作為薄膜之氧化物介 電體’係具有介電特性之金屬氧化物’使用例如，Li_”2213~9175-PF 5 200829099 - a manufacturing method, comprising: a step of depositing a film on a substrate at a temperature lower than ° C; and exposing the amorphous film to a laser or rapid heat The step of annealing to crystallize the SrT cell-based film. The dielectric layer produced by this method is intended to obtain a SrTi 〇3 film having a high dielectric constant. Patent Document 3 (Japanese Patent Application Laid-Open No. Hei No. Hei No. Hei No. 2 00358), as a method of using a bismuth ore, discloses a thin film capacitor element which is laminated on any layer of a lower electrode on a substrate, a dielectric material having a high dielectric constant and a thin film capacitor element of an upper electrode, wherein the high dielectric constant dielectric system is composed of crystal grains and crystal grain boundaries, and is characterized by containing a metal capable of taking a complex atomic price The ion is a hetero//, and contains an impurity which is more concentrated in the vicinity of the crystal grain boundary than the inside of the crystal grain boundary, and it is preferable that the metal ion having a complex atomic value is Mn ion. The thin film capacitor element produced by this method can be used for a long time, and it can be used for a long time. Further, as a method of using a sol-gel method, a method for producing an oxide dielectric thin film, which is applied to a surface of a substrate, is disclosed in the patent document 4 (Japanese Patent Application Laid-Open No. Hei 07-294862). After the hydrogen treatment, an oxide dielectric film using a metal oxide oxide as a raw material is formed on the substrate. Here, an oxide dielectric as a thin film can be formed as a metal oxide having a dielectric property. For example, Li_"

Li2B4〇7、PbZrTiCh、BaTi〇3、SrTi〇3、pbLaZrTi〇3、UTa〇3、Li2B4〇7, PbZrTiCh, BaTi〇3, SrTi〇3, pbLaZrTi〇3, UTa〇3,

ZnO、Ta2〇5等。以該方法製出之氧化物介電體薄膜，配向 性優良’結晶性良好的氧化物介電體薄膜。 2213-9175-PF 6 200829099 其中，揭不於專利文獻4之使用溶膠-凝膠法之介電 層之形成，較使用化學氣相反應法（CVD法）或濺鍍法形成 之；1電層，無需使用真空製程，亦有容易將介電層形成於 ^面積的基板上之優點。並且，可容易使介電層之構成成 為_比例且，可製出極薄的介電膜，故作為形成大 容量電容層之手法受到期待。ZnO, Ta2〇5, and the like. The oxide dielectric film produced by this method has an excellent alignment property and an oxide dielectric film having good crystallinity. 2213-9175-PF 6 200829099 wherein the formation of the dielectric layer using the sol-gel method disclosed in Patent Document 4 is formed by using a chemical vapor phase reaction method (CVD method) or a sputtering method; There is no need to use a vacuum process, and there is an advantage that it is easy to form a dielectric layer on a substrate of an area. Further, since the dielectric layer can be easily formed into a ratio of ITO and an extremely thin dielectric film can be produced, it is expected to be a method of forming a bulk capacitor layer.

但疋，使用溶膠—凝膠法之介電層存在有長處與缺 點。其長處，可舉（i)可形成大面積的介電層；（ii)可形 成般大谷里的電容層所需之極薄的介電膜之點等。 另一方面，缺點可舉（1)由於其薄度而膜後不均及存 在於氧化物粒子之粒子間的間陽:，形成電t元件時之上部 電極與下部電極短路之問題而有使漏電流變大的情形而 產良率低，（II)因氣氛溫度的變化而電容量等的變化大 而缺乏溫度特性等。 由以上，於市場上，可達成以BST系介電層為首之氧 電層之溫度特性之改善及漏電流之減低之印刷線 板用内藏電容層形成材料之要求變高。 【發明内容】 於疋，本案發明者們，銳意研究的結果，想到可大幅 、、升作為印刷線路板之電容電路之溫度特性，1，可減低 漏電*之印刷線路板之内藏電容層形成材料。以下，敘述 關於本案發明。 "本案舍明之印刷線路板之内藏電路層形成材However, there are advantages and disadvantages in the dielectric layer using the sol-gel method. The advantages are as follows: (i) a dielectric layer capable of forming a large area; (ii) a point of an extremely thin dielectric film which can be formed into a capacitor layer in a large valley. On the other hand, the disadvantages are as follows: (1) the unevenness of the film due to the thinness thereof and the intergranularity existing between the particles of the oxide particles: the problem that the upper electrode and the lower electrode are short-circuited when the electric t element is formed When the leakage current is increased, the yield is low, and (II) the change in the capacitance or the like is large due to the change in the atmospheric temperature, and the temperature characteristics are lacking. From the above, in the market, it is possible to achieve an improvement in the temperature characteristics of the oxygen layer including the BST-based dielectric layer and a reduction in leakage current, which is required for the built-in capacitor layer forming material for a printed wiring board. [Description of the Invention] Yu Yu, the inventors of the present invention, the results of the research, think of the temperature characteristics of the capacitor circuit which can be greatly increased, as a printed circuit board, 1, can reduce the leakage capacitance* of the built-in capacitor layer of the printed circuit board material. Hereinafter, the invention of the present invention will be described. "The circuit layer forming material in the printed circuit board of this case

2213-9175-PF 7 200829099 料：闕於本案發明之印刷線路板之内藏電 其特徵在於·.包括：於上部電極形成μ 成材料， 之間包括層構造，該介電# 2 下部電極形成層 必"电層以2種層構成。 徵係在於：不含鐘之無鐘氧化物介電層及人：：電層之特 介電層之複層構造氧化物介電層。s 3 ’孟之乳化物 線路板之内藏電容層形成 層’係以η層（2“）之第 該第1泠八+ β 人電層係含有鐘 次介電層> 曰之一部分以不含2213-9175-PF 7 200829099 Materials: The built-in electricity of the printed wiring board of the invention is characterized in that: the film is formed on the upper electrode, and a layer structure is included, and the lower electrode is formed by the dielectric # 2 The layer must be composed of two layers. The system consists of a multi-layer oxide dielectric layer that does not contain a bell-free oxide dielectric layer and a human:: dielectric layer. s 3 'Meng's emulsion circuit board built-in capacitor layer forming layer' is the η layer (2") of the first 1⁄8 + β human electric layer containing the clock dielectric layer > Excluded

然後，關於本案發明之印刷 材料之上述含有鐘之氧化物介電 1次介電層〜第n次介電層構成， 之介電層，第2次介電層〜第η 錳者為佳。 容層形成材 1Onm〜500nm 、，關於本案發明之印刷線路板之内藏電 料，上述含有盘之氧化物介電層， & ^ /、4度以 ，、、、丨^丨荆+系發明之印刷線路板之向廿 材料之上述介電層，其厚度以2 a臧電容層形成 丄μ m為 又’關於本案發明之印刷線路板之土。 料之上述下部電極形成層，“容層形成材 T ’又丄U[〜1 八 鎳合金層為佳。 ϋ K m之鎳層或 再者，關於本案發明之印刷線路 材料之上述上部電極形成層，以厚度反二内藏電容層形成 層、鋼層、鎳合金層、銅合金層之任—或从m〜50/ζπι之鎳 層積構造者為佳。 ‘ ^謗等之組合之 奉茶發明之印刷線路板之 材料之上述介電層，以樹脂含浸者為佳 藏電容層形成Further, in the above-mentioned printing material of the invention, it is preferable that the dielectric layer of the first dielectric layer to the nth dielectric layer is composed of a dielectric layer of the clock, and the second dielectric layer to the η manganese are preferable. The capacitance layer forming material is 1 nm to 500 nm, and the built-in electric material of the printed wiring board of the present invention, the oxide dielectric layer containing the disk, & ^ /, 4 degrees, , , , 丨^丨荆+ The above-mentioned dielectric layer of the ytterbium material of the printed wiring board of the invention has a thickness of 2 μ臧 of the capacitor layer to form 丄μm as the soil of the printed wiring board of the invention. The lower electrode forming layer is formed, and the "capacitor forming material T' is further preferably a U [~1 octa nickel alloy layer. The nickel layer of ϋ K m or the above upper electrode formation of the printed wiring material of the present invention. The layer is preferably formed by a thickness of the second built-in capacitor layer, a steel layer, a nickel alloy layer, or a copper alloy layer, or a nickel layered structure of m~50/ζπι. The above dielectric layer of the material of the printed circuit board of the invention of the invention is formed by the resin impregnation layer

2213-9175-PF 8 200829099 關於本案發明之印刷線路 ^ f ^ ^ ^.^ y ^ ^ 内臧電谷層形成材料 之版k方去·於關於本案發明之 1則綠路板之内藏雷塞屛 形成材料之製造方法，於介電 臧-奋層 气MM g _、t 电層之形成使用物理蒸鍍法、 乳相化子反應法、溶膠—凝膠法之任 關於本案發明之印刷魂政 之制、…… 内藏電容層形成材料 仏 ，/、寺被在於：於下部電極形成層上使用物理 蒸鑛法、氣相化學反應法、溶膠-凝膠法之任-形成不含 猛之無猛氧化物介電層，藉由於該無鐘氧化物介電声上使 用物理蒸鑛法、氣相化學反應法、溶膠-凝膠法之:一护 成含核之氧化物介電層作成複層構造氧化物介電層，^ 該複層構造氧化物介電層上形成上部電極形成層。 又，在於製造包括樹脂含浸介電層之印刷線路板之内 藏電容層形成材料時’採用於下部電極形成層之上使用物 理蒸鍵法、氣相化學反應法、溶膠_凝膠法之任_形成不 含鐘之無猛氧化物介電層，於該錢氧化物介電層上使用 物理蒸鍍法、氣相化學反應法、溶膠_凝膠法之任一形成 含有鏟之氧化物介電層’於該無鐘氧化物介電層或含有錳 之氧化物介電層之至少一方的層含浸樹脂作成樹脂含浸 介電層，於該複層構造氧化物介電層之上形成上部電極形 成層為特徵之印刷線路板之内藏電容層形成材之製造方 法為佳。 。後，在於製造包括樹脂含浸介電層之印刷線路板之 内藏電容層形成材料之製造方法，上述樹脂含浸處理，於 介電層表面塗佈樹脂清漆使之含浸，使樹脂乾燥，使樹脂 2213-9175-PF 9 200829099 硬化為佳。 又，關於本案發明之印刷線路板之内藏電容 、衣4方法，上述複層構造氧化介電層以溶膠__凝膠形 成者，而經以下步驟a~步驟f之各步驟製出為佳。々〉 步驟a·調製形成未煅燒無錳介電層及不含錳之士八 電層之第1溶膠-凝膠溶液。 1 溶液步驟Μ調製形成含有猛之次介電層之第2溶踢-凝膠 步驟c·於下部電極形成層之表面塗佈帛2213-9175-PF 8 200829099 About the printed circuit of the invention of the present invention ^ f ^ ^ ^.^ y ^ ^ The version of the inner layer of the gas layer forming material is going to be in the green road plate of the invention of the present invention. The manufacturing method of the plug forming material, the physical vapor deposition method, the milk phase reaction reaction method, the sol-gel method, and the printing of the invention of the present invention are used in the formation of the dielectric layer MM g _, t electric layer The system of the soul of the government, ... the built-in capacitor layer forming material 仏, /, the temple is: on the lower electrode forming layer using physical distillation method, gas phase chemical reaction method, sol-gel method - formation without The ruthless oxide dielectric layer is formed by the physical vaporization method, the gas phase chemical reaction method and the sol-gel method on the electroless sound of the bell-free oxide: a protective dielectric layer containing a nucleus A multilayer structure oxide dielectric layer is formed, and an upper electrode formation layer is formed on the multilayer structure oxide dielectric layer. Further, in the case of manufacturing a built-in capacitor layer forming material of a printed wiring board including a resin impregnated dielectric layer, 'the physical vapor bonding method, the gas phase chemical reaction method, or the sol-gel method are employed on the lower electrode forming layer. Forming a dielectric layer that does not contain a clock, and using a physical vapor deposition method, a gas phase chemical reaction method, or a sol-gel method on the money oxide dielectric layer to form an oxide containing a shovel The electric layer is formed by impregnating a dielectric layer of the oxide-free dielectric layer or at least one of the oxide-containing dielectric layers of the oxide layer to form a resin-impregnated dielectric layer, and forming an upper electrode on the multi-layered oxide dielectric layer It is preferable to manufacture a built-in capacitor layer forming material of a printed wiring board characterized by a layer. . Thereafter, in the method of manufacturing a built-in capacitor layer forming material for a printed wiring board including a resin impregnated dielectric layer, the resin is impregnated, and a resin varnish is applied to the surface of the dielectric layer to impregnate the resin to dry the resin to make the resin 2213 -9175-PF 9 200829099 Hardening is preferred. Further, in the method of the built-in capacitor and the clothing 4 of the printed wiring board according to the invention of the present invention, the multi-layer structure oxide dielectric layer is formed by a sol__gel, and is preferably produced by the following steps a to f. . 々〉 Step a·Preparation to form an uncalcined manganese-free dielectric layer and a first sol-gel solution containing no manganese. 1 The solution step Μ modulates to form a second melt-gel which contains a sub-dielectric layer. Step c· Coating the surface of the lower electrode-forming layer

溶液後，#夕弘@ #丄i A 氧之氣氛中熱分解形成未 瓜燒之無巍介電層。 V驟d.進仃一次於上述未煅燒之無錳介電層之 ，：：佈第2溶膠—凝朦溶液後，使之乾燥，於含有氧： 進行熱分解之-連步驟，形成第1未锻燒次介電層。 脒一二驟e ’之後塗佈第1溶膠-凝膠溶液或第2溶膠-凝 膠溶液之任一德，佔♦私β 於含有氧之氣氛中進行熱分 解之一連步驟作為1單位步 早乂驟，猎由反覆進行該1單位步 驟（1)-人，形成於一部分成 植；人 刀^所有的層含有錳之第2未鍛 、_人/丨電層〜第η未煅燒次介電層。 乂驟f ·猎由將上述步驟辦制 ^ ^ v 乂驟所製出之未煅燒次介電層煅 70 ’進行形成具有不含錳之盔 …、短乳化物介電層，及含有錳 之鐘含有氧化物介電層之 锻_。 旻層構造氧化物介電層之最終 然後，使用溶膠-凝膠嶮、六…丄 >心液形成上述複層構造氧化物After the solution, #夕弘@#丄i A is thermally decomposed in an oxygen atmosphere to form a flawless dielectric layer that is not burnt. V. Step d. once in the above-mentioned uncalcined manganese-free dielectric layer:: cloth second sol-gel solution, and then dried, in the oxygen-containing: thermal decomposition-connection step, forming the first Unburned sub-dielectric layer. After the first step, the first sol-gel solution or the second sol-gel solution is coated with any one of the first sol-gel solution or the second sol-gel solution, and the thermal decomposition of the private β in the atmosphere containing oxygen is performed as a unit of 1 step. Step: Hunting is carried out by repeating the 1 unit step (1) - person, formed in a part of the plant; human knife ^ all layers containing manganese 2nd unwrought, _ human / 丨 electric layer ~ η uncalcined sub Electrical layer. Step f · Hunting is performed by forming the uncalcined sub-dielectric layer 70' produced by the above steps to form a helmet having no manganese, a short emulsion dielectric layer, and containing manganese The clock contains a forged _ of an oxide dielectric layer. The final layer of the oxide dielectric layer is formed. Then, the stratified layer oxide is formed using sol-gel 崄, 丄... 丄

2213^9175-PF 10 200829099 介電層時，於上述步驟d及步驟e 理任意設以550^001預備锻燒處理亦^早位步驟之處 再者，上述第2溶膠_凝膠溶液，以 〇 一〜之物構造之氧 = 溶液為佳。 电联之形成 二：本案發明之印刷線路板:使用上述 之印刷線路板之内藏電溶層形成材料製出 1月 電容層之印刷線路 成有内滅 0 . 具静電特性之溫度特性優良， 且，漏電流變小，而成高品質者。2213^9175-PF 10 200829099 In the case of the dielectric layer, the above step d and the step e are arbitrarily set to 550^001, the preliminary calcination treatment is also the early step, and the second sol-gel solution is The oxygen of the structure of the first one is preferably the solution. The formation of the electric connection: the printed circuit board of the invention of the present invention: the printed circuit of the capacitor layer is formed in January using the built-in electro-soluble layer forming material of the above-mentioned printed wiring board to have internal extinguishing 0. Excellent temperature characteristics with electrostatic characteristics Moreover, the leakage current becomes small and becomes a high quality person.

[發明效果;I 料，ΓΓ括本血案發明之印刷線路板之内藏電容層形成材 1二』氧化物介電層/含有錳之氧化物介電#之 複層構Μ化物介電層者1由 判 於形成印化線路板之内藏電容雷政 7【成材枓使用 形成材料製出之電容電該電容層 内藏電形成電11特性平衡非常佳的 濃度依存性小，且使漏電流小之效果並存之點而^度的 料之印:^ 電層/含有缝之氧化：介電：介電層输氧化物介 造方法，惟特別是，岸用在曰之複層構造，可使用任何製 電膜為佳。 應用在以溶膠-凝膠法形成黯系介 2213-9175-pf 11 200829099 【貫施方式】 以下，說明關於本案發明之 形成材料之形態，其製造方法之形能及勺板之内藏電容層 印刷線路板之各形態，表示實施例I比2内藏電容層之 刷線路板之内藏電容声乂列。以下，將印 科」。 冤谷層形成材 關於本案發明之電容層形成 明之雷& g / 才料之形態··關於太查名又 乃之電谷層形成材料，以於 ㈣本案發 成層之間包括介電層之層構造為基本^成層與下部電極形 本案發明之電容層形成材料：：：圖1 ’例示關於 層2之層構迕之干立^ 之層構k中，可瞭解該介電[Effects of the invention; I material, including the built-in capacitor layer forming material of the printed circuit board of the present invention, the oxide dielectric layer / the oxide layer containing the manganese oxide dielectric layer # 1 The built-in capacitor that is judged to form the printed circuit board Lei Zheng 7 [The material is made of a capacitor made of a material. The built-in capacitor of the capacitor layer forms electricity. 11 The characteristic balance is very good, and the leakage current is small. The effect of the small effect coexisting and the printing of the material: ^ Electrical layer / containing slit oxidation: Dielectric: Dielectric layer oxide method, but in particular, the shore is used in the layered structure of the crucible, can be used Any electric film is preferred. The sol-gel method is used to form a lanthanide solution 2213-9175-pf 11 200829099. [Configuration method] Hereinafter, the form of the forming material of the present invention, the shape of the manufacturing method, and the built-in capacitance layer of the scoop plate will be described. Each form of the printed wiring board indicates the built-in condenser acoustic chord of the brush circuit board of the built-in capacitor layer of the embodiment I. Below, will be printed." The formation of the layer of the glutinous layer on the formation of the capacitor layer of the present invention is the form of the ray and the g/material of the material. The material of the electric layer is formed by the name of the electric layer, and the dielectric layer is included between the layers of the present invention. The layer is constructed as a basic layer and a lower electrode. The capacitor layer forming material of the present invention is:: FIG. 1 exemplifies the layer structure of the layer structure of the layer 2, and the dielectric can be understood.

η J面圖。由該圖1可知，盆㈣W 層構成之㉝…形成層6之間之介電層由2 二構成之點。该介電層2之特 介電層3及含有鐘之氧化物介電 無猛乳化物 電層。 电層4之稷層構造氧化物介 ::，說明關於稱為氧化物介電層之用語。在此所稱 虱化物；|電層，係指具有作 。句1下為介電體之功能之BaTi〇3、η J surface diagram. As can be seen from Fig. 1, the basin (four) W layer is formed by 33...the dielectric layer between the layers 6 is formed of two. The dielectric layer 3 of the dielectric layer 2 and the dielectric layer containing the oxide of the bell are not emulsified. The layer structure oxide layer of the electric layer 4 is described with respect to a term called an oxide dielectric layer. As referred to herein as a telluride; an electrical layer means having a work. In sentence 1, BaTi〇3, which is the function of the dielectric body,

BaSrTi〇3 ^ PbZrTi〇3 , PbLaTiOs · PbLaZrOs ^ 1T1O3 Si'BhTajO9等之鈣鈦礦構造之氧化物所構成 之層。 、、氧化物"電層中含有錳，則錳於氧化物介電層中， 、要以猛氧化物之形態存在之可能性高。然後，猛，可認 為存在於氧化物介電層之結晶粒界及粒内。如此之錳，係 於加工電今層形成材料所製出之電容電路之性能之中，貢A layer composed of an oxide of a perovskite structure such as BaSrTi〇3 ^ PbZrTi〇3 , PbLaTiOs · PbLaZrOs ^ 1T1O3 Si'BhTajO9. , oxide, "electric layer contains manganese, then manganese in the oxide dielectric layer, the possibility of existence in the form of mascot oxide is high. Then, it is considered to be present in the grain boundary and the grain of the oxide dielectric layer. Such manganese is among the properties of the capacitor circuit fabricated by processing the current layer forming material.

2213-9175-PF 12 200829099 獻於減低漏電 仍碼低漏電流之機構，1祕马如下。 介電層產生漏電流之路徑，已經由氧化物介電膜之紐曰粒 界及晶格缺陷之可能性高。於是，可認為是藉由 界電膜之結晶粒界及粒内含錳，阻斷漏電流之流路。2213-9175-PF 12 200829099 Dedicated to the mechanism of reducing leakage current still low leakage current, 1 secret horse is as follows. The path of the dielectric layer to generate a leakage current is highly likely to be caused by the grain boundary of the oxide dielectric film and the lattice defects. Therefore, it can be considered that the flow path of the leakage current is blocked by the grain boundary of the boundary film and the manganese contained in the grain.

又，鐘對氧化物介電層之添加，貢獻於溫度特性之提 升。其機構，雖並不明確，惟認為如下。氧化物介_& 製造時受到高溫負荷藉由盆的添加阻礙結晶粒成長，使 化物介電層之結晶晶粒變小’難以顯示鐵電特性，而變的 顯不常介電性特性。又，認為可能是㈣析於結晶粒界部 份，於顯不鐵電特性之周圍不包括鐵電特性之鐘構成殼地 配置而成採取類似核—殼構造。 但是’於氧化物介電層的全部均勾地含有猛，則有使 介電常數大幅降低之ϊ。m 1 牛低之傾向。因此，於所關情形之介電声， 即使溫度特係良好’有多數無法滿足所要求之容量密度曰之 it形因此’要求更薄且大面積的界電層，而由於如此之 2越嚴生產性會降低而並不適於量產。對此，於氧化物 =完全不含輯’因溫度變化之介電常數變化大，即 “ 好的"電特性，於面溫並不顯示良好的介 有無法得到安定的溫度特性之傾向。在此，單以 溫度特性的是電容電路之平均容量密度會對應溫 =匕而變化之特性。例如’用於作為多伴隨發熱之電腦 合P刷線路板之電容電路時，由於作為電容元件之品質 曰广皿度而變化，而作為電容電路之品質並不一定。因 此’電路設計亦伴隨困難。Moreover, the addition of the clock to the oxide dielectric layer contributes to an increase in temperature characteristics. Although its organization is not clear, it is considered as follows. In the case of the oxide, the high temperature load is prevented by the addition of the pot, and the growth of the crystal grains is inhibited, and the crystal grains of the dielectric layer are made small. It is difficult to exhibit ferroelectric characteristics, and the dielectric properties are not uniform. Further, it is considered that (4) it is deposited in the boundary portion of the crystal grain, and a bell-shell structure is formed which does not include ferroelectric characteristics around the ferroelectric property, and adopts a similar core-shell structure. However, when all of the oxide dielectric layers are contained, the dielectric constant is greatly reduced. m 1 The tendency of cattle low. Therefore, in the case of the dielectric sound of the situation, even if the temperature is particularly good, 'there is a majority that cannot satisfy the required capacity density, so it requires a thinner and large-area boundary layer, and because of the stricter 2 Productivity will be reduced and not suitable for mass production. On the other hand, in the case of oxide = completely absent, the dielectric constant changes due to temperature change, that is, "good" electrical characteristics tend not to show good temperature characteristics when the surface temperature does not show good. Here, the temperature characteristic is that the average capacity density of the capacitor circuit changes according to the temperature = 。. For example, when used as a capacitor circuit of a computer with a P-brush circuit board with a large amount of heat, it is used as a capacitor element. The quality varies with the degree of the dish, and the quality of the capacitor circuit is not necessarily the same. Therefore, the circuit design is also accompanied by difficulties.

2213-9175-PF 13 200829099 '此，於介電層内設一定厚度之不含鐘之無猛氧化物 (以下’單稱為「無猛氧化物介電層」〇,藉由使 之係與含有錳之氧化物介電層 是增構造乳化物介電 曰，k低上述漏電流，且提升溫度特性。 ^然後，上述含有猛之氧化物介電層，以以㈣^之2213-9175-PF 13 200829099 'This is a thickness-free oxide containing no oxide in the dielectric layer (hereinafter referred to as "no sulphur oxide dielectric layer" 〇, by making it The dielectric layer containing manganese is a dielectric enthalpy of the build-up emulsion, k lowers the above leakage current, and raises the temperature characteristics. ^ Then, the above-mentioned dielectric layer containing a violent oxide is used to (4)

…介電層〜第η次介電層構成亦佳。構成該含有鐘之 乳化物介電層4之複數層分別稱為「次介電層」，將各欠 介電層稱為第i次介電層〜第η次介電層。該次介電声， =在可使料為電容電路之介電層之階段，將其剖:以 拎描式電子顯微鏡等觀察確認。再者，第i次介電層〜第η :介電層’係表示由下部電極側依序計數之位置次：電層 次介電 成0 後二可使第1次介電層為含有錳之層，之後的第2 層〜第η二欠介電層之一部分或全部以不含猛之層構 • 考慮作為電容電路使用時之要求品質、使用環境等， 事宜變更層設計即可。於圖2(a)〜圖2(c)，於圖i所示以 外之關於本案發明之電容層形成材料之層構造之—部能 樣，以可明確看到介電層2之層構造地示意例示。於該3圖^ 將構成含有錳之氧化物介電層4之次介電層，分別記載為 含有錳之介電層m、不含有錳之次介電層n。再者在用於 沉明之所有的圖面，層的厚度並非相對地反映現實之製品 之厚度者。 1扣 以上所述含有锰之氧化物介電層，係使電容密度之温 2213-9175-PF 14 200829099 度依存性小，且，得到使漏電流小之效果所需者。然後， 其厚度以l〇nra〜50〇nffl為佳。含有錳之氧化物介電層之厚 度未滿ΙΟπηι’則難以使電容密度的溫度依存性小。^一: 面，含有猛之氧化物介電層之厚度超過5〇〇nm，則不僅明 顯地溫度特性並不會有其以上的提升效果，難以 容量密度。 ^ 然後，關於本案發明之電容層形成材料之上述介電 層’其厚度以20，1”為佳。介電層之厚度，越薄電容 量越高。但是’該介電層之厚度未滿2〇nm，則即使設含有 錳之氧化物介電層’將失去抑制漏電流之效果，而耐電壓 特性變差而會在早期發生絕緣崩潰而無法長壽命化。另一 方面’由維持高電容量之觀點以_程度之厚度為上限。 由上述含有錳之氧化物介電層之厚度與介電層之厚 度之關係’自然可以導出無猛氧化物介電層之厚度。該無 =氧化物介電層之作用，係為發揮高介電常數之介電層所 而者’、、丨後°亥無鐘氧化物介電層，存在於下部電極之直 上為佳。 在此，敘述關於含於該介電層之錳量。作為介電層全 體，錳含置以0.01111〇1%〜5.00111〇1%之範圍為佳。該錳量未 滿時’_氧化物介電層之結晶粒界之偏析並不 充分，無法得到良好的露電流阻斷效果及良好的耐電壓特 性。另一方面，該錳量超過5〇〇m〇1%時，該錳對氧化物介 電層之結晶粒界之偏析變的過剩，則介電層脆而失去韌 1·生以蝕刻法加工上部電極形狀等時產生因蝕刻液淋浴等The dielectric layer to the nth dielectric layer are also preferably formed. The plurality of layers constituting the electrolyte dielectric layer 4 containing the bell are referred to as "sub-dielectric layers", and each of the under-dielectric layers is referred to as an i-th dielectric layer to an n-th dielectric layer. The dielectric sound, = at the stage of making the dielectric layer of the capacitor circuit, is cut and confirmed by a scanning electron microscope. Furthermore, the i-th dielectric layer to the nth:dielectric layer' means the position counted sequentially by the lower electrode side: the electric layer dielectric is 0, and the second dielectric layer is made of manganese. One or all of the layers from the second layer to the second nd dielectric layer are not required to be layered. • Consider the required quality and environment for use as a capacitor circuit. 2(a) to 2(c), the layer structure of the layer structure of the capacitor layer forming material of the present invention other than that shown in Fig. i is used to clearly see the layer structure of the dielectric layer 2 Schematic illustration. The second dielectric layer constituting the oxide dielectric layer 4 containing manganese is described as a dielectric layer m containing manganese and a sub-dielectric layer n containing no manganese. Furthermore, in all the drawings used for Shen Ming, the thickness of the layer does not relatively reflect the thickness of the actual product. 1 Buckle The dielectric layer containing manganese is used to make the temperature of the capacitor density 2213-9175-PF 14 200829099 degree dependent, and the effect of minimizing the leakage current is obtained. Then, the thickness thereof is preferably l〇nra~50〇nffl. When the thickness of the dielectric layer containing manganese is less than ΙΟπηι', it is difficult to make the temperature dependence of the capacitance density small. ^1: When the thickness of the dielectric layer containing the oxide oxide exceeds 5 〇〇 nm, not only the apparent temperature characteristics will not have the above-mentioned improvement effect, but also the capacity density. Then, the above dielectric layer of the capacitor layer forming material of the present invention has a thickness of 20, 1 Å. The thickness of the dielectric layer is thinner and the capacitance is higher. However, the thickness of the dielectric layer is not full. At 2 〇 nm, even if the dielectric layer containing manganese is provided, the effect of suppressing leakage current is lost, and the withstand voltage characteristic is deteriorated, and insulation breakdown occurs at an early stage, and the life cannot be extended. The viewpoint of the capacitance is the upper limit of the thickness of the _ degree. The relationship between the thickness of the dielectric layer containing manganese and the thickness of the dielectric layer can naturally lead to the thickness of the dielectric layer without the oxide oxide. The function of the dielectric layer is to form a dielectric layer having a high dielectric constant, and it is preferable that the dielectric layer is present on the lower electrode. The amount of manganese contained in the dielectric layer. As a whole dielectric layer, the manganese content is preferably in the range of 0.01111 〇 1% to 5.00111 〇 1%. When the amount of manganese is not full, the crystalline particles of the oxide dielectric layer The segregation of the boundary is not sufficient, and it is impossible to get a good current blocking. On the other hand, when the amount of manganese exceeds 5 〇〇 m 〇 1%, the segregation of the manganese grain to the crystal grain boundary of the oxide dielectric layer becomes excessive, and the dielectric layer is brittle and loses. Toughness 1 · When the upper electrode shape is processed by etching, etc.

2213-9175-PF 15 200829099 發生介電層破壞等之不適，結果 斷效果及良好的耐電壓牿 ψ 良好的漏電流阻 ^ 土何/王。因此，# ^ 包含猛之氧化物介電膜組合， 採用以上述範圍 更小而達成長壽命化。再者，二：耐電壓特性，使漏電流 0. 25mol%-3. 00mol%A ^ /於忒氧化介電層之錳量以 物介電層之品質。再者，VA更確實地確保含有鐘之氧化 表示氧化物介電材料時，使'明所逑鐘之含量，係以Αβ〇3 lOOmol%時之錳之含有即以表示成刀與Β成分的總量為 其次’關於本案發明之電 、 及形成層，使用厚度為_之上述下部電 佳。該等鎳層或錄合 / m之鎳層或鎳合金層為 ⑴可作為金屬心=:下i1)〜⑷之優點。 成氧化物介電層。 以泊狀悲，於其表面形 (2) 採用進行溶膠—、 a 電層之形成法時之嚴^ 之兩溫負荷之氧化物介 良。 嚴軋的熱履歷耐氧化性、抗軟化特性優 (3) 糟由變^卜箱^ 密著性。 "、a至組合，可控制與氧化物介電層之 (4 )藉由使之為俾 ^ 部電極形狀時 卑/屬層’可使错由触刻法，形成下 易I成細微的電容電路。 在此所述鎳屏# ^ θ戍鎳合金層，係指主要使用金屬箔。因 所鎳4係以所謂純度99wtG/G(其他，不可避免之雜 二以上的純鎳箱形成之層。然後，所謂錄合金，係例如 臬河D至形成之層。在此所述鎳-磷合金之磷含量為2213-9175-PF 15 200829099 Discomfort caused by dielectric layer damage, etc., result of good breaking effect and good withstand voltage 牿 Good leakage current resistance ^He/Wang. Therefore, #^ contains a combination of the oxide dielectric film, and the use of the above range is smaller to achieve a longer life. Further, the second: the withstand voltage characteristic, the leakage current is 0. 25mol% - 3. 00mol% A ^ / the amount of manganese in the tantalum oxide dielectric layer is the quality of the dielectric layer. In addition, VA more surely ensures that when the oxidation of the bell is used to indicate the oxide dielectric material, the content of the manganese is obtained by expressing the content of manganese in the case of Αβ〇3 100 mol%. The total amount is the same as the above-mentioned lower electric power with the thickness of _ regarding the electric power and the forming layer of the invention of the present invention. The nickel layer or the nickel layer or the nickel alloy layer of the recording/m is (1) can be used as the metal core =: the advantages of the following i1) to (4). Formed as an oxide dielectric layer. It is sorrowful in sorrow, and its surface shape (2) is treated with an oxide of two temperatures at the time of the formation of the sol- and a-electrode layers. The hot history of the rolled steel is excellent in oxidation resistance and softening resistance. (3) The badness is changed by the box. ", a to combination, can control and the dielectric layer of the oxide (4) by making it the shape of the electrode of the 俾^ / 属 layer can make the wrong by the tactile method, forming the next easy I into a subtle Capacitor circuit. The nickel screen #^ θ 戍 nickel alloy layer as used herein refers to the main use of metal foil. Because nickel 4 is a layer formed of a so-called purity of 99wtG/G (other, unavoidable, more than two pure nickel tanks. Then, the so-called alloy, such as the Weihe D to the formed layer. Here nickel - The phosphorus content of the phosphorus alloy is

2213-9175-PF 16 200829099 〇.iwu〜llwt%為佳。録_鱗合金之鱗成分，於電容層形成 —;斗之製k及通常的印刷線路板之製造製程有高溫負 订貝J擴放到氧化物介電層之内部，惡化與該氧化物介電 層之搶著性，認為對介電常數亦會造成變化。但是，包括 適當的麟含量的鎳-磷合金層，提升作為電容元件之電氣 特性。_含量未滿Glwt%未滿時，與使用純錄時不變者， 而失去合金化之意義。對此，碟含量超過，則偏析 於與氧化物介電層之介面而使密著性惡化，使之容易剝 離口此，％含！，以〇. lwt〜llwt%之範圍為佳。然後， 為更佳確保鎳-碟合金舆氧化物介電層之安定的密著性， 只要磷含量為〇H3wt%之範圍，則即使在製造步驟有 :定Γ散亦可得到衫的密著性。再者，於氧化物介電 ;:仵^: :ST糸介電層而言，則以磷含量°. 25，wt% :確保取k的密著性，且同時可確保良好的介電常數。再 者’於本案發明之磷含量，係以[p成分 量]xioo(wu)換算之值。 」/[1成为重 本案發明所述鎳箔及鎳合金箔， 法等所得之全部。然後，以包含於金屬==及電解 該等鎳或鎳合金層之複合，者之概念 曰包括 成金屬基材之材料，亦可使用於銅落為構 金層之複合材料。 匕括鎳層或鎳合 如此之組合之金屬基材，即使經過用生… 基板、液晶聚合物等作為基板材料Ή 氟樹脂2213-9175-PF 16 200829099 〇.iwu~llwt% is better. Recording the scale component of the scale alloy, formed in the capacitor layer - the manufacturing process of the machine and the usual printed circuit board have a high temperature negative electrode J to be expanded into the oxide dielectric layer, deteriorated and the oxide The temptation of the electric layer is believed to cause changes in the dielectric constant. However, a nickel-phosphorus alloy layer including an appropriate lin content enhances the electrical characteristics of the capacitor element. _ content is less than Glwt% is not full, and the use of pure recording time is unchanged, and the meaning of alloying is lost. On the other hand, when the content of the disk exceeds, the interface with the oxide dielectric layer is segregated to deteriorate the adhesion, so that it is easily peeled off, and the content is contained in %! The range of 〇. lwt~llwt% is preferred. Then, in order to better ensure the stability of the stability of the nickel-disc alloy bismuth oxide dielectric layer, as long as the phosphorus content is in the range of 〇H3wt%, even in the manufacturing step: the adhesion of the shirt can be obtained. Sex. Furthermore, in the case of an oxide dielectric;: 仵^: :ST糸 dielectric layer, the phosphorus content is 25.25 wt%: ensuring the adhesion of k while ensuring a good dielectric constant . Further, the phosphorus content of the invention in the present invention is a value converted by [p component amount] xioo (wu). "/[1" is the total of the nickel foil and nickel alloy foil described in the present invention. Then, the concept of inclusion of metal == and electrolysis of such nickel or nickel alloy layers, including the material of the metal substrate, can also be used for the composite of copper as a gold layer. A metal substrate comprising a combination of nickel or nickel, even if a substrate, a liquid crystal polymer or the like is used as a substrate material, fluororesin

〜40(TC之高溫加工製程幾乎沒有.強度惡化。=板之3〇〇 C 〜 。結果，即使於~40 (TC high temperature processing process is almost no. Strength deterioration. = 3 of the plate C ~ ~. Results, even in

2213-9175-PF 17 200829099 該金屬箔之矣& 4</ m 物介電居， 膠，膠法等之高溫負荷之氧化 物，丨電層之形成法形成氧 之虱化 有惡化。再者，本案發明所::：，其品質亦幾乎不會 織，以盡可能的… 鎳、'及鎳合金镇之結晶組 而… 粒細微而提升強度者為佳。更呈體 貝]細微化為平均粒經。.5…下之水準/ 械強度高的物性者為佳。 辜，包括機 厚产為上述T部電極形成層之制或錦合金層之2213-9175-PF 17 200829099 The metal foil has a high temperature load of oxides such as 矣&4</m dielectric, and the formation of a ruthenium layer is deteriorated by the formation of oxygen. Furthermore, the invention of the present invention:::, its quality is almost impossible to weave, as much as possible... Nickel, 'and nickel alloy town crystal group and ... grain fine and enhance the strength is better. It is more refined into an average grain. .5...The level of the material / the physical strength of the machine is better.辜, including the machine made of the above-mentioned T-electrode forming layer or the alloy layer

地缺乏作：：二為佳。上述厚度未滿1“，則顯著 并马形成電容電路時土 面形成氧化物介電層。另—方面"°#又，極難於其表 幾乎沒有實用上的f求 之厚度_咖“， 時，使上述下部電極形成層之二電容電路形成材料 由接合介面，=部電極形成層之金屬帛，使用經 载體箔，只要在加工“虫/、有载體 金屬箔為佳。 後的階段去除即可/ 所述之電容層形成材料之 用之鎳箔或鎳合金箔，可 。關於該等之製造方法， 以上所樹脂下部電極形成層 使用以電解法或壓延法所製造者 並無特別限定。 再者’關於本案發明之電 極形成層，可使用厚度05=化成材料之上述上部電 合金層、銅合全声之任："0…鎳層、銅層、鎳 ,τ 、’曰 何。為使於上部電極形成後，蝕刻 加工形成雷宠雷炊士 / W 1文挪刻 4電谷電路％ ’因蝕刻液對 限，一搬上部雷炻形%噌（相铴於取小 糾成層以薄的層形成。上述電極形成層Lack of work: 2 is better. If the thickness is less than 1", the oxide layer is formed on the surface of the earth when the capacitor circuit is formed. Another aspect is that it is extremely difficult for the surface to have a practical thickness. In the case where the second capacitor circuit forming material of the lower electrode forming layer is made of a bonding interface, and the metal electrode of the portion electrode forming layer is used, the carrier foil is used, as long as the "worm/carrier metal foil" is processed. In the step of removing the nickel foil or the nickel alloy foil for the capacitor layer forming material, the resin lower electrode forming layer may be produced by electrolysis or calendering. Further, regarding the electrode forming layer of the invention of the present invention, the upper electrode alloy layer of the thickness 05 = chemical conversion material, and the copper-filled full sound can be used: "0...nickel layer, copper layer, nickel, τ, ' In order to make the upper electrode form, the etching process forms a thunder pet Thunder / W 1 Wen Nor engraved 4 electric valley circuit % 'Because of the etching solution limit, one moves the upper Thunder shape %噌The small correction layer is formed in a thin layer. Forming an electrode layer

2213-9175-PF 18 200829099 未滿〇 · 5 /z m時，偵用/工a也 便用任何製造方法均難 勻性，無法得到對印U # 、確保膜厚之均 于』对卩刷線路板之壓製加工 抵抗力。另一方面，上部電極形成層:之充为的 ㈣加工上部電及電路之時間變長，而二::者，則 損傷有變的顯著之傾向。 蝕刻液對介電層之 然後’關於本案發明之 層，至少；^ J： ΛΚ S >成材料之上述介電 層至/於其一部分含浸樹脂為佳 脂清漆成分，使用以環氧 p树脂含浸之樹 佳。其中，使用對於樹脂成分總:為 量％〜70重量％，嘹r、膝^ ^ 衣氧树脂40重 胺樹脂或氨酯樹脂0」重量％ 重里％，密 重量％〜80重量％伟樣脒你祕 重該環氧樹脂之5 里卿•變性環氧樹脂之樹脂組合物為户 作為在此使用之環氧樹腊，只… 零件之成型用而市隹者,乍為層積板或電子 平口 #，亚無特別限制。具 酚A型環氧樹脂、雙齡F 、 ” ’有雙 m 乳树月旨、盼醛型環4抖肛 鄰甲㈣駿型環氧樹脂、三縮水 以料、 it ^ 'j. ^ /由基異氣酸S旨、N j\f~ - 二本胺等縮水甘油胺化合物、四氫鄰苯二甲酸二： ::由㈣之縮水甘油醋化合物、四填雙齡Α、 、- 化環氧樹脂等。該等環氧樹脂以合： :用為佳。又™之聚合度或環氧當量並無特I: 二雙氰胺、有 機 等之酚類、酚醛樹脂及甲 溴化雙酚 龄紛搭樹脂等之酚醛類、鄰2213-9175-PF 18 200829099 When it is less than 5 / zm, the detection / work a is also difficult to use any manufacturing method, can not get the U #, to ensure the film thickness is the same as the brush line The pressing resistance of the board is processed. On the other hand, the upper electrode forming layer is filled with (4) the time for processing the upper portion of the electric circuit and the circuit becomes longer, and the second:: the damage tends to be significantly changed. The etchant is applied to the dielectric layer and then to the layer of the invention, at least; J J: ΛΚ S > the above dielectric layer of the material to / part of the impregnating resin is a good fat varnish component, using epoxy p resin The impregnated tree is good. Wherein, the total amount of the resin component used is: %% to 70% by weight, 嘹r, knee oxime 40 heavy amine resin or urethane resin 0% by weight, % by weight, and by weight% to 80% by weight You are secretly the resin composition of the 5 resin and denatured epoxy resin for the epoxy resin wax used here as a household, only for the molding of parts, and the market is a laminate or electronic Pingkou #, Asia has no special restrictions. Phenol type A epoxy resin, double age F, "" double m milk tree month, aldehyde type ring 4 shaking anal neighboring armor (four) Chun type epoxy resin, triple shrinkage material, it ^ 'j. ^ / A glycidylamine compound such as N-based acid, N j\f~-diamine, tetrahydrophthalic acid II: :: a glycidyl vinegar compound from (4), a four-filled sorghum, and a Epoxy resin, etc. These epoxy resins are preferably used: :The polymerization degree or epoxy equivalent of TM is not specific I: dicyandiamide, organic phenols, phenolic resin and methyl bromide Phenolics, neighbors, etc.

2213-9175-PF 19 200829099 甲酸酐等之酸酐等。又，硬化劑，可單獨使用〗種，或亦 可混合2種以上使用。環氧樹脂對硬化劑之添加量，可由 各個當量導出。 其他’备照需要亦可適宜添加硬化促進劑。於該硬化 促進劑，可使用3級胺、咪唑系、尿素系硬化促進劑等。 调合於該樹脂組合物之環氧樹脂之調合量，以樹脂成 分總量的40重量％〜7〇重量％為佳。調合量未滿4〇重量％， 則有使電器特性之絕緣性及耐熱性惡化。另一方面，調合 超過70重量％，則硬化中的樹脂流變的過大，容易在介電 層内發生樹脂成分的偏在。 然後，作為環氧樹脂組合物之一部分，使用橡膠變性 裱乳樹脂為佳。該橡膠變性環氧樹脂，只要是作為接著劑 用或塗料用市售之製品則並無特別限制。舉具體例， 則” EPICL0N TSR-960” （商品名，大日本油墨公司 製）、，，EP__ YR-102，，（商品名，東都化成公司 _製）、，，SUMIEP〇XY ESC-500,，（商品名，住友化學公司 製）、’，EP〇MIK VSR 3531”（商品名，三井石油化學公司 製）等。該等橡膠變性環氧樹脂可單獨使用i種，亦可混 合2種以上使用。在此之橡膠變性環氧樹脂之調合量係全 環氧樹脂量的5重量％〜8G重量％。藉由使用橡膠變性環氧 樹脂，促定樹脂成分對BST系介電層内之固定。因此:铉 橡膠變性環氧樹脂之調合量未滿5重量％時，無法得爾 BST系介電層内之固錢進效果。另—方面，該橡膠變性 環氧樹脂之調合量超過80 ，則硬化後的樹脂2213-9175-PF 19 200829099 An acid anhydride such as formic anhydride. Further, the curing agent may be used alone or in combination of two or more. The amount of epoxy resin added to the hardener can be derived from each equivalent. Other hardening accelerators may be added as needed for other preparations. As the hardening accelerator, a tertiary amine, an imidazole-based, a urea-based hardening accelerator or the like can be used. The blending amount of the epoxy resin blended in the resin composition is preferably 40% by weight to 7% by weight based on the total amount of the resin component. When the blending amount is less than 4% by weight, the insulation properties and heat resistance of the electrical properties are deteriorated. On the other hand, when the blending amount is more than 70% by weight, the resin during curing becomes too large, and the resin component tends to be biased in the dielectric layer. Then, as part of the epoxy resin composition, a rubber denatured enamel resin is preferably used. The rubber-modified epoxy resin is not particularly limited as long as it is a commercially available product as an adhesive or a coating. As a specific example, "EPICL0N TSR-960" (trade name, manufactured by Dainippon Ink Co., Ltd.),, EP__ YR-102, (trade name, Dongdu Chemical Co., Ltd.),, SUMIEP〇XY ESC-500, (trade name, manufactured by Sumitomo Chemical Co., Ltd.), ', EP〇MIK VSR 3531' (trade name, manufactured by Mitsui Petrochemical Co., Ltd.), etc. These rubber-modified epoxy resins may be used alone or in combination of two or more. The blending amount of the rubber-denatured epoxy resin used herein is 5% by weight to 8 Gwt% of the total epoxy resin amount, and the fixing of the resin component to the BST-based dielectric layer is determined by using a rubber-modified epoxy resin. Therefore, when the blending amount of the rubber-denatured epoxy resin is less than 5% by weight, the effect of solidifying in the BST-based dielectric layer cannot be obtained. On the other hand, the blending amount of the rubber-denatured epoxy resin exceeds 80. Hardened resin

4 i、、N 2213-9175-PF 20 200829099 性會降低。4 i,, N 2213-9175-PF 20 200829099 Sex will be reduced.

'、、；/ 使用於邊環氧樹脂組合物之聚乙烯醇縮駿樹 知’係猎由聚乙烯醇與醒類的反應合成者。現在，聚乙烯 醇細路樹脂，有各式各樣的聚合度的聚乙烯醇舆1種或2 種以上的酸類之反應物作為塗料用或接著劑用被市隹，於 本案=明駿類或'_化度可無特別限制地使用。又原料聚 烯醇之♦ο度並無特別限定，惟考慮作為硬化後之樹脂 之财熱性或對溶劑之溶解性，則使用由聚合度糊〇〜35〇〇 = '乙烯醇合成之製品為佳。再者有市售之，在於分子内 導幾基等之變性聚乙烯醇縮盤樹脂，只要與組合之環氧 树月曰之相溶性沒有問題，並無特別限制。作為調合於絕緣 層之聚乙烯醇縮路樹脂之調合量樹脂組合物總量之2〇重 量%〜50重量％。該調合量未滿2。重量％，則無法得到改盖 樹脂之流動性之效果。另-方面，該調合量超過5。重量%， 後的絕緣層之吸水率會變高’故作為m系介 電層之構成材即為不佳者。 用於本案發明之樹月旨組合物，加上上述成分，調入作 二：：聚乙婦物樹脂之架橋劑之密胺樹脂或氨醋樹 “、土。作為在此使用之密胺樹脂可使用市售作為塗料用 之知基化密胺樹脂。具體例示，則甲基化密胺樹月旨、正丁 異丁基化密胺樹月旨、及該等之混合烧基化 ⑽ί胺樹脂之分子量或貌基化度並無特別限定。 作為該氨醋樹脂，可使用市售作為接著劑用、塗料用 於分子中含有異氰酸酯基之樹脂。具體例示，則二異氰酸',,; / Polyvinyl hydroxy-terminated tree used in the edge epoxy resin composition knows that the hunter is synthesized by a reaction of polyvinyl alcohol and awakening. At present, a polyvinyl alcohol fine-path resin, a reaction product of one type or two or more types of polyvinyl alcohol having various polymerization degrees is used as a coating material or an adhesive agent, in the present case = Mingjun or '_ Degree of use can be used without any limitation. Further, the degree of the polyoxyl of the raw material is not particularly limited, but considering the heat of the resin after hardening or the solubility to the solvent, the product synthesized by the polymerization degree paste ~35 〇〇 = 'vinyl alcohol is used. good. Further, there is a commercially available denatured polyvinyl alcohol shrinkable disk resin which is a molecular group or the like, and is not particularly limited as long as it has no problem in compatibility with the combined epoxy tree. The blending amount of the polyvinyl alcohol-shrinkable resin blended in the insulating layer is 2% by weight to 50% by weight based on the total amount of the resin composition. The blending amount is less than 2. When the weight is %, the effect of changing the fluidity of the resin cannot be obtained. On the other hand, the blending amount exceeds 5. Since the water absorption ratio of the rear insulating layer becomes high by weight%, it is not preferable as a constituent material of the m-based dielectric layer. The composition of the present invention for use in the present invention, together with the above ingredients, is incorporated into the melamine resin or the vinegar tree of the bridging agent of the polyethylene compound resin, and the soil is used as the melamine resin used herein. A commercially available melamine resin for use as a coating material can be used. Specific examples include a methylated melamine tree, a n-butyl isobutyl melamine tree, and a mixed alkylation (10) ylamine. The molecular weight or the degree of morphogenesis of the resin is not particularly limited. As the vinegar resin, a resin which is commercially available as an adhesive and a coating material for an isocyanate group in a molecule can be used. Specifically, diisocyanate is used.

2213-9175-PF 21 200829099 甲苯酯、二異氰酸二苯甲烷、多亞甲基多苯基多異氰酸酯 等之聚異氰酸酯化合物與三羥甲基丙烷或聚醚多醇、聚酉旨 多醇等多醇類之反應物。該等化合物作為樹脂之反應性 高，有以氣氛中的水分聚合之情形，故於本案發明，為不 發生該不適’使用將該等樹脂以酚類或肟類安定化而稱 為嵌段異氰酸酯之氨酯樹脂為佳。2213-9175-PF 21 200829099 Polyisocyanate compound such as toluene ester, diphenylmethane diisocyanate or polymethylene polyphenyl polyisocyanate, and trimethylolpropane or polyether polyol, polyhydric alcohol, etc. The reactant of a polyol. These compounds have high reactivity as a resin and are polymerized by moisture in an atmosphere. Therefore, in the present invention, in order to prevent the discomfort from occurring, the resins are referred to as blocked isocyanates by using phenols or hydrazines to stabilize the resins. The urethane resin is preferred.

在於本案發明添加於樹脂組合物之密胺樹脂或氨酉旨 樹脂之調合量·，係樹脂組合物總量的〇· 1重量％〜2〇重量 %。該調合量未滿0.1重量％，則聚乙烯醇縮醛樹脂之架= 效果變的不充分，降低介電層之耐熱性，調合超過2〇重 量％，則會使介電層内的固定性惡化。 於該樹脂組合4勿，加上上述必須成&，亦彳按照期望 使用以滑石或氫氧化！呂代表之無機充填劑、消泡劑、平滑 劑、偶合劑等添加劑。該等有改良樹脂成分對介電層之浸 透性，提升難錄，降低成本等效果。使用以上所述樹脂 組合物之含浸之具料法，將於魏之製造方法中詳述 之0 關於本案發明之雪交s 態：關於本宰發明之電！：成材料之製造方法之形 電層㈣广材料之製造方法，係於介 二…勿理蒸鍍法、氣相化學反應法、溶膠-凝 膠法之任何。铁尨 士 w 心妖 …安 有對該介電層進行樹脂含浸之情形。 關於本案發明> φ + 部雷…'層形成材料之製造方法，由在下 y ^鍾之無猛氧化物介電層開始。 2213-9175-pf 22 200829099 關於下部電極形成層，如上所述。於該之無錳氧化物介電 層之形成，使用物理蒸鍍法時，可使用電阻加熱法、電子 線（EB)蒸鍍法、雷射蒸鍍法、分子束磊晶法、2極濺鍍法、 磁控濺鍍法、反應性濺鍍法等。該等物理蒸鍍法，可藉由 任意調節蒸鍍材料之組成，可適宜形成需要的無錳氧化物 介電層。化學氣相反應法，係使蒸發汽化之複數材料於氣 相反應，使其反應物著地於下部電極形成層上而形成無錳 氧化物介電層者，包含所有稱為CVD之手法。然後，關於 溶膠-凝膠法，將於後之說明詳述。 然後，關於形成於該無錳氧化物介電層上之含有錳之 氧化物介電層，亦可使用與上述同樣的物理蒸鍍法、氣相 化學反應法、溶膠-凝膠法之任何。將無錳氧化物介電層 及含有錳之氧化物介電層合起來稱為複層構造氧化介^ 層0The blending amount of the melamine resin or the amidine resin added to the resin composition of the present invention is 〇·1% by weight to 2% by weight based on the total amount of the resin composition. When the blending amount is less than 0.1% by weight, the effect of the polyvinyl acetal resin is insufficient, and the heat resistance of the dielectric layer is lowered. When the blending amount exceeds 2% by weight, the fixing property in the dielectric layer is obtained. deterioration. In the resin combination 4, the above must be combined with &, and talc or hydroxide is used as desired! Lu represents inorganic fillers, defoamers, smoothing agents, coupling agents and other additives. These have the effect of improving the permeability of the resin component to the dielectric layer, improving the difficulty of recording, and reducing the cost. The method of impregnation using the resin composition described above will be described in detail in the manufacturing method of Wei. Regarding the snow s state of the invention of the present invention: the electricity of the invention of the present invention! : The method of manufacturing the material. The electric layer (4) The manufacturing method of the wide material is based on any of the vapor deposition method, the gas phase chemical reaction method, and the sol-gel method. The iron scorpion w demon... The resin is impregnated with the dielectric layer. Regarding the invention of the present invention, the manufacturing method of the layer forming material of φ + ray is started by the immersion-free oxide dielectric layer in the next y ^. 2213-9175-pf 22 200829099 Regarding the lower electrode forming layer, as described above. In the formation of the manganese-free oxide dielectric layer, when the physical vapor deposition method is used, resistance heating, electron beam (EB) evaporation, laser evaporation, molecular beam epitaxy, and 2-pole sputtering can be used. Plating, magnetron sputtering, reactive sputtering, etc. These physical vapor deposition methods can suitably form a desired manganese-free oxide dielectric layer by arbitrarily adjusting the composition of the vapor deposition material. The chemical vapor phase reaction method is a method in which a plurality of materials vaporized and vaporized are reacted in a gas phase to cause a reactant to land on a lower electrode forming layer to form a manganese-free oxide dielectric layer, and all methods called CVD are included. Then, the sol-gel method will be described in detail later. Further, any of the physical vapor deposition method, the gas phase chemical reaction method, and the sol-gel method similar to the above may be used for the manganese-containing oxide dielectric layer formed on the manganese-free oxide dielectric layer. The manganese-free oxide dielectric layer and the manganese-containing oxide dielectric layer are collectively referred to as a multi-layer structure oxide layer.

又，在於製造以上述手法形成之介電層作為樹脂.含浸 介電層之電容層形成材料時’以上述手法作成無猛氧化物 介電層及含有錳之氧化物介電層所構成之複層構造氧化 介電層’於該複層構造氧化介電層含浸樹脂而製造。在 此，由於關於用於樹脂含浸之樹脂組合物已於上敘述，在 由使漏電流 此僅敘述關於使用該樹脂組合物之含浸手法 小之觀點，使樹脂含浸於介電層為佳。 该樹脂組合物，為溶液含诉认人 3迎於介電層内，使用溶劑將 固形分量控制於一定範圍之稀薄赖 —#人 寻树月曰清漆。在此塗佈於介 電層表面之樹脂清漆，係將# 樹脂成·分，使用有機溶劑 2213-9175-PF 23 200829099 溶解，使之成固形分量之樹脂清漆。在此， 固形分量未滿〇.lwt%時黏度過低’有機成分無法殘留於介 :層中’而失去進行樹脂含浸之意義。另一方面，固形分 量超過l.Owt%，則於樹脂含浸步驟有所離散，成塗工過剩 量的樹脂之狀態時，由於黏度過高，於介電層上形成樹脂 膜0使"電層之厚度變大，結果會使電容量密度降低而 不佳。 因此，應使上述樹脂清漆之固形分量為 〇m〇wt%之範圍’確保對介電層内之良好的浸透 性。可用於作為有機溶劑，例如以甲乙嗣舆環戊嗣之任何 -«#1或該等之混合溶劑’溶解者。甲乙嗣與環戊嗣， .可容易地藉由19代程度之加熱有效地揮發去除，且，揮 發氣體之淨化處理亦容易。並且，容易將樹脂溶液之濃度 调即成最適於含浸之黏度。然後’使用甲乙_與環戊酉同之 混合溶劑溶解，由環境的見識上較佳。作成混合溶劑時之 混合比例並無特別限定，使用環戊s同時，考慮揮發 度’以甲乙_料其共存溶劑為佳^是，在此具體 之溶劑以外，只要是可溶解用於本案發明· 分者，均可使用。 . ’扪树月《成 =，㈣樹脂清漆塗佈於介t層之 種方法。但是，樹脂清漆之固形分量，由於叫 = 清漆相比極稀’故採用旋轉塗佈法塗工在可維 的:： 勻性之觀點而佳。 布的均 其次，作為關於本案發明之電容層形成材料層之較佳 2213-9175-PF 24 200829099Further, in the case of manufacturing a dielectric layer formed by the above-described method as a resin, a capacitor layer forming material for impregnating a dielectric layer, a composite layer formed of a non-emerging oxide dielectric layer and a manganese-containing oxide dielectric layer by the above-described method The layer structure oxide dielectric layer 'is fabricated by impregnating the resin with the multilayer structure oxide dielectric layer. Here, since the resin composition for resin impregnation has been described above, it is preferable to impregnate the resin layer with a viewpoint that the leakage current is only small in terms of the impregnation method for using the resin composition. The resin composition is a solution containing a complaint to the person 3 to greet the dielectric layer, and the solvent is used to control the solid component to a certain range. Here, the resin varnish applied to the surface of the dielectric layer is a resin varnish which is dissolved in an organic solvent 2213-9175-PF 23 200829099 to form a solid component. Here, when the solid content is less than .1 wt%, the viscosity is too low 'the organic component cannot remain in the layer' and the meaning of resin impregnation is lost. On the other hand, when the solid content exceeds 1.0% by weight, the resin impregnation step is dispersed, and when the resin is excessively applied, the resin film 0 is formed on the dielectric layer because the viscosity is too high. As the thickness of the layer becomes larger, the capacitance density is lowered as a result. Therefore, the solid content of the above resin varnish should be in the range of 〇m 〇 wt% to ensure good permeability to the dielectric layer. It can be used as an organic solvent, for example, any of -«#1 or a mixed solvent of the methyl ethyl hydrazine. Ethylene acetamidine and cyclopentamidine, can be easily volatilized and removed by heating of the 19th generation, and the purification treatment of the volatile gas is also easy. Further, it is easy to adjust the concentration of the resin solution to the viscosity most suitable for impregnation. Then, it is dissolved by using a mixed solvent of methyl bromide and cyclopentanyl, which is preferable from the viewpoint of the environment. The mixing ratio in the case of preparing a mixed solvent is not particularly limited, and it is preferable to use a cyclopentane s at the same time, and it is preferable to use a co-existing solvent in the case of the ethyl ketone, and it is soluble in the present invention as long as it is soluble in the present invention. Both can be used. . 'Yu Shuyue's method of applying the resin varnish to the t-layer. However, the solid component of the resin varnish is better than the viewpoint of uniformity by the spin coating method because it is extremely rare compared to varnish. Secondly, as a layer of the capacitor layer forming material for the invention of the present invention, 2213-9175-PF 24 200829099

的製造方沐-VManufacturing Fang Mu-V

. 之一例，敘述關於使用熔膠-凝膠法UAn example of the use of the melt-gel method U

糸之上述複層描、生今儿人_ /床形成BST 步驟a〜步驟f之各步驟。 方法依序-明以下 乂驟a·於該步驟，調製形成 八 溶膠-凝膠溶访 3、之认；丨電層之第i "液。以調製所期望的BST系介電膜 —凝膠溶液之情形A 一 、之弟1溶膠 使用市售的㈣：關於該步驟，並無特別的限制， 口们口周製劑，自己調合灼 口西从 期望的BST系八— 要結果可形成所 U ，、；丨甩膜即可。即，所謂BST系介電膜 (Bai-xSrx)Ti〇3rn< 亍、，1 4 膜，係 = χ=1)膜，可得該組合 凝膠溶液即可。在士 "冤馭之洛膠〜 味著將成BaTi〇 , X牯思味者將成Μ'。3，"時意 惟以k <n 任何情形均可發揮本案發明之效果， — x==0.5更佳。再者，在於本案說明書，關The above-mentioned multi-layer drawing, the present-day person _ / bed forming BST steps a to step f. The method is followed by the following steps: a. In this step, the formation of the eight sol-gel solution 3 is recognized; the first " liquid of the tantalum layer. In order to prepare the desired BST-based dielectric film-gel solution A, the brother 1 sol is commercially available (4): There is no particular limitation on this step, and the oral preparation is self-adjusted. From the desired BST system VIII - the result can be formed U, ,; 丨甩 film can be. That is, a BST-based dielectric film (Bai-xSrx) Ti〇3rn < 亍, 14 film, = = 1) film can be obtained, and the combined gel solution can be obtained. In the 士 "冤驭之洛胶~ The taste will become BaTi〇, X牯思味者 will become Μ'. 3,"Immediately, in any case, k <n can exert the effect of the invention of the present invention, - x == 0.5 is better. Furthermore, in the case of this case,

Mn之（Bai Srη / 關於添加 Χ Χ)^(Ο^χ^1)膜亦稱為BST系介電膜。 步驟b:於該步驟，調製形成含有錳之次介電層 為::::溶液。然後’上述第2溶膠—凝膝溶液:使用 物介電^之德^恥叫-^心之舞欽碌構造之氧化 之溶液為佳。係為維持上述介電層中的猛含量在 胜 为範目於该第2溶膠-凝膠溶液之調製，亦並無 口限制，使用市售之含有錳之調製劑，/亦可自己調合。 為、口果例如，可形成所期望的含有錳之BST系介 電膜即可。韻_ 9 、洛膠—凝膠溶液添加錳之方法，以使用錳 化合物之咬、、右 Λ 此5添加既定量使之成上述鐘含量之範圍 為佳。 步 於該步驟，係於下部電極形成層之表面塗佈 2213-9ΐ75-ρρ 25 200829099 第1溶膠一凝膠溶液後，使之乾燥，藉由在含有氧之氣氛 中熱^解形成未锻燒之無鐘介電層。更詳細教述該步驟刀， 則將第1溶膠-凝膠塗佈於構成下部電極形成層之金屬箔 ，表面，經過以含有氧的氣氛中以120T：〜2501的條件乾 燥，以含有氧的氣氛中以27(rc〜39(rc的條件進行熱分= ，-連步驟形成未煅燒無錳介電層。然後，藉由反覆複數 °亥連步驟，進行未煅燒錳介電層之膜厚調整。缺後，以 溶Γ凝膠法錫成介電層時，由於完成所有的層構造而施 以瑕終的锻燒，將該最終锻燒前之無鐘介電 煅燒無鐘介電層」。 ％為未 然後，詳細敘述關於該未煅燒無錳介電層之形成條 件，塗佈於下部電極形成層之表面之第1溶膠-凝膠溶液 之上述乾燥條件採用12(rc〜250t之溫度為佳。再者，於 :：採用3 °秒〜1 °分鐘為佳。脫離在此所述乾燥條 、⑽不充分而於之後的熱分解後的界電膜表面產生 粗糙，或乾燥過剩，則於之後的熱分解反應容易發生 得到部均勾的界電膜之局部性品質離散。進行該乾燥時的 b 线並無特別限制。對此，進行熱分解時，含有氧的氣氛 進订為佳。即，以還元氣氛進行則無法促進有機物之分解。 、再者，關於熱分解，上述乾燥終了，於含有氧的氣氛 =270C〜39(rc：x5M〜3()/M_M__M。 用之熱分解溫度極有特徵。相對於先前的熱分解 ’里又採用45〇°C~55〇°C之溫度範圍’於本案發明，為防止 下部電極層之多餘的氧化採用靴〜戰之低溫域之埶 2213-9175-PF 26 200829099 刀解溫度。在此使熱分解溫度未 度禾滿270 C，則即使持續以 可長時間的加熱亦難以發生良好的熱分解，缺乏生產 性，並且無法得到良好的電容特性。另-方面，介電膜， 係形成於今屬薄等之表面上者，進行超過39代之加熱， 則於介電膜與金屬箔之界面 <鱼屬基材表面之氧化將顯 者地進行。因此，在進行 所 大里生產上考慮步驟之離散與品 貝的t王性’以其以下的溫度之3抓為上限較佳。然後， 7熱時間，係根據㈣之分解溫度與溶膠—凝膠溶液之性 1 大決定者，以採用上述加熱溫度範圍為前提，未滿5分鐘 的加熱無法進行充分的埶 …、解又，加熱溫度即使超過3 0 干’無法期望提升介電膜之口所 ^ ^ ^ ^ ▲ ο 77丨电膘之0口貝，於生產耗費時間而降低 生產性。 …乂此，敘述關於溶膠-凝膠溶液之塗佈。關於將溶膠-疑膠溶液塗佈於全屬％矣 曰 忡於至屬泊表面之手段，並無特別限定。但 疋’考慮膜厚之均句性；^、、交顿 ^ J注及/奋膠-嘁膠溶液之特質等， 用旋轉塗佈法或液面法為佳。 二驟d:於該步驟，係進行—次於上述未炮燒之無鐘 "電層之表面，塗佈第2溶膠—凝膠溶液後，使之乾燥， 於含有氧之氣氛中進行埶分魅 ^ ^ h入 丁…刀解之一連步驟，形成第1未煅 電層。此時的乾燥即熱分解條件，由於舆用於上述 弟1溶膠-凝膠溶液時相同，在此省略說明。 步驟e:然後’將於上述第1未锻燒次介電層上，塗 佈第：溶膠-凝膠溶液或第2溶谬，膠溶液之任一後，使 之乾舞’於含有氧之氣氛中進行熱分解之—連步驟作為1Mn (Bai Srη / about adding Χ Χ) ^ (Ο ^ χ ^ 1) film is also known as BST-based dielectric film. Step b: In this step, the sub-dielectric layer containing manganese is prepared to be:::: solution. Then, the above-mentioned second sol-knee solution: it is preferable to use a solution of the oxidized solution of the material of the body. In order to maintain the above-mentioned content of the dielectric layer in the above-mentioned dielectric layer, the preparation of the second sol-gel solution is not limited, and a commercially available manganese-containing preparation is used, and/or it can be blended by itself. For example, a desired BST-based dielectric film containing manganese may be formed. Rhyme -9, Luojiao-gel solution to add manganese, using the manganese compound bite, right Λ 5 to add a certain amount to make the above bell content range is better. In this step, after coating the surface of the lower electrode forming layer with 2213-9ΐ75-ρρ 25 200829099 first sol-gel solution, it is dried and formed into an uncalcined by thermal decomposition in an atmosphere containing oxygen. There is no bell dielectric layer. When the step knives are described in more detail, the first sol-gel is applied to the metal foil constituting the lower electrode forming layer, and the surface thereof is dried in an atmosphere containing oxygen at 120 T: to 2501 to contain oxygen. In the atmosphere, the uncalcined manganese-free dielectric layer was formed by 27 (rc~39 (rrc conditions). The film thickness of the uncalcined manganese dielectric layer was then carried out by repeating the complex number of steps. After the defect, the tin-forming dielectric layer is formed by the sol-gel method, and the kiln-finished calcination is performed after the final calcination, and the bell-free dielectric layer is calcined before the final calcination. % is not, and the formation conditions of the uncalcined manganese-free dielectric layer are described in detail, and the drying condition of the first sol-gel solution applied to the surface of the lower electrode forming layer is 12 (rc~250t). The temperature is preferably. In addition, it is preferable to use 3 ° sec to 1 ° min. The dry strip, (10) is insufficient, and the surface of the boundary film after thermal decomposition is rough or excessively dried. , after the thermal decomposition reaction is easy to occur The b-line at the time of drying is not particularly limited. In the case of thermal decomposition, the atmosphere containing oxygen is preferably ordered. That is, the decomposition of the organic substance cannot be promoted by the reductive atmosphere. Regarding thermal decomposition, the above drying is completed, and the atmosphere containing oxygen = 270C to 39 (rc: x5M to 3 () / M_M__M. The thermal decomposition temperature is extremely characteristic. In contrast to the previous thermal decomposition, 45 is used. 〇 ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° ° When the temperature is less than 270 C, even if it is heated for a long time, it is difficult to cause good thermal decomposition, lack of productivity, and good capacitance characteristics cannot be obtained. On the other hand, the dielectric film is formed in this thin film. On the surface, if heating is performed for more than 39 generations, the interface between the dielectric film and the metal foil <the oxidation of the surface of the fish substrate will be carried out remarkably. Therefore, the discrete steps are considered in the production of the large-scale production. And goods The t-thenality is preferably the upper limit of the temperature below 3. The 7-heat time is determined according to the decomposition temperature of (4) and the sol-gel solution, and the heating temperature range is Premise, if the heating is less than 5 minutes, it will not be able to perform sufficient enthalpy..., and the heating temperature will exceed 3 0. Dry 'can't expect to raise the mouth of the dielectric film ^ ^ ^ ^ ▲ ο 77 丨 0 0 ,, It takes time to reduce the productivity of the production. Here, the coating of the sol-gel solution is described. Regarding the method of applying the sol-sugar solution to the surface of the genus, it is not It is particularly limited. However, it is preferable to consider the uniformity of the film thickness; ^, the effect of the ^J note and / the glue-gelatin solution, and the spin coating method or the liquid surface method. Second step d: in this step, the surface of the electric layer is not subjected to the above-mentioned unburned, and the second sol-gel solution is applied, dried, and immersed in an atmosphere containing oxygen. Dividing the charm ^ ^ h into the Ding ... knife solution one step to form the first uncalcined layer. The drying, i.e., thermal decomposition conditions at this time are the same as those used in the above-described sol-gel solution, and the description thereof will be omitted. Step e: Then, 'coating the first sol-gel solution or the second solution or the second solution on the first uncalcined dielectric layer, and then drying it to contain oxygen Thermal decomposition in the atmosphere - the steps are taken as 1

2213-9175-PF 27 200829099 單位步驟，蕤ώ $舜、# 立乂、"由反设進行該1單位步驟（η-1)次，形成於 一。Ρ为或所有的層含右 > 緞燒次介電層。即，：:二弟？未锻燒次介電層〜第η未 :塗佈，谷膠-凝膠溶液今乾燥+熱分解2213-9175-PF 27 200829099 Unit step, 蕤ώ $舜, #立乂," The unit step (η-1) is performed by the reverse setting, and is formed in one. Ρ or all layers contain a right > satin burnt dielectric layer. That is:: Second brother? Uncalcined sub-dielectric layer ~ nth not: coating, gluten-gel solution dry today + thermal decomposition

:連續的連步嶋1單位步驟。因此，於該溶膠—凝膠 、b、 ^擇使用上述第1溶膠—凝膠溶液（不含有錳之溶膠 合液）或上述第2溶膠·'凝膠溶液（含有錳之溶膠-凝 膠溶液）之任何，反覆該1單位步驟複數次u-o次，進行 3有錳之”電層之膜厚調整。然後，關於本案發明之氧化 物::電層之形成方法之情形，例如由帛i次的i單位步驟 到第n 1 — 人的1單位步驟之至少1次的1單位步驟使用第 2 >谷膠—凝膠溶液，於其他的i單位步驟使用第i溶膠—凝 膠溶液等，作成將含找之BST系介電膜與不含有猛之 BST系介電膜層狀配置之層構造之含有猛之介電層。此時 之乾知及熱分解條件，由於與用於上述第1溶膠—凝勝溶 液之情形相同，故在此省略說明。 然後，使用溶膠-凝膠法形成上述複層構造氧化物介 電層時，於上述步驟d及步驟e，先於工單位步驟之處理 設任意於550T：〜_。(：之預備炮燒處理為佳。，在於反 覆數次形成未煅燒無錳介電層及第丨未煅燒次介電層〜第 η未煅燒次介電層之丨單位步驟時，於丨單位步驟與j單 位步驟之間任意設預備锻燒處理。例如，考慮反覆進行6 -人1單位步驟％，设1次預備煅燒步驟，則可採用1單位 步驟（第1次）+預備煅燒步驟今i單位步驟（第2次）今i單 位步驟（第3次）今1單位步驟（第4次單位步驟（第5 2213-9175-PF 28 200829099 次）+ ι 燒步驟 6次）之製程等。然後，設2次預備煅 單位步驟（第1次預備煅燒步驟 單位步驟（第 ’則採用1 單位广驟（第2次單位步驟（第3次）—預備锻燒步驟 7單位步驟(第4次…單位步驟⑼㊀次州單位步驟 (第6人)之製程等。再者’於所有工單位步驟間設緞燒步 驟則私用1單位步驟（第i次）+預備锻燒步驟W單位 y驟（第2 一人）《>預備$段燒步驟—工單位步驟（第3次）今預: Continuous steps 嶋 1 unit step. Therefore, the sol-gel, b, and the first sol-gel solution (the sol-free solution containing no manganese) or the second sol-gel solution (the sol-gel solution containing manganese) is used. Any of the steps of repeating the one-unit step uo times, and performing film thickness adjustment of the "electric layer having three manganese". Then, regarding the method of forming the oxide layer of the invention: the method of forming the electric layer, for example, by 帛i times The i unit step is to use the second > glutel-gel solution in one unit step of at least one step of the first unit of the human n 1 - human, and the ith sol-gel solution or the like is used in the other i unit steps. A dielectric layer containing a BST-based dielectric film and a layer structure having no layered configuration of a BST-based dielectric film is formed. The dry and thermal decomposition conditions at this time are used as described above. 1 The sol-gel solution is the same, and therefore the description thereof is omitted here. When the stratified-structure oxide dielectric layer is formed by the sol-gel method, the above steps d and e are preceded by the unit step. The processing setting is arbitrary at 550T: ~_. (: The preparation of the gun is better. When the unit steps of forming the uncalcined manganese-free dielectric layer and the second un-calcined sub-dielectric layer to the n-th uncalcined sub-dielectric layer are repeated, the preparation is performed between the unit step and the j-unit step. For example, in the case of repeating 6-person 1 unit step %, and setting 1 preliminary calcination step, 1 unit step (first time) + preliminary calcination step can be used. i unit step (2nd time) Unit step (3rd time) 1 unit step (4th unit step (5th 2213-9175-PF 28 200829099 times) + ι burning step 6 times) process, etc. Then, set 2 preparative calcination unit steps ( The first preliminary calcination step unit step (the first 'takes 1 unit wide step (the second unit step (the third time) - the preliminary calcination step 7 unit step (the fourth ... unit step (9) one state unit step (the first 6)), etc. In addition, 'the satin burning step between all the work steps is 1 unit step (i-th) and the preliminary calcination step W unit y (2nd person) "> Stage burning step - unit step (3rd time)

備ik k步驟—1單位步驟（第4次Η預備煅燒步驟—i單 4 y驟（第5 -人）今預備煅燒步驟今丨單位步驟（第6次）之 製程。 2後，該預備锻燒處理條件，於反覆複數丨單位步驟， 於1皁位步驟與i單位步驟之間，採用55(rc〜8〇〇t>cx2分 鐘〜6〇分鐘的煅燒條件為佳。該條件，由於大致與以下所 述之步驟e相肖，故於其說明數值之臨界意義等。再者， 進行預備也燒，則存在於至此之未锻燒之介電層將被鍛燒 而成介電層，惟以未進行最終煅燒之意思而付以「未燬 燒」。 以先前的溶膠-凝膠法所得之介電膜之結晶狀態，存 在有細微的結晶粒，於結晶粒内可確認多數孔洞。對此， 藉’由採用預備煅燒步驟，介電膜組織將變成膜密度高、結 晶粒内的構造缺陷少的狀態。結果，可形成漏電流:: 電壓特性優良’高容量的界電層。藉由反覆數次以上所述 於步驟d之1單位步驟，可調整介電層之厚度。 步驟f :於該步驟，係藉由將上述步驟所製出之未煨 2213-9175-PF 29 200829099 燒次介電層煅燒，進行形成罝 層，及含有猛之猛含有.氧化物 /之無猛氧化物介電 電層之最終锻燒。該最終锻捧2之複層構造氧化物介 前提，採用〜咖。父預備锻燒高的溫度為 以5分鐘〜60分鐘之為佳。再者，其锻燒時間 緞燒步驟，經該煅燒，成為、為‘。該煅燒步驟係所謂真 為防止下部電極形成層之氧H介電層。於該锻燒步驟， 或真空中進行加敎為户.二於惰性氣體取代氣氛 難简，無法it;:::未， 的緻密與適度的粒度之結 之二:性優良，包括適當 條件之過度的加熱，則會進：:電：後亞進行超過該溫度 成層之物理強度之惡化，/ S之心化或下部電極形 及長#* ，…、法圖謀電容特性之高電容量 =上完成介電層之形成，則更 電極形成層。該上部電極 电s上°又上口15 金屬1 v成k之形成方法，可採用黏貼 屬…法、以鑛敷法形成導電層 關於本案發明夕以ρί ^ 機銀法#。 於本案發明之電容層：Γ反:f後’藉由使用上述關 特徵在於：包括古I斯；’可仔一種印刷線路板，其 u栝阿叩質的内藏電容層。 關於本案發明之骨 成材料之兩面4=層形成材料，係將於該電容層形 刻法形成電容電路形 二°:電極形成層以餘 材料。又，藉…部= 金，可形成與BSh人 /成屬使用上述之鎳或鎳合 "、’1電層密著性優良的下部電極，由於Prepare ik k step - 1 unit step (4th Η pre-calcination step - i single 4 y step (5th - person) preparation of the calcination step of the current unit step (6th). After 2, the preliminary forging The firing conditions are in the step of repeating the plural unit, and between 55 and the i unit step, 55 (rc~8〇〇t>cx2 minutes to 6 minutes of calcination conditions is preferably used. It is the same as the step e described below, so it explains the critical meaning of the numerical value, etc. Further, if it is prepared and burned, the dielectric layer which has not been calcined so far will be calcined to form a dielectric layer. However, it is "unburned" in the sense that the final calcination is not performed. In the crystalline state of the dielectric film obtained by the previous sol-gel method, fine crystal grains are present, and a large number of pores can be confirmed in the crystal grains. On the other hand, by using the preliminary calcination step, the dielectric film structure becomes a state in which the film density is high and the structural defects in the crystal grains are small. As a result, a leakage current can be formed: a high-capacity boundary layer having excellent voltage characteristics. By repeating the unit step of step d as described above several times The thickness of the dielectric layer can be adjusted. Step f: In this step, the ruthenium layer is formed by calcining the unburned dielectric layer of the unprocessed 2213-9175-PF 29 200829099 prepared in the above step, and contains The fissure contains the final calcination of the oxide/no-oxide dielectric layer. The final forged layer 2 is composed of a layered oxide premise, using a ~ca. The parent prepares the calcined high temperature for 5 minutes. Preferably, the calcination step of the calcination time is performed by the calcination, and the calcination step is a so-called oxygen H dielectric layer which prevents the formation of the lower electrode layer. Step, or adding in a vacuum to the household. Second, the inert gas is difficult to replace the atmosphere, can not be it;::: No, the dense and moderate particle size of the second: excellent, including excessive heating of appropriate conditions, It will enter::Electricity: After the sub-Asia performs the deterioration of the physical strength of the layer beyond the temperature, /S the heart or the lower electrode shape and the length of the #*,..., the high capacitance of the capacitance characteristic = the completed dielectric layer Forming, the electrode is further formed into a layer. The upper electrode is electrically s The formation method of the mouth 15 metal 1 v into k can be formed by the adhesive method... The conductive layer is formed by the mineral deposit method. The invention is based on the invention of the invention. The capacitor layer of the invention is: Γ 反: after f' By using the above-mentioned characteristics, it is characterized in that it includes an ancient Is; a kind of printed circuit board, which has a built-in capacitor layer of a enamel. Regarding the two sides of the bone-forming material of the invention of the present invention, the layer forming material is The capacitor layer forming method forms a capacitor circuit shape: the electrode forming layer is made of the remaining material. Further, by using the part = gold, it can be formed with the BSH person/generic using the above-mentioned nickel or nickel combination, "1" Lower electrode with excellent adhesion, due to

2213-9175-PF 30 200829099 該下部電極係耐熱性優良的素材，故及使經過複數次3〇〇 =〜400°C之範圍之熱壓製加工，並不會發生氧化惡化，不 谷易發生物性變化。使用該關於本案發明知電容層形成材 料製造包括内藏電容電路之印刷線路板之製造方法，並無 特別限定，可採用任何方法。 [實施例]2213-9175-PF 30 200829099 The lower electrode is a material with excellent heat resistance, and therefore, it is subjected to hot pressing processing in the range of 3 〇〇 = 400 ° C for a plurality of times, and oxidation deterioration does not occur, and physical properties are not likely to occur. Variety. The method for producing a printed wiring board including a built-in capacitor circuit using the capacitor layer forming material of the present invention is not particularly limited, and any method can be employed. [Examples]

於實施例’係於基材金屬(下部電極形成層)之鎳羯表 面，形成上述BST系介電層，於該BST系介電層之表面設 上部電極形成層而製造電容層形成層。錢，使用該電容 層形成材料以蝕刻法形成電容電路，進行漏電流 估。 T 口丁 基材金屬（下部電極形成層）之製造：在此，使 延法製造5 0 // m厚之德$ 卢| 广 ^ 声#「 在者以壓延法製造之錄落之厚 度係以錶厚度表示者。該鋅箔 時夕白構成成為電容層形成材料 %之下部電極形成層。 < 丁十 介電層之形成··於該鎳箔 成介電層。以#暖t 表面使用溶膠-凝膠法形 9 '合骖—嘁膠法形成介電層之前之錄$从也 前處理，進行25Gtxl5分 二二作為 ^鐘鳴等，邊以靴—卜線之照射 衣又购口口名BST薄膜形成In the embodiment, the BST dielectric layer was formed on the nickel ruthenium surface of the base metal (lower electrode formation layer), and the upper electrode formation layer was formed on the surface of the BST dielectric layer to produce a capacitor layer formation layer. Money, using the capacitor layer forming material to form a capacitor circuit by etching, and performing leakage current estimation. Manufacture of the T-butt base metal (lower electrode forming layer): Here, the manufacturing process of the 50 Å thick thickness of the $ $ 卢 卢 卢 卢 卢 卢 卢 卢 卢 广 广 广 广 广 广 广 广 广 广 广 广 「 「 「 「 「 「 「 「 「 「 「 「 The thickness of the zinc foil is constitutively formed as a lower electrode forming layer of the capacitor layer forming material. < Formation of a dielectric layer on the nickel foil. The dielectric layer is formed on the nickel foil. - Gel method 9 'Combined 骖 嘁 嘁 嘁 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成BST film formation

Ba"Sn.3TlG3之組成之氧化物。m心BST’製作 於步驟b，調至第2溶膠_凝膠溶液。在此，使用三菱An oxide of Ba"Sn.3TlG3. The m core BST' is produced in step b and adjusted to the second sol-gel solution. Here, use Mitsubishi

2213~9175-PF 31 2008290992213~9175-PF 31 200829099

材料株式會社製之商品名B 上a 、 丄/專膜形成劑7wt%BST，盥换 式會社高純度化學研究 ^ rTTT,9 , +0/ 〇 子研九所製之Μη-03(氧化鐘 (III )2·8wt%〜3·2wt%，扒 Μ、丄 η ▲即油44wt%〜46wt%，醋酸丁酷 22wt%〜24wt%，酸酸 r 和 7 " 以乙酉曰7wt%〜8wt%，有機物系安 1 0 w t %〜11 w t %，A你为；疮▲田龄+丨λ ”他黏度5周整劑），調製對鋇、勰與鈦之濟 _數，含有0.86„〇1%錳之第2溶膠—凝膠溶液。然後^ 製作（H)(TllMnfl.m)Q3之組成之氧化物介電膜。Product name B manufactured by Materials Co., Ltd. a, 丄/film forming agent 7wt% BST, high purity chemical research by 盥 式 会 ^ ^ rTTT,9 , +0/ 〇 研 研 制 -03 -03 ( ( ( ( (III) 2·8wt%~3·2wt%, 扒Μ, 丄η ▲ ie oil 44wt%~46wt%, acetic acid butyl cool 22wt%~24wt%, acid acid r and 7 " acetonitrile 7wt%~8wt %, organic system An 10 wt% ~ 11 wt%, A you are; sore ▲ Tianling + 丨 λ "he viscosity 5 weeks of the whole agent), modulation of 钡, 勰 and titanium _ number, containing 0.86 〇 The second sol-gel solution of 1% manganese. Then, an oxide dielectric film of the composition of (H) (TllMnfl.m) Q3 was produced.

於乂驟。將於上述鎳薄的表面以旋轉塗佈法塗佈第 1溶膠-凝膠溶液，施以在含有氧的氣氛中以i5(rcx2分鐘 的條件乾燥’於含有氧的氣氛…3(rcxl5分鐘的條件 進㈣分解之-連步驟，於該階段以65(rexl5分鐘m 性氣體取代氣氛進行預備煅燒處理。於 層係以約之厚度完錢燒者。 ^於步驟d，於上述無錳介電層之表面，塗佈包含錳之 第2溶膠-凝膠溶液，藉由在含有氧的氣氛中以15〇。〇以 分鐘的條件乾燥，於含有氧的氣氛中以33(rc χΐ5分鐘的 條件進行熱分解之一連步驟（1單位步驟）形成第丨未煅燒 久介電層。 步驟e ··然後，對於上述第丨未煅燒次介電層上，再 度反覆1單位步驟形成第2未燉燒次介電層，以7〇〇。〇 χΐ 5 分鐘的惰性氣體取代（氮取代氣氛，以下相同）進行預備煅 燒處理。 之後，反覆3次上述1單位步驟，形成第3未烺燒次 介電層〜第6未煅燒次介電層。此時，由於在第2未煅燒 2213-9175-PF 32 200829099 次介電層與第3未緞燒次介電層之間進行了預備煅燒，故 以穿透式電子顯微鏡觀察最終製品之電容·層形成材料之 剖面，則可觀察到介電層具有無錳氧化物介電層/含有錳 之氧化物介電層之構造，該含有錳之氧化物介電層以2層 第1次介電層與第2次介電層構成。該第j次介電層，係 上述第1未煅燒次介電層及第2次未锻燒次介電層受到預 備煅燒而一體化形成之層。然後，第2次介電層，係上述 第3未辦X & — 人；|電層〜第6未锻燒次介電層受到預備煅燒 而-體化形成之層。將其情形於圖3之實施例之攔以示意 剖面圖表示。 步驟f:'然後，以750txl5分鐘的惰性氣體取代氣氛 (乳取代氣氛)進行煅燒處理，形成於構成下部電極形成層 之壓延鎳箔表面包括鈣鈦礦構造之BST系介電層。 、然後’於該BST系介電層全體進行樹脂含浸，進行有 含浸樹脂之BST系介電層。此時 士士 才才木用方疋轉塗佈法將樹脂In the end. The first sol-gel solution was applied by spin coating on the surface of the above-mentioned nickel, and it was dried in an atmosphere containing oxygen at i5 (rx2 minutes under conditions of 2 minutes in an atmosphere containing oxygen... 3 (rcxl 5 minutes) Conditionally enter (4) decomposition-continuous step, at this stage, pre-calcination treatment is carried out at 65 (rexl5 minute m-type gas substitution atmosphere. The layer system is finished at about the thickness of the layer. ^ In step d, the above-mentioned manganese-free dielectric On the surface of the layer, a second sol-gel solution containing manganese was applied, dried in an atmosphere containing oxygen at 15 Torr, and dried in an atmosphere containing oxygen at 33 (rc χΐ 5 minutes). One step of thermal decomposition (1 unit step) is performed to form a second uncalcined dielectric layer. Step e · Then, for the above-mentioned second uncalcined sub-dielectric layer, a second unit step is formed again to form a second uncooked portion. The sub-dielectric layer is subjected to a preliminary calcination treatment by replacing the inert gas with a 〇χΐ5 minute (nitrogen-substituted atmosphere, the same applies hereinafter). Thereafter, the above-mentioned one-unit step is repeated three times to form a third unburned sub-dielectric. Layer ~ 6th uncalcined sub-dielectric layer. Since the preliminary calcination was carried out between the second uncalcined 2213-9175-PF 32 200829099 sub-dielectric layer and the third unsatin sub-dielectric layer, the capacitance/layer forming material of the final product was observed by a transmission electron microscope. In the cross section, it can be observed that the dielectric layer has a manganese-free oxide dielectric layer/manganese-containing oxide dielectric layer, and the manganese-containing oxide dielectric layer has two layers of the first dielectric layer and the first The dielectric layer of the second-order dielectric layer is a layer in which the first un-calcined sub-dielectric layer and the second un-fired sub-dielectric layer are integrally formed by preliminary calcination. Then, the second layer The sub-dielectric layer is a layer formed by the above-mentioned third unprocessed X &human; the electrical layer to the sixth uncalcined sub-dielectric layer is subjected to preliminary calcination and is formed into a body. The block is represented by a schematic cross-section. Step f: 'Then, the calcination treatment is carried out by replacing the atmosphere (milk-substituted atmosphere) with an inert gas of 750 tx for 5 minutes, and the surface of the rolled nickel foil formed on the lower electrode-forming layer includes BST of a perovskite structure. a dielectric layer. Then, the resin is impregnated into the entire dielectric layer of the BST system. The BST-based dielectric layer is impregnated with resin. At this time, the gentleman is only using the square-turn coating method to resin.

清漆塗佈於BST系介電®之矣； 亍&quot;冤層之表面，於室溫放置3〇分鐘， 於150C的烘箱内加熱5分鐘， 里青除一疋$的溶劑，乾燁 成半硬化狀態。之後，於丨qn。 /、 於19〇C的烘箱内加熱30分鐘使之 硬化。此時所得之BST系介電芦 曰之厚度為約30Onm。 此時使用之樹脂清漆，係 ,, m ’、 下调智者。以沒有橡膠# 性之裱氧樹脂（商品名：Ep〇 &quot; 舌曰如 w ， dU1，二井石油化學製）4〇 重置部、橡膠變性環氧榭r f 表 東都仆忐劊、9ίΐ壬 日（商°口名：EPOTOHTOYR-102， 果都化成製）20重量部、乎 denkabutyral#5〇o〇a，電氣化風1脂（商品名： 電乳化學工業製）30重量部、密胺 2213 - 9175-PF1 33 200829099 树月曰（商品名：U-VAN 20SB、三井東壓化學公司製）作為固 形分10重量部、潛在 性環氧樹脂硬化劑（雙氰胺、試藥）2重量部（以固形分 2 5重蓋/之二甲基甲醯胺溶液添加）、硬化促進劑（商品 名CUREZOL 2E4MZ ’四國化成製）〇· 5重量部，溶解於甲 乙酮作成固形分量〇· 22wt%之樹脂清漆者。 〈上部電極之形成〉 *如以上，於形成各試料之BST系介電層（包含有樹脂 3 /又之清形）之上，僅於形成上述上部電極之部位將2 #爪 ff之銅製之上部電極電路’直接以滅鍍法形成，形成上 部電極面積為尺寸之1〇個電容電路。 〈介電特性之評估〉The varnish is applied to the surface of BST-based dielectric®; 亍&quot;The surface of the layer is placed at room temperature for 3 minutes, heated in an oven at 150C for 5 minutes, and the solvent is dried in a semi-hardened atmosphere. status. After that, Yu 丨qn. /, and hardened in an oven at 19 ° C for 30 minutes. The thickness of the BST-based dielectric reed obtained at this time was about 30 nm. Resin varnish used at this time, system, m ’, lower wise man. No rubber #性裱 裱 树脂 resin (trade name: Ep〇&quot; tongue 曰 such as w, dU1, manufactured by Mitsui Petrochemical Co., Ltd.) 4〇Reset, rubber denatured epoxy 榭rf (Business name: EPOTOHTOYR-102, fruit is made into a system) 20 parts, denkabutyral #5〇o〇a, electrified wind 1 fat (trade name: electric milk chemical industry) 30 parts, melamine 2213 - 9175-PF1 33 200829099 Shuyue 曰 (trade name: U-VAN 20SB, manufactured by Mitsui Toatsu Chemical Co., Ltd.) as a solid component of 10 parts by weight, and a potential epoxy resin hardener (dicyandiamide, reagent) 2 parts ( It is added in a solid form of 2 5 caps / dimethylformamide solution), a hardening accelerator (trade name: CUREZOL 2E4MZ 'Four Countries Chemicals Co., Ltd.), 5 parts by weight, dissolved in methyl ethyl ketone to form a solid component 〇 22 wt% Resin varnish. <Formation of Upper Electrode> As described above, on the BST-based dielectric layer (including the resin 3/clear shape) in which each sample is formed, the copper of 2 # claw ff is made only at the portion where the upper electrode is formed. The upper electrode circuit 'is formed directly by the de-plating method, and one capacitor circuit having an area of the upper electrode is formed. <Evaluation of Dielectric Properties>

主溫度特性：以信號頻率1MHz，試料k無樹脂含浸之 ，&quot;⑽〜阶之溫度範圍）之容量密度之變化率 之1〇广，試料1之有樹脂含浸之情形(-55。。〜i 〇。。。 變化率，係以2:二Γ 4: 3%〜4. 4%。再者，該 容旦文、 才之谷里密度作為基準，{[於25。。之 …度Η於xt之容量密度]}/[於阶之容 咖异出之值。再者，於溫度特性之測 ：： 製之阻抗分析儀4194A。 吏用心、k，么司 mi 介電層沒有含之、之樹脂可判斷，對BST系 進行含浸樹脂者，漏電形對比，則有 電極良率:於電容電路形成後’對各試料的,。個電Main temperature characteristics: The signal density is 1MHz, the sample k is not impregnated with resin, and the rate of change of the capacity density of the temperature range of (10) is 1 〇, and the sample 1 has the resin impregnation (-55. i 〇... The rate of change is 2:2:4: 3%~4. 4%. Furthermore, the density in the Rongdan and the Valley of the Talents is used as the benchmark, {[25.... The capacity density of xt]}/[The value of the tolerance of the order. In addition, the measurement of the temperature characteristics:: impedance analyzer 4194A. 吏 intention, k, omasi mi dielectric layer does not contain The resin can be judged. If the BST system is impregnated with resin, the leakage shape is compared with the electrode yield: after the capacitor circuit is formed, 'for each sample,

2213-9175-PF 34 200829099 容電路，負載既定的電壓，看不到上部電極與下部電極之 間的短路現象之比例。結果，lmmxlmm尺寸之電容器電路 之生產良率於沒有含浸樹脂之情形及有含浸樹脂之情形 均為100%。 士電谷里崔度·使上部電極之電極面積為工_χ 1咖尺寸 寸之谷里岔度，於沒有含浸樹脂之情形顯示⑽2， 有含浸樹脂之情形顯示1 096nF/cm2之高電容量。 士 I電損失·，則定上部電極之電極面積為1 mmx 1 mm尺寸 才之電奋電路之介電損&amp;，則沒有含浸樹脂之情形為 6(14· 6%)，有含浸樹脂之情形為0. 016(1. 6%)。 乂上所树脂各特性，可與後述之比較例對比的方式一 併記载於圖3之表。 [比較例] ;^比車乂例，知用與實施例〗同樣的製造流程，惟 為溶膠-凝膠溶液，僅使用第i溶膠_凝 1早位步驟，作最終锻燒。 &quot; 之壓二第1溶膠，膠溶液，塗佈在用於實施例1 的條件、面’以在含有氧的氣氛中以15(rcx2分鐘 進行熱=之於Γ氧的氣氛中&quot;&quot;33rcx15分鐘的條件 次 BD 連步驟作為1單位步驟。然後，於進行i 氣氛進“65(rcx15分鐘的惰性氣體取代 。⑽分鐘的==，其次反覆2次1單位步驟後以650 後，進一 + [ c體取代氣氛進行預備緞燒處理，然 ,反覆3次该1單位步驟進行膜厚調整。2213-9175-PF 34 200829099 The capacitor circuit is loaded with a predetermined voltage and the ratio of the short circuit between the upper electrode and the lower electrode is not seen. As a result, the production yield of the capacitor circuit of the size of lmmxlmm was 100% in the case of no impregnated resin and in the case of impregnated resin. In the electric power valley, Cui Du, the electrode area of the upper electrode is the χ χ 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖. If the electrode area of the upper electrode is 1 mm x 1 mm, the dielectric loss of the electric circuit is 1 (14·6%), and there is a case where the resin is impregnated. 0。 016 (1. 6%). The characteristics of the resin on the crucible can be described in the table of Fig. 3 together with the comparative examples described later. [Comparative Example]; ^ For the same example, the same manufacturing procedure as in the Example, except for the sol-gel solution, only the first sol-condensation 1 early step was used for the final calcination. &quot; The second sol, the gum solution, was applied to the conditions used in Example 1, and the surface was used in an atmosphere containing oxygen at 15 (rcx2 minutes heat = in an oxygen atmosphere)&quot;&quot ; 33rcx 15 minutes conditional BD step with 1 step. Then, in the i atmosphere into "65 (rcx 15 minutes of inert gas replacement. (10) minutes ==, followed by 2 times 1 unit step after 650, into one + [The c-body replaces the atmosphere and performs the satin-sintering treatment. However, the film thickness adjustment is performed in the one-unit step three times.

2213-9175-PF 35 200829099 p然、後’以7GG°Cx15分鐘的惰性氣體取代氣氛（氮取代 乳汛進行最終煅燒處理，形成不含有錳之BST系介電層。 、—f者’與實施例1同樣地，於該比較試料1之介電層 進仃樹月曰含浸，進行含浸樹脂之BST系介電層之調製。2213-9175-PF 35 200829099 p, then 'replace the atmosphere with an inert gas of 7GG ° Cx for 15 minutes (the nitrogen is substituted for the final enthalpy to form a BST-based dielectric layer containing no manganese. ) In the same manner as in Example 1, the dielectric layer of the comparative sample 1 was impregnated into the eucalyptus, and the BST-based dielectric layer impregnated with the resin was prepared.

/八/下以與貝施例1同樣地，對形成為各試料之BST 糸&quot;電層上，稭由賤鍍法，形成上部電極面積為工匪工匪 尺寸之10個電容電路。 ^ 〈介電特性之評估〉 溫度特性：以與實施例i同樣地，求容量密度之變化 问。結果，比較用試料沒有含浸之情形—55oc〜1250c之範 圍之容量密度之變化率為_35.8%~丨1。 電机由圖3所5己載之表之樹脂可判斷，對系 介電層沒有含浸樹脂時，與有含浸樹脂之情形對比，則有 進仃含浸樹脂者，漏電流相對較少。 電極良率··於電容電路形成後，以與實施例】同樣地， •看不到上部電極與下部電極之間的短路現象之比例。結 t ’ Wi尺寸之電容器電路之生產良率於沒有含浸樹 脂之情形及有含浸樹脂之情形均為i00%。 士電容量密度：使上部電極之電極面積Μ_χ1關尺寸 時之容量密度，於沒有冬、、萬K ^ 頁3，又树脂之情形顯示1247nF/cm2， 有含浸樹脂之情形顯示U2〇nF/cm2之高電容量。 介電損失：測定上部電極之電極面積為1_1_尺寸 時之電容電路之介電損失，則没有含浸樹脂之情形為 〇_〇29(2身有含浸樹脂之情形為〇.〇21(2 1%)。 2213-9175-PF 36 200829099 樹脂各特性，可與 ^丄 併記載於圖3之表 〈實施例與比較例之對比〉 &amp;溫度特性：如上所述容量密度的變化率’較比較例的 欠化率中田度，無論有無樹脂含浸，實施例之變化率小，可 知：度依存性小。因此，使用關於本案發明知技術思想之 入.Λ介電層之電容電路’即使周圍的温度氣氛變化，對 &quot;電特性造成之影響小。將該溫度特性之變化以圖表示於 …圖4係表示實施例(表示有樹脂含浸與沒有樹脂含 二之丄種）與比較例（沒有樹脂含浸者）之升溫降溫曲線， 了知貝施例與比較例有顯著的變化率差異。 漏$流.圖1所記載之表之數值可判斷，對挪系介 電層沒有含浸樹脂時，與有含浸樹脂之情形對比，則有進 仃含浸樹月旨者，漏電流有相對變的較少之傾向。該傾向， 於比較例亦相同，可知樹脂含浸對漏電流之抑制有效。 電極良率：包括關於本案發明之财系介電層之電容 產良率’於實_之情形，於沒有含浸樹脂之情 形及有含浸樹脂之情形均為職而極為良好1此，比較 列亦於沒有含浸樹脂之情形 1ΠΠ〇/ , ^ S 脂之情形均為 例^良率並無差異。可認為是由於實施例舆比較 例，均設有預備煅燒而使生產良率安定化。 容量密度··由圖3所記載之砉夕叙杜7 ㉟之表之數值可判斷，關於上 心極之電極面積為i瞧尺寸時之初期容量密度，實 知例與比較例可判斷為大致相等。 2213-9175-PF 37 200829099 /八綜合以上，包括使用關於本案發明之技術思想之BST 層之電容元件’雖容量密度與比較例相等，考慮漏 平：非：Γ溫度特性等之其他特性則較比較例佳，而為 千衡非常良好的製品。 [産業上的可利性] 關於本案發明之電容層形成材料，適於印刷 =電容層之形成，可形成高電容量、良好的溫性、 =電流之高品質的電容電路。以，使用該電容層形 成材料製出之包括内藏雷究 料夕箭Α ㈣電奋電路之印刷線路板等，因溫度 又 “各電路之電氣特性之變化少，可-g + 艾1匕乂，可更女定地使用電 子及毛乳製品。又，藉自採用關 材料之製造方法，可开m社 μ月之電谷層形成 、、…▲ 成良率佳、溫度特性優良、可抑制 漏電/瓜之南品質的介電層， 电9 了女夂供給南品質的介電層形 成材枓。又，關於本案 ^ 法，俜盔項a 士沾’、又之電各層形成材料之製造方 虎係無肩過大的設備投資者。 【圖式簡單說明】 圖1係說明關於本案發明之電容層形成材料之介電岸 之基本的層構造之剖面示意圖。 丨材狀”電層 圖2(a)〜(c)係表示關於本案發 之介電層之層構造之變化之剖面示意圖。 成材抖 圖3係包含使用關 括m系介電層之電容二之技術性思想形成之包 性之一覽表。…成材料之剖面示意圖之介電特In the same manner as in the case of the first embodiment, on the BST 糸&quot; electric layer formed as a sample, the straw was formed by a bismuth plating method to form 10 capacitor circuits having an upper electrode area of a working size. ^ "Evaluation of Dielectric Characteristics" Temperature Characteristics: The change in capacity density was determined in the same manner as in Example i. As a result, the comparative sample was not impregnated - the change rate of the capacity density in the range of 55 oc to 1250 c was _35.8% to 丨1. The motor can be judged by the resin of the table shown in Fig. 3, and when the dielectric layer is not impregnated with the resin, compared with the case of the impregnated resin, there is a relatively small leakage current when the resin is impregnated. Electrode yield rate After the capacitor circuit was formed, in the same manner as in the example, the ratio of the short-circuit phenomenon between the upper electrode and the lower electrode was not observed. The production yield of the capacitor circuit of the junction t' Wi size is i00% in the case of no impregnated resin and in the case of impregnated resin. Density of the electric capacity: The capacity density of the electrode area of the upper electrode is Μ_χ1, and there is no winter, 10,000 K ^ page 3, and the resin is 1247 nF/cm 2 , and the impregnated resin shows U2 〇 nF/cm 2 High capacitance. Dielectric loss: When measuring the dielectric loss of the capacitor circuit when the electrode area of the upper electrode is 1_1_size, the case of impregnating the resin is 〇_〇29 (2 cases with impregnated resin are 〇.〇21 (2 1 %). 2213-9175-PF 36 200829099 The properties of the resin can be compared with those shown in Figure 3 <Comparative Example vs. Comparative Example> &amp; Temperature characteristics: The rate of change of capacity density as described above is compared In the case of the under-reduction rate, the degree of change in the embodiment is small, and the degree of change in the embodiment is small. Therefore, the capacitance circuit of the dielectric layer of the invention is used even if it is surrounded by the technical idea of the present invention. The change in the temperature of the atmosphere has little effect on the electrical characteristics. The change in the temperature characteristic is shown in the figure. Fig. 4 shows an example (indicating that there is resin impregnation and no resin containing two species) and a comparative example ( The temperature rise and fall curve of the resin impregnated) has a significant difference in the rate of change between the example and the comparative example. Leakage flow. The value of the table shown in Fig. 1 can be judged when there is no impregnating resin for the dielectric layer. With impregnated trees In contrast, in the case of the impregnation tree, the leakage current tends to be relatively small. This tendency is also the same in the comparative example, and it is known that resin impregnation is effective for suppressing leakage current. In the case of the invention, the capacitance yield of the dielectric layer of the invention is 'in the case of _, and it is extremely good in the case of no impregnating resin and impregnated resin. The comparison is also in the case of no impregnating resin. In the case of 1 ΠΠ〇 / , ^ S fat, there is no difference in the yield. It can be considered that the comparative examples are provided with preliminary calcination to stabilize the production yield. Capacity density·· It is judged that the initial capacity density when the electrode area of the upper core is i瞧 size can be judged to be substantially equal. 2213-9175-PF 37 200829099 /8 or more, including the capacitive element of the BST layer using the technical idea of the invention of the present invention, although the capacity density is equal to that of the comparative example, considering the leakage: other characteristics such as the temperature characteristic of the 则 are better than the comparative example, and It is a very good product for the company. [Industrial profitability] The capacitor layer forming material of the present invention is suitable for printing = formation of a capacitor layer, and can form high capacitance, good temperature, and high quality of current. The capacitor circuit is formed by using the capacitor layer forming material to include a built-in ray ray arrow Α (4) a printed circuit board of the electric circuit, etc., because of the temperature, "the electrical characteristics of each circuit are less changed, and -g + Ai 1匕乂, you can use electronic and wool products more and more. In addition, by using the manufacturing method of the material, you can open the electricity valley layer of the m company for a month, ... ▲ good yield, temperature characteristics A dielectric layer that is excellent in suppressing leakage/melon quality, and a dielectric layer that is supplied to the south. In addition, regarding the case of the case, the 俜 项 项 a a 沾 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing the basic layer structure of a dielectric bank of a capacitor layer forming material of the present invention. Fig. 2(a) to (c) show a schematic cross-sectional view of the change in the layer structure of the dielectric layer produced in the present invention. Fig. 3 includes the use of a capacitor that covers the dielectric layer of the m-type dielectric layer. A list of the nature of the formation of the technical ideas of the second.

2213-9175-PF 38 200829099 圖4係表示實施例與比較例之各溫度特性（溫度-變化 率）之圖。 【主要元件符號說明】 1〜電容層形成材料 2〜介電層 3〜無錳氧化物介電層 4〜有錳氧化物介電層 5〜上部電極形成層 6〜下部電極形成層2213-9175-PF 38 200829099 Fig. 4 is a graph showing the temperature characteristics (temperature-change rate) of the examples and comparative examples. [Description of main component symbols] 1 to capacitor layer forming material 2 to dielectric layer 3 to manganese oxide-free dielectric layer 4 to manganese oxide dielectric layer 5 to upper electrode forming layer 6 to lower electrode forming layer

2213-9175-PF 392213-9175-PF 39

Claims (1)

200829099 十、申請專利範圍： 於上部電 ϊ ·種印刷線路板之内藏電路層形成材料 極形成層與下部電極形成層之間包括介電層者 其特徵在於： 〃上述介電層係不含鐘之無短氧化物介電層及含有鐘 之虱化物介電層之複層構造氧化物介電層。 、 2·如申請專利範圍第！項所述的印刷線路板之内200829099 X. Patent application scope: In the upper electric circuit, the built-in circuit layer forming material of the printed circuit board includes a dielectric layer between the electrode forming layer and the lower electrode forming layer, and the dielectric layer is not included. A short-oxide-free dielectric layer of a bell and a multi-layered oxide dielectric layer containing a telluride dielectric layer of a bell. 2) If you apply for a patent scope! Within the printed circuit board 路層形成材料，其中上述含有猛之氧化物介電層係以以 Ω)之弟1次介電層〜第η次介電層構成，該第卜欠入 電層係含有猛之介電層，第2次介電層〜第η次介電層： 一部分以不含錳者。 3·如申請專利範圍第1項所述的印刷線路板之内藏電 路層形成材料，其中上述含有錳之氧化物介電層，其厚度 為 1Onm〜500nm 〇 4·如申請專利範圍第1項所述的印刷線路板之内藏電 _ 路層形成材料，其中上述介電層，其厚度為20nm〜1 μ m。 5·如申請專利範圍第1項所述的印刷線路板之内藏電 路層形成材料，其中上述下部電極形成層，係厚度 1从m〜100/z m之鎳層或鎳合金層。 6.如申請專利範圍第1項所述的印刷線路板之内藏電 路層形成材料，其中上述上部電極形成層，係包括厚度 0·5μιη〜50μιη之鎳層、銅層、鎳合金層、銅合金層之任一’ 或以該等之組合之層積構造者。 7 ·如申請專利範圍第1項所述的印刷線路板之内藏電 2213-9175-PF 40 200829099 路a形成材料，其中上述介電層，係含浸樹脂之樹脂含浸 介電層者。 種卩刷線路板之内藏電容層形成材料之製造方 法，係於上部電極形成層與下部電極形成層之間包括介電 層電容層形成材料之製造方法， 其特徵在於： 、一於下部電極形成層上使用物理蒸鍍法、氣相化學反應 •法办骖’邊膠法之任-形成不含錳之無錳氧化物介電層； 於該無錳氧化物介電層上使用物理蒸鍍法、氣相化學 反應：、洛膠-凝膠法之任一形成含有錳之氧化物介電層 作成複層構造氧化物介電層；及 於該複層構造氧化物介電層上形成上部電極形成層。 9· 一種印刷線路板之内藏電容層形成材料之擊造方 法’係於上部電極形成層與下部電極形成層之間包括介電 層之電谷層形成材料之製造方法， g 其特徵在於： 、、於下部電極形成層上使用物理蒸鑛法、氣相化學反應 法、膠-’旋膠法之任一形成不含錳之無錳氧化物介電層‘： 於該無鐘氧化物介電層上使用物理蒸鑛法、氣相化曰興 反隸、溶谬-凝勝法之任—形成含找之氧化物介電= 作成複層構造氧化物介電層； 於該無猛氧化物介電層或含有鐘之氧化物介電層之 至）一方的層含浸樹脂作成樹脂含浸介電層；及 於該複層構造氧化物介電層上形成上部電極形成層。 2213-9175-PF 41 200829099 1〇_如申請專利範圍第9項所述的電容層形成材料之 製2方法，其中上述樹脂含浸處理，於介電層表面塗佈樹 脂清漆使之含浸，使樹脂乾燥，使樹脂硬化者。 11·如申請專利範圍第8項所述的印刷線路板之内藏 電容層形成材料之製造方法，其中上述複層構造氧化介電 層係以溶膠—凝膠形成者，而經以下步驟a〜步驟f之各步a layer forming material, wherein the dielectric layer containing the oxide layer is formed by a dielectric layer to an nth dielectric layer of Ω), and the dielectric layer contains a dielectric layer. The second dielectric layer to the nth dielectric layer: a part of which does not contain manganese. 3. The built-in circuit layer forming material of the printed wiring board according to claim 1, wherein the manganese-containing oxide dielectric layer has a thickness of 1 nm to 500 nm 〇 4 as claimed in claim 1 The printed circuit board has a built-in electric layer forming material, wherein the dielectric layer has a thickness of 20 nm to 1 μm. The built-in circuit layer forming material of the printed wiring board according to the first aspect of the invention, wherein the lower electrode forming layer is a nickel layer or a nickel alloy layer having a thickness of from 1 to 100/z m. 6. The built-in circuit layer forming material of the printed wiring board according to Item 1, wherein the upper electrode forming layer comprises a nickel layer having a thickness of 0·5 μm to 50 μm, a copper layer, a nickel alloy layer, and copper. Any of the alloy layers' or a combination of such combinations. 7. The built-in electricity of the printed wiring board according to the first aspect of the invention is in the form of a dielectric layer 2213-9175-PF 40 200829099, wherein the dielectric layer is impregnated with a resin impregnated dielectric layer. The manufacturing method of the built-in capacitor layer forming material of the brush circuit board is a manufacturing method of forming a dielectric layer capacitor layer forming material between the upper electrode forming layer and the lower electrode forming layer, and is characterized in that: a lower electrode Forming a layer using a physical vapor deposition method, a gas phase chemical reaction method, a method of forming a manganese-free manganese-free oxide dielectric layer, and using a physical vapor deposition layer on the manganese-free oxide dielectric layer. Method, gas phase chemical reaction: any of the gelatin-gel method forms a dielectric layer containing manganese oxide as a multilayer structure oxide dielectric layer; and forms an upper portion on the multilayered oxide dielectric layer The electrode forms a layer. 9. A method for producing a built-in capacitance layer forming material of a printed wiring board' is a method for manufacturing a dielectric layer forming material including a dielectric layer between an upper electrode forming layer and a lower electrode forming layer, wherein: And forming a manganese-free manganese-free oxide dielectric layer on the lower electrode formation layer by using a physical vapor deposition method, a gas phase chemical reaction method, or a gel-'s spin-gel method: On the electrical layer, the physical vaporization method, the gasification, the 曰 反 凝, the 谬 谬 凝 凝 — — — 形成 形成 形成 形成 形成 形成 形成 形成 形成 = = = = = = = = = = = = = = = = = = = = = The layer of the dielectric layer or the layer containing the oxide dielectric layer of the bell is impregnated with the resin to form a resin-impregnated dielectric layer; and the upper electrode-forming layer is formed on the multi-layered oxide dielectric layer. The method of manufacturing a capacitor layer forming material according to claim 9, wherein the resin is impregnated, and a resin varnish is coated on the surface of the dielectric layer to impregnate the resin. Dry to make the resin harden. The manufacturing method of the built-in capacitor layer forming material of the printed wiring board according to the invention of claim 8, wherein the multi-layer structure oxide dielectric layer is formed by a sol-gel, and the following steps a~ Step f 步驟a ·調製形成未煅燒無錳介電層及不含錳之次介 電層之第1溶膠-凝膠溶液； ；| &gt;谷膠-凝膠 步驟b:調製形成含有錳之次介電層之第 溶液； 步驟c:於下部電極形成屏夕本 小成層之表面塗饰第1溶膠-凝膠 洛液後，使之乾燥，藉由在含有 煅燒之無鐘介電層； 有-之…熱分解形成未 二驟d.進订一次於上述未煅燒之無錳介電層之表 面，塗佈第2溶膠-凝膠溶液徭，庶—&amp;。 ^ ^ ^ 後使之乾燥，於含有氧之 规虱中進行熱分解之一連步驟 計成弟1未煅燒次介電層； y驟e ·之後塗佈第1溶腿 舻、々十 合I破膠溶液或第2溶膠-凝 胗浴液之任一後，使之乾燥， n s有虱之氣氛中進行熱分 解之一連步驟作為1單位步驟， 跡Γ輝错由反覆進行該1單位步 驟（η 1)次’形成於一部分戍 隱a八 —斤有的層含有錳之第2未煅 人；丨電層〜第n未緞燒次介電層；及 步驟f :藉由將上述步驟所赞 換，、％ 4I出之未煅燒次介電層煅 Λ〇 進仃形成具有不含錳之|絲 …、猛乳化物介電層，及含有錳 2213~9ΐ75'·ρρ 42 200829099 之猛含有氧化物介電層之複層構造氧化物介電層之最終 煅燒。 12.如申請專利範圍第u項所述的印刷線路板之内藏 電谷層形成材料之製造方法，其中於上述步驟d及步驟 e，先於1單位步驟之處理任意設以5501〜80(TC預備煅燒 處理。Step a · preparing a first sol-gel solution forming an uncalcined manganese-free dielectric layer and a sub-dielectric layer containing no manganese; ;| &gt; gluten-gel step b: preparing a sub-dielectric containing manganese a first solution of the layer; step c: after coating the surface of the lower electrode layer of the lower electrode layer to coat the first sol-gel solution, and drying it, by containing the dielectric layer without calcination; ...the thermal decomposition forms a second step d. The surface of the uncalcined manganese-free dielectric layer is applied once, and the second sol-gel solution 涂布, 庶-&amp; ^ ^ ^ After drying, one of the thermal decompositions in the oxygen-containing gauge is connected to the first uncalcined sub-dielectric layer; y-e · After coating the first dissolved leg 舻, 々 十合I broken After the gel solution or the second sol-condensation bath is dried, the step of thermal decomposition in a ns atmosphere is performed as a unit step, and the trace unit is repeatedly subjected to the 1 unit step (η) 1) the second 'formed in a part of the 戍 a 八 八 — 有 有 有 有 有 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第Change, %4I out of the uncalcined sub-dielectric layer to form a manganese-containing wire, a fissile dielectric layer, and a manganese containing 2213~9ΐ75'·ρρ 42 200829099 The final layer of the dielectric layer of the dielectric layer is the final calcination of the oxide dielectric layer. 12. The method for manufacturing a built-in electric grid layer forming material for a printed wiring board according to the invention of claim 5, wherein in the step d and the step e, the processing of the first unit step is arbitrarily set to 5501 to 80 ( The TC is pre-calcined. 之氧化物 •一種印刷線路板， 13. 電容層幵 液，係4 介電膜之市珉溶液。 14.-Oxide • A printed circuit board, 13. Capacitor layer 幵 solution, a commercial solution of 4 dielectric films. 14.- 包括内藏電容層， 線路板之内藏電 其係使用申請專利範圍第】 路層形成材料製出者。 2213-9175-PPIncluding the built-in capacitor layer, the built-in electricity of the circuit board. The system uses the patent application scope]. 2213-9175-PP