TW200726082A - CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit - Google Patents

CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit

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Publication number
TW200726082A
TW200726082A TW094145281A TW94145281A TW200726082A TW 200726082 A TW200726082 A TW 200726082A TW 094145281 A TW094145281 A TW 094145281A TW 94145281 A TW94145281 A TW 94145281A TW 200726082 A TW200726082 A TW 200726082A
Authority
TW
Taiwan
Prior art keywords
circuits
output transistor
output
signal
cmos buffer
Prior art date
Application number
TW094145281A
Other languages
Chinese (zh)
Other versions
TWI283514B (en
Inventor
Hideharu Koike
Original Assignee
Winbond Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Winbond Electronics Corp filed Critical Winbond Electronics Corp
Priority to TW94145281A priority Critical patent/TWI283514B/en
Application granted granted Critical
Publication of TWI283514B publication Critical patent/TWI283514B/en
Publication of TW200726082A publication Critical patent/TW200726082A/en

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  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

CMOS buffer circuits with reduced short circuit current. In the CMOS buffer circuit, an output stage drives an output terminal and comprises a first output transistor of a first conductive type and a second output transistor of a second conductive type. An output driving unit produces a first signal to turn off the first output transistor according to a delay signal. A bidirectional delay unit is controlled by the input signal to turn on the second output transistor after the first output transistor be turned off. In the bidirectional delay unit, a bidirectional logic unit generates two logic signals according to an inversion signal of the input signal, first and second bidirectional buffers are coupled to the output driving unit, generating a second signal to turn on the second output transistor according to the input signal and the two logic signals.
TW94145281A 2005-12-20 2005-12-20 CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit TWI283514B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94145281A TWI283514B (en) 2005-12-20 2005-12-20 CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94145281A TWI283514B (en) 2005-12-20 2005-12-20 CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit

Publications (2)

Publication Number Publication Date
TWI283514B TWI283514B (en) 2007-07-01
TW200726082A true TW200726082A (en) 2007-07-01

Family

ID=39428196

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94145281A TWI283514B (en) 2005-12-20 2005-12-20 CMOS buffer circuits, and integrated circuits and ring oscillation circuits using circuit

Country Status (1)

Country Link
TW (1) TWI283514B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI619347B (en) * 2011-12-08 2018-03-21 愛思開海力士有限公司 Semiconductor device and operation method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10614864B1 (en) 2019-05-13 2020-04-07 Winbond Electronics Corp. Buffer output circuit, driving method thereof and memory apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI619347B (en) * 2011-12-08 2018-03-21 愛思開海力士有限公司 Semiconductor device and operation method thereof

Also Published As

Publication number Publication date
TWI283514B (en) 2007-07-01

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