TW200638527A - Method for wafer level package of sensor chip - Google Patents

Method for wafer level package of sensor chip

Info

Publication number
TW200638527A
TW200638527A TW094112261A TW94112261A TW200638527A TW 200638527 A TW200638527 A TW 200638527A TW 094112261 A TW094112261 A TW 094112261A TW 94112261 A TW94112261 A TW 94112261A TW 200638527 A TW200638527 A TW 200638527A
Authority
TW
Taiwan
Prior art keywords
wafer
level package
stress
forming
weld pad
Prior art date
Application number
TW094112261A
Other languages
Chinese (zh)
Other versions
TWI258210B (en
Inventor
En-Boa Wu
Rou-Ching Yang
Original Assignee
Univ Nat Taiwan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Nat Taiwan filed Critical Univ Nat Taiwan
Priority to TW094112261A priority Critical patent/TWI258210B/en
Application granted granted Critical
Publication of TWI258210B publication Critical patent/TWI258210B/en
Publication of TW200638527A publication Critical patent/TW200638527A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

Method for wafer-level package of sensor chip includes following procedures: providing a wafer comprising multiple dies areas, which includes an active area and a weld pad located around the active area; surface mounting a transparent protection layer onto the first surface of the wafer; forming a stress bumper layer on the second surface of the wafer; forming a through hole penetrating the stress bumper layer and the wafer at a preset position between two dies areas via etching or laser drilling in order to expose the weld pad or a leading wire preset between two neighboring weld pads; forming multiple bump electrodes on the stress bumper layer to be electrically connected the weld pad by way of the through hole. The present invention has following advantages: assembling convenience, low assembly cost, high reliability of wafer-level package structure.
TW094112261A 2005-04-18 2005-04-18 Method for wafer level package of sensor chip TWI258210B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW094112261A TWI258210B (en) 2005-04-18 2005-04-18 Method for wafer level package of sensor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094112261A TWI258210B (en) 2005-04-18 2005-04-18 Method for wafer level package of sensor chip

Publications (2)

Publication Number Publication Date
TWI258210B TWI258210B (en) 2006-07-11
TW200638527A true TW200638527A (en) 2006-11-01

Family

ID=37765195

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094112261A TWI258210B (en) 2005-04-18 2005-04-18 Method for wafer level package of sensor chip

Country Status (1)

Country Link
TW (1) TWI258210B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9397137B2 (en) 2012-07-11 2016-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for CIS flip-chip bonding and methods for forming the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111200410B (en) * 2018-11-16 2023-03-21 开元通信技术（厦门）有限公司 Wafer-level packaging structure of acoustic wave device and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9397137B2 (en) 2012-07-11 2016-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for CIS flip-chip bonding and methods for forming the same
US10090345B2 (en) 2012-07-11 2018-10-02 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for CIS flip-chip bonding and methods for forming the same

Also Published As

Publication number Publication date
TWI258210B (en) 2006-07-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees