TW200611412A - A self-aligned method for forming a LTPS TFT - Google Patents

A self-aligned method for forming a LTPS TFT

Info

Publication number
TW200611412A
TW200611412A TW093128630A TW93128630A TW200611412A TW 200611412 A TW200611412 A TW 200611412A TW 093128630 A TW093128630 A TW 093128630A TW 93128630 A TW93128630 A TW 93128630A TW 200611412 A TW200611412 A TW 200611412A
Authority
TW
Taiwan
Prior art keywords
tft
self
pltps
aligned method
nltps
Prior art date
Application number
TW093128630A
Other languages
Chinese (zh)
Other versions
TWI237900B (en
Inventor
Chih-Chin Chang
Original Assignee
Au Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Au Optronics Corp filed Critical Au Optronics Corp
Priority to TW93128630A priority Critical patent/TWI237900B/en
Application granted granted Critical
Publication of TWI237900B publication Critical patent/TWI237900B/en
Publication of TW200611412A publication Critical patent/TW200611412A/en

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  • Thin Film Transistor (AREA)

Abstract

A self-aligned method for forming a low temperature polysilicon thin film transistor (LTPS TFT). First, active layers of a N-type LTPS TFT (NLTPS TFT) and a P-type LTPS TFT (PLTPS TFT) are formed on a substrate, and a gate insulating (GI) layer is formed on the substrate. Then, a source electrode, a drain electrode, and a lightly doped drain (LDD) of the NLTPS TFT are formed by utilizing the self-aligned method. Further, gate electrodes of the NLTPS TFT and the PLTPS TFT are formed on the gate insulating layer. Finally, the gate electrode of the PLTPS TFT is utilized to self-align to form a source electrode and a drain electrode in the active layer of the PLTPS TFT.
TW93128630A 2004-09-21 2004-09-21 A self-aligned method for forming a LTPS TFT TWI237900B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93128630A TWI237900B (en) 2004-09-21 2004-09-21 A self-aligned method for forming a LTPS TFT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW93128630A TWI237900B (en) 2004-09-21 2004-09-21 A self-aligned method for forming a LTPS TFT

Publications (2)

Publication Number Publication Date
TWI237900B TWI237900B (en) 2005-08-11
TW200611412A true TW200611412A (en) 2006-04-01

Family

ID=36929990

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93128630A TWI237900B (en) 2004-09-21 2004-09-21 A self-aligned method for forming a LTPS TFT

Country Status (1)

Country Link
TW (1) TWI237900B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI603433B (en) * 2015-09-08 2017-10-21 鴻海精密工業股份有限公司 Complementary metal oxide semiconductor device and method making same
TWI804916B (en) * 2020-10-12 2023-06-11 南韓商Ｌｇ顯示器股份有限公司 Thin film transistor, method for manufacturing the thin film transistor and display device comprising the thin film transistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI603433B (en) * 2015-09-08 2017-10-21 鴻海精密工業股份有限公司 Complementary metal oxide semiconductor device and method making same
TWI804916B (en) * 2020-10-12 2023-06-11 南韓商Ｌｇ顯示器股份有限公司 Thin film transistor, method for manufacturing the thin film transistor and display device comprising the thin film transistor
US11817509B2 (en) 2020-10-12 2023-11-14 Lg Display Co., Ltd. Thin film transistor, method for manufacturing the thin film transistor and display device comprising the thin film transistor

Also Published As

Publication number Publication date
TWI237900B (en) 2005-08-11

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees