TW200605512A - Circuit for applying jitter and test - Google Patents
Circuit for applying jitter and testInfo
- Publication number
- TW200605512A TW200605512A TW094122051A TW94122051A TW200605512A TW 200605512 A TW200605512 A TW 200605512A TW 094122051 A TW094122051 A TW 094122051A TW 94122051 A TW94122051 A TW 94122051A TW 200605512 A TW200605512 A TW 200605512A
- Authority
- TW
- Taiwan
- Prior art keywords
- jitter
- circuit
- frequency
- component
- applying
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31727—Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004214888A JP4425735B2 (ja) | 2004-07-22 | 2004-07-22 | ジッタ印加回路、及び試験装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200605512A true TW200605512A (en) | 2006-02-01 |
TWI353115B TWI353115B (en) | 2011-11-21 |
Family
ID=35785031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094122051A TWI353115B (en) | 2004-07-22 | 2005-06-30 | Circuit for applying jitter and test device |
Country Status (6)
Country | Link |
---|---|
US (1) | US7287200B2 (zh) |
JP (1) | JP4425735B2 (zh) |
KR (1) | KR20070043843A (zh) |
DE (1) | DE112005001762T5 (zh) |
TW (1) | TWI353115B (zh) |
WO (1) | WO2006008908A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI401444B (zh) * | 2006-04-20 | 2013-07-11 | Advantest Corp | 測試裝置、測試方法、抖動濾波電路以及抖動濾波方法 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI277748B (en) * | 2005-08-29 | 2007-04-01 | Via Tech Inc | Time jitter injection testing circuit and related testing method |
JP4508072B2 (ja) * | 2005-10-18 | 2010-07-21 | 株式会社デンソー | シリアル通信回路及びa/d変換システム |
US8327204B2 (en) * | 2005-10-27 | 2012-12-04 | Dft Microsystems, Inc. | High-speed transceiver tester incorporating jitter injection |
US7813297B2 (en) * | 2006-07-14 | 2010-10-12 | Dft Microsystems, Inc. | High-speed signal testing system having oscilloscope functionality |
US7681091B2 (en) * | 2006-07-14 | 2010-03-16 | Dft Microsystems, Inc. | Signal integrity measurement systems and methods using a predominantly digital time-base generator |
US7835479B2 (en) | 2006-10-16 | 2010-11-16 | Advantest Corporation | Jitter injection apparatus, jitter injection method, testing apparatus, and communication chip |
JP2010518760A (ja) * | 2007-02-09 | 2010-05-27 | ディー・エフ・ティー・マイクロシステムズ・インコーポレーテッド | ハイスピード・シリアル・リンクのミッション環境における、該ハイスピード・シリアル・リンクの物理層テスティングのためのシステム及び方法 |
JPWO2008133238A1 (ja) * | 2007-04-24 | 2010-07-29 | 株式会社アドバンテスト | 試験装置および試験方法 |
US20090158100A1 (en) * | 2007-12-13 | 2009-06-18 | Advantest Corporation | Jitter applying circuit and test apparatus |
US7808252B2 (en) | 2007-12-13 | 2010-10-05 | Advantest Corporation | Measurement apparatus and measurement method |
KR100960118B1 (ko) * | 2007-12-17 | 2010-05-27 | 한국전자통신연구원 | 클럭 지터 발생 장치 및 이를 포함하는 시험 장치 |
US7917319B2 (en) * | 2008-02-06 | 2011-03-29 | Dft Microsystems Inc. | Systems and methods for testing and diagnosing delay faults and for parametric testing in digital circuits |
US8207765B2 (en) | 2009-07-20 | 2012-06-26 | Advantest Corporation | Signal generation apparatus and test apparatus |
US8850259B2 (en) | 2011-01-07 | 2014-09-30 | Anue Systems, Inc. | Systems and methods for precise generation of phase variation in digital signals |
US8533518B2 (en) | 2011-01-07 | 2013-09-10 | Anue Systems, Inc. | Systems and methods for precise timing measurements using high-speed deserializers |
US8788867B2 (en) | 2011-01-07 | 2014-07-22 | Anue Systems, Inc. | Systems and methods for playback of detected timing events |
US8683254B2 (en) | 2011-01-07 | 2014-03-25 | Anue Systems, Inc. | Systems and methods for precise event timing measurements |
TWI444636B (zh) * | 2011-02-18 | 2014-07-11 | Realtek Semiconductor Corp | 內建抖動測試功能之時脈與資料回復電路及其方法 |
DE102020102773B4 (de) | 2019-02-04 | 2023-11-02 | Tektronix, Inc. | Jitter-einfügungssystem zur wellenformerzeugung |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02252316A (ja) * | 1989-03-27 | 1990-10-11 | Nec Corp | ジッタシミュレーション機能付きpll回路 |
JPH06104708A (ja) * | 1992-09-21 | 1994-04-15 | Advantest Corp | ジッタ発生装置 |
JPH06112785A (ja) * | 1992-09-28 | 1994-04-22 | Advantest Corp | ジッタ発生装置 |
US6686879B2 (en) * | 1998-02-12 | 2004-02-03 | Genghiscomm, Llc | Method and apparatus for transmitting and receiving signals having a carrier interferometry architecture |
JP4445114B2 (ja) * | 2000-01-31 | 2010-04-07 | 株式会社アドバンテスト | ジッタ測定装置及びその方法 |
JP2002124873A (ja) * | 2000-10-18 | 2002-04-26 | Mitsubishi Electric Corp | 半導体装置 |
JP3830020B2 (ja) * | 2000-10-30 | 2006-10-04 | 株式会社日立製作所 | 半導体集積回路装置 |
US6993107B2 (en) * | 2001-01-16 | 2006-01-31 | International Business Machines Corporation | Analog unidirectional serial link architecture |
US20030231707A1 (en) * | 2002-06-05 | 2003-12-18 | French John Sargent | Method and apparatus for jitter creation and testing |
-
2004
- 2004-07-22 JP JP2004214888A patent/JP4425735B2/ja not_active Expired - Lifetime
-
2005
- 2005-06-24 DE DE112005001762T patent/DE112005001762T5/de not_active Withdrawn
- 2005-06-24 KR KR1020077003628A patent/KR20070043843A/ko not_active Application Discontinuation
- 2005-06-24 WO PCT/JP2005/011589 patent/WO2006008908A1/ja active Application Filing
- 2005-06-30 TW TW094122051A patent/TWI353115B/zh active
- 2005-07-08 US US11/178,226 patent/US7287200B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI401444B (zh) * | 2006-04-20 | 2013-07-11 | Advantest Corp | 測試裝置、測試方法、抖動濾波電路以及抖動濾波方法 |
Also Published As
Publication number | Publication date |
---|---|
US20060041797A1 (en) | 2006-02-23 |
TWI353115B (en) | 2011-11-21 |
DE112005001762T5 (de) | 2007-06-21 |
US7287200B2 (en) | 2007-10-23 |
WO2006008908A1 (ja) | 2006-01-26 |
KR20070043843A (ko) | 2007-04-25 |
JP2006041640A (ja) | 2006-02-09 |
JP4425735B2 (ja) | 2010-03-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200605512A (en) | Circuit for applying jitter and test | |
TW200711276A (en) | Reference clock signal generation circuit, power supply circuit, driver circuit, and electro-optical device | |
EP1672800A3 (en) | Jitter generation circuit | |
WO2010024942A3 (en) | Direct digital synthesizer for reference frequency generation | |
TW200711316A (en) | Clock generation circuit and clock generation method | |
EP1584929A3 (en) | High performance signal generation | |
US9397647B2 (en) | Clock spurs reduction technique | |
TW200709227A (en) | Delay locked loop | |
WO2010033436A3 (en) | Techniques for generating fractional clock signals | |
TW200701647A (en) | Delay locked loop circuit | |
US20140266333A1 (en) | Generating clock on demand | |
TW200612213A (en) | Spread spectrum clock signal generation system and method | |
WO2003040738A1 (fr) | Generateur de synchronisation et appareil d'essai | |
TW200713330A (en) | Delay locked loop circuit | |
WO2008036389A3 (en) | Frequency synthesizer using two phase locked loops | |
KR100923212B1 (ko) | 디지털-위상 변환기를 위한 방법 및 장치 | |
TW200612437A (en) | Method and related apparatus for adjusting timing of memory signals | |
TW200718022A (en) | Offsetcontrollable spread spectrum clock generator apparatus | |
WO2003079562A3 (en) | Method and apparatus for reducing emi in digital display devices | |
WO2006135788A3 (en) | Prescaler for a fractional-n synthesizer | |
KR20140147179A (ko) | 클럭 위상 조절 회로 및 이를 포함하는 반도체 장치 | |
TWI268410B (en) | Circuit and method for generating a clock signal | |
DE60228909D1 (de) | Netzwerkschnittstelle mit programmierbarer Verzögerung und Frequenzverdoppler | |
JP2005039829A5 (zh) | ||
TW200642288A (en) | A clock generating circuit and an audio system |