TW200425303A - Recycling by mechanical means of a wafer comprising a multi-layer structure after taking-off a thin layer thereof - Google Patents
Recycling by mechanical means of a wafer comprising a multi-layer structure after taking-off a thin layer thereof Download PDFInfo
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- TW200425303A TW200425303A TW93100389A TW93100389A TW200425303A TW 200425303 A TW200425303 A TW 200425303A TW 93100389 A TW93100389 A TW 93100389A TW 93100389 A TW93100389 A TW 93100389A TW 200425303 A TW200425303 A TW 200425303A
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- layer
- removal
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
五、發明說明（1 ) 【所屬之技術領域】 本發明與在移除施體晶圓一半導體材料層後的回收有 關，該回收包含施體晶圓發生移除側之部分物質的去除。 5【先前技術】 在移除前，這類施體晶圓包含基片及蟲晶沈積於該基 片上要被移除的層。 在移除後，被移除的層與一結構整合，在該結構中， 絕大部分將成形特別是微電子、光學或光電領域^組件。 10 因此，被移除的層必須達到由一或多個特定標準所決 定的高品質水準。 生長支撐對被移除之層的品質有決定性的影響，亦即 用於磊晶沈積被移除層之基片的品質。 形成這類高品質基片通常很複雜且需要特別留意，此 15牽涉到技術的困難度及昂貴的成本。 當要被移除的層是由複合半導體材料（諸如合金）時， 對所考慮之層的限制就更加嚴苛，實施蟲晶基片所必須呈 現的結構通常很困難且昂貴。 因此，包含緩衝層的基片更顯現實施的困難度。 :0 一一般言之，“緩衝層’，是第一結晶結構（諸如支撐基片） 與第二結晶結構間的過渡層’具有修改材料特性的主要功 能，諸如結構上、化學量特性或表面原子的再結合。 在緩衝層的-特例中，緩衝層可得到第二結晶結構， 它的晶格參數與支撐基片的實質上不同。 200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（2) 形成缓衝層的第一項技術是生長連續層，以便形成一 成分隨厚度漸變的結構’因此，緩衝層之成分的漸變與其 晶格參數的漸變直接相關。 成形在緩衝層上的疊置層可以從施體晶圓上移除，以 5 轉移到一接收基片上，以便形成一明確的結構。 轉移成形在緩衝層上之薄層的主要應用之一與形成彈 性應變的矽層有關，且特別是矽在張力應變的情況，因為 它的某些特性獲明顯增進，諸如材料中的電子遷移率。 其它材料，諸如SiGe，也可接受實質上類似的移除。 10 將這類層轉移到接收基片上，特別是以熟悉此方面技 術之人士所習知的Smart-cut®法，可以形成諸如絕緣體上 半導體（SeOI)的結構。 例如，在移除了彈性鬆弛的SiGe層之後，所得到包括 移除層的結構，在鬆弛之SiGe層的張力之下，可做為矽的 15 生長支撐。 這類方法的說明例描述於L· J· Huang等人發表的IBM 文獻，名稱為 “SiGe-On-Insulator prepared by wafer bonding and layer transfer for high performance field-effect transistors’’，Applied Physics Letters，26/02/2001，vol· 78, 20 No.9，其中提出製造Si/SGOI結構的方法。 可能在缓衝層上生長的其它應用還特別有ΙΠ-V族的半 導體。 因此，電晶體是以根據砷化鎵（GaAs)或磷化銦（InP)的 技術成形。 -4- 本纸張尺度適用巾國國家標準(CNS)A4規格（210x297公釐）V. Description of the Invention (1) [Technical Field] The present invention relates to the recovery after removing a semiconductor material layer of a donor wafer, and the recovery includes the removal of a part of the material on the removal side of the donor wafer. 5 [Prior art] Prior to removal, such donor wafers include a substrate and a layer of insect crystals deposited on the substrate to be removed. After removal, the removed layer is integrated with a structure in which the vast majority will form components, especially in the microelectronic, optical or optoelectronics fields. 10 Therefore, the removed layer must meet the high quality level determined by one or more specific criteria. The growth support has a decisive influence on the quality of the removed layer, that is, the quality of the substrate used to epitaxially deposit the removed layer. Forming such high-quality substrates is often complicated and requires special attention. This involves technical difficulties and expensive costs. When the layer to be removed is made of a composite semiconductor material such as an alloy, the restrictions on the layer under consideration are even more severe, and the structure that must be present to implement a wormworm substrate is often difficult and expensive. Therefore, the substrate containing the buffer layer is more difficult to implement. : 0 In general, the "buffer layer" is the transition layer between the first crystalline structure (such as the support substrate) and the second crystalline structure. It has the main function of modifying material properties, such as structural, stoichiometric properties, or surface Recombination of atoms. In the special case of the buffer layer, the buffer layer can obtain a second crystalline structure, which has substantially different lattice parameters from the supporting substrate. 200425303 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 2. Description of the invention (2) The first technique for forming a buffer layer is to grow a continuous layer so as to form a structure whose composition changes with thickness. Therefore, the gradient of the composition of the buffer layer is directly related to the gradient of its lattice parameters. The superimposed layer on the layer can be removed from the donor wafer and transferred to a receiving substrate by 5 to form a well-defined structure. One of the main applications of transferring thin layers formed on the buffer layer and the formation of elastically strained silicon Layer, and especially silicon under tension and strain, because some of its properties are significantly improved, such as electron mobility in materials. Other materials, Substantially similar removals, such as SiGe, are also acceptable. 10 Transferring such layers to a receiving substrate, especially using the Smart-cut® method known to those skilled in the art, can form semiconductors such as on insulators ( SeOI) structure. For example, after the elastically relaxed SiGe layer is removed, the structure including the removed layer can be used as a 15 growth support for silicon under the tension of the relaxed SiGe layer. An illustrative example is described in the IBM literature published by L.J. Huang et al., Entitled "SiGe-On-Insulator prepared by wafer bonding and layer transfer for high performance field-effect transistors", Applied Physics Letters, 26/02/2001 , Vol. 78, 20 No. 9, which proposes a method for manufacturing Si / SGOI structure. Other applications that may grow on the buffer layer are in particular semiconductors of the III-V family. Therefore, the transistor is formed by a technique based on gallium arsenide (GaAs) or indium phosphide (InP). -4- This paper size applies to the national standard (CNS) A4 (210x297 mm)
200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（3 ) 從電子性能的角度言，磷化銦的適用性優於砷化鎵。 主要基於成本及易行性之理由，要選擇將生長在砷化 鎵之支撐基片上之緩衝層上的磷化銦移除層轉移到一接收 基片上的技術。 5 某些移除法，諸如“回蝕”法，當在移除期間，會致使 支撐基片及緩衝層剩下的部分被損毀。 在其它的移除法中，支撐基片被回收但失去緩衝層。 製造缓衝層的技術很複雜。 此外，為使結晶瑕疵密度減至最小，通常需要很厚的 10 緩衝層，典型上在一到數微米之間。 因此，製造這類缓衝層需要很長、困難且昂貴的製 程。 製造緩衝層的第二項技術特別如文獻WO 00/15885所 揭示，且其主要目的是經由鍺緩衝層以彈性地鬆弛一應變 15 的鍺層。 此項技術的基礎是特定的磊晶條件，特別是關於溫 度、時間及化學成分等參數的組合。 與第一項技術相較，其主要優點是製造上較簡單、較 快速、且較便宜。 20 最後得到的緩衝層也較按照第一項技術所製造的缓衝 層薄。 製造緩衝層的第三項技術特別是B. Hollander等人在名 稱為 “Strain relaxation of pseudomorphic SibxGex/ Si(100) heterostructures after hydrogen or helium ion implantation 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐）200425303 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (3) From the perspective of electronic performance, the applicability of indium phosphide is better than gallium arsenide. The technique of transferring the indium phosphide removal layer on the buffer layer grown on the support substrate of gallium arsenide to a receiving substrate is mainly selected for reasons of cost and feasibility. 5 Some removal methods, such as the “etchback” method, can cause damage to the rest of the support substrate and buffer layer during removal. In other removal methods, the support substrate is recovered without the buffer layer. The technology for manufacturing the buffer layer is complicated. In addition, to minimize the density of crystalline defects, a very thick buffer layer of 10 is typically required, typically between one and a few microns. Therefore, manufacturing such a buffer layer requires a long, difficult and expensive process. The second technique for manufacturing the buffer layer is disclosed in particular in document WO 00/15885, and its main purpose is to elastically relax a strained germanium layer through the germanium buffer layer. The basis of this technology is specific epitaxy conditions, especially regarding the combination of parameters such as temperature, time and chemical composition. Compared with the first technology, its main advantages are simpler, faster, and cheaper to manufacture. 20 The resulting buffer layer is also thinner than the buffer layer manufactured according to the first technique. The third technology for manufacturing the buffer layer is especially B. Hollander et al., Under the name "Strain relaxation of pseudomorphic SibxGex / Si (100) heterostructures after hydrogen or helium ion implantation." This paper size applies the Chinese National Standard (CNS) A4 specification (210x297 Mm)
200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（4 ) for virtual substrate fabrication” 刊於 Nuclear and Instruments and Methods in Physics Research B 175-17 (2001) 357-367的文獻中加以描述。 其是經由在深度方向佈植氮或氦以鬆弛存在於要被移 5 除之層内的彈性應變。 因此’從此觀點，此第三項技術可得到與按照前兩項 技術中任一所製造之缓衝層類似的結果，但對佈植的要求 實質上較小。 該方法係針對成形在矽基片上受壓縮應力之siGe層的 10 鬆弛。 所使用的技術包括穿過應變層表面將氫或氦離子佈植 到矽基片内一決定的深度，在佈植區上方的矽厚度内產生 擾動（之後’此厚度即形成緩衝層），且在熱處理之下致使 SiGe層的某些鬆弛。 此技術似乎比製造緩衝層的第一項技術所需的時間較 短、較容易實施，且便宜。 此佈植技術的優點之一是此被鬆弛或假鬆弛的層可後 續整合到結構内用以製造組件，特別是電子或光電組件。 不過’與製造緩衝層之第一項技術有幾分類似，在以 習知的施體晶圓回收技術完成移除之後，按照後兩項技術 其中任一所製造的緩衝層會被去除。 在實施方面仍有一些技術上的困難。 15 20 【發明内容】 _6- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公爱） 4 訂 線 200425303 A7 B7 五、發明說明 10 15 經濟部智慧財產局員工消費合作社印製 20 按照本發明第一態樣的目的是經由提出一種在移除包 含遥用自半導體材料之有用層的材料後回收施體晶圓的方 法以增進此情勢，施體晶圓順序地包含基片及移除結構， 在移除前，移除結構包含要被移除的有用層，該方法包含 有關發生移除側之物質的去除，其中，物質的去除是使用 機械手段，俾使在去除物質之後，至少部分的移除結構被 保留，此至少部分的移除結構中包括至少包含在回收後不 需再成形有用層的補充步驟即可被移除的另一有用層。 按照第二態樣，本發明提出經由將有用層轉移到接收 基片以從施體晶圓移除一有用層的方法，其特徵在於其包 含： (a) 將施體晶圓要被移除之有用層的一側接合於接收基 片； (b) 分離包含在施體晶圓之移徐結構（1)内的有用層； (c) 按照該回收法回收施體晶圓。 按照第三態樣，本發明提出一種從一施體晶圓循環移 除有用層的方法，其特徵在於其包含移除有用層的連續步 驟，其每一步驟都符合按照申請專利範圍第17至第23項中 任一項的回收方法。 按照第四態樣，本發明提出按照申請專利範圍第厂至 第23項中任一項循環移除方法的應用，以形成包含接收基 片及緩衝層的結構，緩衝層包含以下材料至少其中之一 ·· SiGe、矽、屬於In-v族的合金，其成分分別選用自（a卜 Ga、Ιη)-(Ν、Ρ、As)之可能的組合。 -7- 4 訂 線 本纸張尺度翻中國國家標準(CNS)A4規格 297公釐） 200425303200425303 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Description of Inventions (4) for virtual substrate fabrication "Published in Nuclear and Instruments and Methods in Physics Research B 175-17 (2001) 357-367 It is by implanting nitrogen or helium in the depth to relax the elastic strains present in the layer to be removed by 5. Therefore, 'from this point of view, this third technique can be obtained in accordance with either of the first two techniques. The manufacturing of the buffer layer has similar results, but the requirements for implantation are substantially smaller. This method is aimed at the 10 relaxation of the compressive-stressed siGe layer formed on a silicon substrate. The technology used includes Hydrogen or helium ions are implanted to a determined depth in the silicon substrate, causing disturbances in the thickness of the silicon above the implantation area (after this thickness forms a buffer layer), and under heat treatment, some relaxation of the SiGe layer is caused This technology seems to take less time, is easier to implement, and is cheaper than the first technology to make a buffer layer. One of the advantages of this implantation technology is that it is relaxed or The slack layer can be subsequently integrated into the structure to make components, especially electronic or optoelectronic components. However, it is a bit similar to the first technique of manufacturing a buffer layer, after it is removed by conventional donor wafer recycling technology The buffer layer manufactured in accordance with any of the last two technologies will be removed. There are still some technical difficulties in implementation. 15 20 [Summary of the Invention] _6- This paper size applies the Chinese National Standard (CNS) A4 specification ( 210x297 public love) 4 Order 200425303 A7 B7 V. Description of the invention 10 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 The purpose of the first aspect of the present invention is to propose a method of removing A method of recovering a donor wafer after the material of a useful layer is used to enhance the situation. The donor wafer sequentially includes a substrate and a removing structure. Before removing, the removing structure includes a useful layer to be removed. Removal of substances on the side, wherein the removal of substances is by mechanical means, so that at least part of the removed structure is removed after the substances are removed. Stay, this at least part of the removal structure includes at least another useful layer that can be removed without the need to re-form the useful layer after recycling. According to a second aspect, the present invention proposes to transfer the useful layer by A method for removing a useful layer from a donor wafer to a receiving substrate, comprising: (a) bonding one side of the useful layer to be removed from the donor wafer to the receiving substrate; (b) separating and including The useful layer in the donor wafer moving structure (1); (c) recovering the donor wafer according to the recycling method. According to a third aspect, the present invention proposes a method for removing useful layers from a donor wafer in a cycle, which is characterized by It includes successive steps of removing the useful layer, each step conforming to the recovery method according to any one of claims 17 to 23 of the scope of patent application. According to a fourth aspect, the present invention proposes the application of the circular removal method according to any one of the scope of the patent application No. plant to item 23 to form a structure including a receiving substrate and a buffer layer. The buffer layer includes at least one of the following materials. I. SiGe, silicon, and alloys belonging to the In-v group, the components are selected from the possible combinations of (a, Bu, Ga, Ιη)-(N, P, As). -7- 4 Thread size This paper is translated into Chinese National Standard (CNS) A4 size 297 mm) 200425303
5 按照第五態樣，本發明提出一種經由移除提供一有用 層的施體晶圓，且能經由申請專利範圍第i至第Μ中任一 項的方法㈣，其斗寺徵在於其接續地包含一基片及能提供 有用層之移除結構_餘部分，其特徵在於移除結構的剩 餘部分仍具有包含至少另_可被移除之有用層的足夠厚 度。 在參閱附圖之非限制性實例閱讀以下對本發明之較佳 方法之使用的詳細描述後，將可㈣本發明的其它態樣、 目的及優點。 10 經濟部智慧財產局員工消費合作社印製5 According to a fifth aspect, the present invention proposes a method for removing a donor wafer which provides a useful layer through removal, and which can be applied to any one of patent applications ranging from i to M. Its signature is that it successively contains A substrate and a remaining structure capable of providing a useful layer are characterized in that the remaining portion of the removed structure still has a sufficient thickness including at least another useful layer that can be removed. After reading the following detailed description of the use of the preferred method of the present invention with reference to the non-limiting examples of the accompanying drawings, other aspects, objects, and advantages of the present invention will be apparent. 10 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
【實施方式】 本發明的主要目的是在移除欲整合到一半導體結構之 至少一有用層（換言之是施體晶圓被移除的部分）之後回收 包含-移除結構的晶®，所進行的回线回收後之移除锋 構的剩餘部分在後續的移除中，不需實施再成形有用層的 步驟（諸如經由磊晶結晶生長的步驟）即能再次供應有用 層。 明確而言，回收特別必需包括不會使包括有用層之部 分移除結構毀壞的適合處理，俾使在回收後仍能移除此有 20 用層。 在特疋的架構中可能包括數層可被移除的有用層， 因此，其可以有數次接續的連續移除，在各次的移除間使 用按照本發明的回收方法。 現請參閱圖la&lb，施體晶圓1〇是由基片與移除結構Z 15[Embodiment] The main purpose of the present invention is to recover the crystals containing-removed structure after removing at least one useful layer to be integrated into a semiconductor structure (in other words, the portion of the donor wafer being removed). After the line is recovered, the remaining portion of the front structure is removed. In the subsequent removal, the useful layer can be supplied again without performing a step of reforming the useful layer (such as a step through epitaxial crystal growth). Specifically, recycling must include, in particular, suitable treatment that will not destroy the structure that removes the part that includes the useful layer, so that the useful layer can still be removed after recycling. The special architecture may include several useful layers that can be removed. Therefore, it can be successively removed several times in succession, and the recycling method according to the present invention is used between each removal. Referring now to Fig. La & lb, the donor wafer 10 is composed of a substrate and a removal structure Z 15
本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公爱） 200425303 A7This paper size applies to China National Standard (CNS) A4 (210 X 297 public love) 200425303 A7
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I I 4 200425303 五、發明說明 10 15 經濟部智慧財產局員工消費合作社印製 20 ，所形成的緩衝層使 曰曰格夺數在橫過-實質的厚度歷經全面且漸近地修改，以 構成兩晶格參數間的過渡。 此類型的層通常被稱為變性層。 在緩衝層的厚度中，晶格參數的此項改變可製造成連 續的。 其也可製造成“步級，，性的，每一步級是晶格參數實質 上不變且與下-階段之晶格參數不同的薄層，俾使晶格參 數疋以不連續的方式逐步級地改變。 其也可具有更複雜的型式，諸如内容物成分以一可變 率的改麦、符號相反的改變率、或成分的不連續步級。 吾人發現，經由從支撐基片開始逐漸增加緩衝層内至 少一種不存在於支撐基片内之原子元素的濃度，有利於緩 衝層内晶格參數的改變。 因此，例如，形成在單一材料之支撐基片上的緩衝層 可以疋雙元、二元、四元或更高次元的材料。緩衝層的形 成以在支撐基片上生長為有利，例如使用習知技術磊晶， 諸如化學氣相沈積（Chemical Vapor Deposition; CVD)及 分子束蠢晶（Molecular Beam Epitaxy ; MBE)技術。 通常，緩衝層可以使用任何其它習知技術形成，例如 欲得到由不同原子元素間之合金所構成的緩衝層。 在形成緩衝層之前如有需要，也可執行緩衝層下方此 鄰之支撐基片表面的輕度加工步驟，例如以CMP拋磨。 在另一架構中，按照第一項技術形成的緩衝層是包括 -10- 線 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐） 200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明_ 在由緩衝層（與第一種架構中之第一緩衝層幾乎相同）及一 附加層構成的一緩衝結構中。 附加層或許是位於支撐基片與緩衝層之間，或在缓衝 層上。 5 在第一特例中，此附加層可構成第二緩衝層，諸如限 制瑕疫的緩衝層，並因此增進形成在緩衝結構上之移除結 構I的結晶品質。 此附加層疋由半導體材料製成，材料成分以保持不變 較佳。 10 树致此特性，形成這類附加層所選用的成分及厚度 疋特別重要的標準0 因此例如，磊晶層中的結構瑕疵通常隨著此層的厚 度逐漸減少。 在第二特例中，附加層是位於緩衝層上，且是具有 15定成分的鬆弛材料。 因此’其能固定第二晶袼參數。 附加層也具有數項功能’諸如選擇自該兩特例中的 能。 在一有利的架構中，附加層位於緩衝層上，且具有 20晶格參數與支撐基片的晶格參數實質上不同。八 在此有利架構的一特例中， U T附加層疋破緩衝層鬆弛的 材料。 '附加層的形成以在緩衝層上生長為有利，例如以cvd 或MBE蟲- 曰曰 .11- 本紙張尺度適用_國國家標準(CNS)A4規袼（21〇χ 297公釐 固 功 的 200425303 五、發明說明（10 5 10 15 經濟部智慧財產局員工消費合作社印製 20 在第一實施例中，附加層的生長是在原位置上進行， 直接接續下方的缓衝層成形，在此情況，下方緩衝層的成 形也以層生長有利。 在第二實施例中，附加層的生長是在下方緩衝層經過 輕度的表面加工步驟後進行，例如以cMp拋光，熱處理 或任何其它平滑技術。 是以在支撐基片上沈積表 面層的技術為基礎’此表面層具有的標稱晶格參數與支撐 基片表面上之毗鄰材料的晶袼參數實質地不同。 按此方式執行表面層的沈積，可使沈積的層實際上沒 有塑性瑕疲，諸如錯位。 形成此表面層俾使其最後具有·· -與支撐基片接觸的第一部分，其限制了塑性瑕疵， 諸如錯位；以及 被第°卩为鬆弛或假鬆弛的第二部分，且塑性瑕疵 很少或不存在。 之後，沈積之表面層的第一部分做為部分的緩衝層， 因為· -其限制塑性瑕疵以便保護表面層的第二部分；以及 其调適表面層的晶格參數以與基片的晶格參數匹配 4 線 限制”意指絕大部分的塑性瑕疵^都位於第一部分内。 表面層的弟_部分並不絕對地沒有瑕疲，但瑕症的濃度符 合微電子方面的應用。 -12- 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐） 200425303 A7 B7 五、發明說明（U) 用於形成這類缓衝層有利的沈積技術包含沈積之溫度 與化學成分隨時間改變。 因此，相對於以第一項技術形成緩衝層，按此所形成 其整個厚度的化學成分實質不變。 在緩衝層與表面層的第二部分之間可***一或 的缓衝層 不過 數層。 此外 10 15 經濟部智慧財產局員工消費合作社印製 緩衝層的厚度可能小於按照第一項技術所形成 之緩衝層的最小厚度。 文獻WO 00/15885提供有關按照此項技術之這類緩衝 層的資訊，是在單晶矽支撐基片上進RSlGe或鍺的沈積。 例如，此類型的沈積法可按一模式進行，其中，單晶 鍺的沈積是在單晶矽的支撐基片上執行，其步驟如下： "將單晶矽支撐基片的溫度穩定在400°C至500°C間 之第一預先決定的穩定溫度，且以43(rc至46(rc 間較佳； "在該第一決定溫度進行鍺的化學氣相沈積（CVD) ’直至在支撐基片上得到小於所需求之最終厚度 之預先決定之厚度的鍺基層； 將鍺之化學氣相沈積的溫度從第一預先決定的 度上升到750t至85(TC間之第二預先決定的溫 ，且以800°C至85(TC間較佳；以及 在该第一預先決定之溫度下繼續錯的化學氣相 積，直至得到所需之單晶鍺表面層的最終厚度。 緩衝層是沈積層與支撐基片介接的部分，且其延伸 -13 本紙張尺度適家標準(CNS)A4規格（no』？公髮） 20 度 沈 訂 線 200425303 A7II 4 200425303 V. Description of Invention 10 15 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 20, the buffer layer formed allows the number of grids to pass across-the thickness of the substance has been comprehensively and gradually modified to form two crystals Grid parameters. This type of layer is often called a denatured layer. This change in the lattice parameters can be made continuous in the thickness of the buffer layer. It can also be made into "steps," each step is a thin layer whose lattice parameters are substantially unchanged and different from the lower-stage lattice parameters, so that the lattice parameters are gradually changed in a discontinuous manner. It can also have more complex patterns, such as changing the content of the content at a variable rate, changing the sign of the opposite sign, or discontinuous steps of the composition. I found that by gradually starting from the support substrate Increasing the concentration of at least one atomic element in the buffer layer that does not exist in the support substrate is beneficial to the change of the lattice parameters in the buffer layer. Therefore, for example, the buffer layer formed on the support substrate of a single material can be binary, Binary, quaternary or higher dimensional materials. The formation of the buffer layer is advantageous for growth on a supporting substrate, for example, epitaxy using conventional techniques such as chemical vapor deposition (CVD) and molecular beam stupid crystals. (Molecular Beam Epitaxy; MBE) technology. Generally, the buffer layer can be formed using any other conventional technology, for example, to obtain a buffer layer composed of an alloy between different atomic elements. If necessary, before the formation of the buffer layer, a light processing step on the surface of the support substrate adjacent to the buffer layer may be performed, such as CMP polishing. In another architecture, the buffer layer formed according to the first technology is Including -10- line paper paper size applicable to China National Standard (CNS) A4 specification (210x297 mm) 200425303 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention _ In the buffer layer (and the first architecture The first buffer layer is almost the same) and an additional layer in a buffer structure. The additional layer may be located between the support substrate and the buffer layer, or on the buffer layer. 5 In the first special case, this additional layer The layer may constitute a second buffer layer, such as a blemish-limiting buffer layer, and thus enhances the crystalline quality of the removed structure I formed on the buffer structure. This additional layer is made of a semiconductor material, the material composition of which is kept unchanged. 10 This is the property of the tree, and the composition and thickness used to form this type of additional layer are particularly important criteria. 0 Therefore, for example, structural defects in an epitaxial layer usually vary with the thickness of this layer. Reduced. In the second special case, the additional layer is located on the buffer layer and is a relaxation material with a fixed composition of 15. Therefore, 'it can fix the second crystal parameter. The additional layer also has several functions' such as selecting from the two In a special case, in an advantageous architecture, the additional layer is located on the buffer layer and has a lattice parameter of 20 that is substantially different from the lattice parameter of the supporting substrate. In a special case of this advantageous architecture, the UT additional layer Break through the slack material of the buffer layer. 'The formation of the additional layer is advantageous for growth on the buffer layer, such as cvd or MBE insects-said. 11-This paper is applicable to the national standard (CNS) A4 regulations (21 〇χ 297mm Gu Gong 200425303 V. Description of the invention (10 5 10 15 Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 In the first embodiment, the growth of the additional layer is carried out in the original position, directly following the The buffer layer is formed. In this case, the formation of the lower buffer layer is also advantageous in layer growth. In the second embodiment, the growth of the additional layer is performed after the underlying buffer layer undergoes a light surface processing step, such as cMp polishing, heat treatment, or any other smoothing technique. It is based on the technique of depositing a surface layer on a supporting substrate. This surface layer has a nominal lattice parameter that is substantially different from the crystal lattice parameters of adjacent materials on the surface of the supporting substrate. Performing the deposition of the surface layer in this manner allows the deposited layer to be practically free of plastic defects such as misalignment. This surface layer is formed so that it finally has a first part in contact with the supporting substrate, which limits plastic defects such as misalignment; and a second part which is loosened or falsely loosened with few plastic defects Or does not exist. After that, the first part of the deposited surface layer serves as a part of the buffer layer, because it limits plastic defects to protect the second part of the surface layer; and it adjusts the lattice parameters of the surface layer to match the lattice parameters of the substrate. "Matching the 4-wire limit" means that most of the plastic flaws ^ are located in the first part. The younger part of the surface layer is not absolutely free of flaws, but the concentration of the flaws is consistent with microelectronic applications. -12- 本Paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 200425303 A7 B7 V. Description of the invention (U) Favorable deposition techniques for forming this type of buffer layer include temperature and chemical composition of the deposit that change over time Therefore, compared with the buffer layer formed by the first technique, the chemical composition of the entire thickness formed by this method is substantially unchanged. It is not too much to insert one or one buffer layer between the buffer layer and the second part of the surface layer. In addition, the thickness of the buffer layer printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs may be smaller than the minimum thickness of the buffer layer formed according to the first technology. Document WO 00/15885 Information on such buffer layers according to this technology is provided by the deposition of RSlGe or germanium on a single crystal silicon support substrate. For example, this type of deposition method can be performed in a mode where the deposition of single crystal germanium is Performed on a single-crystal silicon support substrate, the steps are as follows: " Stabilize the temperature of the single-crystal silicon support substrate at a first predetermined stable temperature between 400 ° C and 500 ° C, and at 43 (rc to 46 (better than rc; " chemical vapor deposition (CVD) of germanium at the first determined temperature until a predetermined thickness germanium base layer is obtained on the support substrate that is less than the required final thickness; The temperature of chemical vapor deposition rises from a first predetermined degree to a second predetermined temperature between 750t and 85 ° C, and a temperature between 800 ° C and 85 ° C is preferred; and at the first predetermined temperature The chemical vapor deposition is continued at the wrong temperature until the desired final thickness of the single crystal germanium surface layer is obtained. The buffer layer is the portion where the deposited layer interfaces with the supporting substrate, and its extension is -13 CNS) A4 specification (no '? Public hair) 20 degree sink Line 200425303 A7
經濟部智慧財產局員工消費合作社印製 尽度，在此尽度的結晶瑕疵大於一極限值。 特別是，此緩衝層的厚度可社…微米的大小，其 小於按照第一項技術所形成之緩衝層的厚度。 該層的其它部分是移除結構J中的至少一部分。 5 此類型的沈積法也可使用不同的方式形成，例如文獻 W0 00/15885中的描述。 按此方式所形成的是施體晶圓1〇的基片丨，基片丨包含 該支撐基片及該緩衝層。 丞L-成緩衝結構H兰項技術是用於包含基片1及基片i 10 上之沈積層的結構。 成形此層的材料選擇標稱晶格參數與基片1表面之晶 格參數實質不同的材料，俾使其被基片丨壓縮或張力彈性應變。 應變層具有應變材料的一般結構，但其也可包含一或 多個厚度的鬆弛或假鬆弛材料，其所堆積的厚度遠小於應 變層的厚度，俾使應變層仍保持整體的應變狀態。 在所有情況中，應變層的形成以在基片1上結晶生長 較為有利，諸如使用習知技術的磊晶，例如CVD與 MBE。 為得到這類應變層且不會有太多結晶瑕疵（例如，諸 如獨立的瑕疵或諸如錯位的延伸瑕疵），有利的做法是選 擇結晶材料成形基片1及應變層（其與基片1介接處附近）， 俾使它們各自之第一與第二標稱晶袼參數間的差異夠小 較0 15 20 -14- 本紙張尺度適用令國國家標準(CNS)A4規格（21〇χ297公釐）Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, as far as possible, the crystal defects are greater than a limit value. In particular, the thickness of this buffer layer may be the size of ... micrometers, which is smaller than the thickness of the buffer layer formed according to the first technique. The other part of this layer is at least a part of the removal structure J. 5 This type of deposition can also be formed in different ways, as described in document WO 00/15885. Formed in this manner is a substrate 丨 of the donor wafer 10, which includes the support substrate and the buffer layer. The L-buffering structure H-lane technology is used for a structure including a substrate 1 and a deposited layer on the substrate i 10. The material for forming this layer is selected from a material whose nominal lattice parameter is substantially different from the lattice parameter on the surface of the substrate 1, so that it is compressed or strained elastically by the substrate. The strained layer has the general structure of a strained material, but it may also contain one or more thicknesses of relaxed or pseudo-relaxed material, and the stacked thickness is much smaller than the thickness of the strained layer, so that the strained layer still maintains the overall strained state. In all cases, it is advantageous to form a strained layer for crystal growth on the substrate 1, such as epitaxy using conventional techniques, such as CVD and MBE. In order to obtain such strained layers without too many crystal defects (for example, independent defects or extended defects such as dislocations), it is advantageous to select a crystalline material to form the substrate 1 and the strain layer (which is inferior to the substrate 1). Near the junction), so that the difference between their respective first and second nominal crystal parameters is small enough than 0 15 20 -14- This paper size applies the national standard (CNS) A4 specification (21〇χ297 %)
200425303 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（13) 例如’晶格參數的差典型上在大約〇5%至大約1.5。/〇之 間，但也可稍高。 以IV-V材料為例，鍺的標稱晶格參數較矽的標稱晶格 參數約大4.2%，因此，具有3〇%鍺之义(^的標稱晶格參數 5 大於石夕的標稱晶格參數約1,15 %。 另一方面，較佳情況是應變層具有實質不變的厚度， 俾使其具有實質不變的固有特性及/或便於進一步與接收 基片接合（如圖lb所示）。 為防止應變層鬆弛或出現塑性類型的内部應力，應變 10層的厚度也必須保持在小於彈性應力的臨界厚度。 此彈性應力的臨界厚度主要視形成應變層所選用的材 料以及與基片1之晶格參數的該差異而定。 熟悉此方面技術之人士將可使用現有技術所知的資訊 決定用於在基片1所用之材料上形成應變層之材料之彈性 15 應力的臨界厚度值。 因此，應變層一旦形成，其具有的晶格參數與供其生 長之基片1的晶格參數近乎相同，且具有内部的壓縮或張 力彈性應力。 結構一旦形成，用以形成緩衝結構的第三項技術包含 20用以在基片1内之指定深度處形成擾動區的第一步驟。 擾動區的定義是其内存在有内部應力且可在四周部分 内形成結構上擾動的區域。 在基片1絕大部分表面上形成此擾動區且平行於基片i 之表面為有利的。200425303 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (13) For example, the difference in 'lattice parameters' is typically about 5% to about 1.5. / 〇, but can also be slightly higher. Taking the IV-V material as an example, the nominal lattice parameter of germanium is about 4.2% larger than the nominal lattice parameter of silicon. Therefore, it has a meaning of 30% germanium (^ 's nominal lattice parameter 5 is greater than that of Shi Xi's). Nominal lattice parameter is about 1,15%. On the other hand, it is preferable that the strained layer has a substantially constant thickness, so that it has substantially constant inherent characteristics and / or facilitates further bonding with the receiving substrate (such as Figure lb). In order to prevent the strained layer from slackening or plastic type internal stress, the thickness of the strained 10 layer must also be kept smaller than the critical thickness of the elastic stress. The critical thickness of this elastic stress mainly depends on the material used to form the strained layer. And the difference from the lattice parameter of the substrate 1. Those skilled in the art will be able to use information known in the art to determine the elasticity of the material used to form the strain layer on the material used in the substrate 15 stress Therefore, once the strained layer is formed, it has a lattice parameter that is nearly the same as that of the substrate 1 on which it is grown, and has internal compressive or tensile elastic stress. Once the structure is formed, it is used to The third technique for forming a buffer structure includes 20 first steps for forming a disturbance zone at a specified depth in the substrate 1. The disturbance zone is defined as the internal stress within the structure and the structural disturbance in the surrounding parts. It is advantageous to form this disturbance zone on most of the surface of the substrate 1 and parallel to the surface of the substrate i.
本紙張尺度適用中國國家標準(CNS)A4規格（21〇x297公爱）This paper size applies to China National Standard (CNS) A4 specification (21〇297 public love)
200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（14) 形成這類弱化區的方法之一包含以決定的佈植能量與 決定的原子物種比例將原子物種植入基片1内一既定深 度。 在一特定的佈植實施例中，植入的原子物種包含氫及/ 5 或氦。 因此，這類以佈植形成的擾動區包含佈植在毗鄰於擾 動區之結晶網絡上之原子物種所施予的内部應力甚或結晶 瑕疲。 於是，這些内部應力可在覆於其上的區域内產生結晶 10 擾動。 基於此目的，按照此第三項技術，形成此緩衝層是在 執行第二步驟的期間，經由供應調整到適當參數之能量 以： ’助復於擾動區上方區域内之擾動的出現· 15 加大此覆蓋區内這些擾動的程度； "在擾動出現後接著致使應變層内至少相對彈性鬆 弛0 因此，這類能量輸入的主要目的是致使應變層内的彈 性應變至少相對鬆弛，以便形成鬆弛的應變層。 20 包含在基片1内擾動區與應變層間的中間區域· 限制錯位類型的瑕疵； 將基片1的晶格參數調整到應變層的標稱晶格參數 7 因此，此例中的中間區域可考慮成是緩衝層。 -16- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公爱）-----200425303 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (14) One of the methods of forming such a weakened zone involves implanting atomic species into the substrate with a determined implantation energy and a determined atomic species ratio1 Within a given depth. In a specific implantation embodiment, the implanted atomic species includes hydrogen and / 5 or helium. Therefore, such perturbation regions formed by implantation include internal stresses or even crystal defects imposed by atomic species implanted on a crystalline network adjacent to the perturbation region. These internal stresses can then cause crystalline perturbations in the area overlying them. For this purpose, in accordance with this third technology, the formation of this buffer layer is performed during the second step by adjusting the energy to the appropriate parameters through the supply to: 'Assist the occurrence of disturbances in the area above the disturbance zone. 15 plus The extent of these perturbations in this coverage area; " After the perturbations occur, at least the relative elastic relaxation in the strain layer is then zero. Therefore, the main purpose of this type of energy input is to cause the elastic strain in the strain layer to be at least relatively relaxed, so as to form relaxation. Strain layer. 20 Included in the middle area between the perturbation zone and the strain layer in the substrate 1 · Limits the type of dislocation defects; adjusts the lattice parameter of the substrate 1 to the nominal lattice parameter of the strain layer 7 Therefore, the middle area in this example can be Considered as a buffer layer. -16- This paper size applies to China National Standard (CNS) A4 (210x297 public love) -----
200425303 A7 --- B7 五、發明說明（15) -- 如果熱處理的參數適當，使用熱處理有利於產生該足 夠的能量輸入以致使這些結構上的修改。 此該熱處理要在遠低於臨界溫度的溫度（或多個溫度） 下進行為有利的，高於該臨界溫度，植入的原子物種會被 5 大量地抽除。 因此，從擾動區内開始的這些内部應力會產生局部的 結晶擾動。 特別是由於應變層内彈性能量的最小化，這些主要出 現在緩衝層内的擾動並在熱處理的影響下振幅加大。 10 當這些擾動變得夠大時，其作用在應變層上，至少相 對鬆弛彈性應力，這些被鬆弛的應力主要是由於應變層内 之材料與基片1内之材料各自之標稱晶格參數間的晶格失 配應力。 不過，應變層的鬆弛在該層的厚度内也會伴隨出現非 15 彈性類型的結晶瑕癌i，諸如穿透的錯位。 接著可施加適合的處理（諸如熱處理）以減少這些瑕疵 的數量。 經濟部智慧財產局員工消費合作社印製 可使用的適當處理例如其允許增加錯位密度，直至其 包含在兩極限值之間，該兩極限值定義一錯位密度的區 20 間，在此區間中至少某些錯位被消滅。 在任何情況中，最後得到一鬆弛或假鬆弛的層，其標 稱晶格參數與生長基片1的標稱晶格參數實質地不同，且 不利於在鬆弛的應變層中成形微電子組件的錯位含量低。 此鬆弛或假鬆弛的層可構成至少部分的移除結構I。 -17- 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐） 200425303 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（16) 參閱B. Hdllander等人特別是名稱為“Strain relaxation of pseudomorphic Sii_xGex/Si( 100) heterostructures after hydrogen or helium implantation for virtual substrate fabrication”之文獻，（刊於 Nuclear and Instruments and 5 Methods in Physics Research B 175-17 (2001) 357-367，將 可獲得更多詳細資訊。 因此，以此形成緩衝結構的第三項技術製造的緩衝層 包含在基片1内，如前所定義形成缓衝層之此第三項技術 的實施。 10 形成緩衝結構的第四項技術的基礎是用以形成緩衝結 構之支撐基片的表面有凹凸起伏；以及，在支撐基片上沈 積構成緩衝結構的元素。 由於支撐基片非平坦的表面，因此，構成緩衝結構之 元素的沈積是以具有選擇性生長效果及局部結塊的各向異 15 性方式進行，其賦予所成形之緩衝結構指定的特性。 此形成缓衝結構的第四項模式使用特定的技術及參 數，俾使所得到之缓衝層的特性對應於結晶瑕疵受限制特 性’以便使將要形成在緩衝結構上的移除結構I是具有高 品質的固有結構。 20 支撐基片之拓撲的選擇是得到這類結果的基本資料之 — 〇 特別是，所選擇的拓撲在支撐基片之整個表面具有周 期性重複的樣式較佳，以便對晶圓的整個表面具有均勻一 致的影響。 -18- 本纸張尺度適用中國國家標準(CNS)A4規格（21〇χ297公釐）200425303 A7 --- B7 V. Description of the invention (15)-If the parameters of the heat treatment are appropriate, the use of heat treatment is conducive to generating sufficient energy input to cause these structural modifications. It is advantageous for the heat treatment to be performed at a temperature (or temperatures) far below the critical temperature, above which the implanted atomic species will be largely removed. Therefore, these internal stresses starting from the disturbance zone will cause local crystalline disturbances. Especially due to the minimization of the elastic energy in the strained layer, these mainly appear as disturbances in the buffer layer and increase in amplitude under the influence of heat treatment. 10 When these disturbances become large enough, they act on the strained layer and at least relatively relax the elastic stress. These relaxed stresses are mainly due to the nominal lattice parameters of the material in the strained layer and the material in the substrate 1. Lattice mismatch stress. However, the relaxation of the strained layer is also accompanied by non-elastic type crystal defects i, such as penetration dislocation, within the thickness of the layer. Appropriate treatment, such as heat treatment, can then be applied to reduce the number of these defects. The consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs can print appropriate treatments that can be used, for example, it allows to increase the dislocation density until it is included between two limit values that define a zone of dislocation density of 20, in which at least Some misalignments were eliminated. In any case, a relaxed or pseudo-relaxed layer is finally obtained, the nominal lattice parameter of which is substantially different from the nominal lattice parameter of the growth substrate 1, and it is not conducive to forming a microelectronic component in a relaxed strain layer. Dislocation content is low. This relaxed or pseudo-relaxed layer may constitute at least part of the removal structure I. -17- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 200425303 Α7 Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (16) See B. Hdllander et al. In particular A document entitled “Strain relaxation of pseudomorphic Sii_xGex / Si (100) heterostructures after hydrogen or helium implantation for virtual substrate fabrication”, (published in Nuclear and Instruments and 5 Methods in Physics Research B 175-17 (2001) 357-367, More detailed information will be obtained. Therefore, the buffer layer manufactured by the third technology for forming the buffer structure is included in the substrate 1, and the implementation of the third technology for forming the buffer layer is defined as previously. 10 Formation The fourth technology of the buffer structure is based on the unevenness of the surface of the supporting substrate used to form the buffer structure; and the elements constituting the buffer structure are deposited on the supporting substrate. Since the non-flat surface of the supporting substrate is formed, Deposition of the elements of the buffer structure is an anisotropic method with selective growth effects and local agglomeration The fourth mode of the formation of the buffer structure uses specific techniques and parameters so that the characteristics of the obtained buffer layer correspond to the limited characteristics of crystal defects in order to make The removal structure I to be formed on the buffer structure is an inherent structure of high quality. 20 The selection of the topology of the supporting substrate is one of the basic information for obtaining such results-in particular, the selected topology is in the supporting substrate. It is better to have a pattern that repeats periodically on the entire surface, so as to have a uniform and consistent effect on the entire surface of the wafer. -18- This paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm)
200425303 A7 B7 五、發明說明（Π) 例如’支撐基片上是相互間具有一指定距離的帶狀。 以此帶狀條紋類型的拓撲在某些沈積條件下，其可成 功地將蠢晶層的錯位集中在帶狀條紋的附近，且特別是在 帶狀條紋的角落。 5 絕大部分的錯位被限制在層的一厚度内，接著形成緩 衝層。 對此種在支撐基片整個表面具有周期性間隔之帶狀條 紋之拓撲的特定支撐基片表面而言，有利的帶狀條紋是由 成形在基片上的絕緣材料構成，且因此構成稍後將要沈積 10 之材料的遮罩。 此外，在實心之基片與凹凸起伏的結構間可***結晶 材料的中間層，作為生長缓衝結構的基片，因此，凹凸起 伏絕緣結構的厚度要夠薄，以便不會干擾緩衝結構在其下 層之生長基片上的繼續生長。 15 此項技術也稱為側向蠢晶再生長（Epitaxially Laterally200425303 A7 B7 V. Description of the Invention (Π) For example, the support substrate is in the shape of a belt with a specified distance from each other. With this stripe stripe type topology, under certain deposition conditions, it can successfully concentrate the dislocation of the stupid crystal layer near the stripe stripes, and especially at the corners of the stripe stripes. 5 Most dislocations are confined to one thickness of the layer, and then a buffer layer is formed. For such a specific support substrate surface having a topology of periodic stripe-like stripe strips over the entire surface of the support substrate, the advantageous stripe stripe is composed of an insulating material formed on the substrate, and thus constitutes A mask of 10 material deposited. In addition, an intermediate layer of crystalline material can be inserted between the solid substrate and the undulated structure as a substrate for the growth buffer structure. Therefore, the thickness of the undulated insulating structure must be thin enough so as not to interfere with the buffer structure. Continued growth on the underlying growth substrate. 15 This technique is also known as Epitaxially Laterally
Overgrown ; ELOG)，且主要是應用於經由金屬有機化學 氣相沈積（Metal Organic-Chemical-Vapor-Deposition ; MOCVD)磊晶以沈積氮化物膜。 經濟部智慧財產局員工消費合作社印製 例如，可使用 Shuji Nakamura名稱為 20 “InGaN/GaN/AlGaN-Based Laser Diodes with an Estimated Lifetime of Longer than 10 000 hours” 刊於 “Materials Research Community” Bulletin，May 1998，volume 23，No. 5的文獻為基礎，該文特別描述GaN在二氧化矽帶狀條紋 結構上的生長。 -19- 本纸張尺度適用中國國家標準(CNS)A4規格（210x297公釐） 15 經濟部智慧財產局員工消費合作社印製 20 200425303 Α7 五、發明說明（ι〇 本文稍後的例9也將描述使用以助〇形成緩衝結構的 此第四項技術形成GaN結構。 無論基片1之結構上的架構為何（其可能包含或也可能 不包含缓衝層），與移除結構J介接處的基片i是以結晶材 5料形成’僅只有很少或沒有結晶瑕疵。 構成移除結構I的各不同層中，至少某些層是經由在 基片1上生長形成為有利的，例如以CVD或磊晶。 在第一實施例中，這些層中至少某些層是在原位置生 長’每-層是分別直接在其下方層上連續形成，在此情 10況，下方層也以層生長方式形成為有利。 在第二實施例中，這些層中至少某些層是分別在對每 一層之下方層施以輕微表面加工的步驟後再生長，例如以 CMP搬光、熱處理或其它平順處理。 最後，所得到的移除結構j包含結晶材料的層。 在回收前，移除結構！包含的厚度至少要等於或厚於 兩層有用層。 不過，移除結構I最有利的厚度要厚於兩層有用層， 以補彳員回收期間為修正有用層被移除時通常會產生之瑕疵 而施加處理期間被去除的材料厚度。 在經過移除後的施體晶圓10表面上經常會出現粗糙、 厚度不均勻、結構上的瑕疲及/或其它類型的瑕庇，如同 圖lc所示的移除後結構Γ。 例如，可能出現在移除後之剩餘施體晶圓〗〇之移除表 面上的突出及/或粗键部分。 -20- 本紙張尺度_鮮((：罐4祕χ 297公Overgrown; ELOG), and is mainly applied to epitaxially deposit metal nitride films via Metal Organic-Chemical-Vapor-Deposition (MOCVD). Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. For example, you can use Shuji Nakamura under the name "InGaN / GaN / AlGaN-Based Laser Diodes with an Estimated Lifetime of Longer than 10 000 hours". Published in "Materials Research Community" Bulletin, May Based on the literature of Volume 23, No. 5, 1998, this article specifically describes the growth of GaN on the stripe structure of silicon dioxide. -19- This paper size is in accordance with China National Standard (CNS) A4 (210x297 mm) 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 200425303 Α7 V. Description of the invention (ι〇 Example 9 later in this article will also be Describe the formation of a GaN structure using this fourth technique to help form a buffer structure. Regardless of the structural structure of substrate 1 (which may or may not include a buffer layer), it interfaces with the removal of structure J The substrate i is formed of a crystal material 5 with little or no crystal defects. At least some of the various layers constituting the removal structure I are advantageously formed by growing on the substrate 1, for example, CVD or epitaxy. In the first embodiment, at least some of these layers are grown in situ, and each layer is formed continuously directly on the underlying layer. In this case, the underlying layer is also layered. The growth mode is formed to be favorable. In the second embodiment, at least some of these layers are regrown after applying a step of slightly surface processing to the layers below each layer, for example, by CMP light, heat treatment or other smooth deal with. Finally, the resulting removed structure j contains a layer of crystalline material. Prior to recycling, the removed structure! Contains a thickness that is at least equal to or thicker than two useful layers. However, the most advantageous thickness of removed structure I is thicker than Two useful layers, to compensate for the thickness of the material removed during processing to correct defects that would normally occur when the useful layer is removed during recovery. Rough, often appearing on the surface of the donor wafer 10 after removal, Uneven thickness, structural defects, and / or other types of defects, such as the removed structure Γ shown in Figure lc. For example, the remaining donor wafer after removal may appear on the removed surface Protruding and / or thick key parts. -20- Paper size _Fresh ((: can 4 secret x 297 male
200425303 A7200425303 A7
出現在移除結構I表面上這些凹凸起伏的表面部分主 要視移除期間所使用的移除方法及技術而定。 因此，例如，目前工業界經常使用的移除方法之 一包括所移除的有用層僅是施體晶圓10的一部分（ 5 貫質上通常是中央部分），而非橫跨施體晶圓1〇的 整個表面，並在施體晶圓10的表面上留下突出部 分。沒些凸出部分一般是單一件且位於施體晶圓 10表面四周，業界將所有的凸出部分稱為“移除冠 (taking off crown) 〇 10 -因此，例如習知的移除技術，例如吾人將在本文稍 後更詳細描述的内容中，諸如前文提及的Smart-Cut技術’有時會致使表面粗链。 因此，在移除前，移除結構I的厚度必須至少是要被 移除之有用層厚度的兩倍，以及，一厚度大於或等於一對 15應於回收（或多次回收）期間被移除最小量材料之厚度的極 限。 在Smart-Cut類型之移除後回收的情況（此將在稍後討 論），此厚度極限典型上是在1微米的大小。 經濟部智慧財產局員工消費合作社印製 不過，使用高性能回收技術（諸如選擇性化學蝕刻）可 20 縮小此厚度極限。 按照本發明在回收期間所施加的主要的處理是能適當 保留部分移除結構I的材料去除處理，其至少包括在回收 後可被移除的另一有用層。 此或這些物質的去除是施加於施體晶圓1 〇上，換言 -21- 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐） 200425303 A7 ------------ B7 五、發明說明~~' ~ 之，是在移除後仍殘留的移除結構U由表面區域。 在本發明的上下文中，任何的物質去除包括使用機械 手段去除材料（諸如抛光或研磨）。 此項處理是在表面上執行，且是用於去除曾被移除有 5用層之移除結構⑴的表面部分，且特別是允許去除包含 移除期間出現表面瑕症的一表面厚度，諸如錯位或點瑕症 類型的結晶擾動。 在所使用的移除技術會在移除結構"交深之厚度產生 瑕疵的特殊情況，此項處理有利於徹底執行。 10 目前所使用以拋光類型之機械手段去除物質的技術是 將靶體晶圓10配置在拋光頭與繞一驅動軸轉動的拋光板之 間。 拋光頭與椒光板各自的主表面實質地平行。 施加於拋光頭上的力施加於施體晶圓1〇以抵住拋光板 15 的上表面。 施體晶圓10關於拋光板的轉動致使施體晶圓10的一表 面被磨擦，此面並因此被拋光。 經濟部智慧財產局員工消費合作社印製 在一較佳模式中，拋光頭連同施體晶圓10配置在拋光 板的上表面，沿著一指定路徑以得到最均勻的拋光。此移 20 動例如可以是沿著指定軸往復平移或螺旋移動。 拋光板覆以織物或編織品較佳。 可以注入能潤滑拋光板在施體晶圓上之磨擦動作的拋 光液。 拋光後可接著進行拋光後晶圓表面的清潔，一般是注 -22- 本紙張尺度適用中國國家標準(CNQA4規格（210x297公釐） 200425303 A7 __ B7 五、發明說明（21) 入去離子水。 在拋光與清潔間可執行拋光後的沖洗，一般是注入含 有適當活性介面劑的溶液。活性介面劑的主要功能是使會 繼績磨姓晶片表面的殘餘顆粒儘量散布到沖洗溶液内，並 5因此減少它們在表面上的沈積，並使之得以被清除。 可注入一或多種這類溶液以便潤濕覆蓋拋光板的織 物’因此，拋光板能使溶液在施體晶圓10之整個表面做最 佳的分布。 在板的第一實施例中，拋光、沖洗、及清潔板的功能 10 僅由單一片板執行。 但為增進整體方法的生產力’以具有數個板的裝置較 佳。 在板的第二實施例中，拋光功能是由拋光板完成，沖 洗及清潔功能則是由單一片沖洗/清潔板完成。在將拋光 15 與沖洗/清潔去耦的此實施例中，可提升沖洗的品質。 經濟部智慧財產局員工消費合作社印製 板的第三實施例是將拋光板、沖洗板及清潔板分開成 不同的板。關於第二實施例，本實施例是將沖洗與清潔去 搞，經由使用完全沒有殘留顆粒卡在板中的“處女，，清潔板 進行清潔，因此提升了晶片表面的最終清潔度。 20 除了拋光，也可引入諸如矽土顆粒的研磨顆粒，以增 進對材料的侵触。 除了拋光，也可引入化學劑，以使拋光板的機械侵蝕 效果伴隨有化學侵姓。 去除施體晶圓1〇之物質一有利的實施例是使用機械- -23· 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐） 200425303 A7 ___ B7 五、發明說明（22) 化學整平（即CMP)，其原理是將拋光板的拋光表面與包括 研磨顆粒及化學侵蝕劑的拋光流體結合在一起。 除了機械拋光施體晶圓10要被拋光的表面，拋光流體 結合藉由侵蝕劑的化學蝕刻及藉由研磨顆粒之機械蝕刻的 5 效果。 在去除施體晶圓10被拋光表面的物質之後，可再次隨 以沖洗及/或清潔。 須注意，在某些情況，沖洗不僅對更快速地去除殘餘 及研磨拋光顆粒有作用，也對化學樾光動作有作用。 10 事實上，在拋光期間如果使用驗性pH值的化學侵餘 劑，經由在拋光溶液内添加活性界面劑（通常為酸性），有 利於快速地中止拋光溶液的化學動作。 對某些半導體材料（諸如矽）而言，化學動作的重要性 超過機械動作（在拋光這類半導體材料表面期間，是使用 15 小尺寸的研磨顆粒）。 經濟部智慧財產局員工消費合作社印製 因此’以酸性活性界面劑進行沖洗，特別是對石夕這類 材料，可使拋光動作斷然截止，且其對晶片的效果可被控 制。按此方式，拋光後的厚度得以確保及可再生。 按此方式可做到拋光停止的控制，並因此更精確地控 20 制被去除的厚度。 此外，沖洗溶液以漸次地注入較佳：注入太快將導致 拋光溶液的pH值快速下降，且在某些半導體材料（諸如矽） 的情況，將致使研磨顆粒的尺寸因結塊而變大，這些巨大 顆粒結塊會有造成研磨損壞的危險。 -24- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公髮） '" ----- 200425303 A7 五、發明說明 23 經濟部智慧財產局員工消費合作社印製 在本文中使用層之整平的實施例之一是要被整平的層 中至少部分包括矽的情況。 適合拋光矽之溶液一般是pH值在7至10之間的鹼性溶 液，在8至1〇之間較佳，化學劑以氮基者較佳，諸如氨。 研磨顆粒以顆粒尺寸之數量級在十分之幾微米的矽土 分子較佳。 如果决疋要冲洗’活性界面劑以使用pH值在3至5之間 或甚至大約為4者較佳，且臨界膠質粒子濃度（CMC)大約 〇·1%或更小。 有利的沖洗時間大約是拋光時間的50%。 在本發明的上下文中，這些機械或機械-化學手段特 別有科於控制材料去除的品質，以便允許保留至少部分移 除結構I。 仁疋，去除施體晶圓丨〇之物質一般包括使用任何可以 蝕材料的機械手段，諸如研磨或以原子物種轟擊。 女有茜要，在去除物質之前可施以熱處理，可使被去 除的表面進一步平滑。 現請參閱圖1C，在物質去除後仍保留的原始緩衝結構 部分以11表示。 在第一回收步驟期間，較佳是首先且在某些情況必須 要執行施體晶圓1〇發生物質去除區域之表面狀態的加工， 以便消除物質去除期間所出現的任何粗糙。 基於此一目的，例如執行熱處理。 說明包含移除一薄層及回收施體晶圓10之整個移除方 -25- 本紙張尺度適用中國國家標準(CNS)A4 公 5 10 15 20These undulated surface portions appearing on the surface of the removal structure I depend mainly on the removal method and technique used during the removal. Thus, for example, one of the removal methods often used in the industry today includes removing the useful layer only as part of the donor wafer 10 (typically the central part), rather than across the entire donor wafer 10. Surface and leave a protruding portion on the surface of the donor wafer 10. Each of the protrusions is generally a single piece and is located around the surface of the donor wafer 10. The industry refers to all the protrusions as "taking off crown 〇10-Therefore, for example, the conventional removal technology, such as our own As will be described in more detail later in this article, such as the aforementioned Smart-Cut technology 'sometimes cause coarse chains on the surface. Therefore, the thickness of the removed structure I must be at least removed before removal. Useful layer thickness is twice, and a thickness greater than or equal to a pair of 15 is the limit of the thickness of the minimum amount of material that should be removed during recycling (or multiple recycling). Recovered after Smart-Cut type removal The situation (this will be discussed later), this thickness limit is typically in the size of 1 micron. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics However, using high-performance recycling technologies such as selective chemical etching can reduce this by 20 Thickness limit. The main treatment applied during recycling according to the present invention is a material removal process that can properly retain part of the removed structure I, which includes at least one other material that can be removed after recycling. Useful layer. The removal of this or these substances is applied to the donor wafer 10, in other words -21- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 200425303 A7 ------- ----- B7 V. Description of the invention ~~ '~ Among them, the removal structure U remains after the removal from the surface area. In the context of the present invention, any substance removal includes the use of mechanical means to remove the material ( (Such as polishing or grinding). This treatment is performed on the surface and is used to remove the surface portion of the removal structure 5 that has been removed with a five-purpose layer, and in particular allows the removal to include surface defects during removal. The thickness of a surface, such as dislocation or spot defect type crystal disturbances. In the special case of the removal technique used to produce defects in the thickness of the removed structure " crossing depth, this treatment is conducive to thorough implementation. 10 At present The technique used to remove material by mechanical means of the polishing type is to arrange the target wafer 10 between the polishing head and a polishing plate that rotates around a drive shaft. The polishing head and the main surface of the pepper plate are substantially parallel. The force on the bald head is applied to the donor wafer 10 to abut the upper surface of the polishing plate 15. The rotation of the donor wafer 10 with respect to the polishing plate causes one surface of the donor wafer 10 to be rubbed, and this surface is thus polished. Intellectual Property Bureau, Ministry of Economic Affairs Printed in a preferred mode by the employee consumer cooperative, the polishing head together with the donor wafer 10 is arranged on the upper surface of the polishing plate and follows a specified path to obtain the most uniform polishing. This movement 20 may be, for example, reciprocating along a specified axis Translation or spiral movement. The polishing plate is preferably covered with fabric or knitted fabric. A polishing liquid can be injected to lubricate the friction of the polishing plate on the donor wafer. After polishing, the surface of the wafer after polishing can be cleaned. 22- This paper size applies to Chinese national standard (CNQA4 specification (210x297 mm) 200425303 A7 __ B7 V. Description of the invention (21) Deionized water. A post-polishing rinse can be performed between polishing and cleaning, typically by injecting a solution containing an appropriate active interface agent. The main function of the active interface agent is to make the residual particles on the wafer surface spread as far as possible into the rinsing solution, and thus reduce their deposition on the surface and can be removed. One or more of these solutions may be injected in order to wet the fabric covering the polishing plate ' Therefore, the polishing plate enables optimal distribution of the solution over the entire surface of the donor wafer 10. In the first embodiment of the board, the functions 10 of polishing, rinsing, and cleaning the board are performed by a single sheet. However, to increase the productivity of the overall method ', a device having several plates is preferred. In the second embodiment of the plate, the polishing function is performed by a polishing plate, and the washing and cleaning functions are performed by a single sheet of rinsing / cleaning plate. In this embodiment of decoupling polishing 15 from rinsing / cleaning, the quality of rinsing can be improved. The third embodiment of the printed board of the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs separates the polishing board, the washing board and the cleaning board into different boards. Regarding the second embodiment, this embodiment deals with rinsing and cleaning. The cleaning is performed by using a "virgin," which has no residual particles stuck in the board, and thus improves the final cleanliness of the wafer surface. In addition to polishing It is also possible to introduce abrasive particles such as silica particles to increase the aggression on the material. In addition to polishing, chemicals can also be introduced to make the mechanical erosion effect of the polishing plate accompanied by chemical invasion. An advantageous embodiment is the use of machinery--23. This paper size is in accordance with Chinese National Standard (CNS) A4 (210x297 mm) 200425303 A7 ___ B7 V. Description of the invention (22) Chemical leveling (ie CMP), the principle is The polishing surface of the polishing plate is combined with a polishing fluid including abrasive particles and a chemical etchant. In addition to mechanically polishing the surface of the donor wafer 10 to be polished, the polishing fluid combines chemical etching by an etchant and mechanical by abrasive particles 5 effects of etching. After removing the material on the polished surface of the donor wafer 10, it can be washed and / or cleaned again. Please note that In some cases, rinsing has an effect not only on the faster removal of residual and abrasive polishing particles, but also on the effect of chemical calendering. 10 In fact, if a chemically aggressive agent with a pH value is used during polishing, Adding an active interface agent (usually acidic) to the polishing solution is beneficial to quickly stop the chemical action of the polishing solution. For some semiconductor materials (such as silicon), chemical action is more important than mechanical action (in polishing such semiconductors) During the surface of the material, 15 small-size abrasive particles are used.) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, therefore, it is washed with an acidic active interface agent, especially for materials such as Shi Xi, which can completely stop the polishing action. And its effect on the wafer can be controlled. In this way, the thickness after polishing is guaranteed and reproducible. In this way, the polishing stop can be controlled, and therefore the thickness to be removed can be controlled more precisely. In addition, The rinsing solution is preferably injected gradually: too fast injection will cause the pH of the polishing solution to drop rapidly, and in some semiconducting In the case of bulk materials (such as silicon), the size of the abrasive particles will increase due to agglomeration, and these huge particles may cause abrasive damage due to agglomeration. -24- This paper size applies to China National Standard (CNS) A4 (Issued by 210x297) '" ----- 200425303 A7 V. Invention Description 23 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. At least part of it includes the case of silicon. The solution suitable for polishing silicon is generally an alkaline solution with a pH value between 7 and 10, preferably between 8 and 10, and a chemical agent based on nitrogen, such as ammonia. The abrasive particles are preferably silica molecules in the order of a few tenths of a micron in particle size. It is better to rinse the active interface agent to use a pH between 3 and 5, or even about 4, and the critical colloidal particle concentration (CMC) is about 0.1% or less. An advantageous rinsing time is approximately 50% of the polishing time. In the context of the present invention, these mechanical or mechano-chemical means are particularly specialized in controlling the quality of material removal in order to allow the structure I to be retained at least partially. Ren, removing material from the donor wafer generally includes using any mechanical means that can etch the material, such as grinding or bombarding with atomic species. For women, it is necessary to apply heat treatment before removing the material to further smooth the surface to be removed. Referring now to FIG. 1C, the portion of the original buffer structure that remains after the substance is removed is indicated by 11. During the first recovery step, it is preferable to perform first and in some cases the processing of the surface state of the material removal region of the donor wafer 10 in order to eliminate any roughness that occurs during the material removal. For this purpose, for example, heat treatment is performed. The description includes the entire removal method of removing a thin layer and recycling the donor wafer. -25- This paper size applies to China National Standard (CNS) A4 Male 5 10 15 20
I 線 A7I line A7
200425303 法的實例請參閱圖la-ld。 現#參閱圖la，如前所述，移除結構〗的厚度大於或等 於兩個有用層。 薄層移除法說明於圖lb及lc。 5 本發明的第一較佳移除步驟包括在移除結構I内產生 弱化區，以便稍後實施分離，並因此移除所要的層（或 多層）。 ^ 有數種技術可用來產生這類弱化區·· 第一項技術稱為Smart-Cut®，此為熟悉此方面技術之 斤省知且在與晶圓細減技術相關的許多文獻中都對 其有所描述，其包含：在第一步，以既定能量植入原子物 種（諸如氫離子），並因此產生弱化區。 第二項技術為經由產生至少一多孔層以形成弱介面， 例如文獻ΕΡ-Α-0 849 788中的描述。 15 現請參閱圖1b，第二步關於薄層的移除，包含將接收 基片2施加於施體晶圓1〇的表面。 接收基片2構成一機械支撐，其強度足以支撐從施體 晶圓10移除的部分第二層3，並防止受到來自外界可能的 機械應力。 10 此接收基片2例如是矽、石英、藍寶石、碳化矽或其 它類型的材料。 接收基片2的施加是將其與移除結構I緊密接觸並帶至 接合，其中，基片2與移除結構〗間以分子黏著為有利。 此項及其它的接合技術特別描述於Q.Y. T〇ng、 -26- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐）An example of the 200425303 method is shown in Figure la-ld. Now referring to Figure la, as mentioned earlier, the thickness of the removed structure is greater than or equal to two useful layers. The thin layer removal method is illustrated in FIGS. 1b and 1c. 5 The first preferred removal step of the present invention includes creating a weakened area within the removal structure I so that separation can be performed later, and therefore the desired layer (or layers) is removed. ^ There are several techniques that can be used to generate this type of weakened area. The first technique is called Smart-Cut®, which is familiar with this technology and is known in many literatures related to wafer thinning technology. There are descriptions that include, in a first step, implanting an atomic species (such as hydrogen ions) with a given energy and thereby creating a weakened zone. The second technique is to form a weak interface by creating at least one porous layer, as described in document EP-A-0 849 788. 15 Referring now to FIG. 1b, the second step involves the removal of the thin layer, which includes applying the receiving substrate 2 to the surface of the donor wafer 10. The receiving substrate 2 constitutes a mechanical support, which is strong enough to support a portion of the second layer 3 removed from the donor wafer 10 and to prevent possible mechanical stress from the outside. 10 The receiving substrate 2 is, for example, silicon, quartz, sapphire, silicon carbide, or other types of materials. The application of the receiving substrate 2 is to bring it into close contact with the removal structure I and bring it into a joint, wherein molecular adhesion is advantageous between the substrate 2 and the removal structure. This and other joining techniques are specifically described in Q.Y.T0ng, -26- This paper size applies to China National Standard (CNS) A4 (210x297 mm)
經濟部智慧財產局員工消費合作社印製 200425303 五、發明說明 25 10 15 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 20 G5sele and Wiley 等人名稱為“Semic〇nduct〇r Bonding (刊於 science and Technology，Interscience Technology)的文獻中。 如有需要，接合可伴隨對各接合表面適當的初步處 理，及/或供應熱能，及/或提供補充的接合劑。 因此，例如，在接合期間或之後立即執行熱處理，能 使接合更加穩固。也可經由接合層控制接合，諸如矽土， 其介於移除結構〗與接收基片2之間，且具有特別強的分子 接合能力。 如有需要，構成接收基片2之接合面的材料及/或形成 接合層的材料以電氣絕緣為有利，以便從被移除的層形成 SeOI結構，因此，Se0I結構的半導體層是移除結構〗的被 移除部分（即有用層）。 接收基片2—旦被接合，即從先前形成弱化區的區域 分離，以在該處執行部分施體晶圓丨〇的去除。 在该第一項技術（Smart-cut®)的情況，在第二步中對 植入區（形成弱化區）施加熱及/或機械處理，或提供其它 能量’以實現在弱化區的分離。 在該第二項技術的情況，脆弱層接受機械處理或是其 它的能量供應，以實現在脆弱區的分離。 按照該兩項技術任一項在弱化區的分離均可去除大部 分的施體晶圓10 ’以得到包含被移除之移除結構！的剩餘 結構（在此代表有用層），可能有的接合層及接收基片 移除後之結構I’構成移除結構1在移除後的剩餘部分， 訂 線 -27- 本紙張尺度適用中國國家標準(CNS)A4規袼（2〗0χ297公爱） 200425303 A7Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 200425303 V. Invention Description 25 10 15 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 Printed by G5sele and Wiley, etc. The name is "Semic〇nduct〇r Bonding (published in Science and Technology, Interscience Technology). If necessary, joining may be accompanied by appropriate preliminary treatment of each joining surface, and / or supplying thermal energy, and / or providing supplemental joining agents. Therefore, for example, heat treatment may be performed during or immediately after joining It can make the bonding more stable. The bonding can also be controlled through a bonding layer, such as silica, which is between the removed structure and the receiving substrate 2, and has a particularly strong molecular bonding ability. If necessary, form a receiving base The material of the bonding surface of the sheet 2 and / or the material forming the bonding layer is advantageous for electrical insulation in order to form the SeOI structure from the removed layer. Therefore, the semiconductor layer of the Se0I structure is the removed part of the removed structure ( Ie the useful layer). The receiving substrate 2-once joined, that is, separated from the area where the weakened area was previously formed, in order to Partial donor wafer removal is performed here. In the case of the first technology (Smart-cut®), heat and / or mechanical treatment is applied to the implanted area (weakened area) in the second step, or other Energy 'to achieve separation in the weakened zone. In the case of this second technique, the fragile layer receives mechanical treatment or other energy supply to achieve separation in the vulnerable zone. According to either of the two technologies, the weakened zone Separation can remove most of the donor wafer 10 'to get the remaining structure containing the removed removed structure! (Representing the useful layer here), possible bonding layers, and the structure of the receiving substrate after removal I' The remaining part of the removed structure 1 after removal, Thread -27- This paper size applies the Chinese National Standard (CNS) A4 Regulations (2〗 0χ297 公 爱) 200425303 A7
整個晶圓形成-施體晶㈣被送往回收，供稍後移 後層的期間再使用。 所回收的這類施體晶圓10，如圖ld所示。 ，按照前文討論的方法其中之一對移除後結構Γ執行機 5械或機械.化學侵#，以去除部分的移除後結構卜 在此，可經由不同的機械手段實施數種去除物質的技 術’特別是如果移除後結構Γ包含數層不同的原物質，諸 如以CMP或以簡單的拋光接續地侵蝕。 在材料的機械性侵蝕之前或之後可施以表面處理，諸 10如化學蝕刻、熱處理或平順處理。 現請參閱圖Id，在回收後得到的移除結構〗，，與移除結 構I實質上相同，減少的厚度接近被移除之層加上回收^ 間被去除之材料的平均厚度。按照本發明，此厚度足夠包 含可再被移除的有用層。 15 因此，施體晶圓10"適合在稍後的移除期間提供移除 結構Γ，内可被移除的有用層，且不需要任何其它的補充步 驟，諸如結晶生長的步驟。 經濟部智慧財產局員工消費合作社印製 在移除前之施體晶圓10的特定架構中，該晶圓包含複 數層可被移除的有用層。 0 在此特定架構中，對按照本發明的移除結構I而言， 其中的有用層可在按照本發明的回收步驟之間被移除，使 用有利的循環方法，按照本發明從一施體晶圓丨0移除有 用層，其中，接續地反覆執行： 移除處理，以及 -28- 本紙張尺度適用中國國家標準(CNS)A4規格（21〇χ297公釐） 200425303 A7 五、發明說明（27 經濟部智慧財產局員工消費合作杜印製 按照本發明的回收處理。 在實施循環移除處理之前，可 J相：知、刖文描述之在基片 1上形成薄層的一或多項技術勃^ 叉釘執仃形成按照本發明之施體 晶圓10的處理。 按照本發明，不需要在製造於基片工上的結m中成形 補充層’及/或不需要執行恢復至少部分基片1之處理，即 可開始從施體晶圓10形成在基片i上同一結構工中進行多次 移除，實施整體移除法以節省時間，比按照現有技術之不 同的方法簡單且大幅縮減花費。 可操作的移除次數特別是移除結構之厚度的函數，在 移除及回收移除結構I數次之後，所剩移除結構〗的厚度已 不夠包含要被移除的有用層。 因此，施體晶圓10實際上只剩下基片1。 第一種情況疋將施體晶圓1 0丟棄，其損失是整個基片 15 1，但基片的製造可能很複雜、費時且昂貴，特別是如果 基片1包含緩衝結構。 第二種較有利的情況是實施回收法以復原至少部分 基片1。 如果基片1包含一緩衝結構，可供實施的基片1回收 20 有3種類型： -包含去除整個緩衝結構的回收，但保留至少部分可 供緩衝結構在其上成形的支撐基片；不過，此回收 致使損失部分的基片1，要形成這部分通常最難也 最貴；且如有需要，則需要實施額外的步驟以再形 -29- 10 的 即The entire wafer formation-donor wafer is sent for recycling for later use during the later transfer. The recovered donor wafer 10 is shown in FIG. According to one of the methods discussed above, perform mechanical or mechanical. Chemical invasion on the removed structure Γ to remove part of the removed structure. Here, several types of material removal can be implemented through different mechanical means. The technique 'especially if the structure Γ after removal contains several different layers of raw material, such as successive erosion by CMP or by simple polishing. Surface treatments such as chemical etching, heat treatment or smoothing can be applied before or after the mechanical erosion of the material. Please refer to FIG. Id. The removed structure obtained after recycling is substantially the same as the removed structure I. The reduced thickness is close to the average thickness of the removed layer plus the removed material during recycling. According to the invention, this thickness is sufficient to contain useful layers which can be removed again. 15 Therefore, the donor wafer 10 " is suitable for providing a removal structure Γ, a useful layer that can be removed, during a later removal period, and does not require any other supplementary steps, such as a crystal growth step. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In the specific structure of the donor wafer 10 before removal, the wafer contains a plurality of useful layers that can be removed. 0 In this particular architecture, for the removal structure I according to the present invention, the useful layers therein can be removed between the recycling steps according to the present invention, using an advantageous recycling method, from a donor wafer according to the present invention.丨 0 Remove useful layers, which are successively performed repeatedly: Remove processing, and -28- This paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) 200425303 A7 V. Description of the invention (27 Economy The consumer cooperation of the Ministry of Intellectual Property Bureau Du printed the recycling process in accordance with the present invention. Before implementing the cyclic removal process, it can be described in phase J: one or more technologies that form a thin layer on the substrate 1 as described in the text. The prongs are processed to form the donor wafer 10 according to the present invention. According to the present invention, it is not necessary to form a supplemental layer in the junction m fabricated on the substrate worker and / or it is not necessary to perform a process of recovering at least part of the substrate 1 , You can start to remove the donor wafer 10 from the same structure on the substrate i multiple times, and implement the overall removal method to save time, simpler and significantly reduced than different methods according to the existing technology Cost. The number of operable removals is a function of the thickness of the removed structure, and after removing and recycling the removed structure I several times, the thickness of the remaining removed structure is not enough to contain the useful layer to be removed. Therefore, the donor wafer 10 actually has only the substrate 1. In the first case, the donor wafer 10 is discarded, and the loss is the entire substrate 15 1, but the manufacturing of the substrate may be complicated, time-consuming, and expensive, especially If the substrate 1 contains a buffer structure. The second advantageous case is to implement a recycling method to recover at least part of the substrate 1. If the substrate 1 contains a buffer structure, there are 3 types of substrates 1 that can be implemented for recycling 20: -A recovery comprising removing the entire buffer structure, but retaining at least part of the supporting substrate on which the buffer structure can be formed; however, this recovery results in the loss of a portion of the substrate 1 which is usually the most difficult and expensive to form; and If necessary, additional steps need to be implemented to reshape -29-10
本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐） 200425303 A7This paper size applies to China National Standard (CNS) A4 (210x297 mm) 200425303 A7
5 10 15 20 成緩衝結構，例如， 口果系要再塑相當於回收前之 基片的基片1 ; _包括去除部分緩衝結構的回收，且保留可在其u 形緩衝結構的支撐基片以及部分⑽衝結構_ ’：成本叩貝的緩衝層）；在回收期間，有利的存 疋執仃&擇ϋ物質去^，停止於位於緩衝結構寸 、擋層，如有而要，有利是實施再塑缓衝結構合 額外步驟，特別是將基片1再塑成相當於回收^ 基片； -包括去除至少部分剩餘之原移除結構工的回收，孟 允許保持整個基片i ;在回收期間可對移除結構^ 剩餘部分施以表面加工步驟(例如以CMP、熱處理 、犧牲氧化、轟擊或其它平滑技術）及/或可執行選 擇性物質去除，例如停止於位於移除結構〗與基片】 間的止擋層； 在基片！回收之後，接著按照本發明的方法形成新的 移除結構I，其中可有數層可移除的有用層。 此新的移除結構I可以與回收前的結構實質地相同。 經由猶為修改某些製造參數，此新的移除結構工也可 ，、回收前的移除結構1有些許不同。例如，材料中苹此化 合物的濃度可以務為修改。 二化 在所有情況中，以層之生長形成移除結構較為有利， 例如使用CVD或MBE磊晶。 在第一種情況中，移除結構It至少—層的生長是在 -30- 本紙張尺度適用令國國家標準(CNS)A4規格（22〇χ297公釐）5 10 15 20 into a buffer structure, for example, the mouth-fruit is to reshape the substrate 1 equivalent to the substrate before recycling; _Including the recovery of a portion of the buffer structure, and retaining a supporting substrate that can be in its u-shaped buffer structure And part of the punching structure _ ': the cost of the buffer layer); during the recovery period, favorable storage and implementation of the material to choose ^, stop at the buffer structure inch, barrier, if necessary, beneficial Is to implement the reshape buffer structure and additional steps, in particular the substrate 1 is reshaped into the equivalent of recycling ^ substrate;-including the removal of at least part of the original removal of the structure of the recovery, Meng allowed to maintain the entire substrate i; During the recovery, the remaining structure may be subjected to surface processing steps (such as by CMP, heat treatment, sacrificial oxidation, bombardment or other smoothing techniques) and / or selective substance removal may be performed, such as stopping at the removed structure. And the substrate] stop layer; on the substrate! After recovery, a new removal structure I is formed according to the method of the present invention, and there may be several removable useful layers. This new removed structure I may be substantially the same as the structure before recovery. After modifying some manufacturing parameters, this new structure removal tool is also available. The structure 1 is slightly different before removal. For example, the concentration of this compound in the material can be modified. Dimerization In all cases, it is advantageous to form the removed structure by layer growth, for example using CVD or MBE epitaxy. In the first case, remove the structure It at least-the growth of the layer is at -30-this paper size applies the national standard (CNS) A4 specification (22 × 297 mm)
200425303 五、發明說明（29 原位置進行，直接接續自其下方支撑層的成形，在此情 況下方的支撐層也以層的生長形成較佳。 在第二種情況中，這些層中至少一層是在其下方之生 長支撐表面進行輕微表面加工步驟後再生長，例如以 5 CMP拋光、熱處理或其它平順技術。 在本文獻的其餘部分中，吾人將介紹包含具有數層結 構I之施體晶圓10的架構例’其可為按照本發明的方：： 用。 / 特別疋，吾人介紹的材料有利於用於這類施體晶 10 10。 曰曰、 某些例子吾人將詳細說明，基片i中包含緩衝結構及 支撐基片，緩衝結構是形成在支撐基片上。 在某些有關的例中，緩衝結構在支撐基片的區域具有 第as礼4數在與移除結構I下層介接的介面附近具有 15 弟二晶格參數。 k頌型的緩衝結構包含一緩衝層執行這類晶格參數的 調適。 用於形成緩衝結構的第一項方法（如前所述）通常用來 付到具有此特性的緩衝層，其具有由數種原子元素構成的 20 缓衝層，包含： -至少一種原子元素是支撐基片有的成分；以及 -至少一種原子元素完全不存在或僅少許存在於支撐 基片内’其濃度隨著缓衝層的厚度逐漸改變。 緩衝層内此元素濃度的漸變是緩衝層内晶格參數以變 -31- 本紙張尺度適用中國國家標準(CNS)A4規袼（21〇 χ 297公爱） 訂 線 經濟部智慧財產局員工消費合作社印製 五、發明說明（30) 化的方式漸變的主要原因。 因此’在此架構中，緩衝層主要是合金。 用於緩衝基片之支撑 類的原子元素，諸如=層之成分可選㈣族 5 10 例二’在此情況，其可以是發的支撐基 Γ的中錯㈣㈣厚度漸變，從與切基片介接2 近。的值改變到緩衝層之另一面上的指定值。 在另-^以，支撑基片及顧衝層的成分可能包括 的原子疋素對，這類對諸如選自（銘、鎵、鋼）— (氮、磷、砷）的可能組合。 例如’在支樓基片為石申化鎵且緩衝層包含石申及/或嫁及 至少一種其它元素的情況，該後者的元素在與支撐基片介 接處之接近0的值隨厚度漸變到緩衝層另一面上的指定 值。 支撐基片及/或緩衝層的成分可能包含⑴…族的原子 元素對，這類原子元素對諸如選自（鋅、鎘）—(硫、硒、碲） 的可能組合。 以下列舉這類架構的數個例： 前3個例特別與包含矽之基片1、以以之緩衝層、以及 20矽及SiGe之其它層的施體晶圓1〇有關。 • 當這些晶圓1〇的移除層是SiGe及/或應變之矽時，用以 形成SGOI、SOI或Si/SG〇I結構時特別有用。 吾人將在下文中提出這類結構的數個實例： jMJL ·施體晶圓1 〇是由以下構成： -32- 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公爱） 200425303 A7 B7 五、發明說明（31) -基片1，由以下構成： /矽的支撐基片； 〆按照形成缓衝結構的該第一項技術以SiGe形成 的緩衝結構，包含一緩衝層及一附加層； 5 -移除結構I，包含SiGe及可能有的一或多層彈性應 變之矽的薄層。 緩衝層内的鍺濃度較佳是從與支撐基片的介接處漸 增，以致使SiGe晶格參數的漸變，如前文中的解釋。 典型上，包含1至3微米之間的厚度，以在表面得到良 10 好的結構性鬆弛，並限制與晶格參數差異相關的瑕疵，俾 使這些瑕疵被掩埋。200425303 V. Description of the invention (29 in place, directly from the formation of the support layer below it, in this case the support layer below is also formed by layer growth is better. In the second case, at least one of these layers is The growth support surface underneath is re-grown after a slight surface processing step, such as 5 CMP polishing, heat treatment, or other smoothing techniques. In the rest of this document, we will introduce a wafer containing a donor wafer 10 with several layers of structure I. The example of architecture can be used in accordance with the present invention: Use. / In particular, the materials I introduce are useful for this type of donor crystal 10 10. I will explain in detail some examples, the substrate i contains a buffer Structure and supporting substrate, the buffer structure is formed on the supporting substrate. In some related examples, the buffer structure has a number as high as 4 in the area of the supporting substrate, and has the vicinity of the interface that interfaces with the lower layer of the removal structure 1. 15 Second lattice parameter. The k-type buffer structure includes a buffer layer to perform this type of lattice parameter adjustment. The first method used to form the buffer structure (as before (Mentioned) Generally used to provide a buffer layer having this characteristic, which has a 20 buffer layer composed of several kinds of atomic elements, including:-at least one atomic element is a component of the supporting substrate; and-at least one atomic element Not present at all or only slightly in the supporting substrate 'Its concentration gradually changes with the thickness of the buffer layer. The gradual change in the concentration of this element in the buffer layer is the change of the lattice parameter in the buffer layer -31- This paper scale applies to China National Standard (CNS) A4 Regulations (21 × χ297 Public Love) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperatives of the Employees ’Cooperative V. The main reason for the evolution of the invention (30). Therefore, 'In this framework, The buffer layer is mainly an alloy. Atomic elements used to support the substrate of the buffer substrate, such as the composition of the layer can be selected from the group 5 10 Example 2 'In this case, it can be a gradient of the thickness of the support substrate Γ , From the value close to the cutting substrate interface 2. Change to the specified value on the other side of the buffer layer. In addition, the components that support the substrate and Gu Chong layer may include atomic halogen pairs, this type Selected from Ming, gallium, steel)-possible combinations of (nitrogen, phosphorus, arsenic). For example, 'in the case where the supporting substrate is gallium and the buffer layer contains gallium and / or marry and at least one other element, the latter The value of the element at the interface with the support substrate is close to 0 with the thickness to the specified value on the other side of the buffer layer. The composition of the support substrate and / or buffer layer may contain atomic element pairs of the ⑴ ... Possible combinations of atomic element pairs such as those selected from (zinc, cadmium)-(sulfur, selenium, tellurium). Here are a few examples of this type of architecture: The first three examples are specifically related to substrates containing silicon 1 and buffered with it Layers, and donor wafers 10 related to 20 silicon and other layers of SiGe. • Used to form SGOI, SOI, or Si / SG〇I when the removed layer of these wafers 10 is SiGe and / or strained silicon. It is particularly useful when it comes to structure. I will put forward a few examples of this kind of structure in the following: jMJL · donor wafer 1 〇 is composed of the following: -32- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 public love) 200425303 A7 B7 5 Explanation of the invention (31)-the substrate 1 is composed of the following: a silicon supporting substrate; 的 a buffer structure formed of SiGe according to the first technology for forming a buffer structure, comprising a buffer layer and an additional layer; 5-Remove Structure I, a thin layer containing SiGe and possibly one or more layers of elastically strained silicon. The germanium concentration in the buffer layer is preferably increased from the interface with the supporting substrate, so that the gradient of the SiGe lattice parameter is changed, as explained in the foregoing. Typically, a thickness between 1 and 3 microns is included to obtain good structural relaxation on the surface and to limit defects related to differences in lattice parameters, so that these defects are buried.
SiGe的附加層被緩衝層實質地鬆弛，其有利的均勻鍺 濃度與它們介面處附近之緩衝層的濃度實質上相同。 在鬆弛之SiGe層内，矽中的鍺濃度典型上在丨5〇/〇到 15 30%之間。 此30%的極限代表目前技術的典型極限，但在未來可 能會改變。 經濟部智慧財產局員工消費合作社印製 附加層的厚度視情況而定可有非常大的變化，典型的 厚度在0·5到1微米之間。 20 魁2 :施體晶圓10是由以下構成： -基片1，由以下構成·· /矽的支撐基片； 〆按照形成緩衝結構的該第一項技術以SiGe形成 的緩衝結構，包含一 SiGe的緩衝層及一鍺的附 -33- 本紙張尺度適用中國國家標準(CNS)A4規格（21〇χ297公釐） 200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（32 ) 加層； -移除結構I，在移除前包含AsGa及/或AlGaAs。 緩衝層内的錯濃度較佳是從與支撐基片的介接處漸 增，以致使矽支撐基片與鍺附加層間的晶格參數漸變。 5 基於此目的，緩衝層内的鍺濃度從大約0漸增到大約 100% ’更精確的數值大約98%，以使兩材料間的理論晶 格能完全匹配。 MA :施體晶圓1 〇是由以下構成·· -碎製成的基片1: 10 -移除結構〗，在移除前包含矽及可能有的一或多層 彈性應變之SiGe的薄層。 施體晶圓10是由以下構成： -基片1，由以下構成·· /矽的支撐基片； 15 /按照前文所討論及文獻WO 00/15885所揭示形成 緩衝結構的該第二項特定技術形成的缓衝結構 ，亦即，經由： 按照前所討論且揭示於文獻WO 00/15885之形成 緩衝結構的該第二項特定技術沈積鍺或SiGe的 20 第一層， 可接著沈積選用的第二層，其可增進覆蓋層的 結晶品質，如文獻WO 00/1 5885中的揭示，第二 層為： 如果緩衝層的第一層是鍺，則是SiGe(50/50); -34- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐）The additional layers of SiGe are substantially relaxed by the buffer layer, and their favorable uniform germanium concentration is substantially the same as that of the buffer layer near their interface. In the relaxed SiGe layer, the germanium concentration in silicon is typically between 50/50 and 15 30%. This 30% limit represents the typical limit of current technology, but may change in the future. The thickness of the additional layer printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs may vary greatly depending on the situation. Typical thicknesses are between 0.5 and 1 micron. 20 Kui 2: The donor wafer 10 is composed of:-a substrate 1, which is composed of a support substrate of silicon; ； a buffer structure formed of SiGe according to the first technique of forming a buffer structure, including a SiGe Buffer layer and a germanium attachment -33- This paper size is applicable to the Chinese National Standard (CNS) A4 specification (21 × 297 mm) 200425303 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (32) Adding layers;-removing structure I, including AsGa and / or AlGaAs before removal. The error concentration in the buffer layer is preferably increased from the interface with the supporting substrate, so that the lattice parameter between the silicon supporting substrate and the germanium additional layer is gradually changed. 5 For this purpose, the germanium concentration in the buffer layer is gradually increased from about 0 to about 100%, and the more accurate value is about 98%, so that the theoretical lattice between the two materials can be completely matched. MA: The donor wafer 1 0 is composed of the following:--a broken substrate 1: 10-a removal structure, which contains a thin layer of silicon and one or more layers of elastically strained SiGe before removal. The donor wafer 10 is composed of:-a substrate 1, composed of the following: / / silicon support substrate; 15 / formed according to the second specific technique for forming a buffer structure as discussed above and disclosed in document WO 00/15885 A buffer structure, that is, by: depositing a first layer of germanium or SiGe 20 according to the second specific technique of forming a buffer structure previously discussed and disclosed in document WO 00/15885, and then depositing an optional second Layer, which can improve the crystalline quality of the cover layer, as disclosed in document WO 00/1 5885, the second layer is: if the first layer of the buffer layer is germanium, it is SiGe (50/50); -34- 本Paper size applies to China National Standard (CNS) A4 (210x297 mm)
200425303 A7 B7 10 15 經濟部智慧財產局員工消費合作社印製 20 五、發明說明（33 ) -- 如果缓衝層的第一層是SlGe，則是應變的石夕； /移除結構I，包含以下材料至少其中之一：鍺、 SiGe、石夕。 對移除結構I的移除可以是移除結構〗中的—組層或是 5 —單層。 曰 須注意，按照此例，移除到最後，所得到的結構不能 有任何錯位類型的瑕疵，即使是在埋層區内。 因此，所得到的此種結構可用來在^以、鍺或矽上磊 晶生長補充層，例如應變的石夕。 經立：施體晶圓10由以下構成： -基片1，由以下構成： /矽的支撐基片； 〆按照形成緩衝結構的該第三項技術所形成矽的 緩衝層； /移除結構I，包含下列材料至少其中之一 ：SiGe 此施體晶圓10是按照形成緩衝結構的該第三項技術形 成缓衝層後所得到的晶圓。 在緩衝層的第一實施例中，在緩衝層形成前即存在移 除結構I。 在移除如’移除結構I内諸如錯位之瑕疵的密度小於 大約107cm·2較佳。 在移除前，含有15%鍺之SiGe之移除結構的典型厚度 大約250奈米，含有30%鍺之以^之移除結構的典型厚度 -35- 本紙張尺度朝家鮮(CNS)A4祕(210x1^7*7200425303 A7 B7 10 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 V. Description of the Invention (33)-If the first layer of the buffer layer is SlGe, it is a strained stone Xi; / Remove Structure I, contains At least one of the following materials: germanium, SiGe, Shi Xi. The removal of the removal structure I can be in the removal structure-group layer or 5-single layer. It should be noted that according to this example, the structure removed must not have any dislocation-type defects, even in the buried area. Therefore, the obtained structure can be used to epitaxially grow a supplementary layer, such as a strained stone, on germanium, germanium, or silicon. Jing Li: the donor wafer 10 is composed of:-a substrate 1, composed of: / a supporting substrate of silicon; 缓冲 a buffer layer of silicon formed in accordance with the third technique of forming a buffer structure; / removing structure I, It includes at least one of the following materials: SiGe The donor wafer 10 is a wafer obtained by forming a buffer layer according to the third technique of forming a buffer structure. In the first embodiment of the buffer layer, the removal structure I exists before the buffer layer is formed. It is preferred that the density of defects such as dislocations in the removed structure I 'be less than about 107 cm · 2. Before removal, the typical thickness of a SiGe removal structure containing 15% germanium is about 250 nanometers, and the typical thickness of a removal structure containing 30% germanium is ^ -35- This paper is oriented towards domestic fresh (CNS) A4 Secret (210x1 ^ 7 * 7
200425303 A7 B7 五、發明說明（34) 大約100奈米，因此’仍在它們各自之彈性應變的最終臨 界厚度以内。 從前文可看出，缓衝層是按以下兩個主要步驟开）成· •經由植入諸如氫或氦的原子物種以在矽的支撐 5 基片1内形成擾動區； •熱處理以致使移除結構内之彈性應變至少相對 鬆弛。 在第一步驟期間，植入氫與氦所使用之能量的範圍典 型上在12至25keV之間。 ' 10 植入氫或氦的劑量典型上在1014至i〇17Cm·2之間。 cnTz的氫較 >因此，例如以含有15%之鍺的移除結構而言，使用 大約25keV的能量植入劑量大約3χ1〇16( 佳0 15 > 因此，例如以含有30%之鍺的移除結 構而言，使用 大約18keV的能量植入劑量大約2xl〇!6 佳 cm_的氦較 經濟部智慧財產局員工消費合作社印製 原子物種植入基片1内的深度典型上在5〇奈米至ι〇〇卉 米之間。 $ 在第二步驟期間執行的熱處理須能使位於擾動區與移 20除結構間之區域内之擾動的數量及振幅明顯地增加。 此區域内的擾動被位移，並接著形成該緩衝層。200425303 A7 B7 V. Description of the invention (34) is about 100 nm, so ’is still within the final critical thickness of their respective elastic strains. From the foregoing, it can be seen that the buffer layer is formed according to the following two main steps: • Formation of a perturbation region within the substrate 5 of silicon 1 by implanting an atomic species such as hydrogen or helium; • heat treatment to cause migration The elastic strain within the structure is at least relatively relaxed. During the first step, the range of energy used to implant hydrogen and helium is typically between 12 and 25 keV. The dose of implanted hydrogen or helium is typically between 1014 and 1017 Cm · 2. The hydrogen of cnTz is higher than that, for example, with a removal structure containing 15% of germanium, using an energy of about 25keV, the implantation dose is about 3 × 1016 (better 0 15). Therefore, for example, with 30% of germanium In terms of removing the structure, using an energy of about 18 keV, the implantation dose of helium of about 2 × 10 cm −6 cm is more than 50 μm deeper than the atomic species implanted in the substrate 1 printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Between nanometers and ι〇〇〇 米. $ The heat treatment performed during the second step must be able to significantly increase the number and amplitude of the disturbances in the area between the disturbance zone and the shift structure. Is displaced, and then the buffer layer is formed.
出現於緩衝層内的錯位接著致使移除結構的整體 弛。 一 A 熱處理以在惰性大氣中實施較佳。 -36- 本纸張尺度適用中關家標準(CNS)A4規格7^x297公釐/ 200425303 A7 B7 五、發明說明（35) 不過，熱處理也可在其它大氣中實施，例如氧化大 氣。 因此，對此類型之施體晶圓10實施的特定熱處理，典 型上在400°c至1 000°C間的溫度進行，持續時間從30分鐘 5 至60分鐘，更特定是從大約5分鐘至大約15分鐘。 在缓衝層的第二實施例中，在形成緩衝層前移除結構 I不存在，因此，施體晶圓較佳的形式為： -每7的基片1， -含有至少15%鍺的SiGe層，SiGe被彈性地應變。 10 用於此SiGe層的鬆弛技術及參數與缓衝層的第一實施 例實質上相同。 缓衝層形成後，構成移除結構I的層包含整體鬆弛之 層或層組。 因此，移除結構I是在緩衝層之後形成，與此例中所 15 提出的第一實施例不同。 與實驗技術有關的進一步技術請參閱B. Hollander等人 所做的研究，特別是名稱為“Strain relaxation of pseudomorphic Sii.xGex / Si(100) heterostructures after 經濟部智慧財產局員工消費合作社印製 hydrogen or helium ion implantation for virtual substrate 20 fabrication” 的文獻（子ij 於 Nuclear and Instruments and methods in Physics Research B 15-177(2001) 357-367) ° 當晶圓10接合到接收基片5上之後，無論有或無中間 接合層，使用前述一或多樣習知技術進行移除，並接著按 照本發明回收晶圓。 -37- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐） Α7Dislocations that occur within the buffer layer then cause overall relaxation of the removed structure. An A heat treatment is preferred to be performed in an inert atmosphere. -36- This paper size is applicable to Zhongguanjia Standard (CNS) A4 specification 7 ^ x297 mm / 200425303 A7 B7 V. Description of the invention (35) However, heat treatment can also be carried out in other atmospheres, such as oxidizing the atmosphere. Therefore, the specific heat treatment performed on this type of donor wafer 10 is typically performed at a temperature between 400 ° C and 1,000 ° C for a duration of from 30 minutes to 5 to 60 minutes, and more specifically from about 5 minutes to about 15 minutes. minute. In the second embodiment of the buffer layer, the removal structure I does not exist before the buffer layer is formed. Therefore, the donor wafer is preferably in the form of:-every 7 substrates--a SiGe layer containing at least 15% germanium SiGe is elastically strained. 10 The relaxation technique and parameters used for this SiGe layer are substantially the same as those of the first embodiment of the buffer layer. After the buffer layer is formed, the layers constituting the removal structure I include a layer or a group of layers that are loosened overall. Therefore, the removing structure I is formed after the buffer layer, which is different from the first embodiment proposed in this example. For further technology related to experimental technology, please refer to the research by B. Hollander et al., Especially the name “Strain relaxation of pseudomorphic Sii.xGex / Si (100) heterostructures after printed by hydrogen or helium ion implantation for virtual substrate 20 fabrication ”(sub-ij in Nuclear and Instruments and methods in Physics Research B 15-177 (2001) 357-367) ° After the wafer 10 is bonded to the receiving substrate 5, Or without an intermediate bonding layer, it is removed using one or more of the conventional techniques described above, and then the wafer is recovered in accordance with the present invention. -37- This paper size applies to Chinese National Standard (CNS) A4 (210x297 mm) Α7
200425303 例6 :施體晶圓10是由以下構成： -基片1，由以下構成： /支撐基片，其至少與其上方緩衝結構介接區域 包含砷化鎵； 5 /技知、开》成緩衝結構的該第一項技術形成ΙΠ-V材 料的缓衝結構； -移除結構I，在移除前包含ΠΙ-V族材料。 此緩衝結構的主要目的是將移除結構I靠近它們介面 處之材料的晶格參數（以磷化銦為例，其標稱值為5 87埃） 10調適到砷化鎵的值（其標稱值大約5.65埃）。 在整塊ΠΙ-V族材料的情況，經由比較諸如整塊磷化銦 及整塊砷化鎵等不同材料即可明瞭這類緩衝結構的實際優 點，例如，整塊砷化鎵與整塊磷化銦相較，其價格便宜、 在半導體市場上較易獲得、機械強度較強、具有習知最佳 15 的背面接觸技術、以及可得到較大的尺寸（典型上為6吋， 碟化銦只有4吋）。 不過，磷化銦的電子性能通常優於砷化鎵的電子性 能。 因此，例如，經由在砷化鎵的支撐基片上製造形成鱗 20 化銦的移除結構I ’並經由一緩衝結構鬆弛，該施體晶圓 10給予了形成6吋磷化銦層的解決方案。 因此’可明顯看出這類施體晶圓10可提供的優點：其 允弁經由轉移具有指定品質及特性的ιιι_ν材料以形成活 性層，例如能與使用該整塊材料之實施例所得到的特性相 -38 - 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐）200425303 Example 6: Donor wafer 10 is composed of the following:-Substrate 1, consisting of: / Support substrate, which at least contains the gallium arsenide in the buffer structure interface area above it; 5 / Technology, open "into a buffer structure This first technique of the invention forms a buffer structure of III-V material;-Removes structure I, which contains III-V material before removal. The main purpose of this buffer structure is to remove the lattice parameters of the materials near the interface of Structure I (indium phosphide, for example, whose nominal value is 5 87 Angstroms) 10. The nominal value is about 5.65 Angstroms). In the case of monolithic III-V materials, the actual advantages of this type of buffer structure can be understood by comparing different materials such as monolithic indium phosphide and monolithic gallium arsenide, for example, monolithic gallium arsenide and monolithic phosphorous Compared to indium, it is cheaper, easier to obtain in the semiconductor market, has higher mechanical strength, has the best back contact technology of 15 and can obtain larger sizes (typically 6 inches, indium dish) Only 4 inches). However, the electronic properties of indium phosphide are usually better than the electronic properties of gallium arsenide. Therefore, for example, by fabricating a scale-removing structure I 'of indium carbide on a support substrate of gallium arsenide and relaxing through a buffer structure, the donor wafer 10 provides a solution for forming a 6-inch indium phosphide layer. Therefore, it can be clearly seen that this kind of donor wafer 10 can provide an advantage: it allows the active layer to be formed by transferring ιιι_ν material with specified quality and characteristics, for example, it can be compared with the characteristics obtained by the embodiment using the entire material. -38-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
經濟部智慧財產局員工消費合作社印製 200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（37 ) 似。 典型上，包含在此類型施體晶圓10内之緩衝結構的厚 度需要超過1微米，特別是如果要避免在每次移除操作後 被破壞，特別是經由按照本發明的回收方法，可增加此厚 5 度。 在移除結構I包含其與下方緩衝結構介接區域基本上 是鬆弛之磷化銦的例中，基片1之有利的缓衝結構包含一 由InGaAs所構成的緩衝層，其中銦濃度的變化在0至大約 53% 〇 10 缓衝結構也可進一步包含一原子元素濃度實質不變之 III-V材料的附加層，諸如InGaAs或InAlAs。 在一特定的移除情況中，移除結構I中至少一磷化銦 層被移除，用以轉移到接收基片2。 因此，可獲致電氣及電子特性可能的優點。 15 例如，如果情況是被移除的部分進一步包含InGaAs或Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 200425303 A7 B7 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The description of the invention (37) is similar. Typically, the thickness of the buffer structure contained in this type of donor wafer 10 needs to exceed 1 micron, especially if it is to be prevented from being destroyed after each removal operation, especially through the recycling method according to the present invention, this thickness can be increased. 5 degrees. In the case where the removed structure I includes indium phosphide whose interface area with the underlying buffer structure is substantially relaxed, the favorable buffer structure of the substrate 1 includes a buffer layer made of InGaAs, where the indium concentration changes The buffer structure may further include an additional layer of III-V material, such as InGaAs or InAlAs, with a substantially constant atomic element concentration between 0 and about 53%. In a specific removal situation, at least one indium phosphide layer in the removal structure I is removed for transfer to the receiving substrate 2. As a result, possible advantages of electrical and electronic characteristics can be obtained. 15 For example, if the situation is that the removed part further contains InGaAs or
InAlAs ;後者材料與磷化銦之電子帶間的不連續會在被移 除層中產生明顯較佳的電子遷移率。 施體晶圓10也可以是其它架構，包括其它的III-V族化 合物。 20 高電子遷移率電晶體（High Electron MobilityInAlAs; the discontinuity between the latter material and the electronic band of indium phosphide will result in significantly better electron mobility in the removed layer. The donor wafer 10 may also have other architectures, including other III-V compounds. 20 High Electron Mobility Transistor
Transistor ; HEMT)及異質接面雙極電晶體（Heterojunction Bipolar Transistor ; HBT)是這些移除層之應用的典型實施 例。 例7 :施體晶圓10是由以下構成： -39- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐）Transistor (HEMT) and Heterojunction Bipolar Transistor (HBT) are typical examples of the application of these removal layers. Example 7: The donor wafer 10 is composed of the following: -39- This paper size applies the Chinese National Standard (CNS) A4 specification (210x297 mm)
200425303 A7 B7 五、發明說明（38) -基片1，由以下構成： /支#基片’其與上方缓衝結構介接區域包含砷 化鎵； /按照形成緩衝結構的該第一項技術形成的緩衝 、结ί冓’ A在其與移除結構I的介接區域包含 InGaAs ； 移除結構1 ’在移除前包含磷化銦及/或InxGa^x AsyP1-y。 此類型的施體晶圓1 〇已描述於例6。 10 魁施體晶圓10是由以下構成： -基片1，由以下構成： /監寶石、或碳化矽或矽的支撐基片； /按照形成緩衝層的該第一項技術形成的緩衝結 構’由以下構成： • AlxGa“xN的變化缓衝層，其中，χ從與藍寶石 介接處的0開始隨厚度變化到1 ; •氮化鎵的附加層，用以限制錯位類型的結晶瑕 疫； 經 濟 部 智 慧 財 產 局 員 工 消 費 合 h 社 印 製 •移除結構I ’包含氮化物層。 III-V族之氮化鎵、氮化鋁、氮化銦等氮化物在微電子 領域中十分有用，特別是在發光元件中，諸如雷射，應用 於諸如讀或寫以高密度儲存在光碟上的資料，或諸如用於 新顯示為科技的發光二極體中。這些材料也適合用於製迕 高功率電子組件，或是在高溫中操作的電子組件。 -40- 本紙張尺度適用中國國家標準(CNS)A4規格（21〇χ297公釐） 39200425303 A7 經濟部智慧財產局員工消費合作社印製 形成包括在移除結構i内之氮化物層的模式之一是經 寸力的氮化鎵層上沈積族ζ的有機金屬化合物以蟲晶 生長’諸如以三甲鎵、三甲胺銘烧或三甲銦可分別沈積氮 化叙、氮化鋁及氮化銦層。 /本發明用於從相同的施體晶圓10轉移數層這些氮化 層時^在每一次的層移除操作之間包括-回收步驟y本發 明允許準備移除結構1中的另-層供另-次的移除。 教之·施體晶圓1 〇是由以下構成： -基片1，由以下構成： 〆監寶石、或碳化矽或矽的支撐基片； /氮化鎵的中間層； 〆二氧化矽的遮罩； 〆氮化嫁的緩衝層； -移除結構I，包含氮化物的層或層組，其中至少一 層是氮化鎵。 形成緩衝層的方法如前文所述，如所介紹之形成緩衝 結構的該第四項技術，且其是使用此㈤技術各向異性地 生長連續的氮化物層，在此特別是氮化鎵。 此架構中所使用的二氧化矽遮罩以帶狀較佳，以周期 f生的方式且實質上相互間平行地排列於氮化鎵的中間層 每—條帶的厚度典型上在十分之幾微米的數量級 帶的寬度在數微米的數量級。 典型上’每一條帶相互間相隔的距離大約10微米或 -41- 本紙張尺度 5 10 訂 15 線 20 而 15 200425303 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（4〇 ) 微米。 例如，這些帶系統的間距為13微米，每條帶厚0.2微 米，寬5微米。 如前所解釋的一般情況，這些二氧化矽帶將致使沈積 5 於其上之氮化鎵中的錯位集中在這些帶的自由表面附近。 在氮化鎵之厚度中的這些錯位被侷限於遮罩四周，接 著形成該缓衝層。 在缓衝層上沈積晶格參數與氮化鎵之晶格參數類似的 氮化鎵或其它材料的層，以在缓衝層上形成該移除結構 10 1° 因此，移除結構I包含至少兩層，且每一層的厚度等 於或大於要被移除之有用層的厚度。 有關按照LOG法形成晶圓之方法更詳細的資訊請參閱 摘自“MRS Bulletin” May 1998，volume 23，No.5，at the 15 article of Shuji Nakamura的文獻，名稱為 “In/GaN/AlGaN-Based Laser Diodes with an Estimated Lifetime of Longer than 10,000Hours”。 特別是，在此形成的過程期間，可如前例8中描述， 將氮化銦層整合到此移除結構I内。 20 其它成分也可加到本文所提出的半導體層中，例如， 諸如碳，其在層中的濃度可考慮實質上等於或遠小於 50%，或更特定是濃度小於或等於5%。 最後，本發明並不限於上述各例所提之材料的施體晶 圓10，也涵蓋屬於II、III、IV、V或VI族之其它類型的材 -42- 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐）200425303 A7 B7 V. Description of the invention (38)-The substrate 1 is composed of the following: / support #Substrate 'which interfaces with the buffer structure above contains gallium arsenide; / according to the first technology of forming a buffer structure The formed buffer, junction 'A' includes InGaAs in its interface region with the removed structure I; the removed structure 1 'contains indium phosphide and / or InxGa ^ x AsyP1-y before removal. This type of donor wafer 10 has been described in Example 6. 10 The substrate wafer 10 is composed of:-a substrate 1, consisting of: / a monitor gem, or a silicon carbide or silicon supporting substrate; / a buffer structure formed according to the first technique of forming a buffer layer, The following composition: • AlxGa “xN change buffer layer, where χ varies from thickness to 1 starting from 0 at the interface with sapphire; • Additional layer of gallium nitride to limit the type of crystal defects of dislocation; Economy Printed by the Consumer Intellectual Property Agency of the Ministry of Intellectual Property Bureau • Removal of structure I 'contains a nitride layer. Group III-V nitrides such as gallium nitride, aluminum nitride, and indium nitride are very useful in the field of microelectronics, especially Is used in light-emitting elements, such as lasers, for applications such as reading or writing data stored on optical discs at high densities, or for use in light-emitting diodes that are newly displayed as technology. These materials are also suitable for high-tech applications. Power electronic components, or electronic components that operate in high temperature. -40- This paper size applies to China National Standard (CNS) A4 (21 × 297 mm) 39200425303 A7 Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs One of the modes for forming the nitride layer included in the removed structure i is to deposit an organometallic compound of group ζ on the gallium nitride layer through force growth, such as trimethylgallium, trimethylamine, or trimethylindium. Nitride, aluminum nitride, and indium nitride layers can be deposited separately. / The present invention is used to transfer several layers of these nitride layers from the same donor wafer 10 ^ includes-a recovery step between each layer removal operation y The present invention allows the preparation of another layer in the structure 1 for another removal. The teaching donor wafer 10 is composed of the following:-the substrate 1 is composed of: a gemstone, or silicon carbide or Silicon supporting substrate; / gallium nitride intermediate layer; 矽 mask of silicon dioxide; 〆 nitride-buffered buffer layer;-removing structure I, nitride-containing layer or layer group, at least one of which is nitrogen The method of forming a buffer layer is as described above, as described in the fourth technique of forming a buffer structure, and it is an anisotropic growth of a continuous nitride layer using this plutonium technology, especially nitrogen here. Gallium oxide. The silicon dioxide mask used in this architecture Preferably, the thickness of each band of the intermediate layer arranged in parallel to each other in the gallium nitride layer in a periodic manner is typically on the order of a few tenths of a micrometer, and the width of the band is on the order of several micrometers. 'Each strip is separated from each other by approximately 10 microns or -41- This paper size is 5 10 ordered 15 lines 20 and 15 200425303 A7 B7 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of invention (4) microns. For example, these band systems have a pitch of 13 microns, and each band is 0.2 microns thick and 5 microns wide. As explained previously, these silicon dioxide ribbons will cause dislocation concentration in the gallium nitride deposited thereon. Near the free surface of these bands. These dislocations in the thickness of gallium nitride are confined to the periphery of the mask, and then the buffer layer is formed. A layer of gallium nitride or other material having a lattice parameter similar to that of gallium nitride is deposited on the buffer layer to form the removed structure 10 1 ° on the buffer layer. Therefore, the removed structure I includes at least Two layers with a thickness equal to or greater than the thickness of the useful layer to be removed. For more detailed information on the method of forming a wafer according to the LOG method, please refer to a document from "MRS Bulletin" May 1998, volume 23, No. 5, at the 15 article of Shuji Nakamura, entitled "In / GaN / AlGaN-Based Laser Diodes with an Estimated Lifetime of Longer than 10,000Hours. " In particular, during the formation process, an indium nitride layer can be integrated into the removal structure I as described in Example 8 above. 20 Other ingredients may also be added to the semiconductor layer proposed herein, such as carbon, for example, whose concentration in the layer may be considered to be substantially equal to or much less than 50%, or more specifically a concentration of less than or equal to 5%. Finally, the present invention is not limited to the donor wafer 10 of the materials mentioned in the above examples, but also covers other types of materials belonging to Groups II, III, IV, V, or VI. -42- This paper standard applies to Chinese National Standards (CNS) A4 size (210 X 297 mm)
200425303 A7 B7 五、發明說明（41) 料，及屬於IV-IV、III-V、II-VI族的合金。 須注意，在合金材料的情況，合金可選擇雙元、三 元、四元或更高次元的合金。 如果施體晶圓10包含緩衝層或緩衝結構，本發明並不 5 限於主要功能為調適具有不同晶格參數之兩毗鄰層間晶格 參數的缓衝層或緩衝結構，也有關於在本文中更廣義的任 何緩衝層或緩衝結構。 此外，移除有用層所得到的最終結構並不限於SGOI、 SOI、Si/SGOI結構，其也不限於HEMT及HBT電晶體的結 10 構，或應用於雷射的結構。 【圖式簡單說明】 圖la-Id顯示按照本發明之製程的各步驟，包含從施 體晶圓連續地移除薄層，並在移除後回收施體晶圓。 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印制衣 200425303 A7 B7 五、發明說明（42 ) 圖式之代號說明： 1 基片 I 移除绪構 10 施體晶圓 2 接收基片 10， 移除後的施體晶圓 Γ 移除後的移除結構 I" 去除後的移除結構 10" 去除後的施體晶圓 代表圖之代號說明： 1 基片 去除後的移除結構 10" 去除後的施體晶圓 -44- 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公釐）200425303 A7 B7 V. Description of the invention (41), and alloys belonging to groups IV-IV, III-V, and II-VI. It should be noted that in the case of alloy materials, the alloy can be selected from binary, ternary, quaternary or higher-order alloys. If the donor wafer 10 includes a buffer layer or a buffer structure, the present invention is not limited to a buffer layer or a buffer structure whose main function is to adjust the lattice parameters of two adjacent layers with different lattice parameters. Buffer layer or structure. In addition, the final structure obtained by removing the useful layer is not limited to the SGOI, SOI, Si / SGOI structures, nor is it limited to the structures of HEMT and HBT transistors, or structures applied to lasers. [Brief description of the drawings] Figures la-Id show the steps of the process according to the present invention, which include continuously removing a thin layer from the donor wafer and recovering the donor wafer after removal. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs of the Consumer Cooperatives The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) Printed clothes by the Employee Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 200425303 A7 B7 V. Description of the invention (42) Description of the drawing code: 1 substrate I removes the structure 10 donor wafer 2 receives the substrate 10, the removed donor wafer Γ removes the structure I " removes the structure 10 " after removal Donor wafer representative code description: 1 Removed structure after substrate removal 10 " Removed donor wafer-44- This paper size applies to China National Standard (CNS) A4 (210x297 mm)
Claims (2)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0300098A FR2849714B1 (en) | 2003-01-07 | 2003-01-07 | RECYCLING BY MECHANICAL MEANS OF A PLATE COMPRISING A MULTILAYER STRUCTURE AFTER SAMPLING A THIN LAYER |
| US47247003P | 2003-05-22 | 2003-05-22 |
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| TW200425303A true TW200425303A (en) | 2004-11-16 |
| TWI309858B TWI309858B (en) | 2009-05-11 |
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| Country | Link |
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| CN (1) | CN100580903C (en) |
| FR (1) | FR2849714B1 (en) |
| TW (1) | TWI309858B (en) |
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| JP5884585B2 (en) * | 2012-03-21 | 2016-03-15 | 住友電気工業株式会社 | Method for manufacturing silicon carbide semiconductor device |
| JP6237248B2 (en) * | 2014-01-15 | 2017-11-29 | 住友電気工業株式会社 | Method for producing silicon carbide single crystal |
| CN105374664A (en) * | 2015-10-23 | 2016-03-02 | 中国科学院上海微***与信息技术研究所 | Preparation method of InP film composite substrate |
| CN109308992A (en) * | 2018-09-21 | 2019-02-05 | 苏州汉骅半导体有限公司 | The method for recycling silicon carbide substrates |
| CN109270696B (en) * | 2018-11-08 | 2021-02-09 | 宁波维真显示科技股份有限公司 | Preparation method of 3D film |
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| FR2775121B1 (en) * | 1998-02-13 | 2000-05-05 | Picogiga Sa | METHOD FOR MANUFACTURING THIN FILM SUBSTRATES OF SEMICONDUCTOR MATERIAL, EPITAXIAL STRUCTURES OF SEMICONDUCTOR MATERIAL FORMED ON SUCH SUBSTRATES, AND COMPONENTS OBTAINED FROM SUCH STRUCTURES |
| JP2000223682A (en) * | 1999-02-02 | 2000-08-11 | Canon Inc | Processing method for basic body and production of semiconductor substrate |
| FR2794893B1 (en) * | 1999-06-14 | 2001-09-14 | France Telecom | PROCESS FOR PRODUCING A SILICON SUBSTRATE HAVING A THIN LAYER OF BURIED SILICON OXIDE |
| US6500732B1 (en) * | 1999-08-10 | 2002-12-31 | Silicon Genesis Corporation | Cleaving process to fabricate multilayered substrates using low implantation doses |
| JP3943782B2 (en) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | Reclaimed wafer reclaim processing method and reclaimed peeled wafer |
-
2003
- 2003-01-07 FR FR0300098A patent/FR2849714B1/en not_active Expired - Lifetime
-
2004
- 2004-01-07 CN CN200480001944A patent/CN100580903C/en not_active Expired - Lifetime
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Also Published As
| Publication number | Publication date |
|---|---|
| FR2849714B1 (en) | 2007-03-09 |
| CN1723553A (en) | 2006-01-18 |
| FR2849714A1 (en) | 2004-07-09 |
| CN100580903C (en) | 2010-01-13 |
| TWI309858B (en) | 2009-05-11 |
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