TW200406902A - Method for constraining the spread of solder during reflow for preplated high wettability lead frame flip chip assembly - Google Patents

Method for constraining the spread of solder during reflow for preplated high wettability lead frame flip chip assembly Download PDF

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Publication number
TW200406902A
TW200406902A TW092121587A TW92121587A TW200406902A TW 200406902 A TW200406902 A TW 200406902A TW 092121587 A TW092121587 A TW 092121587A TW 92121587 A TW92121587 A TW 92121587A TW 200406902 A TW200406902 A TW 200406902A
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Taiwan
Prior art keywords
solder
lead frame
group
package
patent application
Prior art date
Application number
TW092121587A
Other languages
English (en)
Inventor
John Briar
Roman Perez
Kee-Kwang Lau
Alex Chew
Original Assignee
Advanpack Solutions Pte Ltd
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Publication date
Application filed by Advanpack Solutions Pte Ltd filed Critical Advanpack Solutions Pte Ltd
Publication of TW200406902A publication Critical patent/TW200406902A/zh

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    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
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200406902 玖、發明說明： 【潑^明戶斤屬之_控^術^領域^ 發明領域 本發明概括有關一高密度半導體覆晶記憶體封裝體， 且更確切來s兒係有關一引線框總成之製造，其中揭露一用 於銲料擴展及銲料凸塊厚度控制之方法。 L· ]| 發明背景 隨著目前及未來微電子封裝的需求趨勢朝向具有高密 10度凸塊的大尺寸晶粒應用發展而且需要更密集、更輕、更 小、更薄且更快速的電子產品，在迴銲期間對於銲料擴展 的更好控制以及較厚的銲料厚度係變得很重要。本發明提 供一種利用建造在引線框上的凹坑特性來製造高密度細間 距引線框覆晶總成之方法。 15 _發5登予漢布瑞（Hembree)的美國專利案6,386,436號描 述一用以對於覆晶總成形成銲料凸塊導線之方法。 -發證予芮宗（Razon)等人的美國專利案6,386,433號揭 露一銲球輸送與迴流方法及裝置。 -發證予布洛雷特（Brouillette)等人的美國專利案 20 6,〇56，191號顯示一用以形成銲料凸塊之方法及裝置。 -發證予隆古(Longgood)等人的美國專利案6,〇45,032號
揭路一用以在波銲期間防止電子組件的銲料迴流之方法。 t 明内J 發明概要 6 為此本發明之一目的係提供一引線框以及在構成一 細間距微電子覆晶封裝體的迴銲程序期間控制銲料擴展之 该結構之製造方法。 本毛明之另-目的係提供-用於更良好地控制鲜料擴 展之裝置。 本發明之另一目的係在迴流後確保較厚的銲料厚度並 提供改良的可靠度效能。 為了達成本發明之上述及其他目的，提供一種藉由在 一引線框覆晶封裝體中於一半導體IC晶片的銲料凸塊位置 上建造在基材内之一凹坑來限制銲料擴展之方法。 根據本發明，引線框可包含任意下列四類的材料：鎳_ 鐵、覆條(clad strip)、銅及銅基合金。利用在銲料凸塊位置 上將一凹坑建造在基材内之光微影圖案化技術來對於引線 框賦予特色。 ' / 圖式簡單說明 可參照圖式從下文詳細描述更清楚地得知本發明之上 述及其他目的、態樣及優點。圖式所顯示的類似編號係代 表類似或對應的元件、區域及部分，圖中·· 第1圖為本發明的橫剖視圖，其顯示一不具有凹坑之引 線框結構用以說明銲料溢流； 第2圖為本發明的一較佳實施例之橫剖視圖，其顯示具 有内建作為銲料井部或聚器的凹坑之引線框結構。 【實施冷式】 較佳實施例之詳細說明 發明人發現的問題 發明人已經發現當今慣用方式具有下列問題及缺點： 1.對於大尺寸元件而言，熱力性應力累積將由於晶片 與基材之間邮邮匹配而導致凸塊/7t件之_導線接合 部產钱效，當未實行1於在迴銲期間進行銲料厚度控 制之衣置日卞將使此問題加劇。 2·因為由於導料料凸塊施加至發上的應力而使-元 件產生失效’利用球型及柱型凸塊導線之覆晶結構係在符 合間距佈線需求方面受到限制，故W銲料凸塊尺寸厚产 控制，而且銲料·如果未受龜制將會導致墊高部變低 而造成底部充填的可靠度問題。 、您运取製程的複雜度及降低的 良率’其中紐在封裝建造程序期間有效率地控制 後的較厚銲料厚度。 銲料凸=目前技術實行的程序係導致有限的 =凸塊厂予度’而可能在大晶粒、高密度應用中造成良率 牛低、及紐/長期可靠度效能的問題。 初始結槿 框的橫剖視圖“士構” ，、有凹坑之引 勺社一田構1較佳為一晶片附接基材，亦瞭解可 〇、，於在板製操作期間防止塑膠衝出引線之間 部’亚包括從晶#至板之電性錢 具有一基岸，艰圖亦可為 是由一種二/的橫剖視圖，基層1可由預覆式絶、 忠诸如鎳-鐵、覆條、銅基合金等三類材料之 =所構成。肖且，第項顯示銅終端塾2(隨後沉積其覆晶迴 流銲球）以及銲料溢流3及銲料厚度4。 、曰曰 第2圖為本發明的較佳結構之橫剖視圖，其中顯示具有 ^坑的引線框。在本發明的一主要特性中，第2圖顯示一凹 坑4且其作為一建造在引線框上的聚器或井部/盲孔。因 此，顯示-種用於預定在覆晶總成製程顧作為設計區域 之控制銲料擴展之裝置。 主的主要步驟 可能參照第2圖清楚地瞭解本發明的程序。第2圖包含 一通常具有0.20公厘條厚度之引線框金屬軋條料基材1，其 上藉由使用光微影術的化學打薄而形成圖案化層且利用金 屬溶解化學物來在金屬基材中蝕刻一圖案。引線框基材亦 可由一沖壓程序製成，其中利用碳化鎢漸進壓模從條料機 械式移除金屬。引線框金屬基材丨為裸露狀(未經覆蓋）或預 覆有鈀，而且譬如藉由鍍覆及此技術實行的噴濺與習知光 微影方法之一組合利用標準沉積方法將鉻/銅（Cr/Cu)或鈦/ 銅(Ti/Cu)導體加以圖案化。在蝕刻於基材上的銲料凸塊之 位置將一預建凹坑或井部銲料聚器4選擇性圖案化，然後沉 積覆晶銲料凸塊3。凹坑4孔徑及深度係依據銲球直徑而 定。一般而言，銲球直徑為100微米到300微米。利用覆晶 銲料凸塊3導線迴銲程序將下個晶片附接至元件的銅終端 墊2。在最後步驟中，包含晶片電導線之全體總成係覆蓋有 一種聚合性包封劑。 本發明具有下列優點。 200406902 本發明的優點 本發明的優點包括： 1. 可在迴銲期間控制銲料擴展。 2. 可在迴銲之後加強對於銲料厚度的控制作用並且降 5 低銲料凸塊底下的熱與機械性應力，故改善了組裝製程的 良率。 3. 對於銲料厚度控制表現出改良的可靠度效能。 4. 形成一堅固的覆晶結構/封裝體，且其可符合細間 距、高針腳數及大尺寸高密度元件之需求。 10 雖然已經就較佳實施例來描述及圖示本發明，除了藉 由申請專利範圍加以界定之外，無意限制本發明。並且， 熟悉此技術者可作出許多修改、變化及改良，而不脫離本 發明之精神與範圍。 L圖式簡單說明3 15 第1圖為本發明的橫剖視圖，其顯示一不具有凹坑之引 線框結構用以說明銲料溢流； 第2圖為本發明的一較佳實施例之橫剖視圖，其顯示具 有内建作為銲料井部或聚器的凹坑之引線框結構。 【圖式之主要元件代表符號表】 1…引線框金屬基材 2…銅終端墊 3…覆晶銲料凸塊 4···凹坑 10

Claims (1)

  1. 200406902 拾、申請專利範圍： L 一種用於防止銲料擴展之製造積體電路封裝體之方 法，包含以下步驟： 提供一基材，其上附接有一半導體元件，在該半導 5 體元件上形成有由鉛或無鉛銲料構成之一銲料或柱型 凸塊； 使一引線框或基材設有預建的盲孔凹坑； 將該半導體元件附接至該引線框或基材。 2·如申請專利範圍第1項之方法，其中該盲孔或凹坑由一 10 飯刻製程形成於該引線框上。 3·如申請專利範圍第1項之方法，其中該盲孔或凹坑由一 沖壓製程形成於該引線框上。 4·如申請專利範圍第1項之方法，其中各該盲孔或凹坑由 一模造製程併入該引線框上。 15 5·如申請專利範圍第1項之方法，其中該引線框材料選自 包含以下類型的材料：鎳-鐵、覆條、以及銅與銅基合 金。 6·如申請專利範圍第1項之方法，其中該引線框材料預覆 有一諸如等鈀金屬塗層。 20 7·如申請專利範圍第1項之方法，其中該1C晶片及預覆式 把引線框金屬化層係包含Cu(銅），且該1C晶片籽晶底部 金屬化層選自包含鉻銅的群組。 8·如申請專利範圍第1項之方法，其中各1C頂部及/或底部 金屬化層之該圖案化係包含光處理及蝕刻。 11 200406902 9.如申請專利範圍第1項之方法，其中該黏附層由-選自 包括鈦及鉻的群組之材料形成。 10·如申明專利範圍第丄項之方法，其中該詳料引線框『晶 片導線覆蓋式傳導墊係包含一銲墊。 5 η·如申請專利範圍第1項之方法，其中該1C晶片UBM頂部 及底部金屬化及籽晶層係選自包括Ti/Cu或Cr/CrCu/Cu 的群組。 12·如申請專利範圍第1項之方法，其中該半導體1C球型或 柱型凸塊由Cu(銅)構成。 10 13·如申請專利範圍第1項之方法，其中該半導體1C係覆蓋 有選自包括SnAg、SnPb、SnAgCu及SnBi的群組之銲料 材料之鉛或無鉛合金。 14·如申請專利範圍第1項之方法，其中該1C晶片的底部非 傳導性初始鈍化層係選自包括下列各物的群組： 15 Si3N4，Si02，Si3N4/Si02。 15·如申請專利範圍第1項之方法，其中該銲料凸塊的直徑 位於60微米至300微米的範圍中。 16·如申請專利範圍第1項之方法，其中該基材/元件的鈍化 覆塗層係選自包括一有機低介電疊層的群組，諸如聚酸 20 亞胺及苯環丁烯。 17·如申請專利範圍第1項之方法，其中該基材/元件的鈍化 覆塗層係選自已知為熱固性及熱塑性聚合物等類型的 材料。 18·如申請專利範圍第以員之方法，其中該底部初始鈍化層 12 200406902 的開口位於50微米至250微米的範圍中。 19·如申請專利範圍第1項之用於形成一覆晶結構之方法， 包含以下步驟：提供一半導體晶圓，將一籽晶層沉積在 δ亥晶圓上方；在該籽晶層上方形成一底部金屬化層；在 忒中間金屬化層上方形成一頂部金屬化層；將該頂部及 底部金屬化層予以圖案化，利用習知光微影製程在縫道 開口周圍形成鈍化及再鈍化層，且具有複數個銲墊而與 銲墊形成一銲料導線。 20·如申請專利範圍第19項之方法，其中該傳導性金屬化層 由選自包括銅及鋁的群組之材料構成。 21·如申請專利範圍第19項之方法，其中該頂部及底部金屬 化及籽晶層由選自包括Ti/Cu，Cr/Cu，Ti/Ni及職的群 組之一材料構成。 ★Μ申明專利乾圍第i 9項之方法’其中該光阻層由乾阻障 膜的光阻材料及液體光阻所構成。 種用於防止銲料擴展之積體電路封裝體，包含·· ^ 基材，其包括一半導體元件，該半導體元件上方 =有-C_4銲料或由錯或無錯銲料構成之銲料或柱型 1線框或基材，其具有預建的盲孔凹坑； 2 辨導體元件附接至則丨線框或基材。 4·=請專利範圍第23項之封裝體，其中剌線框材料選 人包括下列各物之材料··鎳_鐵、覆條、以及銅與鋼基 5金。 13 200406902 25·如申請專利範圍第23項之封裝體，其中該引線框材料預 覆有一諸如鈀等金屬塗層。 26·如申請專利範圍第23項之封裝體，其中該1C晶片及預覆 式鈀引線框金屬化層係包含Cu(銅），且該IC籽晶底部金 5 屬化層包含鉻銅。 27·如申清專利範圍第23項之封裝體，其中該黏劑層由選自 包括鈦及鉻的群組之一材料形成。 28·如申凊專利範圍第23項之封裝體，其中該鮮料引線框ic 晶片導線覆蓋式傳導墊包含_銲墊。 10 15 20 29·如申請專利範圍第23項之封裝體，其中該半導體^球型 或柱型凸塊由Cu(銅)構成。 30.如申請專利範圍第23項之封裝體，其中該半導抓覆蓋 有選自包括下列各物的群組之輝料材料的錯或無敍合 金：SnAg、SnPb、SnAgCu及 SnBi。 3!.如申請專利範圍第23項之封裝體，其中該銲料凸塊的直 徑位於60微米至300微米的範圍中。 32. 如申請專利範圍第23項之封裳體，其中該基材/元件的 ^匕覆塗層選自包括—有機低介㉞層的群組，諸如聚 醯亞胺及笨環丁烯。 33. 如申請專利範圍第23項之封裝體，其中該基材/元件的 鈍化覆塗層係選自已知為熱固性 型的材料。 其中該銲墊由銅或鋁 34.如申請專利範圍第23項之封裝體 構成。 14
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US20040084508A1 (en) 2004-05-06
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WO2004040950A1 (en) 2004-05-13

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