SU473387A3 - Диодна матрица - Google Patents

Диодна матрица

Info

Publication number
SU473387A3
SU473387A3 SU1246034A SU1246034A SU473387A3 SU 473387 A3 SU473387 A3 SU 473387A3 SU 1246034 A SU1246034 A SU 1246034A SU 1246034 A SU1246034 A SU 1246034A SU 473387 A3 SU473387 A3 SU 473387A3
Authority
SU
USSR - Soviet Union
Prior art keywords
gold
strips
matrix
oxide
layer
Prior art date
Application number
SU1246034A
Other languages
English (en)
Inventor
Форлани Франко
Миннайя Никола
Сакчи Гиоргио
Original Assignee
Оливетти-Дженерал Электрик С.П.А. (Фирма)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Оливетти-Дженерал Электрик С.П.А. (Фирма) filed Critical Оливетти-Дженерал Электрик С.П.А. (Фирма)
Application granted granted Critical
Publication of SU473387A3 publication Critical patent/SU473387A3/ru

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths

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  • General Physics & Mathematics (AREA)
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  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
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Description

(54) ДИОДНАЯ МАТРИЦА
Изобретение относитс  к радиотехнике, в
частности к изготовлению интегральных схем запоминающих устройств.
Известны диодные матрицы в виде сформованных на покрытой слоем двуокиси кремни  полупроводниковой пластине диодов.
Цель изобретени  - повышение надежности и упрощение технологии изготовлени  матрицы - достигаетс  тем, что полупроводникова  пластина предлагаемой матрицы разделена на р д параллельных полос, на нижние плоскости которых нанесены металлические шины, например из золота, образующие с поверхностью полупроводника омическпй контакт, а на слой двуокиси кремни  нанесены полоски металла, расположенные перпендикул рно шинам, причем анод каждого диода электрически соединен с расположенными на слое двуокиси кре.мпи  полосками металла.
На фиг. 1 показан общий вид матрицы; на фиг. 2 - монтажна  схема; на фиг. 3 - монтажна  схема диодной матрицы одностороннего запоминающего устройства; на фиг. 4- часть диодной матрицы в разрезе.
Полупроводникова  пластина 1, выполненна , например, из кремни , обработана дл  получени  проводника /г-типа. Нижн   ее плоскость имеет малое удельное сопротивление , а верхн  , эпитаксиально выращенна  на нижней, - сравнительно высокое. Пластина
разделена на р д параллельных полос одинаковой ширины более узкими промежутками. На нижние плоскости полос нанесены щины 2, например, из золота, образующие с поверхностью проводника омпческпй контакт. Эти шины  вл ютс  горизонтальными проводниками диодной матрицы, их ширина равна ширине полупроводниковых полос. Верхн   поверхность пластины, за исключением небольших
участков, покрыта тонким слоем двуокиси кремни  3, на который нанесен слой металла 4, например золота, образующий контакт, называемый поверхностно-барьерным.
Металлический (золотой) слой 4  вл етс 
диодом, а нижн   плоскость полупроводниковой пластины - катодом. Диоды 5, характеризуюпи1ес  значительным быстродействием, соединены перемычкой 6 из металла с относительно большим удельным сопротивлением,
например нихрома, с полосками металла 7. преимущественно золота, расположенными на слое 3 на верхней плоскости пластины 1. Полоскп 7, перпендикул рные полупроводниковым полосам пластины,  вл ютс  вертикальными проводниками матрицы. Кроме того, эти полоскп, прочно припа нные к пластине, удерживают полупроводниковые полосы вместе на определенном рассто нии одну от другой, что обеспечиваетс  сло ми нихрома 8 и никел  9,
на которые нанесен электролитическим путем
золотой слой 10, преп тствующий окислению никел .
Блок представл ет собой полную диодную матрицу, в которой каждый диод 5 односторопие соедин ет полоски 7 с шинами 2.
Изолировав некоторые диоды 5 от полосок 7, можно из полной матрицы получить иеполЕ1ую диодиую матрицу, котора  может действовать как одиостороииее запоминающее устройство . При этом кажда  полоска соедин етс  только с определе}1ной щииой 2 через остальные неизолированные диоды. Дл  изол ции диодов полоску 7 подсоедин ют к положительному полюсу источника напр жени , другой полюс подключают к щиие 2, к которой подсоединены катоды изолиропапных диодов. Разность напр женпй между полоской и шиной такова, что образуетс  ток, достаточный дл  расплавлени  перемычек 6, в результате чего металл 4 соедин етс  с аподом диода.
При подаче входного сигнала на оиределенную полоску выходпой сигнал ио вл етс  на тех щииах, которые соединены полосками через пере.мычки и диоды. Таким образом получаетс  одностороннее заноминающее устройство , быстродействие которого обеспечиваетс  быстродействием диодов и у.меиьшением емкостной св зн между элементами схемы.
Предмет изобретени 
Диодна  матрица з виде сформованных на покрытой слоем двуокиси кремни  иолупроводииковой иластиие диодов, отличающа с  тем, что, с целью повыщени  ее надежиости и упрощени  технологии изготовлени , полупроводнико: а  пластина разделена па р д параллельных полос, на нижние плоскости которых нанесены металлические щипы, например из золота, образующие с поиерхиоСТ1ЛО полупроводника омический контакт, а па слой двуокиси крем) папесепы полоски металла , расположенные перпендикул рно шинам , иричем апод каждого электрически соедипеп с расположенными па слое двуокиси кремии  полосками металла.
%
6
-J-x:,-j - /
Фиг 5
Фиг if
SU1246034A 1967-05-30 1968-05-30 Диодна матрица SU473387A3 (ru)

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IT1664467 1967-05-30

Publications (1)

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SU473387A3 true SU473387A3 (ru) 1975-06-05

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US (1) US3555365A (ru)
DE (1) DE1764378C3 (ru)
FR (1) FR1585038A (ru)
GB (1) GB1220843A (ru)
SU (1) SU473387A3 (ru)
YU (1) YU32377B (ru)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699395A (en) * 1970-01-02 1972-10-17 Rca Corp Semiconductor devices including fusible elements
DE2023219C3 (de) * 1970-05-12 1979-09-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen Programmierbarer Halbleiter-Festwertspeicher
US3699403A (en) * 1970-10-23 1972-10-17 Rca Corp Fusible semiconductor device including means for reducing the required fusing current
BE794202A (fr) * 1972-01-19 1973-05-16 Intel Corp Liaison fusible pour circuit integre sur substrat semi-conducteur pour memoires
GB1445479A (en) * 1974-01-22 1976-08-11 Raytheon Co Electrical fuses
FR2311410A1 (fr) * 1975-05-13 1976-12-10 Thomson Csf Circuit de commutation integre, matrice de commutation et circuits logiques utilisant ledit circuit
US4032949A (en) * 1975-05-15 1977-06-28 Raytheon Company Integrated circuit fusing technique
GB1532286A (en) * 1976-10-07 1978-11-15 Elliott Bros Manufacture of electro-luminescent display devices
NL8002634A (nl) * 1980-05-08 1981-12-01 Philips Nv Programmeerbare halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
US4412308A (en) * 1981-06-15 1983-10-25 International Business Machines Corporation Programmable bipolar structures
US4518981A (en) * 1981-11-12 1985-05-21 Advanced Micro Devices, Inc. Merged platinum silicide fuse and Schottky diode and method of manufacture thereof
US4974048A (en) * 1989-03-10 1990-11-27 The Boeing Company Integrated circuit having reroutable conductive paths
US5139883A (en) * 1989-05-09 1992-08-18 Grigory Raykhtsaum Intermetallic time-temperature integration fuse
US5247735A (en) * 1991-12-18 1993-09-28 International Business Machines Corporation Electrical wire deletion
US5914648A (en) 1995-03-07 1999-06-22 Caddock Electronics, Inc. Fault current fusing resistor and method
US6059917A (en) * 1995-12-08 2000-05-09 Texas Instruments Incorporated Control of parallelism during semiconductor die attach
US5731624A (en) * 1996-06-28 1998-03-24 International Business Machines Corporation Integrated pad and fuse structure for planar copper metallurgy

Also Published As

Publication number Publication date
GB1220843A (en) 1971-01-27
DE1764378C3 (de) 1973-12-20
DE1764378B2 (de) 1973-05-17
US3555365A (en) 1971-01-12
YU32377B (en) 1974-10-31
YU123568A (en) 1974-04-30
FR1585038A (ru) 1970-01-09
DE1764378A1 (de) 1972-03-23

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