SG11201601235SA - Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method - Google Patents

Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method

Info

Publication number
SG11201601235SA
SG11201601235SA SG11201601235SA SG11201601235SA SG11201601235SA SG 11201601235S A SG11201601235S A SG 11201601235SA SG 11201601235S A SG11201601235S A SG 11201601235SA SG 11201601235S A SG11201601235S A SG 11201601235SA SG 11201601235S A SG11201601235S A SG 11201601235SA
Authority
SG
Singapore
Prior art keywords
circuit
delay
variation
variation compensation
reconfigurable
Prior art date
Application number
SG11201601235SA
Inventor
Hidetoshi Onodera
K M Mahfuzul Islam A
Original Assignee
Japan Science & Tech Agency
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Science & Tech Agency filed Critical Japan Science & Tech Agency
Publication of SG11201601235SA publication Critical patent/SG11201601235SA/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H03K5/134—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices with field-effect transistors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2882—Testing timing characteristics
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Pulse Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
SG11201601235SA 2013-08-19 2014-07-29 Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method SG11201601235SA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013169965 2013-08-19
PCT/JP2014/069976 WO2015025682A1 (en) 2013-08-19 2014-07-29 Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation correction circuit, variation measurement method, and variation correction method

Publications (1)

Publication Number Publication Date
SG11201601235SA true SG11201601235SA (en) 2016-03-30

Family

ID=52483463

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201601235SA SG11201601235SA (en) 2013-08-19 2014-07-29 Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method

Country Status (8)

Country Link
US (1) US9899993B2 (en)
EP (1) EP3038257B1 (en)
JP (1) JP6297575B2 (en)
KR (1) KR102166653B1 (en)
CN (1) CN105493405B (en)
SG (1) SG11201601235SA (en)
TW (1) TWI548221B (en)
WO (1) WO2015025682A1 (en)

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* Cited by examiner, † Cited by third party
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TWI585427B (en) * 2016-05-24 2017-06-01 國立中央大學 Delay measurement circuit and measuring method thereof
CN106291324B (en) * 2016-08-18 2018-10-02 北京航空航天大学 A kind of on piece differential delay measuring system and recycling integrated circuit recognition methods
WO2018137751A1 (en) * 2017-01-24 2018-08-02 Telefonaktiebolaget Lm Ericsson (Publ) Variable delay circuits
CN111726108A (en) * 2019-03-18 2020-09-29 澜起科技股份有限公司 Delay circuit, clock control circuit and control method
US11349458B1 (en) * 2021-09-22 2022-05-31 Microsoft Technology Licensing, Llc Transistor aging monitor circuit for increased stress-based aging compensation precision, and related methods

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Also Published As

Publication number Publication date
US9899993B2 (en) 2018-02-20
EP3038257A4 (en) 2017-08-09
JPWO2015025682A1 (en) 2017-03-02
TW201526547A (en) 2015-07-01
CN105493405A (en) 2016-04-13
CN105493405B (en) 2018-09-25
TWI548221B (en) 2016-09-01
KR20160045697A (en) 2016-04-27
US20160211836A1 (en) 2016-07-21
WO2015025682A1 (en) 2015-02-26
EP3038257A1 (en) 2016-06-29
EP3038257B1 (en) 2019-12-25
KR102166653B1 (en) 2020-10-16
JP6297575B2 (en) 2018-03-20

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