SG10201907485UA - Three-dimensional semiconductor device - Google Patents

Three-dimensional semiconductor device

Info

Publication number
SG10201907485UA
SG10201907485UA SG10201907485UA SG10201907485UA SG10201907485UA SG 10201907485U A SG10201907485U A SG 10201907485UA SG 10201907485U A SG10201907485U A SG 10201907485UA SG 10201907485U A SG10201907485U A SG 10201907485UA SG 10201907485U A SG10201907485U A SG 10201907485UA
Authority
SG
Singapore
Prior art keywords
semiconductor device
dimensional semiconductor
dimensional
semiconductor
Prior art date
Application number
SG10201907485UA
Inventor
Min Hwang Sung
Sung Lim Joon
Kyu Kang Bum
Ho AHN Jae
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201907485UA publication Critical patent/SG10201907485UA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
SG10201907485UA 2018-10-25 2019-08-14 Three-dimensional semiconductor device SG10201907485UA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020180128403A KR20200047882A (en) 2018-10-25 2018-10-25 Three-dimensional semiconductor device

Publications (1)

Publication Number Publication Date
SG10201907485UA true SG10201907485UA (en) 2020-05-28

Family

ID=70325472

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201907485UA SG10201907485UA (en) 2018-10-25 2019-08-14 Three-dimensional semiconductor device

Country Status (4)

Country Link
US (3) US11088157B2 (en)
KR (1) KR20200047882A (en)
CN (1) CN111106119B (en)
SG (1) SG10201907485UA (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7132142B2 (en) * 2019-02-05 2022-09-06 キオクシア株式会社 Semiconductor memory device manufacturing method
JP2020155492A (en) * 2019-03-18 2020-09-24 キオクシア株式会社 Semiconductor storage and manufacturing method of semiconductor storage
CN113228275B (en) * 2019-12-24 2023-04-18 长江存储科技有限责任公司 Three-dimensional NAND memory device and method of forming the same
CN111566813B (en) * 2020-03-23 2021-05-14 长江存储科技有限责任公司 Staircase structure in three-dimensional memory device and method for forming the same
CN111492480B (en) * 2020-03-23 2021-07-09 长江存储科技有限责任公司 Staircase structure in three-dimensional memory device and method for forming the same
CN114586153A (en) * 2020-03-23 2022-06-03 长江存储科技有限责任公司 Staircase structure in three-dimensional memory device and method for forming the same
KR20210157027A (en) * 2020-06-19 2021-12-28 삼성전자주식회사 Three dimensional semiconductor memory device
KR20220048737A (en) * 2020-10-13 2022-04-20 삼성전자주식회사 Semiconductor memory device
JP2022126320A (en) * 2021-02-18 2022-08-30 キオクシア株式会社 Semiconductor memory device
US20230052332A1 (en) * 2021-08-10 2023-02-16 Micron Technology, Inc. Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1847663A3 (en) 2004-12-23 2008-12-31 Laukien GmbH & Co. Beteiligungen KG Cladding element for creating the façade of buildings
KR101738103B1 (en) 2010-09-10 2017-05-22 삼성전자주식회사 Therr dimensional semiconductor memory devices
KR102046504B1 (en) 2013-01-17 2019-11-19 삼성전자주식회사 Step shape pad structure and wiring structure in vertical type semiconductor device
KR20160045340A (en) 2014-10-17 2016-04-27 에스케이하이닉스 주식회사 3-dimension non-volatile memory device
KR20160096309A (en) 2015-02-05 2016-08-16 에스케이하이닉스 주식회사 3-dimension non-volatile semiconductor device
KR20170014757A (en) 2015-07-31 2017-02-08 에스케이하이닉스 주식회사 Semiconductor device and manufacturing method of the same
KR102568886B1 (en) 2015-11-16 2023-08-22 에스케이하이닉스 주식회사 Semiconductor device and manufacturing method of the same
US10049744B2 (en) 2016-01-08 2018-08-14 Samsung Electronics Co., Ltd. Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same
KR102550571B1 (en) 2016-05-02 2023-07-04 에스케이하이닉스 주식회사 Semiconductor device and method of manufacturing the same
KR102415206B1 (en) * 2016-06-27 2022-07-01 에스케이하이닉스 주식회사 Semiconductor device
KR20180010368A (en) 2016-07-20 2018-01-31 삼성전자주식회사 Memory device
KR102342552B1 (en) 2017-03-09 2021-12-23 삼성전자주식회사 Three dimensional semiconductor device and metohd of forming the same
KR20180115550A (en) 2017-04-13 2018-10-23 에스케이하이닉스 주식회사 Manufacturing method of semiconductor device
US10403634B2 (en) * 2017-06-12 2019-09-03 Samsung Electronics Co., Ltd Semiconductor memory device and method of manufacturing the same
KR102397903B1 (en) * 2017-07-17 2022-05-13 삼성전자주식회사 Semiconductor device including gates
KR102428273B1 (en) * 2017-08-01 2022-08-02 삼성전자주식회사 Three-dimensional semiconductor device

Also Published As

Publication number Publication date
KR20200047882A (en) 2020-05-08
US11088157B2 (en) 2021-08-10
CN111106119B (en) 2024-01-23
US20230413545A1 (en) 2023-12-21
US20200135749A1 (en) 2020-04-30
US11758719B2 (en) 2023-09-12
US20210358933A1 (en) 2021-11-18
CN111106119A (en) 2020-05-05

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