SG10201505459WA - Wafer processing method - Google Patents

Wafer processing method

Info

Publication number
SG10201505459WA
SG10201505459WA SG10201505459WA SG10201505459WA SG10201505459WA SG 10201505459W A SG10201505459W A SG 10201505459WA SG 10201505459W A SG10201505459W A SG 10201505459WA SG 10201505459W A SG10201505459W A SG 10201505459WA SG 10201505459W A SG10201505459W A SG 10201505459WA
Authority
SG
Singapore
Prior art keywords
processing method
wafer processing
wafer
processing
Prior art date
Application number
SG10201505459WA
Inventor
Tanaka Makoto
Lu Xin
Liao Sax
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG10201505459WA publication Critical patent/SG10201505459WA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dicing (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
SG10201505459WA 2014-07-30 2015-07-13 Wafer processing method SG10201505459WA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014155179A JP6282194B2 (en) 2014-07-30 2014-07-30 Wafer processing method

Publications (1)

Publication Number Publication Date
SG10201505459WA true SG10201505459WA (en) 2016-02-26

Family

ID=55180801

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201505459WA SG10201505459WA (en) 2014-07-30 2015-07-13 Wafer processing method

Country Status (4)

Country Link
US (1) US9418908B2 (en)
JP (1) JP6282194B2 (en)
SG (1) SG10201505459WA (en)
TW (1) TWI657494B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6738687B2 (en) * 2016-08-25 2020-08-12 株式会社ディスコ Processing method of package wafer
JP6779574B2 (en) * 2016-12-14 2020-11-04 株式会社ディスコ Interposer manufacturing method
JP6773554B2 (en) * 2016-12-27 2020-10-21 株式会社ディスコ Package device chip manufacturing method and processing equipment
JP6906836B2 (en) * 2017-01-27 2021-07-21 株式会社ディスコ How to use laminated dressing board
JP2018125479A (en) * 2017-02-03 2018-08-09 株式会社ディスコ Wafer production method
JP6812079B2 (en) * 2017-03-13 2021-01-13 株式会社ディスコ Processing method of work piece
JP2018206791A (en) * 2017-05-30 2018-12-27 株式会社ディスコ Method for dividing wafer
JP7126849B2 (en) * 2018-04-13 2022-08-29 株式会社ディスコ processing equipment
JP7150401B2 (en) * 2018-11-20 2022-10-11 株式会社ディスコ Workpiece processing method
JP7282450B2 (en) * 2019-02-05 2023-05-29 株式会社ディスコ Package substrate processing method
CN112846967A (en) * 2021-01-05 2021-05-28 宁波舜邦模具科技有限公司 Die guide pillar hole machining device and machining process thereof
CN114783865B (en) * 2022-04-13 2023-02-10 苏州优力科瑞半导体科技有限公司 Scribing and cutting method and system
JP7433565B1 (en) 2023-06-22 2024-02-19 三菱電機株式会社 Processing nozzle and laser processing machine

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2892459B2 (en) 1990-08-20 1999-05-17 株式会社ディスコ Blade position adjustment method for precision cutting equipment
US7168352B2 (en) * 1999-09-13 2007-01-30 Advanced Semiconductor Engineering, Inc. Process for sawing substrate strip
JP4153325B2 (en) * 2003-02-13 2008-09-24 株式会社ディスコ Semiconductor wafer processing method
JP4342832B2 (en) * 2003-05-16 2009-10-14 株式会社東芝 Semiconductor device and manufacturing method thereof
JP4377702B2 (en) * 2004-01-08 2009-12-02 株式会社ディスコ Cutting groove measurement method
GB2420443B (en) * 2004-11-01 2009-09-16 Xsil Technology Ltd Increasing die strength by etching during or after dicing
JP2007266352A (en) * 2006-03-29 2007-10-11 Disco Abrasive Syst Ltd Wafer processing method
JP5583320B2 (en) * 2007-12-05 2014-09-03 ピーエスフォー ルクスコ エスエイアールエル Semiconductor wafer and manufacturing method thereof
JP2009176793A (en) * 2008-01-22 2009-08-06 Disco Abrasive Syst Ltd Method of dividing wafer
JP5171294B2 (en) * 2008-02-06 2013-03-27 株式会社ディスコ Laser processing method
JP5214332B2 (en) * 2008-05-27 2013-06-19 株式会社ディスコ Wafer cutting method
JP5122378B2 (en) * 2008-06-09 2013-01-16 株式会社ディスコ How to divide a plate
JP5394172B2 (en) * 2009-09-03 2014-01-22 株式会社ディスコ Processing method
JP5465042B2 (en) * 2010-03-01 2014-04-09 株式会社ディスコ Processing method of package substrate
US8642448B2 (en) * 2010-06-22 2014-02-04 Applied Materials, Inc. Wafer dicing using femtosecond-based laser and plasma etch
JP2012151225A (en) * 2011-01-18 2012-08-09 Disco Abrasive Syst Ltd Method for measuring cut groove
JP5950502B2 (en) * 2011-03-23 2016-07-13 株式会社ディスコ Wafer division method
US8557684B2 (en) * 2011-08-23 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional integrated circuit (3DIC) formation process
JP5948034B2 (en) * 2011-09-27 2016-07-06 株式会社ディスコ Alignment method
US8896102B2 (en) * 2013-01-22 2014-11-25 Freescale Semiconductor, Inc. Die edge sealing structures and related fabrication methods

Also Published As

Publication number Publication date
US9418908B2 (en) 2016-08-16
TW201608620A (en) 2016-03-01
US20160035635A1 (en) 2016-02-04
JP2016032075A (en) 2016-03-07
JP6282194B2 (en) 2018-02-21
TWI657494B (en) 2019-04-21

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