SE9501311D0 - Method for producing a semiconductor device having a semiconductor layer of SiC - Google Patents

Method for producing a semiconductor device having a semiconductor layer of SiC

Info

Publication number
SE9501311D0
SE9501311D0 SE9501311A SE9501311A SE9501311D0 SE 9501311 D0 SE9501311 D0 SE 9501311D0 SE 9501311 A SE9501311 A SE 9501311A SE 9501311 A SE9501311 A SE 9501311A SE 9501311 D0 SE9501311 D0 SE 9501311D0
Authority
SE
Sweden
Prior art keywords
sic
layer
producing
semiconductor device
semiconductor
Prior art date
Application number
SE9501311A
Other languages
English (en)
Inventor
Andrei Konstantinov
Erik Janzen
Original Assignee
Abb Research Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Research Ltd filed Critical Abb Research Ltd
Priority to SE9501311A priority Critical patent/SE9501311D0/sv
Publication of SE9501311D0 publication Critical patent/SE9501311D0/sv
Priority to US08/436,486 priority patent/US5804482A/en
Priority to PCT/SE1996/000452 priority patent/WO1996032737A1/en
Priority to EP96910272A priority patent/EP0820636A1/en
Priority to JP8530949A priority patent/JPH11503572A/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/02Pretreatment of the material to be coated
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/04Treatment of selected surface areas, e.g. using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H01L21/0465Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
SE9501311A 1995-04-10 1995-04-10 Method for producing a semiconductor device having a semiconductor layer of SiC SE9501311D0 (sv)

Priority Applications (5)

Application Number Priority Date Filing Date Title
SE9501311A SE9501311D0 (sv) 1995-04-10 1995-04-10 Method for producing a semiconductor device having a semiconductor layer of SiC
US08/436,486 US5804482A (en) 1995-04-10 1995-05-08 Method for producing a semiconductor device having a semiconductor layer of SiC
PCT/SE1996/000452 WO1996032737A1 (en) 1995-04-10 1996-04-09 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR LAYER OF SiC
EP96910272A EP0820636A1 (en) 1995-04-10 1996-04-09 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR LAYER OF SiC
JP8530949A JPH11503572A (ja) 1995-04-10 1996-04-09 SiCの半導体層を有する半導体デバイスを製造する方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9501311A SE9501311D0 (sv) 1995-04-10 1995-04-10 Method for producing a semiconductor device having a semiconductor layer of SiC

Publications (1)

Publication Number Publication Date
SE9501311D0 true SE9501311D0 (sv) 1995-04-10

Family

ID=20397898

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9501311A SE9501311D0 (sv) 1995-04-10 1995-04-10 Method for producing a semiconductor device having a semiconductor layer of SiC

Country Status (5)

Country Link
US (1) US5804482A (sv)
EP (1) EP0820636A1 (sv)
JP (1) JPH11503572A (sv)
SE (1) SE9501311D0 (sv)
WO (1) WO1996032737A1 (sv)

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Publication number Priority date Publication date Assignee Title
JP3180895B2 (ja) * 1997-08-18 2001-06-25 富士電機株式会社 炭化けい素半導体装置の製造方法
US6274442B1 (en) * 1998-07-15 2001-08-14 Advanced Micro Devices, Inc. Transistor having a nitrogen incorporated epitaxially grown gate dielectric and method of making same
US6507046B2 (en) * 2001-05-11 2003-01-14 Cree, Inc. High-resistivity silicon carbide substrate for semiconductor devices with high break down voltage
US7030428B2 (en) * 2001-12-03 2006-04-18 Cree, Inc. Strain balanced nitride heterojunction transistors
US6982204B2 (en) * 2002-07-16 2006-01-03 Cree, Inc. Nitride-based transistors and methods of fabrication thereof using non-etched contact recesses
US7901994B2 (en) * 2004-01-16 2011-03-08 Cree, Inc. Methods of manufacturing group III nitride semiconductor devices with silicon nitride layers
US7045404B2 (en) * 2004-01-16 2006-05-16 Cree, Inc. Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof
US7612390B2 (en) * 2004-02-05 2009-11-03 Cree, Inc. Heterojunction transistors including energy barriers
US7170111B2 (en) * 2004-02-05 2007-01-30 Cree, Inc. Nitride heterojunction transistors having charge-transfer induced energy barriers and methods of fabricating the same
US7084441B2 (en) 2004-05-20 2006-08-01 Cree, Inc. Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating same
US7432142B2 (en) * 2004-05-20 2008-10-07 Cree, Inc. Methods of fabricating nitride-based transistors having regrown ohmic contact regions
US7238560B2 (en) * 2004-07-23 2007-07-03 Cree, Inc. Methods of fabricating nitride-based transistors with a cap layer and a recessed gate
US20060017064A1 (en) * 2004-07-26 2006-01-26 Saxler Adam W Nitride-based transistors having laterally grown active region and methods of fabricating same
US7456443B2 (en) * 2004-11-23 2008-11-25 Cree, Inc. Transistors having buried n-type and p-type regions beneath the source region
US7709859B2 (en) * 2004-11-23 2010-05-04 Cree, Inc. Cap layers including aluminum nitride for nitride-based transistors
US7161194B2 (en) * 2004-12-06 2007-01-09 Cree, Inc. High power density and/or linearity transistors
US7355215B2 (en) * 2004-12-06 2008-04-08 Cree, Inc. Field effect transistors (FETs) having multi-watt output power at millimeter-wave frequencies
US7465967B2 (en) 2005-03-15 2008-12-16 Cree, Inc. Group III nitride field effect transistors (FETS) capable of withstanding high temperature reverse bias test conditions
US8575651B2 (en) 2005-04-11 2013-11-05 Cree, Inc. Devices having thick semi-insulating epitaxial gallium nitride layer
US7626217B2 (en) * 2005-04-11 2009-12-01 Cree, Inc. Composite substrates of conductive and insulating or semi-insulating group III-nitrides for group III-nitride devices
US7615774B2 (en) * 2005-04-29 2009-11-10 Cree.Inc. Aluminum free group III-nitride based high electron mobility transistors
US7544963B2 (en) * 2005-04-29 2009-06-09 Cree, Inc. Binary group III-nitride based high electron mobility transistors
US9331192B2 (en) * 2005-06-29 2016-05-03 Cree, Inc. Low dislocation density group III nitride layers on silicon carbide substrates and methods of making the same
US20070018198A1 (en) * 2005-07-20 2007-01-25 Brandes George R High electron mobility electronic device structures comprising native substrates and methods for making the same
US7592211B2 (en) 2006-01-17 2009-09-22 Cree, Inc. Methods of fabricating transistors including supported gate electrodes
US7709269B2 (en) 2006-01-17 2010-05-04 Cree, Inc. Methods of fabricating transistors including dielectrically-supported gate electrodes
US9564542B2 (en) * 2009-09-17 2017-02-07 Tetrasun, Inc. Selective transformation in functional films, and solar cell applications thereof
US9087724B2 (en) 2013-03-21 2015-07-21 International Business Machines Corporation Method and structure for finFET CMOS

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1147014A (en) * 1967-01-27 1969-04-02 Westinghouse Electric Corp Improvements in diffusion masking
GB1548520A (en) * 1976-08-27 1979-07-18 Tokyo Shibaura Electric Co Method of manufacturing a semiconductor device
CA2008176A1 (en) * 1989-01-25 1990-07-25 John W. Palmour Silicon carbide schottky diode and method of making same
US5313078A (en) * 1991-12-04 1994-05-17 Sharp Kabushiki Kaisha Multi-layer silicon carbide light emitting diode having a PN junction
US5286660A (en) * 1992-12-24 1994-02-15 Motorola, Inc. Method for doping a semiconductor wafer having a diffusivity enhancement region
US5322802A (en) * 1993-01-25 1994-06-21 North Carolina State University At Raleigh Method of fabricating silicon carbide field effect transistor
US5543637A (en) * 1994-11-14 1996-08-06 North Carolina State University Silicon carbide semiconductor devices having buried silicon carbide conduction barrier layers therein
SE9501312D0 (sv) * 1995-04-10 1995-04-10 Abb Research Ltd Method for procucing a semiconductor device

Also Published As

Publication number Publication date
EP0820636A1 (en) 1998-01-28
JPH11503572A (ja) 1999-03-26
US5804482A (en) 1998-09-08
WO1996032737A1 (en) 1996-10-17

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