SE8603126D0 - CMOS INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING A SUIT - Google Patents
CMOS INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING A SUITInfo
- Publication number
- SE8603126D0 SE8603126D0 SE8603126A SE8603126A SE8603126D0 SE 8603126 D0 SE8603126 D0 SE 8603126D0 SE 8603126 A SE8603126 A SE 8603126A SE 8603126 A SE8603126 A SE 8603126A SE 8603126 D0 SE8603126 D0 SE 8603126D0
- Authority
- SE
- Sweden
- Prior art keywords
- trench
- depth
- suit
- manufacturing
- integrated circuit
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 3
- 239000011810 insulating material Substances 0.000 abstract 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
An integrated CMOS circuit has at least one trench filled with insulating material in a principal face of a substrate composed of monocrystalline silicon. A p-type zone extends down into the substrate to a depth greater than the depth of the trench along one side wall of the trench from the principal face. In addition, an n-type zone extends down into the substrate to a depth greater than the depth of the trench along the other side of the trench from the principal face and makes contact with the p-type zone underneath the floor of the trench. A separate MOS transistor is formed in each of the zones.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US76244185A | 1985-08-05 | 1985-08-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
SE8603126D0 true SE8603126D0 (en) | 1986-07-15 |
SE8603126L SE8603126L (en) | 1987-02-06 |
Family
ID=25065055
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE8603126A SE8603126L (en) | 1985-08-05 | 1986-07-15 | CMOS INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING A SUIT |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS6338251A (en) |
KR (1) | KR870002656A (en) |
DE (1) | DE3625742C2 (en) |
SE (1) | SE8603126L (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5206535A (en) * | 1988-03-24 | 1993-04-27 | Seiko Epson Corporation | Semiconductor device structure |
KR940003218B1 (en) * | 1988-03-24 | 1994-04-16 | 세이꼬 엡슨 가부시끼가이샤 | Forming trench in semiconductor substate with rounded corners |
US4954459A (en) * | 1988-05-12 | 1990-09-04 | Advanced Micro Devices, Inc. | Method of planarization of topologies in integrated circuit structures |
JP2579211B2 (en) * | 1989-01-18 | 1997-02-05 | 三菱電機株式会社 | Method for manufacturing semiconductor device |
JPH0574927A (en) * | 1991-09-13 | 1993-03-26 | Nec Corp | Production of semiconductor device |
US5498565A (en) * | 1991-11-29 | 1996-03-12 | Sony Corporation | Method of forming trench isolation having polishing step and method of manufacturing semiconductor device |
JP2621765B2 (en) * | 1992-07-30 | 1997-06-18 | 日本電気株式会社 | Method for manufacturing element isolation structure of CMOS semiconductor device |
EP0637062B1 (en) * | 1993-07-27 | 1997-06-04 | Siemens Aktiengesellschaft | Process for manufacturing semi-conducteur device with planarized surface and application to the manufacturing of bipolar transistors and DRAM |
KR950034673A (en) * | 1994-04-20 | 1995-12-28 | 윌리엄 이. 힐러 | Transistor isolation method and device using low-k dielectric |
US5683945A (en) * | 1996-05-16 | 1997-11-04 | Siemens Aktiengesellschaft | Uniform trench fill recess by means of isotropic etching |
JP2000012687A (en) | 1998-06-23 | 2000-01-14 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5986263A (en) * | 1982-11-09 | 1984-05-18 | Nec Corp | Manufacture of semiconductor device |
DE3472604D1 (en) * | 1983-10-11 | 1988-08-11 | American Telephone & Telegraph | Semiconductor integrated circuits containing complementary metal oxide semiconductor devices |
WO1985004525A1 (en) * | 1984-03-29 | 1985-10-10 | Hughes Aircraft Company | A latch-up resistant cmos structure for vlsi |
-
1986
- 1986-07-15 SE SE8603126A patent/SE8603126L/en not_active Application Discontinuation
- 1986-07-29 KR KR1019860006185A patent/KR870002656A/en not_active Application Discontinuation
- 1986-07-30 DE DE3625742A patent/DE3625742C2/en not_active Expired - Fee Related
- 1986-08-04 JP JP61184124A patent/JPS6338251A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS6338251A (en) | 1988-02-18 |
SE8603126L (en) | 1987-02-06 |
DE3625742C2 (en) | 1995-06-29 |
KR870002656A (en) | 1987-04-06 |
DE3625742A1 (en) | 1987-05-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NAV | Patent application has lapsed |
Ref document number: 8603126-7 |