NL7903158A - Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. - Google Patents

Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. Download PDF

Info

Publication number: NL7903158A
Authority: NL; Netherlands
Prior art keywords: mask; semiconductor body; zones; layer; conductivity type
Prior art date: 1979-04-23

Application number

NL7903158A

Other languages

English (en)

Dutch (nl)

Original Assignee

Philips Nv

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1979-04-23

Filing date

1979-04-23

Publication date

1980-10-27

1979-04-23 Application filed by Philips Nv filed Critical Philips Nv

1979-04-23 Priority to NL7903158A priority Critical patent/NL7903158A/nl

1980-04-17 Priority to CA000350071A priority patent/CA1146675A/en

1980-04-18 Priority to US06/141,510 priority patent/US4343079A/en

1980-04-18 Priority to GB8012778A priority patent/GB2047961B/en

1980-04-18 Priority to FR8008773A priority patent/FR2455361A1/fr

1980-04-18 Priority to IT21514/80A priority patent/IT1140878B/it

1980-04-19 Priority to DE19803015101 priority patent/DE3015101A1/de

1980-04-21 Priority to CH3064/80A priority patent/CH653482A5/de

1980-04-21 Priority to JP5181280A priority patent/JPS55141758A/ja

1980-04-21 Priority to AU57651/80A priority patent/AU537858B2/en

1980-10-27 Publication of NL7903158A publication Critical patent/NL7903158A/nl

Links

238000000034 method Methods 0.000 title claims description 43
230000005669 field effect Effects 0.000 title claims description 15
238000004519 manufacturing process Methods 0.000 title claims description 13
239000004065 semiconductor Substances 0.000 claims description 68
230000003647 oxidation Effects 0.000 claims description 28
238000007254 oxidation reaction Methods 0.000 claims description 28
238000005530 etching Methods 0.000 claims description 21
VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 17
229910052814 silicon oxide Inorganic materials 0.000 claims description 17
XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
239000012535 impurity Substances 0.000 claims description 12
229910052710 silicon Inorganic materials 0.000 claims description 12
239000010703 silicon Substances 0.000 claims description 12
230000000873 masking effect Effects 0.000 claims description 11
239000004020 conductor Substances 0.000 claims description 10
239000000463 material Substances 0.000 claims description 10
229910052581 Si3N4 Inorganic materials 0.000 claims description 9
HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
229910052785 arsenic Inorganic materials 0.000 claims description 3
229910052787 antimony Inorganic materials 0.000 claims description 2
150000004767 nitrides Chemical class 0.000 description 25
238000009792 diffusion process Methods 0.000 description 8
230000003071 parasitic effect Effects 0.000 description 8
229920002120 photoresistant polymer Polymers 0.000 description 8
230000015572 biosynthetic process Effects 0.000 description 4
238000002513 implantation Methods 0.000 description 4
229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
238000012856 packing Methods 0.000 description 3
ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
230000002411 adverse Effects 0.000 description 2
229910052796 boron Inorganic materials 0.000 description 2
238000011109 contamination Methods 0.000 description 2
239000002019 doping agent Substances 0.000 description 2
239000011521 glass Substances 0.000 description 2
238000005468 ion implantation Methods 0.000 description 2
238000001020 plasma etching Methods 0.000 description 2
230000003064 anti-oxidating effect Effects 0.000 description 1
RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
235000013405 beer Nutrition 0.000 description 1
150000001875 compounds Chemical class 0.000 description 1
239000000356 contaminant Substances 0.000 description 1
239000013078 crystal Substances 0.000 description 1
230000008021 deposition Effects 0.000 description 1
238000005553 drilling Methods 0.000 description 1
230000000694 effects Effects 0.000 description 1
238000010304 firing Methods 0.000 description 1
230000004927 fusion Effects 0.000 description 1
238000009413 insulation Methods 0.000 description 1
238000005259 measurement Methods 0.000 description 1
229910052751 metal Inorganic materials 0.000 description 1
239000002184 metal Substances 0.000 description 1
239000000203 mixture Substances 0.000 description 1
229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
229910052760 oxygen Inorganic materials 0.000 description 1
239000001301 oxygen Substances 0.000 description 1
238000002161 passivation Methods 0.000 description 1
238000001259 photo etching Methods 0.000 description 1
238000001556 precipitation Methods 0.000 description 1
239000000758 substrate Substances 0.000 description 1
XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
- H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/911—Differential oxidation and etching

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Power Engineering (AREA)
Physics & Mathematics (AREA)
Condensed Matter Physics & Semiconductors (AREA)
General Physics & Mathematics (AREA)
Manufacturing & Machinery (AREA)
Computer Hardware Design (AREA)
Chemical & Material Sciences (AREA)
Inorganic Chemistry (AREA)
Ceramic Engineering (AREA)
Junction Field-Effect Transistors (AREA)
Insulated Gate Type Field-Effect Transistor (AREA)
Electrodes Of Semiconductors (AREA)
Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Local Oxidation Of Silicon (AREA)

NL7903158A 1979-04-23 1979-04-23 Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. NL7903158A (nl)

Priority Applications (10)

Application Number	Priority Date	Filing Date	Title
NL7903158A NL7903158A (nl)	1979-04-23	1979-04-23	Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
CA000350071A CA1146675A (en)	1979-04-23	1980-04-17	Method of manufacturing an insulated gate field-effect transistor using narrow silicon nitride strip mask
US06/141,510 US4343079A (en)	1979-04-23	1980-04-18	Self-registering method of manufacturing an insulated gate field-effect transistor
GB8012778A GB2047961B (en)	1979-04-23	1980-04-18	Self-registered igfet structure
FR8008773A FR2455361A1 (fr)	1979-04-23	1980-04-18	Procede pour fabriquer un transistor a effet de champ a porte isolee et transistor fabrique a l'aide d'un tel procede
IT21514/80A IT1140878B (it)	1979-04-23	1980-04-18	Metodo di fabricazione di un transistore ad effetto di campo, a porta isolata e transistore fabbricato con l'ausilio di tale metodo
DE19803015101 DE3015101A1 (de)	1979-04-23	1980-04-19	Verfahren zur herstellung eines feldeffekttransistors mit isolierter gate-elektrode und durch ein derartiges verfahren hergestellter transistor
CH3064/80A CH653482A5 (de)	1979-04-23	1980-04-21	Verfahren zur herstellung einer integrierten schaltung mit einem feldeffekttransistor und durch ein derartiges verfahren hergestellte schaltung.
JP5181280A JPS55141758A (en)	1979-04-23	1980-04-21	Method of fabricating insulated gate field effect transistor
AU57651/80A AU537858B2 (en)	1979-04-23	1980-04-21	Fet zones formed in a self registering manner

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
NL7903158		1979-04-23
NL7903158A NL7903158A (nl)	1979-04-23	1979-04-23	Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.

Publications (1)

Publication Number	Publication Date
NL7903158A true NL7903158A (nl)	1980-10-27

Family

ID=19833027

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
NL7903158A NL7903158A (nl)	1979-04-23	1979-04-23	Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.

Country Status (10)

Country	Link
US (1)	US4343079A (it)
JP (1)	JPS55141758A (it)
AU (1)	AU537858B2 (it)
CA (1)	CA1146675A (it)
CH (1)	CH653482A5 (it)
DE (1)	DE3015101A1 (it)
FR (1)	FR2455361A1 (it)
GB (1)	GB2047961B (it)
IT (1)	IT1140878B (it)
NL (1)	NL7903158A (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5252505A (en) *	1979-05-25	1993-10-12	Hitachi, Ltd.	Method for manufacturing a semiconductor device
JPS55156370A (en) *	1979-05-25	1980-12-05	Hitachi Ltd	Manufacture of semiconductor device
JPS60106142A (ja) *	1983-11-15	1985-06-11	Nec Corp	半導体素子の製造方法
US4675982A (en) *	1985-10-31	1987-06-30	International Business Machines Corporation	Method of making self-aligned recessed oxide isolation regions
IL106513A (en)	1992-07-31	1997-03-18	Hughes Aircraft Co	Integrated circuit security system and method with implanted interconnections
US5973375A (en) *	1997-06-06	1999-10-26	Hughes Electronics Corporation	Camouflaged circuit structure with step implants

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3698966A (en) *	1970-02-26	1972-10-17	North American Rockwell	Processes using a masking layer for producing field effect devices having oxide isolation
NL164424C (nl) *	1970-06-04	1980-12-15	Philips Nv	Werkwijze voor het vervaardigen van een veldeffect- transistor met een geisoleerde stuurelektrode, waarbij een door een tegen oxydatie maskerende laag vrijgelaten deel van het oppervlak van een siliciumlichaam aan een oxydatiebehandeling wordt onderworpen ter verkrijging van een althans gedeeltelijk in het siliciumlichaam verzonken siliciumoxydelaag.
NL173110C (nl) *	1971-03-17	1983-12-01	Philips Nv	Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
JPS5528229B1 (it) *	1971-03-19	1980-07-26
FR2134290B1 (it) *	1971-04-30	1977-03-18	Texas Instruments France
NL7113561A (it) *	1971-10-02	1973-04-04
US4023195A (en) *	1974-10-23	1977-05-10	Smc Microsystems Corporation	MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions
US4013484A (en) *	1976-02-25	1977-03-22	Intel Corporation	High density CMOS process
JPS52131483A (en) *	1976-04-28	1977-11-04	Hitachi Ltd	Mis-type semiconductor device
NL185376C (nl) *	1976-10-25	1990-03-16	Philips Nv	Werkwijze ter vervaardiging van een halfgeleiderinrichting.
JPS53123678A (en) *	1977-04-04	1978-10-28	Nec Corp	Manufacture of field effect semiconductor device of insulation gate type
JPS53123661A (en) *	1977-04-04	1978-10-28	Mitsubishi Electric Corp	Manufacture of semiconductor device
JPS53144280A (en) *	1977-05-23	1978-12-15	Hitachi Ltd	Mis semiconductor device
US4268950A (en) *	1978-06-05	1981-05-26	Texas Instruments Incorporated	Post-metal ion implant programmable MOS read only memory
US4168999A (en) *	1978-12-26	1979-09-25	Fairchild Camera And Instrument Corporation	Method for forming oxide isolated integrated injection logic semiconductor structures having minimal encroachment utilizing special masking techniques

1979
- 1979-04-23 NL NL7903158A patent/NL7903158A/nl not_active Application Discontinuation
1980
- 1980-04-17 CA CA000350071A patent/CA1146675A/en not_active Expired
- 1980-04-18 FR FR8008773A patent/FR2455361A1/fr active Granted
- 1980-04-18 US US06/141,510 patent/US4343079A/en not_active Expired - Lifetime
- 1980-04-18 GB GB8012778A patent/GB2047961B/en not_active Expired
- 1980-04-18 IT IT21514/80A patent/IT1140878B/it active
- 1980-04-19 DE DE19803015101 patent/DE3015101A1/de active Granted
- 1980-04-21 JP JP5181280A patent/JPS55141758A/ja active Pending
- 1980-04-21 CH CH3064/80A patent/CH653482A5/de not_active IP Right Cessation
- 1980-04-21 AU AU57651/80A patent/AU537858B2/en not_active Ceased

Also Published As

Publication number	Publication date
JPS55141758A (en)	1980-11-05
FR2455361A1 (fr)	1980-11-21
FR2455361B1 (it)	1983-04-29
AU537858B2 (en)	1984-07-19
DE3015101A1 (de)	1980-11-06
US4343079A (en)	1982-08-10
AU5765180A (en)	1980-10-30
DE3015101C2 (it)	1990-03-29
CA1146675A (en)	1983-05-17
IT8021514A0 (it)	1980-04-18
CH653482A5 (de)	1985-12-31
GB2047961B (en)	1983-08-03
IT1140878B (it)	1986-10-10
GB2047961A (en)	1980-12-03

Legal Events

Date	Code	Title
1980-11-10	A1B	A search report has been drawn up
1985-01-01	A85	Still pending on 85-01-01
1985-07-01	BC	A request for examination has been filed
1992-01-02	BI	The patent application has been withdrawn

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US4084175A (en)	1978-04-11	Double implanted planar mos device with v-groove and process of manufacture thereof
US4190850A (en)	1980-02-26	MIS field effect transistor having a short channel length
US4466175A (en)	1984-08-21	Manufacture of vertical insulated gate field effect transistors
KR920010846B1 (ko)	1992-12-19	반도체 장치의 그의 제조방법
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US5721148A (en)	1998-02-24	Method for manufacturing MOS type semiconductor device
US5300454A (en)	1994-04-05	Method for forming doped regions within a semiconductor substrate
US4611220A (en)	1986-09-09	Junction-MOS power field effect transistor
US4845051A (en)	1989-07-04	Buried gate JFET
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JPS6042626B2 (ja)	1985-09-24	半導体装置の製造方法
EP0178000A2 (en)	1986-04-16	Method of forming submicron grooves in, for example, semiconductor material and devices obtained by means of this method
KR19980054327A (ko)	1998-09-25	반도체 소자 및 그 제조방법
CA1142273A (en)	1983-03-01	Method of manufacturing a field effect transistor devices
US4001048A (en)	1977-01-04	Method of making metal oxide semiconductor structures using ion implantation
JPS6156874B2 (it)	1986-12-04
JPH11214529A (ja)	1999-08-06	Ｍｏｓデバイスの集積化方法及び半導体チイップ
US4904613A (en)	1990-02-27	Method of manufacturing a DMOS device
US4287660A (en)	1981-09-08	Methods of manufacturing semiconductor devices
NL7903158A (nl)	1980-10-27	Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
KR100282454B1 (ko)	2001-02-15	트랜지스터의 구조 및 제조 방법
NL8102879A (nl)	1982-01-18	Zelfuitrichtende mos-fabricage.
US4735918A (en)	1988-04-05	Vertical channel field effect transistor
US3946419A (en)	1976-03-23	Field effect transistor structure for minimizing parasitic inversion and process for fabricating
KR100221061B1 (ko)	1999-09-15	반도체장치 및 그 제조방법