NL7612301A - Geheugenstelsel. - Google Patents

Geheugenstelsel.

Info

Publication number
NL7612301A
NL7612301A NL7612301A NL7612301A NL7612301A NL 7612301 A NL7612301 A NL 7612301A NL 7612301 A NL7612301 A NL 7612301A NL 7612301 A NL7612301 A NL 7612301A NL 7612301 A NL7612301 A NL 7612301A
Authority
NL
Netherlands
Prior art keywords
memory system
memory
Prior art date
Application number
NL7612301A
Other languages
English (en)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP50133078A external-priority patent/JPS5811103B2/ja
Priority claimed from JP51006669A external-priority patent/JPS5818714B2/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7612301A publication Critical patent/NL7612301A/nl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
NL7612301A 1975-11-07 1976-11-05 Geheugenstelsel. NL7612301A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP50133078A JPS5811103B2 (ja) 1975-11-07 1975-11-07 ハンドウタイメモリ
JP51006669A JPS5818714B2 (ja) 1976-01-26 1976-01-26 メモリ

Publications (1)

Publication Number Publication Date
NL7612301A true NL7612301A (nl) 1977-05-10

Family

ID=26340855

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7612301A NL7612301A (nl) 1975-11-07 1976-11-05 Geheugenstelsel.

Country Status (4)

Country Link
US (1) US4086662A (nl)
DE (1) DE2650574B2 (nl)
GB (1) GB1535250A (nl)
NL (1) NL7612301A (nl)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041463B2 (ja) * 1976-11-19 1985-09-17 株式会社日立製作所 ダイナミツク記憶装置
DE2740113A1 (de) * 1977-09-06 1979-03-15 Siemens Ag Monolithisch integrierter halbleiterspeicher
US4198694A (en) * 1978-03-27 1980-04-15 Hewlett-Packard Company X-Y Addressable memory
JPS6044752B2 (ja) * 1978-04-24 1985-10-05 日本電気株式会社 ダイナミツクメモリ
DE2842547A1 (de) * 1978-09-29 1980-04-10 Siemens Ag Schaltungsanordnung zum lesen und regenerieren von in ein-transistor-speicherelementen gespeicherten informationen
JPS5817998B2 (ja) * 1978-10-26 1983-04-11 富士通株式会社 半導体メモリ
JPS5634179A (en) * 1979-08-24 1981-04-06 Mitsubishi Electric Corp Control circuit for memory unit
US4247917A (en) * 1979-08-27 1981-01-27 Intel Corporation MOS Random-access memory
JPS58128097A (ja) * 1981-12-29 1983-07-30 Fujitsu Ltd 半導体記憶装置
JPS5960793A (ja) * 1982-09-30 1984-04-06 Fujitsu Ltd 半導体メモリ
US4574365A (en) * 1983-04-18 1986-03-04 International Business Machines Corporation Shared access lines memory cells
US4648073A (en) * 1984-12-31 1987-03-03 International Business Machines Corporation Sequential shared access lines memory cells
US4704705A (en) * 1985-07-19 1987-11-03 Texas Instruments Incorporated Two transistor DRAM cell and array
JPH02161686A (ja) * 1988-12-13 1990-06-21 Oki Electric Ind Co Ltd Ｍｏｓ型半導体記憶装置
US5881010A (en) * 1997-05-15 1999-03-09 Stmicroelectronics, Inc. Multiple transistor dynamic random access memory array architecture with simultaneous refresh of multiple memory cells during a read operation
US6504550B1 (en) 1998-05-21 2003-01-07 Mitsubishi Electric & Electronics Usa, Inc. System for graphics processing employing semiconductor device
US6661421B1 (en) 1998-05-21 2003-12-09 Mitsubishi Electric & Electronics Usa, Inc. Methods for operation of semiconductor memory
US6535218B1 (en) 1998-05-21 2003-03-18 Mitsubishi Electric & Electronics Usa, Inc. Frame buffer memory for graphic processing
US6559851B1 (en) 1998-05-21 2003-05-06 Mitsubishi Electric & Electronics Usa, Inc. Methods for semiconductor systems for graphics processing
JP2006059481A (ja) * 2004-08-23 2006-03-02 Renesas Technology Corp 半導体記憶装置
US11276448B2 (en) * 2020-03-26 2022-03-15 Micron Technology, Inc. Memory array with multiplexed select lines and two transistor memory cells

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3142822A (en) * 1961-06-29 1964-07-28 Goodyear Aerospace Corp Apparatus for sampling, storing and summing signals
US3810124A (en) * 1972-06-30 1974-05-07 Ibm Memory accessing system
US3771147A (en) * 1972-12-04 1973-11-06 Bell Telephone Labor Inc Igfet memory system
US3838295A (en) * 1973-02-05 1974-09-24 Lockheed Electronics Co Ratioless mos sense amplifier
US3986180A (en) * 1975-09-22 1976-10-12 International Business Machines Corporation Depletion mode field effect transistor memory system

Also Published As

Publication number Publication date
US4086662A (en) 1978-04-25
DE2650574A1 (de) 1977-05-12
GB1535250A (en) 1978-12-13
DE2650574B2 (de) 1978-12-07

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Legal Events

Date Code Title Description
BV The patent application has lapsed