NL7413977A - Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen. - Google Patents

Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen.

Info

Publication number
NL7413977A
NL7413977A NL7413977A NL7413977A NL7413977A NL 7413977 A NL7413977 A NL 7413977A NL 7413977 A NL7413977 A NL 7413977A NL 7413977 A NL7413977 A NL 7413977A NL 7413977 A NL7413977 A NL 7413977A
Authority
NL
Netherlands
Prior art keywords
semi
manufacture
conductor
application
layer pattern
Prior art date
Application number
NL7413977A
Other languages
English (en)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL7413977A priority Critical patent/NL7413977A/nl
Priority to CA237,766A priority patent/CA1043471A/en
Priority to GB43342/75A priority patent/GB1524870A/en
Priority to JP50126447A priority patent/JPS5165876A/ja
Priority to CH1369075A priority patent/CH595699A5/xx
Priority to IT7528575A priority patent/IT1043587B/it
Priority to SE7511837A priority patent/SE7511837L/xx
Priority to AU85945/75A priority patent/AU503144B2/en
Priority to DE19752547447 priority patent/DE2547447A1/de
Priority to FR7532460A priority patent/FR2290032A1/fr
Priority to ES442026A priority patent/ES442026A1/es
Publication of NL7413977A publication Critical patent/NL7413977A/nl
Priority to US06/115,972 priority patent/US4301191A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/944—Shadow

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
NL7413977A 1974-10-25 1974-10-25 Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen. NL7413977A (nl)

Priority Applications (12)

Application Number Priority Date Filing Date Title
NL7413977A NL7413977A (nl) 1974-10-25 1974-10-25 Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen.
CA237,766A CA1043471A (en) 1974-10-25 1975-10-16 Thin conductor lines made by a mask lift-off technique
IT7528575A IT1043587B (it) 1974-10-25 1975-10-22 Metodo per la formazione di un disegno in uno strato conduttore presentante parti disposte ad una piccola distanza reciproca in particolare nella fabbricazione di ticolare nella fabbricazione di dispositivi semiconduttori
JP50126447A JPS5165876A (nl) 1974-10-25 1975-10-22
CH1369075A CH595699A5 (nl) 1974-10-25 1975-10-22
GB43342/75A GB1524870A (en) 1974-10-25 1975-10-22 Provision of conductor layer patterns
SE7511837A SE7511837L (sv) 1974-10-25 1975-10-22 Sett att i synnerhet vid framstellning av halvledaranordning pa en substratyta anordna ett ledarskiktmonster med partier, som atminstone lokalt befinner sig pa litet inbordes avstand
AU85945/75A AU503144B2 (en) 1974-10-25 1975-10-23 A method of providing a conductor layer pattern having asmall separation
DE19752547447 DE2547447A1 (de) 1974-10-25 1975-10-23 Verfahren zum anbringen eines leiterschichtmusters mit in geringem gegenseitigen abstand liegenden teilen, insbesondere bei der herstellung von halbleiteranordnungen
FR7532460A FR2290032A1 (fr) 1974-10-25 1975-10-23 Application d'un motif de couche conductrice comportant des elements situes a petite distance les uns des autres, en particulier pour la fabrication de dispositifs semi-conducteurs
ES442026A ES442026A1 (es) 1974-10-25 1975-10-23 Un metodo para fabricar dispositivos semiconductores.
US06/115,972 US4301191A (en) 1974-10-25 1980-01-28 Method of providing a conductor layer pattern having parts which are present at a small separation in the manufacture of semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7413977A NL7413977A (nl) 1974-10-25 1974-10-25 Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen.

Publications (1)

Publication Number Publication Date
NL7413977A true NL7413977A (nl) 1976-04-27

Family

ID=19822335

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7413977A NL7413977A (nl) 1974-10-25 1974-10-25 Aanbrengen van een geleiderlaagpatroon met op een geringe onderlinge afstand gelegen delen, in het bijzonder bij de vervaardiging van half- geleiderinrichtingen.

Country Status (12)

Country Link
US (1) US4301191A (nl)
JP (1) JPS5165876A (nl)
AU (1) AU503144B2 (nl)
CA (1) CA1043471A (nl)
CH (1) CH595699A5 (nl)
DE (1) DE2547447A1 (nl)
ES (1) ES442026A1 (nl)
FR (1) FR2290032A1 (nl)
GB (1) GB1524870A (nl)
IT (1) IT1043587B (nl)
NL (1) NL7413977A (nl)
SE (1) SE7511837L (nl)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD136670A1 (de) * 1976-02-04 1979-07-18 Rudolf Sacher Verfahren und vorrichtung zur herstellung von halbleiterstrukturen
US4469719A (en) * 1981-12-21 1984-09-04 Applied Magnetics-Magnetic Head Divison Corporation Method for controlling the edge gradient of a layer of deposition material
US4691434A (en) * 1982-02-19 1987-09-08 Lasarray Holding Ag Method of making electrically conductive regions in monolithic semiconductor devices as applied to a semiconductor device
GB2131624B (en) * 1982-12-09 1986-07-09 Standard Telephones Cables Ltd Thick film circuits
PH23907A (en) * 1983-09-28 1989-12-18 Rohm & Haas Catalytic process and systems
US6667215B2 (en) * 2002-05-02 2003-12-23 3M Innovative Properties Method of making transistors
KR100950133B1 (ko) * 2002-12-27 2010-03-30 엘지디스플레이 주식회사 인쇄방식에 의한 패턴형성방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL294779A (nl) * 1962-07-20
US3700510A (en) * 1970-03-09 1972-10-24 Hughes Aircraft Co Masking techniques for use in fabricating microelectronic components
GB1447866A (en) * 1972-11-10 1976-09-02 Nat Res Dev Charge coupled devices and methods of fabricating them

Also Published As

Publication number Publication date
AU503144B2 (en) 1979-08-23
FR2290032A1 (fr) 1976-05-28
AU8594575A (en) 1977-04-28
JPS5165876A (nl) 1976-06-07
SE7511837L (sv) 1976-04-26
GB1524870A (en) 1978-09-13
ES442026A1 (es) 1977-06-16
IT1043587B (it) 1980-02-29
US4301191A (en) 1981-11-17
CH595699A5 (nl) 1978-02-28
FR2290032B1 (nl) 1980-12-12
DE2547447A1 (de) 1976-04-29
CA1043471A (en) 1978-11-28

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Legal Events

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BI The patent application has been withdrawn