NL186352C - Werkwijze ter vervaardiging van een halfgeleiderinrichting. - Google Patents
Werkwijze ter vervaardiging van een halfgeleiderinrichting.Info
- Publication number
- NL186352C NL186352C NLAANVRAGE8004835,A NL8004835A NL186352C NL 186352 C NL186352 C NL 186352C NL 8004835 A NL8004835 A NL 8004835A NL 186352 C NL186352 C NL 186352C
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE8004835,A NL186352C (nl) | 1980-08-27 | 1980-08-27 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
US06/294,268 US4373251A (en) | 1980-08-27 | 1981-08-19 | Method of manufacturing a semiconductor device |
DE19813132905 DE3132905A1 (de) | 1980-08-27 | 1981-08-20 | "verfahren zur herstellung einer halbleiteranordnung" |
CA000384311A CA1176142A (en) | 1980-08-27 | 1981-08-20 | Method of manufacturing a semiconductor device |
GB8125773A GB2083284B (en) | 1980-08-27 | 1981-08-24 | Metal silicide on polycrystalline silicon layers |
FR8116152A FR2489591A1 (fr) | 1980-08-27 | 1981-08-24 | Procede de fabrication d'un dispositif semiconducteur |
JP56131666A JPS5772383A (en) | 1980-08-27 | 1981-08-24 | Method of fabricating semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE8004835,A NL186352C (nl) | 1980-08-27 | 1980-08-27 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
NL8004835 | 1980-08-27 |
Publications (3)
Publication Number | Publication Date |
---|---|
NL8004835A NL8004835A (nl) | 1982-04-01 |
NL186352B NL186352B (nl) | 1990-06-01 |
NL186352C true NL186352C (nl) | 1990-11-01 |
Family
ID=19835784
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NLAANVRAGE8004835,A NL186352C (nl) | 1980-08-27 | 1980-08-27 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4373251A (nl) |
JP (1) | JPS5772383A (nl) |
CA (1) | CA1176142A (nl) |
DE (1) | DE3132905A1 (nl) |
FR (1) | FR2489591A1 (nl) |
GB (1) | GB2083284B (nl) |
NL (1) | NL186352C (nl) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5200349A (en) * | 1980-12-30 | 1993-04-06 | Fujitsu Limited | Semiconductor device including schotky gate of silicide and method for the manufacture of the same |
US5536967A (en) * | 1980-12-30 | 1996-07-16 | Fujitsu Limited | Semiconductor device including Schottky gate of silicide and method for the manufacture of the same |
US4399605A (en) * | 1982-02-26 | 1983-08-23 | International Business Machines Corporation | Method of making dense complementary transistors |
US4400867A (en) * | 1982-04-26 | 1983-08-30 | Bell Telephone Laboratories, Incorporated | High conductivity metallization for semiconductor integrated circuits |
DE3304642A1 (de) * | 1983-02-10 | 1984-08-16 | Siemens AG, 1000 Berlin und 8000 München | Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung |
US4450620A (en) * | 1983-02-18 | 1984-05-29 | Bell Telephone Laboratories, Incorporated | Fabrication of MOS integrated circuit devices |
GB2139418A (en) * | 1983-05-05 | 1984-11-07 | Standard Telephones Cables Ltd | Semiconductor devices and conductors therefor |
JPH0612819B2 (ja) * | 1983-06-16 | 1994-02-16 | 松下電器産業株式会社 | 半導体装置の製造方法 |
JPH0638496B2 (ja) * | 1983-06-27 | 1994-05-18 | 日本電気株式会社 | 半導体装置 |
JPS60134466A (ja) * | 1983-12-23 | 1985-07-17 | Hitachi Ltd | 半導体装置およびその製造方法 |
GB2156579B (en) * | 1984-03-15 | 1987-05-07 | Standard Telephones Cables Ltd | Field effect transistors |
US4597163A (en) * | 1984-12-21 | 1986-07-01 | Zilog, Inc. | Method of improving film adhesion between metallic silicide and polysilicon in thin film integrated circuit structures |
US5280188A (en) * | 1985-03-07 | 1994-01-18 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor integrated circuit device having at least one bipolar transistor and a plurality of MOS transistors |
JPS61222174A (ja) * | 1985-03-27 | 1986-10-02 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH061775B2 (ja) * | 1985-07-17 | 1994-01-05 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH0665213B2 (ja) * | 1985-10-31 | 1994-08-22 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置及びその製造方法 |
US4782033A (en) * | 1985-11-27 | 1988-11-01 | Siemens Aktiengesellschaft | Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate |
US4877749A (en) * | 1986-02-28 | 1989-10-31 | Polyfet Re Devices, Inc. | Method of forming a low loss FET |
JPS6337635A (ja) * | 1986-07-31 | 1988-02-18 | Fujitsu Ltd | 半導体装置の製造方法 |
US5017509A (en) * | 1988-07-19 | 1991-05-21 | Regents Of The University Of California | Stand-off transmission lines and method for making same |
US4992391A (en) * | 1989-11-29 | 1991-02-12 | Advanced Micro Devices, Inc. | Process for fabricating a control gate for a floating gate FET |
TW230266B (nl) * | 1993-01-26 | 1994-09-11 | American Telephone & Telegraph | |
US6004869A (en) | 1997-04-25 | 1999-12-21 | Micron Technology, Inc. | Method for making a low resistivity electrode having a near noble metal |
JP4851875B2 (ja) * | 2006-07-14 | 2012-01-11 | 川崎重工業株式会社 | 自動二輪車のリヤステップ取付構造及び該リヤステップ取付構造を備えた自動二輪車 |
JP6997692B2 (ja) | 2018-09-28 | 2022-01-18 | 本田技研工業株式会社 | 鞍乗り型車両 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3617824A (en) * | 1965-07-12 | 1971-11-02 | Nippon Electric Co | Mos device with a metal-silicide gate |
US3590471A (en) * | 1969-02-04 | 1971-07-06 | Bell Telephone Labor Inc | Fabrication of insulated gate field-effect transistors involving ion implantation |
US3967981A (en) * | 1971-01-14 | 1976-07-06 | Shumpei Yamazaki | Method for manufacturing a semiconductor field effort transistor |
JPS4960875A (nl) * | 1972-10-17 | 1974-06-13 | ||
GB1399163A (en) * | 1972-11-08 | 1975-06-25 | Ferranti Ltd | Methods of manufacturing semiconductor devices |
NL7510903A (nl) * | 1975-09-17 | 1977-03-21 | Philips Nv | Werkwijze voor het vervaardigen van een halfgelei- derinrichting, en inrichting vervaardigd volgens de werkwijze. |
JPS52119186A (en) * | 1976-03-31 | 1977-10-06 | Nec Corp | Manufacture of semiconductor |
JPS6057227B2 (ja) * | 1976-11-11 | 1985-12-13 | 日本電気株式会社 | 半導体装置の製造方法 |
JPS53114672A (en) * | 1977-03-17 | 1978-10-06 | Toshiba Corp | Manufacture for semiconductor device |
US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
JPS5488783A (en) * | 1977-12-26 | 1979-07-14 | Cho Lsi Gijutsu Kenkyu Kumiai | Semiconductor |
US4304042A (en) * | 1978-11-13 | 1981-12-08 | Xerox Corporation | Self-aligned MESFETs having reduced series resistance |
US4319395A (en) * | 1979-06-28 | 1982-03-16 | Motorola, Inc. | Method of making self-aligned device |
US4276688A (en) * | 1980-01-21 | 1981-07-07 | Rca Corporation | Method for forming buried contact complementary MOS devices |
US4285761A (en) * | 1980-06-30 | 1981-08-25 | International Business Machines Corporation | Process for selectively forming refractory metal silicide layers on semiconductor devices |
-
1980
- 1980-08-27 NL NLAANVRAGE8004835,A patent/NL186352C/nl not_active IP Right Cessation
-
1981
- 1981-08-19 US US06/294,268 patent/US4373251A/en not_active Expired - Fee Related
- 1981-08-20 CA CA000384311A patent/CA1176142A/en not_active Expired
- 1981-08-20 DE DE19813132905 patent/DE3132905A1/de active Granted
- 1981-08-24 JP JP56131666A patent/JPS5772383A/ja active Pending
- 1981-08-24 FR FR8116152A patent/FR2489591A1/fr active Granted
- 1981-08-24 GB GB8125773A patent/GB2083284B/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE3132905C2 (nl) | 1990-03-22 |
JPS5772383A (en) | 1982-05-06 |
FR2489591B1 (nl) | 1985-03-08 |
CA1176142A (en) | 1984-10-16 |
NL186352B (nl) | 1990-06-01 |
US4373251A (en) | 1983-02-15 |
GB2083284A (en) | 1982-03-17 |
NL8004835A (nl) | 1982-04-01 |
GB2083284B (en) | 1984-07-25 |
FR2489591A1 (fr) | 1982-03-05 |
DE3132905A1 (de) | 1982-04-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A1B | A search report has been drawn up | ||
A85 | Still pending on 85-01-01 | ||
BC | A request for examination has been filed | ||
V1 | Lapsed because of non-payment of the annual fee |