MXPA98004522A - Data comparison agc system for vsb receiver - Google Patents

Abstract

A technique and apparatus for developing AGC voltage in a receiver (fig. 1) capable of receiving VSB signals (RF IN) that do not have the data symbol levels and the sync symbol levels related so as to produce the same average magnitude level. Successive portions of the signal are accumulated, stored (38-44) and compared (46) with the smaller of the samples to be used to develop the AGC voltage. By comparing the first and third of three successive samples, the effect of the larger than desired sync levels in the over-the-air VSB signals is completely eliminated.

Description

> SYSTEM. OF AUTOMATIC GAIN CONTROL BY COMPARISON OF DATA FOR RESIDUAL LATERAL BAND RECEIVER DESCRIPTION OF THE INVENTION This invention relates to the signal system VSB (residual sideband) and specifically to the methods and apparatus for developing AGC voltages (automatic gain control) in digital VSB signals. The recently adopted standards for digital terrestrial VSB signals establish certain data levels and synchronization symbol. In the document of the ATSC (Committee of Advanced Television Systems), the levels of data that should be used for the transmission systems 8VSB (coded by Trellis) and 16VSB (ATSC) are specified. The VSB transmission system is not restricted to over-the-air transmission (terrestrial) and Zenith Electronics Corporation has specified three additional modes that can be used for cable or MMDS systems. These VSB modes were identified as VSB cable modes 8/4/2. The two 8VSB modes differ only in the amount of data that is transported. As discussed in full in U.S. Patent No. 5,508,748 entitled DATA SELECTION FOR MULTIPLE LEVEL VSB TRANSMISSION SYSTEM, the data levels and levels of REF: 27004 synchronization in the different VSB cable modes can be selected for that have a desired relationship with each other, which results in great simplification and reduced costs in data division and error correction. This relationship also allows the easy production of AGC voltages of the VSB signal. Unfortunately, that desired relationship is not present during synchronization of the two-tier segment and the block synchronization of the standards adopted by the ATSC and does not need to be present in the VSB signals that can be used. With the desired ratio, the average value of the magnitude of the data symbols and the average value of the magnitude of the synchronization symbols is the same. In some of the mentioned signals, that relationship is not present as the average of the magnitude of the data levels nor is it the same as the average of the magnitude of the reference synchronization levels. Therefore the production of AGC potentials based on the average of the data and the amplitude of synchronization is prone to errors. The present invention solves the problems created by the undesirable relationship between synchronization and data for generation of AGC in numerous ways and allows a VSB receiver to generate AGC voltages for all VSB mode signals in a relatively simple manner.

A feature of the invention is that it provides a novel method and apparatus for generating AGC voltages for VSB mode signals. The present invention therefore provides a method for operating an AGC system in a receiver that receives a plurality of digital signals that have different average data symbol levels and average synchronization symbol levels, the method includes the steps of processing a received signal to determine successive average symbol levels, comparing pairs of the determined average symbol levels, and using the smallest of the levels of average symbols compared to develop an AGC voltage. Another feature of the invention is that it provides a VSB receiver that can easily produce AGC voltages for all VSB mode signals in a simple manner. The present invention further provides a receiver for developing an AGC voltage for any of a plurality of received digital signals having different average symbol levels and average synchronization symbol levels, the receiver includes means for processing the received signals to determine the levels of successive average symbol, means for comparing the average symbol levels determined successively, and means for using the smallest of the average symbol levels compared to develop the AGC voltage. These and other features and advantages of the invention will become apparent upon reading the following description of a preferred embodiment of the invention in conjunction with the drawings, in which. FIGURE 1 is a simplified partial block diagram of a prior art VSB receiver; and FIGURE 2 is a block diagram of an AGC generation system for the circuit of FIGURE 1 embodying the invention. Referring to FIGURE 1, an RF signal (which may be cable or over the air) is applied to an IF tuner and the demodulator 10 where it is processed in a well-known manner to develop an analog band signal base. The demodulated signal is converted to a digital form in an A / D (analog to digital) converter 12 and is applied to a block 14 that includes the appropriate circuits for removing DC, developing AGC voltages of increasing gain and falling gain, recovering information from watch] and synchronization signals, operate a comb filter and develop a VSB mode signal. The VSB mode of the received signal is also determined at this point. The signal is applied to a compensator 16 which in turn is supplied to a phase tracker 18, which is operated in accordance with the teachings of U.S. Patent No. 5,406,587, entitled "ERROR TRACKING CIRCUIT". The phase tracker is supplied to a divider 20 which operates as described in the above-mentioned patent to recover the symbols in the received signal. The divider 20 feeds a block 22 which includes a symbol / byte converter, convolutional deinterleaver circuit, trellis decoder, R-S decoder and descrambler, all of which are well known in the art. The output data is applied to a well-known television circuit or data processor (not shown) to display / use the data. FIGURE 2 represents an AGC generating circuit constructed in accordance with the invention. The A / D signal 12 is coupled to a DC remover circuit 30 where the DC due to the pilot and other DC deviations in the signal VSB are removed. The absolute value of the signal is taken in a circuit 32 and applied to a positive input of an adder 34. A deviation of +96 in block 35 is coupled to the negative input of adder 34. This deviation is the average of the absolute value of the data levels of a particular gain factor. A different gain factor will require a different deviation value. The adder 34 supplies the signal to an accumulator 36 which, in turn, supplies it to a first register 38. The register 38 supplies a second register 40 with an absolute value taken by the circuit 42 and a multiplexer 48. The register 40 supplies the signal to a third register 43, which, in turn, supplies another absolute value taken by the circuit 44 and the multiplexer 48. The outputs of the absolute value circuits 42 and 44 are coupled to a comparator 46, where the signals are compared to determine the smaller of the two. The comparator 46 controls an input SEL of the multiplexer 48. The output of the multiplexer 48 is coupled to a vasculating circuit 50 (which acts as a register) and its output is coupled to a pulse width modulator (PM) 52, which generates AGC voltage and activates any of its up-gain or down-gain outputs. The synchronization signals are produced by a synchronization block 62 and are coupled to the reset input of the accumulator 36 and the activation inputs of the registers 38, 40 and 43. The reset synchronization signal determines the duration of the accumulation of the samples and in the preferred modality occurs once in a segment. The results of the accumulator 36 are stored in the register 38 by the activation synchronization signal just before the accumulator 36 is reset. In all VSB modes, the average of the magnitude of the data level symbols is 96 for a selected size of the signal. This is also the average of two-level synchronization symbols in the 2VSB signal, for example, and the development of an AGC voltage by sampling all of them. or portions of such a signal is not affected if the synchronization symbols are sampled together with the data symbols. It should be appreciated that the AGC voltage can be developed by sampling only the synchronization symbols, only data symbols or a combination of the two. Those arrangements are included in our co-pending application. By lengthening the portion of signal that is sampled and averaged, the AGC will be more accurate, but it will be slower. Averaging shorter samples to make the action faster, although less exact for the AGC. In operation, the DC of the pilot and any other deviations of DC are removed in the DC remover circuit 30 and the absolute value of the rest of the sampled signal is applied to the adder 34 where it is combined with a deviation of +96 from the circuit 35 The deviation of +96 results in the level of the data signal at the inlet of the accumulator 36 which is zero under ideal conditions. In practice, it is not ideal and the resultant is applied in series to registers 38, 40 and 43. The effect of the registers is to make available three portions sampled successively (segments in the preferred embodiment) of the signal, the first and third of which are compared in the comparator 46. The compared portions are also supplied to the multiplexer 48 which selects one of the portions based on its selected signal input. As indicated, the comparator 46 selects the smallest of the two portions to be applied to a jogger 50 and the PWM 52 generates a corresponding AGC ascending or descending gain control signal. The invention ignores the mode or type VSB of the signal. By comparing successive sampled portions of the signals and selecting the smaller of the two portions, the effects of the highest level field synchronization symbols on the air VSB signals are completely overcome. The system has the benefit of being random in terms of synchronization and if the samples are selected in at least two separate segments, the possibility of successively sampling half of a data segment and half of a field synchronization segment is eliminated. . What has been described is a novel method and apparatus for developing AGC potentials in a receiver that is capable of receiving different types of VSB signals in which the desired relationship between the data symbol levels and the synchronization symbol levels can not. get. It is recognized that those skilled in the art will contemplate numerous changes in the embodiments of the described invention without departing from the spirit and true scope thereof. The invention should be limited only as defined in the claims.

It is noted that in relation to this date, the best method known to the applicant to carry out the aforementioned invention, is that which is clear from the present description of the invention. Having described the invention as above, property is claimed as contained in the following:

Claims (8)

1. A method for operating an AGC system in a receiver that receives a plurality of digital signals having different levels of average data symbol and average synchronization symbol levels, the method is characterized in that it includes the steps of processing a received signal to determine the successive average symbol levels, compare pairs of determined average symbol levels, and use the smallest of the average symbol levels compared to develop an AGC voltage.

2. The method in accordance with the claim 1, characterized in that the plurality of digital signals received includes a DC pilot and DC deviations and the method includes the step of removing the DC pilot and the DC deviations from the received signal before processing the received signal to determine the levels of average symbol.

3. The method in accordance with the claim 2, characterized in that the processing includes the steps of averaging the symbols of the received signal over three successive portions thereof, comparing the first and third portions averaged successively, and selecting the smallest of the compared portions to develop the AGC voltage.

4. The method according to claim 3, characterized in that the processing includes the steps of using timing signals to determine the duration of the average symbol level portions.

5. A receiver for developing an AGC voltage for any of a plurality of received digital signals having different levels of average data symbol and average synchronization symbol levels, the receiver is characterized in that it includes means for processing received signals to determine symbol levels. successive average, means to compare the average symbol levels determined successively, and means to use the smallest of the average symbol levels compared to develop the AGC voltage.

6. The receiver according to claim 5, characterized in that the plurality of digital signals received includes a DC pilot and DC deviations,, and the receiver includes means for removing the DC pilot and the DC deviations of the received signals before that the received signals reach the processing means.

7. The receiver according to claim 6, characterized in that the processing means include means for averaging the symbols on three successive portions of the received signal, means for comparing the first and third successively averaged portions of the received signal, and means for selecting the smallest of the compared portions of the received signal to develop the AGC voltage.

8. The receiver according to claim 7, characterized in that it includes timing means for developing timing signals of the received signal, and means for applying the timing signals to determine the duration of the portions of the received signal.