MX9205128A - Metodo para procesar un bloque de circuito integrado semiconductor. - Google Patents

Metodo para procesar un bloque de circuito integrado semiconductor.

Info

Publication number
MX9205128A
MX9205128A MX9205128A MX9205128A MX9205128A MX 9205128 A MX9205128 A MX 9205128A MX 9205128 A MX9205128 A MX 9205128A MX 9205128 A MX9205128 A MX 9205128A MX 9205128 A MX9205128 A MX 9205128A
Authority
MX
Mexico
Prior art keywords
processing
integrated circuit
semiconductor integrated
circuit block
block
Prior art date
Application number
MX9205128A
Other languages
English (en)
Inventor
Alexander J Elliott
Allen K Koesser
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of MX9205128A publication Critical patent/MX9205128A/es

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
MX9205128A 1991-09-30 1992-09-08 Metodo para procesar un bloque de circuito integrado semiconductor. MX9205128A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76759391A 1991-09-30 1991-09-30

Publications (1)

Publication Number Publication Date
MX9205128A true MX9205128A (es) 1993-04-01

Family

ID=25079961

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9205128A MX9205128A (es) 1991-09-30 1992-09-08 Metodo para procesar un bloque de circuito integrado semiconductor.

Country Status (10)

Country Link
US (1) US5690877A (es)
EP (1) EP0535882B1 (es)
JP (1) JP3399988B2 (es)
KR (1) KR100248551B1 (es)
CN (1) CN1073044A (es)
CZ (1) CZ282517B6 (es)
DE (1) DE69232200T2 (es)
MX (1) MX9205128A (es)
SG (1) SG46266A1 (es)
SK (1) SK298792A3 (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2741191B1 (fr) * 1995-11-14 1998-01-09 Sgs Thomson Microelectronics Procede de fabrication d'un micromodule, notamment pour cartes a puces
US5886397A (en) * 1996-09-05 1999-03-23 International Rectifier Corporation Crushable bead on lead finger side surface to improve moldability

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539675A (en) * 1965-10-22 1970-11-10 Motorola Inc Method for encapsulating semiconductor devices
US4109373A (en) * 1975-03-10 1978-08-29 General Electric Company Method for manufacturing semiconductor devices
US4451973A (en) * 1981-04-28 1984-06-05 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
JPS5896921U (ja) * 1981-12-24 1983-07-01 トヨタ自動車株式会社 インサート成形装置
EP0090503A3 (en) * 1982-03-25 1985-05-22 Texas Instruments Incorporated Apparatus and method of packaging a semiconductor device
JPS59135753A (ja) * 1983-01-25 1984-08-04 Toshiba Corp 半導体装置とその製造方法
US4504427A (en) * 1983-06-17 1985-03-12 At&T Bell Laboratories Solder preform stabilization for lead frames
JPS60176259A (ja) * 1984-02-22 1985-09-10 Toshiba Corp 樹脂封止形半導体装置の製造方法
JPS6147658A (ja) * 1984-08-14 1986-03-08 Nec Kansai Ltd 半導体装置の製造方法
US4615857A (en) * 1984-11-30 1986-10-07 Motorola, Inc. Encapsulation means and method for reducing flash
US4862586A (en) * 1985-02-28 1989-09-05 Michio Osada Lead frame for enclosing semiconductor chips with resin
JPS62128163A (ja) * 1985-11-29 1987-06-10 Nec Corp リ−ドフレ−ム
US4778146A (en) * 1987-03-20 1988-10-18 Asm Fico Leadframe for flash-free insert molding and method therefor
US4874722A (en) * 1987-04-16 1989-10-17 Texas Instruments Incorporated Process of packaging a semiconductor device with reduced stress forces
US4915607A (en) * 1987-09-30 1990-04-10 Texas Instruments Incorporated Lead frame assembly for an integrated circuit molding system
JPH0828455B2 (ja) * 1988-02-24 1996-03-21 富士通株式会社 リードフレーム及びそれを用いた電子部品の製造方法
US4946518A (en) * 1989-03-14 1990-08-07 Motorola, Inc. Method for improving the adhesion of a plastic encapsulant to copper containing leadframes
US5070039A (en) * 1989-04-13 1991-12-03 Texas Instruments Incorporated Method of making an integrated circuit using a pre-served dam bar to reduce mold flash and to facilitate flash removal

Also Published As

Publication number Publication date
KR100248551B1 (ko) 2000-03-15
SG46266A1 (en) 1998-02-20
SK298792A3 (en) 1994-11-09
CZ298792A3 (en) 1993-04-14
DE69232200T2 (de) 2002-06-06
DE69232200D1 (de) 2001-12-20
CN1073044A (zh) 1993-06-09
EP0535882A1 (en) 1993-04-07
CZ282517B6 (cs) 1997-07-16
JPH05206182A (ja) 1993-08-13
JP3399988B2 (ja) 2003-04-28
US5690877A (en) 1997-11-25
EP0535882B1 (en) 2001-11-14

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Legal Events

Date Code Title Description
FG Grant or registration
MM Annulment or lapse due to non-payment of fees