MX2019014467A - Aparato de transmision y metodo de intercalacion del mismo. - Google Patents
Aparato de transmision y metodo de intercalacion del mismo.Info
- Publication number
- MX2019014467A MX2019014467A MX2019014467A MX2019014467A MX2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A MX 2019014467 A MX2019014467 A MX 2019014467A
- Authority
- MX
- Mexico
- Prior art keywords
- ldpc codeword
- ldpc
- transmitting apparatus
- bits
- bit
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1157—Low-density generator matrices [LDGM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Se proporciona un aparato de transmisión. El aparato de transmisión incluye: un codificador configurado para generar una contraseña de comprobación de paridad de baja densidad (LDPC) por medio de codificación por LDPC de bits de entrada en base a una matriz de comprobación de paridad incluyendo bits de palabra de información y bits de paridad, la contraseña LDPC incluyendo una pluralidad de grupos de bits, cada uno incluyendo una pluralidad de bits; un intercalador configurado para intercalar la contraseña LDPC; y un modulador configurado para mapear la contraseña LDPC intercalada en un símbolo de modulación, en donde el intercalador está además configurado para intercalar la contraseña LDPC de manera que un bit incluido en un grupo de bits predeterminado de entre la pluralidad de grupos de bits que constituyen la contraseña LDPC en un bit predeterminado del símbolo de modulación.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201462001160P | 2014-05-21 | 2014-05-21 | |
KR1020150069924A KR101785692B1 (ko) | 2014-05-21 | 2015-05-19 | 송신 장치 및 그의 인터리빙 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2019014467A true MX2019014467A (es) | 2020-01-23 |
Family
ID=54882739
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016015202A MX370106B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014466A MX2019014466A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014467A MX2019014467A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016015202A MX370106B (es) | 2014-05-21 | 2015-05-21 | Aparato de transmision y metodo de intercalacion del mismo. |
MX2019014466A MX2019014466A (es) | 2014-05-21 | 2016-11-18 | Aparato de transmision y metodo de intercalacion del mismo. |
Country Status (7)
Country | Link |
---|---|
US (2) | US10396819B1 (es) |
EP (1) | EP3146637A4 (es) |
KR (4) | KR101785692B1 (es) |
CN (1) | CN106464271B (es) |
BR (1) | BR112016027099B1 (es) |
CA (2) | CA2949341C (es) |
MX (3) | MX370106B (es) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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US9780808B2 (en) * | 2014-05-21 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitter apparatus and bit interleaving method thereof |
WO2016117904A1 (ko) * | 2015-01-21 | 2016-07-28 | 엘지전자 주식회사 | 방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법, 및 방송 신호 수신 방법 |
US9729174B2 (en) * | 2015-05-19 | 2017-08-08 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
EP4216444A1 (en) | 2017-04-14 | 2023-07-26 | Kandou Labs, S.A. | Pipelined forward error correction for vector signaling code channel |
WO2018216999A1 (ko) * | 2017-05-24 | 2018-11-29 | 한국전자통신연구원 | Miso 동작을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
KR102465266B1 (ko) * | 2017-05-24 | 2022-11-11 | 한국전자통신연구원 | Miso 동작을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
CN108989844B (zh) * | 2017-06-02 | 2020-10-16 | 上海数字电视国家工程研究中心有限公司 | 适用于高速运动接收的数据帧的设计方法和传输*** |
WO2018226028A1 (ko) * | 2017-06-07 | 2018-12-13 | 한국전자통신연구원 | 주파수/타이밍 옵셋을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
KR20180133804A (ko) * | 2017-06-07 | 2018-12-17 | 한국전자통신연구원 | 주파수/타이밍 옵셋을 위한 게이트웨이 시그널링 방법 및 이를 위한 장치 |
US10693587B2 (en) | 2017-07-10 | 2020-06-23 | Kandou Labs, S.A. | Multi-wire permuted forward error correction |
US11356197B1 (en) | 2021-03-19 | 2022-06-07 | Kandou Labs SA | Error-tolerant forward error correction ordered set message decoder |
US11799700B1 (en) * | 2022-08-31 | 2023-10-24 | Qualcomm Incorporated | Decoding multi-level coded (MLC) systems |
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ATE556491T1 (de) * | 2002-07-03 | 2012-05-15 | Dtvg Licensing Inc | Methode und verfahren für die speicherverwaltung in low density parity check (ldpc) decodern |
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2015
- 2015-05-19 KR KR1020150069924A patent/KR101785692B1/ko active IP Right Grant
- 2015-05-21 EP EP15796436.2A patent/EP3146637A4/en active Pending
- 2015-05-21 BR BR112016027099-1A patent/BR112016027099B1/pt active IP Right Grant
- 2015-05-21 CA CA2949341A patent/CA2949341C/en active Active
- 2015-05-21 CA CA3027221A patent/CA3027221C/en active Active
- 2015-05-21 MX MX2016015202A patent/MX370106B/es active IP Right Grant
- 2015-05-21 CN CN201580027271.9A patent/CN106464271B/zh active Active
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2016
- 2016-11-18 MX MX2019014466A patent/MX2019014466A/es unknown
- 2016-11-18 MX MX2019014467A patent/MX2019014467A/es unknown
-
2017
- 2017-08-25 US US15/686,280 patent/US10396819B1/en active Active
- 2017-09-29 KR KR1020170128090A patent/KR101889536B1/ko active IP Right Grant
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2018
- 2018-08-10 KR KR1020180094027A patent/KR102018342B1/ko active IP Right Grant
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2019
- 2019-07-02 US US16/460,305 patent/US10873343B2/en active Active
- 2019-08-29 KR KR1020190106875A patent/KR102163692B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
MX2019014466A (es) | 2020-01-23 |
KR20190104493A (ko) | 2019-09-10 |
US20190326932A1 (en) | 2019-10-24 |
KR20170117973A (ko) | 2017-10-24 |
CA3027221C (en) | 2022-09-27 |
KR102018342B1 (ko) | 2019-09-05 |
MX370106B (es) | 2019-12-02 |
CA2949341A1 (en) | 2015-11-26 |
KR101785692B1 (ko) | 2017-10-16 |
MX2016015202A (es) | 2017-03-03 |
CA2949341C (en) | 2019-02-05 |
EP3146637A1 (en) | 2017-03-29 |
CN106464271B (zh) | 2019-10-18 |
CA3027221A1 (en) | 2015-11-26 |
KR20180093854A (ko) | 2018-08-22 |
CN106464271A (zh) | 2017-02-22 |
BR112016027099B1 (pt) | 2024-01-23 |
US10873343B2 (en) | 2020-12-22 |
KR101889536B1 (ko) | 2018-08-17 |
BR112016027099A2 (pt) | 2021-06-08 |
KR20150134280A (ko) | 2015-12-01 |
EP3146637A4 (en) | 2018-02-28 |
KR102163692B1 (ko) | 2020-10-08 |
US10396819B1 (en) | 2019-08-27 |
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