MX2009007876A - Metodo para emular eficientemente configuraciones de codigos de condiciones de arquitectura de computadora. - Google Patents
Metodo para emular eficientemente configuraciones de codigos de condiciones de arquitectura de computadora.Info
- Publication number
- MX2009007876A MX2009007876A MX2009007876A MX2009007876A MX2009007876A MX 2009007876 A MX2009007876 A MX 2009007876A MX 2009007876 A MX2009007876 A MX 2009007876A MX 2009007876 A MX2009007876 A MX 2009007876A MX 2009007876 A MX2009007876 A MX 2009007876A
- Authority
- MX
- Mexico
- Prior art keywords
- field device
- clip
- fastening
- assembly
- gap
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Clamps And Clips (AREA)
- Advance Control (AREA)
- Debugging And Monitoring (AREA)
Abstract
Se proporcionan la emulación de instrucciones de máquina fuente en la cual se usan códigos de condiciones de CPU de la máquina objetivo para producir ajustes de código de condiciones emuladas sin el uso, codificación o generación de instrucciones de ramificación.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP2007/000598 WO2007090518A1 (de) | 2006-02-07 | 2007-01-24 | Feldgerät mit einer montageklammer zur befestigung an einer befestigungsfläche |
US11/668,623 US8713289B2 (en) | 2007-01-30 | 2007-01-30 | Efficiently emulating computer architecture condition code settings without executing branch instructions |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2009007876A true MX2009007876A (es) | 2009-07-31 |
Family
ID=39241912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2009007876A MX2009007876A (es) | 2007-01-24 | 2007-01-24 | Metodo para emular eficientemente configuraciones de codigos de condiciones de arquitectura de computadora. |
Country Status (10)
Country | Link |
---|---|
US (1) | US8713289B2 (es) |
JP (1) | JP4662087B2 (es) |
KR (1) | KR101171423B1 (es) |
CN (1) | CN101601011B (es) |
BR (1) | BRPI0806390B1 (es) |
CA (1) | CA2675635C (es) |
IL (1) | IL198613A0 (es) |
MX (1) | MX2009007876A (es) |
TW (1) | TWI423126B (es) |
WO (1) | WO2008092776A1 (es) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9274797B2 (en) | 2012-12-19 | 2016-03-01 | International Business Machines Corporation | Computer processor with instruction for execution based on available instruction sets |
CA3016684C (en) | 2016-03-11 | 2024-05-28 | Lzlabs Gmbh | Load module compiler |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58195963A (ja) | 1982-05-12 | 1983-11-15 | Hitachi Ltd | デ−タ処理装置 |
US5313614A (en) * | 1988-12-06 | 1994-05-17 | At&T Bell Laboratories | Method and apparatus for direct conversion of programs in object code form between different hardware architecture computer systems |
US5574927A (en) * | 1994-03-25 | 1996-11-12 | International Meta Systems, Inc. | RISC architecture computer configured for emulation of the instruction set of a target computer |
US5560013A (en) * | 1994-12-06 | 1996-09-24 | International Business Machines Corporation | Method of using a target processor to execute programs of a source architecture that uses multiple address spaces |
US5778211A (en) * | 1996-02-15 | 1998-07-07 | Sun Microsystems, Inc. | Emulating a delayed exception on a digital computer having a corresponding precise exception mechanism |
US5903760A (en) | 1996-06-27 | 1999-05-11 | Intel Corporation | Method and apparatus for translating a conditional instruction compatible with a first instruction set architecture (ISA) into a conditional instruction compatible with a second ISA |
US6049864A (en) * | 1996-08-20 | 2000-04-11 | Intel Corporation | Method for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessor |
US5774694A (en) | 1996-09-25 | 1998-06-30 | Intel Corporation | Method and apparatus for emulating status flag |
US6463582B1 (en) * | 1998-10-21 | 2002-10-08 | Fujitsu Limited | Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method |
US6807625B1 (en) * | 2000-02-18 | 2004-10-19 | Hewlett-Packard Development Company, L.P. | Method and apparatus for efficiently generating, storing, and consuming arithmetic flags between producing and consuming macroinstructions when emulating with microinstructions |
US20030093649A1 (en) | 2001-11-14 | 2003-05-15 | Ronald Hilton | Flexible caching of translated code under emulation |
US7331040B2 (en) * | 2002-02-06 | 2008-02-12 | Transitive Limted | Condition code flag emulation for program code conversion |
JP2004152201A (ja) | 2002-11-01 | 2004-05-27 | Mitsubishi Electric Corp | プロセッサ装置 |
US7219337B2 (en) | 2003-03-06 | 2007-05-15 | Northrop Grumman Corporation | Direct instructions rendering emulation computer technique |
GB0315350D0 (en) * | 2003-06-28 | 2003-08-06 | Transitive Ltd | Method and apparatus for the emulation of high precision floating point instructions |
US7676797B2 (en) | 2005-01-31 | 2010-03-09 | Computer Associates Think, Inc. | System and method for managing long names in an application programming interface |
-
2007
- 2007-01-24 MX MX2009007876A patent/MX2009007876A/es active IP Right Grant
- 2007-01-30 US US11/668,623 patent/US8713289B2/en active Active
-
2008
- 2008-01-22 CN CN2008800035662A patent/CN101601011B/zh active Active
- 2008-01-22 WO PCT/EP2008/050725 patent/WO2008092776A1/en active Application Filing
- 2008-01-22 KR KR1020097013258A patent/KR101171423B1/ko active IP Right Grant
- 2008-01-22 JP JP2009546744A patent/JP4662087B2/ja active Active
- 2008-01-22 CA CA2675635A patent/CA2675635C/en active Active
- 2008-01-22 BR BRPI0806390-7A patent/BRPI0806390B1/pt active IP Right Grant
- 2008-01-25 TW TW097102923A patent/TWI423126B/zh active
-
2009
- 2009-05-07 IL IL198613A patent/IL198613A0/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2008092776A1 (en) | 2008-08-07 |
CA2675635C (en) | 2016-03-15 |
KR101171423B1 (ko) | 2012-08-06 |
US20080184014A1 (en) | 2008-07-31 |
BRPI0806390B1 (pt) | 2019-08-06 |
US8713289B2 (en) | 2014-04-29 |
JP4662087B2 (ja) | 2011-03-30 |
IL198613A0 (en) | 2010-02-17 |
KR20090115119A (ko) | 2009-11-04 |
CN101601011A (zh) | 2009-12-09 |
JP2010517154A (ja) | 2010-05-20 |
TWI423126B (zh) | 2014-01-11 |
CA2675635A1 (en) | 2008-08-07 |
BRPI0806390A2 (pt) | 2011-09-06 |
TW200844852A (en) | 2008-11-16 |
CN101601011B (zh) | 2012-07-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG | Grant or registration |