KR980007640A - HDTV's Vertical Video Format Converter - Google Patents

HDTV's Vertical Video Format Converter

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Publication number
KR980007640A
KR980007640A KR1019960019669A KR19960019669A KR980007640A KR 980007640 A KR980007640 A KR 980007640A KR 1019960019669 A KR1019960019669 A KR 1019960019669A KR 19960019669 A KR19960019669 A KR 19960019669A KR 980007640 A KR980007640 A KR 980007640A
Authority
KR
South Korea
Prior art keywords
parallel
converting
frame memory
byte
video format
Prior art date
Application number
KR1019960019669A
Other languages
Korean (ko)
Other versions
KR100413409B1 (en
Inventor
한동일
Original Assignee
구자홍
엘지전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 구자홍, 엘지전자 주식회사 filed Critical 구자홍
Priority to KR1019960019669A priority Critical patent/KR100413409B1/en
Publication of KR980007640A publication Critical patent/KR980007640A/en
Application granted granted Critical
Publication of KR100413409B1 publication Critical patent/KR100413409B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

본 발명은 NTSC 방송의 수직 방향 영상 포맷을 최소한의 메모리를 이용하여 HDTV 모니터의 수직영상 포맷에 맞도록 변환하는 수직영상 포맷 변환장치에 관한 것으로서, 특히 n(여기서, n은 정수)바이트 워드로 구성되는 프레임 메모리와, 상기 프레임 메모리에서 병렬로 출력되는 n 바이트의 데이터를 저장하는 다수의 선입선출(FIFO) 메모리와, 상기 다수의 FIFO 메모리에서 각각 병렬로 출력되는 데이터를 각각 시리얼로 변환하는 다수의 병/직렬 변환부와, 상기 다수의 병/직렬 변환부로부터 각각 출력되는 데이터를 필터링하여 보간한 후 데이메이션을 수행하고 출력속도에 맞춰 출력하는 필터 및 포맷 변환부로 구성되어, 프레임을 변환시 사용되는 프레임 메모리를 n바이트 워드로 구성하여 수직 영상 포맷 변환시에도 이용함으로써, n탭 필터링을 위해 사용하는 라인 메모리의 크기를 줄여 셋트의 사이즈와 비용을 줄이며, 별도의 라인 메모리의 추가 없이 주문형 IC(ASIC) 내부에 구현이 가능하다.The present invention relates to a vertical video format converting apparatus for converting a vertical video format of an NTSC broadcast to a vertical video format of an HDTV monitor using a minimum of memory, and in particular, n (where n is an integer) byte word. A plurality of first-in first-out (FIFO) memories storing n-byte data output in parallel from the frame memory, and a plurality of serially converting data output in parallel from the plurality of FIFO memories, respectively. It consists of a parallel / serial converter, and a filter and a format converter for filtering the data output from the plurality of parallel / serial converter, respectively, interpolating and outputting the data according to the output speed, used for converting the frame The frame memory is composed of n byte words and used for vertical image format conversion. The size of the line memory to reduce reduce the size and cost of the set, this can be implemented within the application specific IC (ASIC) without the addition of extra line memory.

Description

에이치디티브이(HDTV)의 수직영상 포맷변환 장치HDTV's Vertical Video Format Converter

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 종래의 HDTV의 수직영상 포맷변환 장치의 일실시예를 나타낸 구성 블록도.1 is a block diagram showing an embodiment of a conventional vertical image format conversion apparatus of HDTV.

제 2 도는 본 발명에 따른 HDTV의 수직영상 포맷변환 장치의 일실시예를 나타낸 구성 블록도.2 is a block diagram showing an embodiment of a vertical image format conversion apparatus of HDTV according to the present invention.

제 3 도는 본 발명에 따른 HDTV의 수직영상 포맷변환 장치의 각부의 동작 타이밍도.3 is an operation timing diagram of each part of the apparatus for converting vertical video format of HDTV according to the present invention.

Claims (4)

n(여기서, n은 정수)바이트 워드로 구성되는 프레임 메모리와 상기 프레임 메모리에서 병렬로 출력되는 n바이트의 데이터를 클럭에 따라 순차적으로 병렬 저장하는 다수의 선입선출(FIFO) 메모리와, 상기 다수의 FIFO 메모리에서 각각 병렬로 출력되는 n바이트 데이터를 각각 시리얼로 변환하는 다수의 병/직렬 변환부와, 상기 다수의 병/직렬 변환부로부터 각각 출력되는 데이터를 필터링하여 보간한 후 데이메이션을 수행하고 출력속도에 맞춰 출력하는 필터 및 포맷 변환부로 포함하여 구성되는 에이치디티브이의 수직영상 포맷 변환장치.a frame memory consisting of n (where n is an integer) byte word, a plurality of first-in first-out (FIFO) memories sequentially storing parallelly the n-byte data output in parallel from the frame memory according to a clock, and the plurality of Perform parallelization after filtering and interpolating a plurality of parallel / serial converters respectively converting n-byte data output in parallel from a FIFO memory to serial, and respectively outputting data from the plurality of parallel / serial converters. H-Dive vertical image format conversion device including a filter and a format conversion unit for outputting according to the output speed. 제 1 항에 있어서, 상기 프레임 메모리의 워드는 상기 필터 및 변환부의 필터의 탭수만큼 병렬로 구성됨을 특징으로 하는 에이치디티브이의 수직영상 포맷 변환장치.The apparatus of claim 1, wherein the words of the frame memory are configured in parallel by the number of taps of the filter and the filter of the converter. 제 1 항에 있어서, 상기 프레임 메모리는 프레임을 변환시에 사용하는 프레임 메모리임을 특징으로 하는 에이치디티브이의 수직영상 포맷 변환장치.The apparatus of claim 1, wherein the frame memory is a frame memory used for converting a frame. 제1항에 있어서 상기 병/직렬 변환부는 1클럭에 1바이트씩 n 클럭동안 n 바이트의 데이터를 출력함을 특징으로 하는 에이치디티브이의 수직영상 포맷 변환장치.2. The apparatus of claim 1, wherein the parallel / serial converter outputs n bytes of data for one clock per byte by n bytes.
KR1019960019669A 1996-06-03 1996-06-03 Device for converting vertical image format of hdtv KR100413409B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960019669A KR100413409B1 (en) 1996-06-03 1996-06-03 Device for converting vertical image format of hdtv

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960019669A KR100413409B1 (en) 1996-06-03 1996-06-03 Device for converting vertical image format of hdtv

Publications (2)

Publication Number Publication Date
KR980007640A true KR980007640A (en) 1998-03-30
KR100413409B1 KR100413409B1 (en) 2004-04-17

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960019669A KR100413409B1 (en) 1996-06-03 1996-06-03 Device for converting vertical image format of hdtv

Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100398867B1 (en) * 1998-12-30 2004-03-19 주식회사 대우일렉트로닉스 Data interpolation apparatus for use in a digital television

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4224876B2 (en) 1998-09-11 2009-02-18 ソニー株式会社 Storage device, writing method and reading method

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950009698B1 (en) * 1992-12-29 1995-08-26 주식회사금성사 Line tripler of hdtv/ntsc dual receiver
JP3040275B2 (en) * 1993-02-15 2000-05-15 沖電気工業株式会社 Format conversion circuit
KR950007498A (en) * 1993-08-07 1995-03-21 이헌조 Frame conversion device of video signal
US5680156A (en) * 1994-11-02 1997-10-21 Texas Instruments Incorporated Memory architecture for reformatting and storing display data in standard TV and HDTV systems

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100398867B1 (en) * 1998-12-30 2004-03-19 주식회사 대우일렉트로닉스 Data interpolation apparatus for use in a digital television

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Publication number Publication date
KR100413409B1 (en) 2004-04-17

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