KR970700914A - 메모리 디바이스(improved memory devices) - Google Patents

메모리 디바이스(improved memory devices)

Info

Publication number
KR970700914A
KR970700914A KR1019960704161A KR19960704161A KR970700914A KR 970700914 A KR970700914 A KR 970700914A KR 1019960704161 A KR1019960704161 A KR 1019960704161A KR 19960704161 A KR19960704161 A KR 19960704161A KR 970700914 A KR970700914 A KR 970700914A
Authority
KR
South Korea
Prior art keywords
memory devices
improved
improved memory
devices
memory
Prior art date
Application number
KR1019960704161A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR970700914A publication Critical patent/KR970700914A/ko

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Dram (AREA)
KR1019960704161A 1994-11-29 1996-07-29 메모리 디바이스(improved memory devices) KR970700914A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9424100A GB9424100D0 (en) 1994-11-29 1994-11-29 Improved memory devices
PCT/GB1995/002780 WO1996017354A1 (en) 1994-11-29 1995-11-29 Improved memory devices

Publications (1)

Publication Number Publication Date
KR970700914A true KR970700914A (ko) 1997-02-12

Family

ID=10765168

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960704161A KR970700914A (ko) 1994-11-29 1996-07-29 메모리 디바이스(improved memory devices)

Country Status (6)

Country Link
US (1) US5715200A (ko)
EP (1) EP0741902B1 (ko)
KR (1) KR970700914A (ko)
DE (1) DE69531287T2 (ko)
GB (1) GB9424100D0 (ko)
WO (1) WO1996017354A1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3532350B2 (ja) * 1996-06-20 2004-05-31 株式会社ルネサステクノロジ データトレース装置
US6151236A (en) * 2000-02-29 2000-11-21 Enhanced Memory Systems, Inc. Enhanced bus turnaround integrated circuit dynamic random access memory device
CN107341287B (zh) * 2017-06-01 2020-07-17 西南电子技术研究所(中国电子科技集团公司第十研究所) 自动确定印制板组件中元件被模态节线穿过的模态数方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4685082A (en) * 1985-02-22 1987-08-04 Wang Laboratories, Inc. Simplified cache with automatic update
US4894770A (en) * 1987-06-01 1990-01-16 Massachusetts Institute Of Technology Set associative memory
US5226147A (en) * 1987-11-06 1993-07-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device for simple cache system
EP0895162A3 (en) * 1992-01-22 1999-11-10 Enhanced Memory Systems, Inc. Enhanced dram with embedded registers
US5383146A (en) * 1992-06-08 1995-01-17 Music Semiconductors, Inc. Memory with CAM and RAM partitions
US5450351A (en) * 1993-11-19 1995-09-12 International Business Machines Corporation Content addressable memory implementation with random access memory

Also Published As

Publication number Publication date
DE69531287T2 (de) 2004-05-27
EP0741902B1 (en) 2003-07-16
US5715200A (en) 1998-02-03
GB9424100D0 (en) 1995-01-18
WO1996017354A1 (en) 1996-06-06
DE69531287D1 (de) 2003-08-21
EP0741902A1 (en) 1996-11-13

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
NORF Unpaid initial registration fee