KR970053214A - 다중 레벨 스택 집적된 회러칩 어셈블리 - Google Patents

다중 레벨 스택 집적된 회러칩 어셈블리 Download PDF

Info

Publication number
KR970053214A
KR970053214A KR1019960082426A KR19960082426A KR970053214A KR 970053214 A KR970053214 A KR 970053214A KR 1019960082426 A KR1019960082426 A KR 1019960082426A KR 19960082426 A KR19960082426 A KR 19960082426A KR 970053214 A KR970053214 A KR 970053214A
Authority
KR
South Korea
Prior art keywords
integrated circuit
major surface
wiring pad
circuit chip
chip assembly
Prior art date
Application number
KR1019960082426A
Other languages
English (en)
Inventor
데가니 이논
딕슨 머더러 토마스
한영준
Original Assignee
엘리 와이스
루센트 테크놀로지스 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘리 와이스, 루센트 테크놀로지스 인코포레이티드 filed Critical 엘리 와이스
Publication of KR970053214A publication Critical patent/KR970053214A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06506Wire or wire-like electrical connections between devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/0651Wire or wire-like electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06517Bump or bump-like direct electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06582Housing for the assembly, e.g. chip scale package [CSP]
    • H01L2225/06586Housing with external bump or bump-like connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

집적된 회로의 다중 레벨 스택은 스택의 다른 레벨상에 위치된 칩의 와이어링 패드(I/O)를 상호접속하는 와이어본드와 함께 교호하는 칩 및 플립 칩을 갖는다. 부가하여, 수직으로 인접한 레벨에 위치된 플립 칩과 칩사이에 위치된 솔더 범프는 이들 칩의 와이어링 패드를 이들 플립 칩이 와이어링 패드에 상호 접속한다.

Description

다중 레벨 스택 집적된 회로칩 어셈블리
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1는 본 발명의 특정 실시예에 따른 다중 레벨 스택 집적된 회로칩 어셈블리의 부분적 단면의 정면도.

Claims (15)

  1. 다중 레벨 스택 집적된 회로칩 어셈블리에 있어서 : (a) 배선 기판 또는 제1집적된 회로칩을 구비하는 제1장치로서, 그 상단의 주 표면은 적어도 제1배선 패드를 갖는, 상기 제1장치; (b) 집적 회로칩 또는 배선 기판을 각각 구비하는 제2 및 제3장치로서, 상기 제3장치는 상기 제2장치를 덮도록 위치되고, 상기 제2장치는 상기 제1장치르 덮도록 위치되며, 상기 제2장치의 하단 주 표면은 집적회로 및 적어도 제3배선 패드를 갖게 되는, 상기 제2 및 제3장치; 및 (3) 제3배선 패드를 제1배선 패드에 직접적으로 전기적 접속하는 와이어본드를 구비하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  2. 제1항에 있어서, 제3장치의 상단 주 표면과 제2장치의 하단 주 표면은 실질적으로 동일한 측면 치수를 갖는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  3. 제2항에 있어서, 제3장치의 하단 주 표면을 제2장치의 상단 주 표면에 결합하는 접착물 본딩층을 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  4. 제1항에 있어서, 제3장치의 하단 주 표면을 제2장치의 상단 주 표면에 결합하는 접착물 본딩층을 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  5. 제4항에 있어서, 제2배선패드를 제1장치의 상단 표면상에 위치된 제3배선 패들에 직접 접속하는 제1솔더 범프를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  6. 제1항에 있어서, 제2배선패드를 제1장치의 상단 표면상에 위치된 제3배선 패들에 직접 접속하는 제1솔더 범프를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  7. 제6항에 있어서, 집적 회로칩 및 배선 기판을 각각 구비하는 제4 및 제5장치로서, 상기 제5장치는 상기 제4장치를 덮고 있고, 상기 제4장치는 상기 제3장치를 덮고 있으며, 상기 제4장치는 그 하단 주 표면에 위치된 적어도 제4배선 패드를 갖고, 상기 제5장치는 그 상단 주 표면에 위치된 적어도 제5배선 패드를 가지는, 상기 제4및 제5장치; 및 제5배선 패드를 제1장치의 상단 표면상에 위치된 제6배선 패드에 직접 접속하는 제2와이어본드를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  8. 제1항에 있어서, 집적 회로칩 및 배선 기판을 각각 구비하는 제4 및 제5장치로서, 상기 제5장치는 상기 제4장치를 덮고 있고, 상기 제4장치는 상기 제3장치를 덮고 있으며, 상기 제4장치는 그 상단 주 표면에 위치된 적어도 제4배선 패드를 가지는, 상기 제4 및 제5장치; 및 제5배선 패드를 제1장치의 상단 표면상에 위치된 제6배선 패드에 직접 접속하는 제2와이어본드를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  9. 제8항에 있어서, 제2배선 패드를 제1장치의 상단 표면상에 위치된 제3배선 패드에 직접 접속하는 제1솔더 범프, 및 제4배선 패드를 제3장치의 상단 표면상에 위치된 제7배선 패드에 직접 접속하는 제2솔더 범프를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  10. 제9항에 있어서, 제5장치의 하단 주 표면을 제4장치의 상단 주 표면에 결합하는 접착물 본딩층을 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  11. 제10항에 있어서, 제3장치의 상단 주 표면을 제2장치의 하단 주 표면은 실질적으로 동일한 측면 치수를 갖는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  12. 제10항에 있어서, 제4배선 패드를 제3장치의 상단 표면상에 위치된 제7배선 패드에 직접 접속하는 제2솔더 범프를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  13. 제9항에 있어서, 제5장치의 상단 표면상에 위치된 제8배선 패드를 제3장치의 상단 표면상에 위치한 제9배선 패드에 직접 접속하는 제3와이어본드를 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  14. 제11항에 있어서, 제5장치의 하단 주 표면을 제4장치의 상단 주 표면에 결합하는 제2접착물 본딩층을 더 구비하는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
  15. 제9항에 있어서, 제4장치의 상단 주 표면 및 제5장치의 하단 주 표면은 실질적으로 동일한 측면 치수를 가지는 것을 특징으로 하는 다중 레벨 스택 집적된 회로칩 어셈블리.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960082426A 1995-12-28 1996-12-28 다중 레벨 스택 집적된 회러칩 어셈블리 KR970053214A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58022095A 1995-12-28 1995-12-28
US580,220 1995-12-28

Publications (1)

Publication Number Publication Date
KR970053214A true KR970053214A (ko) 1997-07-29

Family

ID=24320199

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960082426A KR970053214A (ko) 1995-12-28 1996-12-28 다중 레벨 스택 집적된 회러칩 어셈블리

Country Status (4)

Country Link
EP (1) EP0782191A2 (ko)
JP (1) JPH09186289A (ko)
KR (1) KR970053214A (ko)
TW (1) TW315515B (ko)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100379608B1 (ko) * 1999-02-17 2003-04-10 샤프 가부시키가이샤 반도체장치 및 그의 제조방법
KR100386995B1 (ko) * 2000-01-17 2003-06-12 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 배선 방법
KR100464561B1 (ko) * 2000-04-11 2004-12-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 이것의 제조방법
US8907383B2 (en) 2012-12-20 2014-12-09 SK Hynix Inc. Stack packages having token ring loops

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100467946B1 (ko) * 1997-01-24 2005-01-24 로무 가부시키가이샤 반도체 칩의 제조방법
DE19743264C2 (de) * 1997-09-30 2002-01-17 Infineon Technologies Ag Verfahren zur Herstellung einer Emulationsschaltkreisanordnung sowie Emulationsschaltkreisanordnung mit zwei integrierten Schaltkreisen
US6413797B2 (en) 1997-10-09 2002-07-02 Rohm Co., Ltd. Semiconductor device and method for making the same
CA2218307C (en) * 1997-10-10 2006-01-03 Gennum Corporation Three dimensional packaging configuration for multi-chip module assembly
JP2000164796A (ja) * 1998-11-27 2000-06-16 Nec Corp マルチチップモジュール
JP3512657B2 (ja) * 1998-12-22 2004-03-31 シャープ株式会社 半導体装置
JP2001044358A (ja) * 1999-07-28 2001-02-16 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6605875B2 (en) 1999-12-30 2003-08-12 Intel Corporation Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
US6344401B1 (en) * 2000-03-09 2002-02-05 Atmel Corporation Method of forming a stacked-die integrated circuit chip package on a water level
JP2002176137A (ja) 2000-09-28 2002-06-21 Toshiba Corp 積層型半導体デバイス
KR100537835B1 (ko) * 2000-10-19 2005-12-19 앰코 테크놀로지 코리아 주식회사 반도체 패키지 제조방법
JP3558595B2 (ja) * 2000-12-22 2004-08-25 松下電器産業株式会社 半導体チップ,半導体チップ群及びマルチチップモジュール
US6762122B2 (en) 2001-09-27 2004-07-13 Unitivie International Limited Methods of forming metallurgy structures for wire and solder bonding
EP1367646A1 (fr) * 2002-05-23 2003-12-03 Valtronic S.A. Module électronique
US6960828B2 (en) 2002-06-25 2005-11-01 Unitive International Limited Electronic structures including conductive shunt layers
US7547623B2 (en) 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
JP4406300B2 (ja) * 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
US7427557B2 (en) 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
JP4061551B2 (ja) * 2004-03-24 2008-03-19 サンケン電気株式会社 半導体装置
US7700409B2 (en) 2004-05-24 2010-04-20 Honeywell International Inc. Method and system for stacking integrated circuits
US7863720B2 (en) 2004-05-24 2011-01-04 Honeywell International Inc. Method and system for stacking integrated circuits
FR2873853B1 (fr) * 2004-07-27 2006-12-15 St Microelectronics Sa Dispositif electronique comprenant plusieurs plaquettes de circuits empilees et procede de realisation d'un tel dispositif
JP4509052B2 (ja) 2005-03-29 2010-07-21 三洋電機株式会社 回路装置
SG130055A1 (en) 2005-08-19 2007-03-20 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices
US7932615B2 (en) 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
JP5559452B2 (ja) 2006-12-20 2014-07-23 富士通セミコンダクター株式会社 半導体装置及びその製造方法
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
TWI799312B (zh) * 2022-07-05 2023-04-11 瑞昱半導體股份有限公司 輸出入埠電路及其晶片

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100379608B1 (ko) * 1999-02-17 2003-04-10 샤프 가부시키가이샤 반도체장치 및 그의 제조방법
US7276437B2 (en) 1999-02-17 2007-10-02 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof
US7528011B2 (en) 1999-02-17 2009-05-05 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof
KR100386995B1 (ko) * 2000-01-17 2003-06-12 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 배선 방법
US7071574B1 (en) 2000-01-17 2006-07-04 Renesas Technology Corp. Semiconductor device and its wiring method
US7288837B2 (en) 2000-01-17 2007-10-30 Renesas Technology Corp. Semiconductor device and its writing method
US7547963B2 (en) 2000-01-17 2009-06-16 Renesas Technology Corp. Semiconductor device and its wiring method
KR100464561B1 (ko) * 2000-04-11 2004-12-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 이것의 제조방법
US8907383B2 (en) 2012-12-20 2014-12-09 SK Hynix Inc. Stack packages having token ring loops

Also Published As

Publication number Publication date
TW315515B (ko) 1997-09-11
JPH09186289A (ja) 1997-07-15
EP0782191A2 (en) 1997-07-02

Similar Documents

Publication Publication Date Title
KR970053214A (ko) 다중 레벨 스택 집적된 회러칩 어셈블리
KR102556518B1 (ko) 상부 칩 스택을 지지하는 서포팅 블록을 포함하는 반도체 패키지
US7061087B2 (en) Multi-package stack module
WO2001050525A3 (en) Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
EP1137067A3 (en) Multi-chip ball grid array ic packages
AU2002353894A1 (en) A method of stacking layers containing encapsulated integrated circuit chips with one or more overlying interconnect layers
US6294838B1 (en) Multi-chip stacked package
KR100593703B1 (ko) 돌출부 와이어 본딩 구조 보강용 더미 칩을 포함하는반도체 칩 적층 패키지
US20050133935A1 (en) Embedded redistribution interposer for footprint compatible chip package conversion
JPS5892230A (ja) 半導体装置
US6563206B2 (en) Semiconductor device and semiconductor device structure
KR102435517B1 (ko) 칩 스택 패키지
CN100524736C (zh) 堆叠型晶片封装结构
CN113130473A (zh) 芯片封装结构
CA2273223A1 (en) Chip-size package using a polyimide pcb interposer
KR970077563A (ko) 적층칩 볼 그리드 어레이
GB2344217A (en) Multichip module comprising stacked semiconductor chips
JP2005228901A (ja) 半導体装置
KR970077544A (ko) 덮개의 기능을 겸비하는 칩이 접착된 기판을 이용한 적층형 볼그리드 어레이 패키지
KR101006518B1 (ko) 스택 패키지
JPH05259374A (ja) 高密度実装配線基板およびその高密度実装方法
KR930007920Y1 (ko) 양면 박막회로판을 갖는 이중 패키지 구조
KR20060005714A (ko) 스택 패키지
KR0129132Y1 (ko) I.c 패캐이지
KR960039304A (ko) 고집적 메모리 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application